From patchwork Fri Sep 21 11:55:08 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabrizio Castro X-Patchwork-Id: 973191 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=bp.renesas.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 42GsVn4W10z9sCc for ; Fri, 21 Sep 2018 21:55:45 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390097AbeIURn6 (ORCPT ); Fri, 21 Sep 2018 13:43:58 -0400 Received: from relmlor3.renesas.com ([210.160.252.173]:61440 "EHLO relmlie2.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2390027AbeIURn5 (ORCPT ); Fri, 21 Sep 2018 13:43:57 -0400 Received: from unknown (HELO relmlir4.idc.renesas.com) ([10.200.68.154]) by relmlie2.idc.renesas.com with ESMTP; 21 Sep 2018 20:55:23 +0900 Received: from relmlii1.idc.renesas.com (relmlii1.idc.renesas.com [10.200.68.65]) by relmlir4.idc.renesas.com (Postfix) with ESMTP id B55717412E; Fri, 21 Sep 2018 20:55:23 +0900 (JST) X-IronPort-AV: E=Sophos;i="5.54,284,1534777200"; d="scan'208";a="291574200" Received: from unknown (HELO fabrizio-dev.ree.adwin.renesas.com) ([10.226.36.250]) by relmlii1.idc.renesas.com with ESMTP; 21 Sep 2018 20:55:19 +0900 From: Fabrizio Castro To: Ulf Hansson , Rob Herring , Mark Rutland , Laurent Pinchart , Geert Uytterhoeven , Linus Walleij , Wolfram Sang Cc: Fabrizio Castro , Simon Horman , Magnus Damm , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, Chris Paterson , Biju Das Subject: [PATCH 1/4] dt-bindings: mmc: renesas_sdhi: Add r8a77470 support Date: Fri, 21 Sep 2018 12:55:08 +0100 Message-Id: <1537530911-443-2-git-send-email-fabrizio.castro@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537530911-443-1-git-send-email-fabrizio.castro@bp.renesas.com> References: <1537530911-443-1-git-send-email-fabrizio.castro@bp.renesas.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Document SDHI support for the RZ/G1C (a.k.a. R8A77470) SoC. Signed-off-by: Fabrizio Castro Reviewed-by: Biju Das Acked-by: Wolfram Sang Reviewed-by: Simon Horman --- Documentation/devicetree/bindings/mmc/tmio_mmc.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt index c434200..8f3a113 100644 --- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt +++ b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt @@ -17,6 +17,7 @@ Required properties: "renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC "renesas,sdhi-r8a7743" - SDHI IP on R8A7743 SoC "renesas,sdhi-r8a7745" - SDHI IP on R8A7745 SoC + "renesas,sdhi-r8a77470" - SDHI IP on R8A77470 SoC "renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC "renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC "renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC From patchwork Fri Sep 21 11:55:09 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabrizio Castro X-Patchwork-Id: 973187 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=bp.renesas.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 42GsVW6RGMz9sCc for ; Fri, 21 Sep 2018 21:55:31 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390142AbeIURoB (ORCPT ); Fri, 21 Sep 2018 13:44:01 -0400 Received: from relmlor3.renesas.com ([210.160.252.173]:23472 "EHLO relmlie2.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2390100AbeIURoA (ORCPT ); Fri, 21 Sep 2018 13:44:00 -0400 Received: from unknown (HELO relmlir1.idc.renesas.com) ([10.200.68.151]) by relmlie2.idc.renesas.com with ESMTP; 21 Sep 2018 20:55:27 +0900 Received: from relmlii1.idc.renesas.com (relmlii1.idc.renesas.com [10.200.68.65]) by relmlir1.idc.renesas.com (Postfix) with ESMTP id B320187A95; Fri, 21 Sep 2018 20:55:27 +0900 (JST) X-IronPort-AV: E=Sophos;i="5.54,284,1534777200"; d="scan'208";a="291574207" Received: from unknown (HELO fabrizio-dev.ree.adwin.renesas.com) ([10.226.36.250]) by relmlii1.idc.renesas.com with ESMTP; 21 Sep 2018 20:55:23 +0900 From: Fabrizio Castro To: Ulf Hansson , Rob Herring , Mark Rutland , Laurent Pinchart , Geert Uytterhoeven , Linus Walleij , Wolfram Sang Cc: Fabrizio Castro , Simon Horman , Magnus Damm , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, Chris Paterson , Biju Das Subject: [PATCH 2/4] pinctrl: sh-pfc: r8a77470: Add SDHI2 voltage switch Date: Fri, 21 Sep 2018 12:55:09 +0100 Message-Id: <1537530911-443-3-git-send-email-fabrizio.castro@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537530911-443-1-git-send-email-fabrizio.castro@bp.renesas.com> References: <1537530911-443-1-git-send-email-fabrizio.castro@bp.renesas.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add SH_PFC_PIN_CFG_IO_VOLTAGE definition for the SDHI2 pins capable of switching voltage. Please note that with the RZ/G1C only 1 bit of the POC Control Register is used to control each interface. Signed-off-by: Fabrizio Castro Reviewed-by: Biju Das Acked-by: Wolfram Sang --- drivers/pinctrl/sh-pfc/pfc-r8a77470.c | 32 +++++++++++++++++++++++++++++++- 1 file changed, 31 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77470.c b/drivers/pinctrl/sh-pfc/pfc-r8a77470.c index 9d3ed43..a1248e2 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a77470.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77470.c @@ -17,7 +17,19 @@ PORT_GP_1(3, 27, fn, sfx), \ PORT_GP_1(3, 28, fn, sfx), \ PORT_GP_1(3, 29, fn, sfx), \ - PORT_GP_26(4, fn, sfx), \ + PORT_GP_14(4, fn, sfx), \ + PORT_GP_CFG_1(4, 14, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \ + PORT_GP_CFG_1(4, 15, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \ + PORT_GP_CFG_1(4, 16, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \ + PORT_GP_CFG_1(4, 17, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \ + PORT_GP_CFG_1(4, 18, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \ + PORT_GP_CFG_1(4, 19, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \ + PORT_GP_1(4, 20, fn, sfx), \ + PORT_GP_1(4, 21, fn, sfx), \ + PORT_GP_1(4, 22, fn, sfx), \ + PORT_GP_1(4, 23, fn, sfx), \ + PORT_GP_1(4, 24, fn, sfx), \ + PORT_GP_1(4, 25, fn, sfx), \ PORT_GP_32(5, fn, sfx) enum { @@ -2321,9 +2333,27 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { { }, }; +static int r8a77470_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, + u32 *pocctrl) +{ + unsigned int _bank = pin >> 5; + unsigned int _pin = pin & 0x1f; + *pocctrl = 0xe60600b0; + + if (_bank == 4 && _pin >= 14 && _pin <= 19) + return 1; + + return -EINVAL; +} + +static const struct sh_pfc_soc_operations r8a77470_pinmux_ops = { + .pin_to_pocctrl = r8a77470_pin_to_pocctrl, +}; + #ifdef CONFIG_PINCTRL_PFC_R8A77470 const struct sh_pfc_soc_info r8a77470_pinmux_info = { .name = "r8a77470_pfc", + .ops = &r8a77470_pinmux_ops, .unlock_reg = 0xe6060000, /* PMMR */ .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, From patchwork Fri Sep 21 11:55:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabrizio Castro X-Patchwork-Id: 973188 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=bp.renesas.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 42GsVb56Jzz9sCq for ; Fri, 21 Sep 2018 21:55:35 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390148AbeIURoF (ORCPT ); Fri, 21 Sep 2018 13:44:05 -0400 Received: from relmlor4.renesas.com ([210.160.252.174]:28767 "EHLO relmlie3.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2390100AbeIURoE (ORCPT ); Fri, 21 Sep 2018 13:44:04 -0400 Received: from unknown (HELO relmlir1.idc.renesas.com) ([10.200.68.151]) by relmlie3.idc.renesas.com with ESMTP; 21 Sep 2018 20:55:31 +0900 Received: from relmlii1.idc.renesas.com (relmlii1.idc.renesas.com [10.200.68.65]) by relmlir1.idc.renesas.com (Postfix) with ESMTP id AA22187AA5; Fri, 21 Sep 2018 20:55:31 +0900 (JST) X-IronPort-AV: E=Sophos;i="5.54,284,1534777200"; d="scan'208";a="291574209" Received: from unknown (HELO fabrizio-dev.ree.adwin.renesas.com) ([10.226.36.250]) by relmlii1.idc.renesas.com with ESMTP; 21 Sep 2018 20:55:27 +0900 From: Fabrizio Castro To: Ulf Hansson , Rob Herring , Mark Rutland , Laurent Pinchart , Geert Uytterhoeven , Linus Walleij , Wolfram Sang Cc: Fabrizio Castro , Simon Horman , Magnus Damm , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, Chris Paterson , Biju Das Subject: [PATCH 3/4] ARM: dts: r8a77470: Add SDHI2 support Date: Fri, 21 Sep 2018 12:55:10 +0100 Message-Id: <1537530911-443-4-git-send-email-fabrizio.castro@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537530911-443-1-git-send-email-fabrizio.castro@bp.renesas.com> References: <1537530911-443-1-git-send-email-fabrizio.castro@bp.renesas.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add SoC specific device tree definitions for the SDHI2 interface. Signed-off-by: Fabrizio Castro Reviewed-by: Biju Das Acked-by: Wolfram Sang --- arch/arm/boot/dts/r8a77470.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi index 9aba350..9e7f86d 100644 --- a/arch/arm/boot/dts/r8a77470.dtsi +++ b/arch/arm/boot/dts/r8a77470.dtsi @@ -412,6 +412,21 @@ status = "disabled"; }; + sdhi2: sd@ee160000 { + compatible = "renesas,sdhi-r8a77470", + "renesas,rcar-gen2-sdhi"; + reg = <0 0xee160000 0 0x328>; + interrupts = ; + clocks = <&cpg CPG_MOD 312>; + dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, + <&dmac1 0xd3>, <&dmac1 0xd4>; + dma-names = "tx", "rx", "tx", "rx"; + max-frequency = <97500000>; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 312>; + status = "disabled"; + }; + gic: interrupt-controller@f1001000 { compatible = "arm,gic-400"; #interrupt-cells = <3>; From patchwork Fri Sep 21 11:55:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabrizio Castro X-Patchwork-Id: 973190 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=bp.renesas.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 42GsVk2t86z9sCh for ; Fri, 21 Sep 2018 21:55:42 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390156AbeIURoI (ORCPT ); Fri, 21 Sep 2018 13:44:08 -0400 Received: from relmlor4.renesas.com ([210.160.252.174]:28767 "EHLO relmlie3.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2389746AbeIURoI (ORCPT ); Fri, 21 Sep 2018 13:44:08 -0400 Received: from unknown (HELO relmlir4.idc.renesas.com) ([10.200.68.154]) by relmlie3.idc.renesas.com with ESMTP; 21 Sep 2018 20:55:35 +0900 Received: from relmlii1.idc.renesas.com (relmlii1.idc.renesas.com [10.200.68.65]) by relmlir4.idc.renesas.com (Postfix) with ESMTP id A6ECE74144; Fri, 21 Sep 2018 20:55:35 +0900 (JST) X-IronPort-AV: E=Sophos;i="5.54,284,1534777200"; d="scan'208";a="291574216" Received: from unknown (HELO fabrizio-dev.ree.adwin.renesas.com) ([10.226.36.250]) by relmlii1.idc.renesas.com with ESMTP; 21 Sep 2018 20:55:31 +0900 From: Fabrizio Castro To: Ulf Hansson , Rob Herring , Mark Rutland , Laurent Pinchart , Geert Uytterhoeven , Linus Walleij , Wolfram Sang Cc: Fabrizio Castro , Simon Horman , Magnus Damm , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, Chris Paterson , Biju Das Subject: [PATCH 4/4] ARM: dts: iwg23s-sbc: Add uSD card support Date: Fri, 21 Sep 2018 12:55:11 +0100 Message-Id: <1537530911-443-5-git-send-email-fabrizio.castro@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537530911-443-1-git-send-email-fabrizio.castro@bp.renesas.com> References: <1537530911-443-1-git-send-email-fabrizio.castro@bp.renesas.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add uSD card support to the iwg23s single board computer powered by the RZ/G1C SoC (a.k.a. r8a77470). Signed-off-by: Fabrizio Castro Reviewed-by: Biju Das Acked-by: Wolfram Sang --- Hello Simon, this patch can only be taken after patch "pinctrl: sh-pfc: r8a77470: Add SDHI2 voltage switch" from this series appears on a release candidate or a release. Shall I re-send it at a later stage or are you happy to keep it around and defer its application to when its dependency is sorted? Thanks, Fab arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts | 49 +++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts index 22da819..cd9c3fc 100644 --- a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts +++ b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts @@ -6,6 +6,7 @@ */ /dts-v1/; +#include #include "r8a77470.dtsi" / { model = "iWave iW-RainboW-G23S single board computer based on RZ/G1C"; @@ -25,6 +26,29 @@ device_type = "memory"; reg = <0 0x40000000 0 0x20000000>; }; + + vcc_sdhi2: regulator-vcc-sdhi2 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI2 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + enable-active-high; + }; + + vccq_sdhi2: regulator-vccq-sdhi2 { + compatible = "regulator-gpio"; + + regulator-name = "SDHI2 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio2 24 GPIO_ACTIVE_LOW>; + gpios-states = <1>; + states = <3300000 1 + 1800000 0>; + }; }; &avb { @@ -50,6 +74,18 @@ groups = "scif1_data_b"; function = "scif1"; }; + + sdhi2_pins: sd2 { + groups = "sdhi2_data4", "sdhi2_ctrl"; + function = "sdhi2"; + power-source = <3300>; + }; + + sdhi2_pins_uhs: sd2_uhs { + groups = "sdhi2_data4", "sdhi2_ctrl"; + function = "sdhi2"; + power-source = <1800>; + }; }; &scif1 { @@ -58,3 +94,16 @@ status = "okay"; }; + +&sdhi2 { + pinctrl-0 = <&sdhi2_pins>; + pinctrl-1 = <&sdhi2_pins_uhs>; + pinctrl-names = "default", "state_uhs"; + + vmmc-supply = <&vcc_sdhi2>; + vqmmc-supply = <&vccq_sdhi2>; + bus-width = <4>; + cd-gpios = <&gpio4 20 GPIO_ACTIVE_LOW>; + sd-uhs-sdr50; + status = "okay"; +};