From patchwork Mon Sep 17 06:52:15 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vaibhav Jain X-Patchwork-Id: 970408 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 42DH125hxTz9s4V for ; Mon, 17 Sep 2018 16:54:30 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 42DH122xNHzF1RN for ; Mon, 17 Sep 2018 16:54:30 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=linux.ibm.com (client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com; envelope-from=vaibhav@linux.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 42DGyj2thdzF1nv for ; Mon, 17 Sep 2018 16:52:29 +1000 (AEST) Received: from pps.filterd (m0098393.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w8H6nVRO026866 for ; Mon, 17 Sep 2018 02:52:26 -0400 Received: from e06smtp03.uk.ibm.com (e06smtp03.uk.ibm.com [195.75.94.99]) by mx0a-001b2d01.pphosted.com with ESMTP id 2mj28w1kea-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Mon, 17 Sep 2018 02:52:26 -0400 Received: from localhost by e06smtp03.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Mon, 17 Sep 2018 07:52:21 +0100 Received: from d06av22.portsmouth.uk.ibm.com (d06av22.portsmouth.uk.ibm.com [9.149.105.58]) by b06cxnps3074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w8H6qJjV1114572 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 17 Sep 2018 06:52:19 GMT Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B07494C059; Mon, 17 Sep 2018 09:52:08 +0100 (BST) Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 58E664C04A; Mon, 17 Sep 2018 09:52:07 +0100 (BST) Received: from vajain21.in.ibm.com (unknown [9.109.222.128]) by d06av22.portsmouth.uk.ibm.com (Postfix) with ESMTP; Mon, 17 Sep 2018 09:52:07 +0100 (BST) From: Vaibhav Jain To: Oliver , Michael Neuling , Russell Currey Date: Mon, 17 Sep 2018 12:22:15 +0530 X-Mailer: git-send-email 2.17.1 X-TM-AS-GCONF: 00 x-cbid: 18091706-0012-0000-0000-000002A9A56B X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18091706-0013-0000-0000-000020DDF81F Message-Id: <20180917065215.1848-1-vaibhav@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-09-17_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=769 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1807170000 definitions=main-1809170073 Subject: [Skiboot] [PATCH] phb4: Re-factor phb4_fenced() and introduce phb4_dump_pec_err_regs() X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: skiboot@lists.ozlabs.org MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Couple of places in 'phb4.c' where we may want to dump the PEC's error registers. Hence we introduce a phb4_dump_pec_err_regs() that dumps all the PEC error registers and also update phb4->nfir_cache & phb4->pfir_cache for later use. Signed-off-by: Vaibhav Jain Reviewed-by: Oliver O'Halloran --- hw/phb4.c | 68 +++++++++++++++++++++++++++++++------------------------ 1 file changed, 38 insertions(+), 30 deletions(-) diff --git a/hw/phb4.c b/hw/phb4.c index 94e741e0..cf3d0f84 100644 --- a/hw/phb4.c +++ b/hw/phb4.c @@ -2477,6 +2477,36 @@ static void phb4_train_info(struct phb4 *p, uint64_t reg, unsigned long time) PHBERR(p, "%s\n", s); } +static void phb4_dump_pec_err_regs(struct phb4 *p) +{ + uint64_t nfir_p_wof, nfir_n_wof, err_aib; + uint64_t err_rpt0, err_rpt1; + + /* Read the PCI and NEST FIRs and dump them. Also cache PCI/NEST FIRs */ + xscom_read(p->chip_id, + p->pci_stk_xscom + XPEC_PCI_STK_PCI_FIR, &p->pfir_cache); + xscom_read(p->chip_id, + p->pci_stk_xscom + XPEC_PCI_STK_PCI_FIR_WOF, &nfir_p_wof); + xscom_read(p->chip_id, + p->pe_stk_xscom + XPEC_NEST_STK_PCI_NFIR, &p->nfir_cache); + xscom_read(p->chip_id, + p->pe_stk_xscom + XPEC_NEST_STK_PCI_NFIR_WOF, &nfir_n_wof); + xscom_read(p->chip_id, + p->pe_stk_xscom + XPEC_NEST_STK_ERR_RPT0, &err_rpt0); + xscom_read(p->chip_id, + p->pe_stk_xscom + XPEC_NEST_STK_ERR_RPT1, &err_rpt1); + xscom_read(p->chip_id, + p->pci_stk_xscom + XPEC_PCI_STK_PBAIB_ERR_REPORT, &err_aib); + + PHBERR(p, " PCI FIR=%016llx\n", p->pfir_cache); + PHBERR(p, " PCI FIR WOF=%016llx\n", nfir_p_wof); + PHBERR(p, " NEST FIR=%016llx\n", p->nfir_cache); + PHBERR(p, " NEST FIR WOF=%016llx\n", nfir_n_wof); + PHBERR(p, " ERR RPT0=%016llx\n", err_rpt0); + PHBERR(p, " ERR RPT1=%016llx\n", err_rpt1); + PHBERR(p, " AIB ERR=%016llx\n", err_aib); +} + static void phb4_dump_capp_err_regs(struct phb4 *p) { uint64_t fir, apc_master_err, snoop_err, transport_err; @@ -2502,8 +2532,6 @@ static void phb4_dump_capp_err_regs(struct phb4 *p) /* Check if AIB is fenced via PBCQ NFIR */ static bool phb4_fenced(struct phb4 *p) { - uint64_t nfir_p, nfir_p_wof, nfir_n, nfir_n_wof, err_aib; - uint64_t err_rpt0, err_rpt1; /* Already fenced ? */ if (p->flags & PHB4_AIB_FENCED) @@ -2516,37 +2544,17 @@ static bool phb4_fenced(struct phb4 *p) if (in_be64(p->regs + PHB_CPU_LOADSTORE_STATUS)!= 0xfffffffffffffffful) return false; - PHBERR(p, "PHB Freeze/Fence detected !\n"); - - /* We read the PCI and NEST FIRs and dump them */ - xscom_read(p->chip_id, - p->pci_stk_xscom + XPEC_PCI_STK_PCI_FIR, &nfir_p); - xscom_read(p->chip_id, - p->pci_stk_xscom + XPEC_PCI_STK_PCI_FIR_WOF, &nfir_p_wof); - xscom_read(p->chip_id, - p->pe_stk_xscom + XPEC_NEST_STK_PCI_NFIR, &nfir_n); - xscom_read(p->chip_id, - p->pe_stk_xscom + XPEC_NEST_STK_PCI_NFIR_WOF, &nfir_n_wof); - xscom_read(p->chip_id, - p->pe_stk_xscom + XPEC_NEST_STK_ERR_RPT0, &err_rpt0); - xscom_read(p->chip_id, - p->pe_stk_xscom + XPEC_NEST_STK_ERR_RPT1, &err_rpt1); - xscom_read(p->chip_id, - p->pci_stk_xscom + XPEC_PCI_STK_PBAIB_ERR_REPORT, &err_aib); - - PHBERR(p, " PCI FIR=%016llx\n", nfir_p); - PHBERR(p, " PCI FIR WOF=%016llx\n", nfir_p_wof); - PHBERR(p, " NEST FIR=%016llx\n", nfir_n); - PHBERR(p, " NEST FIR WOF=%016llx\n", nfir_n_wof); - PHBERR(p, " ERR RPT0=%016llx\n", err_rpt0); - PHBERR(p, " ERR RPT1=%016llx\n", err_rpt1); - PHBERR(p, " AIB ERR=%016llx\n", err_aib); - /* Mark ourselves fenced */ p->flags |= PHB4_AIB_FENCED; - /* dump capp error registers in case phb was fenced due to capp */ - if (nfir_n & XPEC_NEST_STK_PCI_NFIR_CXA_PE_CAPP) + PHBERR(p, "PHB Freeze/Fence detected !\n"); + phb4_dump_pec_err_regs(p); + + /* + * dump capp error registers in case phb was fenced due to capp. + * Expect p->nfir_cache already updated in phb4_dump_pec_err_regs() + */ + if (p->nfir_cache & XPEC_NEST_STK_PCI_NFIR_CXA_PE_CAPP) phb4_dump_capp_err_regs(p); phb4_eeh_dump_regs(p);