From patchwork Thu Sep 6 06:40:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jeffery X-Patchwork-Id: 966813 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 425WDt6gDkz9sDb for ; Thu, 6 Sep 2018 16:41:18 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=aj.id.au Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=aj.id.au header.i=@aj.id.au header.b="gpEwojXA"; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="N8BqSHmS"; dkim-atps=neutral Received: from lists.ozlabs.org (unknown [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 425WDt10DLzF3HT for ; Thu, 6 Sep 2018 16:41:18 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=aj.id.au Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=aj.id.au header.i=@aj.id.au header.b="gpEwojXA"; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="N8BqSHmS"; dkim-atps=neutral X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=aj.id.au (client-ip=64.147.123.25; helo=wout2-smtp.messagingengine.com; envelope-from=andrew@aj.id.au; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=aj.id.au Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=aj.id.au header.i=@aj.id.au header.b="gpEwojXA"; dkim=pass (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="N8BqSHmS"; dkim-atps=neutral Received: from wout2-smtp.messagingengine.com (wout2-smtp.messagingengine.com [64.147.123.25]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 425WDB0f2bzF39c for ; Thu, 6 Sep 2018 16:40:41 +1000 (AEST) Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.west.internal (Postfix) with ESMTP id 839AE393; Thu, 6 Sep 2018 02:40:39 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute4.internal (MEProxy); Thu, 06 Sep 2018 02:40:40 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=aj.id.au; h=cc :date:from:in-reply-to:message-id:references:subject:to :x-me-sender:x-me-sender:x-sasl-enc; s=fm3; bh=vlgqCY/VsfbRSbJPs 49dqAikBf+PUnE/OkDjmIyn2NU=; b=gpEwojXAPguUTA5lno5eQ1g+VMifQLFT7 go5fS1hbZ5Gt2J000MK3s3RUssBYNRpg/eoAGxF5sPQGAkkGQF9JELWSWYSrh0Ex OLkceAuPj+tOZfUb++TnvxTt4U5GJiix5xtAIUy4BdJ+Pews28x9bHc82zULTKLm kGiEpqSCIYqhyGxLAD7zDFuz8BbnFpuXH/842moa0VVk1bz/YlGkqy/kzpRmp8Tx nN569yy+1EB2JIOJQhtbdX3Y7KbmlKlSgyGBPO/+2QWxDT/juG2NhfpmaWbF9Gzn 9tOGcb3KCK/9aautPSpzSk/rYog/j9sJ3UQP5TbRcak3PsmIQPM4w== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:in-reply-to:message-id :references:subject:to:x-me-sender:x-me-sender:x-sasl-enc; s= fm3; bh=vlgqCY/VsfbRSbJPs49dqAikBf+PUnE/OkDjmIyn2NU=; b=N8BqSHmS HpPn0j52kw0EOYyuUZSlWY0MU9C9hCCatp50WJhAncYpObGcoxx9+AxdhJCVW56T vrWFzIUZbJxx8VPTeoiR+7EMJS9L8nQUepKIlhAgsFcL7GDax/YA3vvrSGFDglc7 lQv9H4Wmr95iGMJL4afP8TADefZqanav7tSeI58yu8HV5gEjKAd0pzQBNaNZP3Yq mexSCZOpD8hzeEhN3Z30nD4e1QEupRJIavbSWktPs64SeJQguYpVH8wxO2kRlsay MJ/7mYsx2GU8iy8jJJlkCaKTdkG+DpTGfTAm0N5P8y3/AcT+bp2Gek8ffZA8j3Bc FNhqYPFHDf/SZQ== X-ME-Proxy: X-ME-Sender: Received: from localhost.localdomain (ppp118-210-231-68.bras1.adl4.internode.on.net [118.210.231.68]) by mail.messagingengine.com (Postfix) with ESMTPA id E4F74E46B7; Thu, 6 Sep 2018 02:40:35 -0400 (EDT) From: Andrew Jeffery To: skiboot@lists.ozlabs.org Date: Thu, 6 Sep 2018 16:10:10 +0930 Message-Id: <20180906064015.1498-2-andrew@aj.id.au> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180906064015.1498-1-andrew@aj.id.au> References: <20180906064015.1498-1-andrew@aj.id.au> Subject: [Skiboot] [RFC PATCH 1/6] ipmi: Introduce registration for SEL command handlers X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dkodihal@in.ibm.com, Andrew Jeffery , anoo@linux.ibm.com MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Signed-off-by: Andrew Jeffery --- hw/ipmi/ipmi-sel.c | 110 +++++++++++++++++++++++++++++++++------------ include/ipmi.h | 5 +++ 2 files changed, 86 insertions(+), 29 deletions(-) diff --git a/hw/ipmi/ipmi-sel.c b/hw/ipmi/ipmi-sel.c index eb63147bdc52..c85cd6fc781b 100644 --- a/hw/ipmi/ipmi-sel.c +++ b/hw/ipmi/ipmi-sel.c @@ -15,6 +15,10 @@ */ #define pr_fmt(fmt) "IPMI: " fmt +#include +#include +#include +#include #include #include #include @@ -37,10 +41,14 @@ #define SEL_NETFN_IBM 0x3a /* OEM SEL Commands */ +/* TODO: Move these to their respective source files */ #define CMD_AMI_POWER 0x04 #define CMD_AMI_PNOR_ACCESS 0x07 #define CMD_AMI_OCC_RESET 0x0e +/* XXX: Listed here for completeness, registered in libflash/ipmi-flash.c */ +#define CMD_OP_HIOMAP_EVENT 0x0f + #define SOFT_OFF 0x00 #define SOFT_REBOOT 0x01 @@ -137,21 +145,11 @@ struct ipmi_sel_panic_msg { }; static struct ipmi_sel_panic_msg ipmi_sel_panic_msg; +static LIST_HEAD(sel_handlers); + /* Forward declaration */ static void ipmi_elog_poll(struct ipmi_msg *msg); -void ipmi_sel_init(void) -{ - /* Already done */ - if (ipmi_sel_panic_msg.msg != NULL) - return; - - memset(&ipmi_sel_panic_msg, 0, sizeof(struct ipmi_sel_panic_msg)); - ipmi_sel_panic_msg.msg = ipmi_mkmsg(IPMI_DEFAULT_INTERFACE, - IPMI_RESERVE_SEL, ipmi_elog_poll, - NULL, NULL, IPMI_MAX_REQ_SIZE, 2); -} - /* * Allocate IPMI message: * For normal event, allocate memory using ipmi_mkmsg and for PANIC @@ -458,7 +456,7 @@ int ipmi_elog_commit(struct errorlog *elog_buf) #define ACCESS_DENIED 0x00 #define ACCESS_GRANTED 0x01 -static void sel_pnor(uint8_t access) +static void sel_pnor(uint8_t access, void *context __unused) { struct ipmi_msg *msg; uint8_t granted = ACCESS_GRANTED; @@ -501,7 +499,7 @@ static void sel_pnor(uint8_t access) } } -static void sel_power(uint8_t power) +static void sel_power(uint8_t power, void *context __unused) { switch (power) { case SOFT_OFF: @@ -562,7 +560,7 @@ static uint32_t occ_sensor_id_to_chip(uint8_t sensor, uint32_t *chip) return 0; } -static void sel_occ_reset(uint8_t sensor) +static void sel_occ_reset(uint8_t sensor, void *context __unused) { uint32_t chip; int rc; @@ -581,8 +579,69 @@ static void sel_occ_reset(uint8_t sensor) prd_occ_reset(chip); } +struct ipmi_sel_handler { + uint8_t oem_cmd; + void (*fn)(uint8_t data, void *context); + void *context; + struct list_node node; +}; + +int ipmi_sel_register(uint8_t oem_cmd, + void (*fn)(uint8_t data, void *context), + void *context) +{ + struct ipmi_sel_handler *handler; + + handler = malloc(sizeof(*handler)); + if (!handler) + return -ENOMEM; + + handler->oem_cmd = oem_cmd; + handler->fn = fn; + handler->context = context; + + list_add(&sel_handlers, &handler->node); + + return 0; +} + +void ipmi_sel_init(void) +{ + int rc; + + /* Already done */ + if (ipmi_sel_panic_msg.msg != NULL) + return; + + memset(&ipmi_sel_panic_msg, 0, sizeof(struct ipmi_sel_panic_msg)); + ipmi_sel_panic_msg.msg = ipmi_mkmsg(IPMI_DEFAULT_INTERFACE, + IPMI_RESERVE_SEL, ipmi_elog_poll, + NULL, NULL, IPMI_MAX_REQ_SIZE, 2); + + /* Hackishly register these old-style handlers here for now */ + /* TODO: Move them to their appropriate source files */ + rc = ipmi_sel_register(CMD_AMI_POWER, sel_power, NULL); + if (rc < 0) { + prerror("Failed to register SEL handler for %s", + stringify(CMD_AMI_POWER)); + } + + rc = ipmi_sel_register(CMD_AMI_OCC_RESET, sel_occ_reset, NULL); + if (rc < 0) { + prerror("Failed to register SEL handler for %s", + stringify(CMD_AMI_OCC_RESET)); + } + + rc = ipmi_sel_register(CMD_AMI_PNOR_ACCESS, sel_pnor, NULL); + if (rc < 0) { + prerror("Failed to register SEL handler for %s", + stringify(CMD_AMI_PNOR_ACCESS)); + } +} + void ipmi_parse_sel(struct ipmi_msg *msg) { + struct ipmi_sel_handler *handler; struct oem_sel sel; assert(msg->resp_size <= 16); @@ -606,19 +665,12 @@ void ipmi_parse_sel(struct ipmi_msg *msg) return; } - switch (sel.cmd) { - case CMD_AMI_POWER: - sel_power(sel.data[0]); - break; - case CMD_AMI_OCC_RESET: - sel_occ_reset(sel.data[0]); - break; - case CMD_AMI_PNOR_ACCESS: - sel_pnor(sel.data[0]); - break; - default: - prlog(PR_WARNING, - "unknown OEM SEL command %02x received\n", - sel.cmd); + list_for_each(&sel_handlers, handler, node) { + if (handler->oem_cmd == sel.cmd) { + handler->fn(sel.data[0], handler->context); + return; + } } + + prlog(PR_WARNING, "unknown OEM SEL command %02x received\n", sel.cmd); } diff --git a/include/ipmi.h b/include/ipmi.h index 0acfbf563ca5..a2735f16b551 100644 --- a/include/ipmi.h +++ b/include/ipmi.h @@ -241,6 +241,11 @@ void ipmi_register_backend(struct ipmi_backend *backend); /* Allocate IPMI SEL panic message */ void ipmi_sel_init(void); +/* Register SEL handler with IPMI core */ +int ipmi_sel_register(uint8_t oem_cmd, + void (*handler)(uint8_t data, void *context), + void *context); + /* Register rtc ipmi commands with as opal callbacks. */ void ipmi_rtc_init(void); From patchwork Thu Sep 6 06:40:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jeffery X-Patchwork-Id: 966814 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 425WFC266lz9sDb for ; Thu, 6 Sep 2018 16:41:35 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=aj.id.au Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=aj.id.au header.i=@aj.id.au header.b="SX41SDSa"; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="g2HrCtLc"; dkim-atps=neutral Received: from lists.ozlabs.org (unknown [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 425WFC09HGzF3HL for ; Thu, 6 Sep 2018 16:41:35 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=aj.id.au Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=aj.id.au header.i=@aj.id.au header.b="SX41SDSa"; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="g2HrCtLc"; dkim-atps=neutral X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=aj.id.au (client-ip=64.147.123.25; helo=wout2-smtp.messagingengine.com; envelope-from=andrew@aj.id.au; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=aj.id.au Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=aj.id.au header.i=@aj.id.au header.b="SX41SDSa"; dkim=pass (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="g2HrCtLc"; dkim-atps=neutral Received: from wout2-smtp.messagingengine.com (wout2-smtp.messagingengine.com [64.147.123.25]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 425WDF2P67zF39g for ; Thu, 6 Sep 2018 16:40:45 +1000 (AEST) Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.west.internal (Postfix) with ESMTP id C66EE490; Thu, 6 Sep 2018 02:40:42 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute4.internal (MEProxy); Thu, 06 Sep 2018 02:40:43 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=aj.id.au; h=cc :date:from:in-reply-to:message-id:references:subject:to :x-me-sender:x-me-sender:x-sasl-enc; s=fm3; bh=6yWp0B8/dO9mhIozF kH9i0ET8fuWD9c5fSWljFaxcY0=; b=SX41SDSa3rF12kJpGtQn/gcSdJB2PVmUP ZhxAnQCj18dBt/A/jkvbThTtXVwq/ETIE7rZ+5bFO3nWXQgYhX22zgnym0ulUu9f cFnsUpXzPlPI8P8nbBiOaxe8mmrrDr/6bvVsxy2ReDtGcsXuRBgHiAn2H2rr6dpP X2frr/sz+w9k9RODxR2/a7IuAMQr8El/Zkkz7LcKl3zC/ZI46vkY7Q80bPXKl44C dgaDY+BGS0sE88dBvI/lX/XMKBJrbIPW6A+veRW/y7p3KGjYUttuXOt83fvJ6uFS PxuKffrWmjo6NlyZe4oQNUSbyk0d8ANxubMFen7Yc8YKxeZ4IHI/A== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:in-reply-to:message-id :references:subject:to:x-me-sender:x-me-sender:x-sasl-enc; s= fm3; bh=6yWp0B8/dO9mhIozFkH9i0ET8fuWD9c5fSWljFaxcY0=; b=g2HrCtLc idFHWxmqWK2yx59+oHgaG/vanPZmh/BmJOeH5HRnyyhQI+j0dX1m/241nEwXqM06 hm4I5C5/85Ld4uT8+Rp0uU6tctEc8i+6XRwK62pwCXJ7FcdEYO25E6QwRmxaHXVE Evh85QaOAoM4e7XWc2uMdV/wt0DrPa6UYH47KLvCstBpoGu2d+rJNSHU3tNuz9/f mRH3FoTR6sGAvqbt9wfTKJKAHgwG0r6XhnT5NtG7RbK0NXev/fmz+7aIcUuzu+kL DbqxW/4jM6SX+Cgr4SIXvohX2B9kPnp6QtkAkIIhGyOOjCkkaxOfBs8YsLdvyags vTGmQbnYWLGOFw== X-ME-Proxy: X-ME-Sender: Received: from localhost.localdomain (ppp118-210-231-68.bras1.adl4.internode.on.net [118.210.231.68]) by mail.messagingengine.com (Postfix) with ESMTPA id 4FCF9E4015; Thu, 6 Sep 2018 02:40:39 -0400 (EDT) From: Andrew Jeffery To: skiboot@lists.ozlabs.org Date: Thu, 6 Sep 2018 16:10:11 +0930 Message-Id: <20180906064015.1498-3-andrew@aj.id.au> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180906064015.1498-1-andrew@aj.id.au> References: <20180906064015.1498-1-andrew@aj.id.au> Subject: [Skiboot] [RFC PATCH 2/6] core/lock: Use try_lock_caller() in lock_caller() to capture owner X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dkodihal@in.ibm.com, Andrew Jeffery , anoo@linux.ibm.com MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Otherwise we can get reports of core/lock.c owning the lock, which is not helpful when tracking down ownership issues. Signed-off-by: Andrew Jeffery --- core/lock.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/core/lock.c b/core/lock.c index fca8f465f262..a26d6621bbd0 100644 --- a/core/lock.c +++ b/core/lock.c @@ -230,7 +230,7 @@ void lock_caller(struct lock *l, const char *owner) lock_check(l); - if (try_lock(l)) + if (try_lock_caller(l, owner)) return; add_lock_request(l); From patchwork Thu Sep 6 06:40:12 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jeffery X-Patchwork-Id: 966815 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 425WFX5xkJz9sDb for ; Thu, 6 Sep 2018 16:41:52 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=aj.id.au Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=aj.id.au header.i=@aj.id.au header.b="acNCz3IK"; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="nd/F0PKY"; dkim-atps=neutral Received: from lists.ozlabs.org (unknown [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 425WFX4BS8zF3MJ for ; Thu, 6 Sep 2018 16:41:52 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=aj.id.au Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=aj.id.au header.i=@aj.id.au header.b="acNCz3IK"; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="nd/F0PKY"; dkim-atps=neutral X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=aj.id.au (client-ip=64.147.123.25; helo=wout2-smtp.messagingengine.com; envelope-from=andrew@aj.id.au; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=aj.id.au Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=aj.id.au header.i=@aj.id.au header.b="acNCz3IK"; dkim=pass (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="nd/F0PKY"; dkim-atps=neutral Received: from wout2-smtp.messagingengine.com (wout2-smtp.messagingengine.com [64.147.123.25]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 425WDJ5N1GzF39Y for ; Thu, 6 Sep 2018 16:40:48 +1000 (AEST) Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.west.internal (Postfix) with ESMTP id 2B2723B8; Thu, 6 Sep 2018 02:40:46 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute4.internal (MEProxy); Thu, 06 Sep 2018 02:40:46 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=aj.id.au; h=cc :date:from:in-reply-to:message-id:references:subject:to :x-me-sender:x-me-sender:x-sasl-enc; s=fm3; bh=1x/Sd7Mhc2ev4/885 OdktIGvMIGKXCFBp0WCK+K1tZg=; b=acNCz3IKBVgD5pNlEWf/L7qzRacR5qR5+ QA7QO5wL0gqGcujsu8E4yjW9oshFjigyTuQS0AgHWRRJ4lU5Qt4tlJWJ//ASTcea jEqR4rgf7GtELQ7f1pCet7Noe0eZtB2Myu0Arugge6pd0RuQb+t8YyNkC3xLBdcY 6XIIZMN6C6tNIWViCwSIZoEc/zBRx159EsihF6Rl6S4+Ck4g+tNL6nWpDtfwKR99 wDqYEBKZPDJneCf8NNjhwyq30Cd9p/1p5c/dMOLdqXu6wh92ynSLNd1RIH8LWqKR DCzJMlBcAsOaSf/z4r5U2BAj6ew1tLsBLv7BiCydZF5afWcTKdZIg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:in-reply-to:message-id :references:subject:to:x-me-sender:x-me-sender:x-sasl-enc; s= fm3; bh=1x/Sd7Mhc2ev4/885OdktIGvMIGKXCFBp0WCK+K1tZg=; b=nd/F0PKY X3tMzV6nKFgLx7kyVoejeI1GYGan8G28kxRdquMScq8cX4BoqUEIBb3QwMRJpQKJ bOtRMPvSd/pYjur25LPO4pnG9anzAyJrHw0VOFn5yYqiBM2xMcqgQLJQvLvyLcZr E6qBRbG7XcEM12Z0iZ3UIRukwW+UVOAGdrrR+k/5gxg9lsfPbQQgNzcaTHyjw5Zi gn/tZp9njyJ5VOeg9FockT666Q+aRkjfpZ7K6XLKh5fF0LjJwpt6W2XPtFixQE1R czIkGSz14CG/6TUGt0XR+DnRnKfI6VANSBW5MgvaLuo2oXqlHh8kclpDsEXH6W6p BWyapui7dhnVqQ== X-ME-Proxy: X-ME-Sender: Received: from localhost.localdomain (ppp118-210-231-68.bras1.adl4.internode.on.net [118.210.231.68]) by mail.messagingengine.com (Postfix) with ESMTPA id C3E32E455B; Thu, 6 Sep 2018 02:40:42 -0400 (EDT) From: Andrew Jeffery To: skiboot@lists.ozlabs.org Date: Thu, 6 Sep 2018 16:10:12 +0930 Message-Id: <20180906064015.1498-4-andrew@aj.id.au> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180906064015.1498-1-andrew@aj.id.au> References: <20180906064015.1498-1-andrew@aj.id.au> Subject: [Skiboot] [RFC PATCH 3/6] core/flash: Only lock around flashes update in flash_register() X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dkodihal@in.ibm.com, Andrew Jeffery , anoo@linux.ibm.com MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Previously in flash_register() held flash_lock across ffs_init(), which calls through the blocklevel layer to read the flash. This is unhelpful with the IPMI HIOMAP protocol transport as LPC interrupts have not yet been enabled and we are relying on polling to progress. The held lock stalls the boot as we take the nopoll path in time_wait() while completing ipmi_queue_msg_sync() in libflash/ipmi-flash.c Signed-off-by: Andrew Jeffery --- core/flash.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/core/flash.c b/core/flash.c index 8f00d85e4651..3b8a5fa9f4f7 100644 --- a/core/flash.c +++ b/core/flash.c @@ -406,13 +406,9 @@ int flash_register(struct blocklevel_device *bl) prlog(PR_INFO, "FLASH: registering flash device %s " "(size 0x%llx, blocksize 0x%x)\n", name ?: "(unnamed)", size, block_size); - - lock(&flash_lock); - flash = malloc(sizeof(struct flash)); if (!flash) { prlog(PR_ERR, "FLASH: Error allocating flash structure\n"); - unlock(&flash_lock); return OPAL_RESOURCE; } @@ -423,8 +419,6 @@ int flash_register(struct blocklevel_device *bl) flash->block_size = block_size; flash->id = num_flashes(); - list_add(&flashes, &flash->list); - rc = ffs_init(0, flash->size, bl, &ffs, 1); if (rc) { /** @@ -445,6 +439,8 @@ int flash_register(struct blocklevel_device *bl) if (ffs) ffs_close(ffs); + lock(&flash_lock); + list_add(&flashes, &flash->list); unlock(&flash_lock); return OPAL_SUCCESS; From patchwork Thu Sep 6 06:40:13 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jeffery X-Patchwork-Id: 966816 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 425WFq6PWsz9sDb for ; Thu, 6 Sep 2018 16:42:07 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=aj.id.au Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=aj.id.au header.i=@aj.id.au header.b="T766611s"; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="LUgbifMR"; dkim-atps=neutral Received: from lists.ozlabs.org (unknown [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 425WFq4s6VzF3Sg for ; Thu, 6 Sep 2018 16:42:07 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=aj.id.au Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=aj.id.au header.i=@aj.id.au header.b="T766611s"; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="LUgbifMR"; dkim-atps=neutral X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=aj.id.au (client-ip=64.147.123.25; helo=wout2-smtp.messagingengine.com; envelope-from=andrew@aj.id.au; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=aj.id.au Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=aj.id.au header.i=@aj.id.au header.b="T766611s"; dkim=pass (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="LUgbifMR"; dkim-atps=neutral Received: from wout2-smtp.messagingengine.com (wout2-smtp.messagingengine.com [64.147.123.25]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 425WDM6H13zF39t for ; Thu, 6 Sep 2018 16:40:51 +1000 (AEST) Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.west.internal (Postfix) with ESMTP id 828874A2; Thu, 6 Sep 2018 02:40:49 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute4.internal (MEProxy); Thu, 06 Sep 2018 02:40:50 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=aj.id.au; h=cc :date:from:in-reply-to:message-id:references:subject:to :x-me-sender:x-me-sender:x-sasl-enc; s=fm3; bh=AVckJPScatBTDoF2c sDqfO4+95UT0IkdOO05hFjSvZY=; b=T766611sDDJGw9/xJ3q43G34IpcU8OPt/ oqNR1RgDaBA3UskkLfXY4jSLrsqbRowgqmj0nEvlmWuepywQYCNYA5mBH7ef/HbM PJDSjlhJsgHeHanP/t6Ez6ehNdJtApyk7NS/5/ZnCWHeFh3ZQC+fQUgTvcptUVQh LmfhfIFyaMAauFyBMuy3mvzJ6sOOwVH5nd4lmQkhBoekvc2gUCtpXBVr5po09uie +2pvBjSMJvHH10SoJ30zqDRAJn8LOWrx4dnoCIgiyWvBkBNRmdlkoeFVXPaXe3pC 5ti0LEAtAS7PGdivbOKdAd0Qw15Ey7t4bY55yZdWiWmGyiTONO1SA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:in-reply-to:message-id :references:subject:to:x-me-sender:x-me-sender:x-sasl-enc; s= fm3; bh=AVckJPScatBTDoF2csDqfO4+95UT0IkdOO05hFjSvZY=; b=LUgbifMR 06vM00d8QbACqlHS/a04ZJXNjJHXD7WBVWv0zsbZKjXa5oX4CEckpJWYkB+3+LNC 3JQ0pXu6uDa+wTyfjgmJbxIAolEzk/v+ChM5IOpt6B/Qtv/7fCsqblLWj70dMXeF YvfBpSGDQQn5PBS25W4V89NOGI9xqtcHYXeP9orQwlVjfZtYgpyVkG8wxSDaVMbv u6lfgJIxTQLPTGgmXgVodiBXkyXWF5uHqtYUkhGmbeBjkg6rCn0zFTnkzH5YBwV0 8jKEEGSID0FiyEP57iUYx5gKgtMn2bfkKI9ggIv0Vh1D/GWJkxauTS8wz2gzkulm ik4kmg7Gn9N+Yw== X-ME-Proxy: X-ME-Sender: Received: from localhost.localdomain (ppp118-210-231-68.bras1.adl4.internode.on.net [118.210.231.68]) by mail.messagingengine.com (Postfix) with ESMTPA id 1356BE467F; Thu, 6 Sep 2018 02:40:45 -0400 (EDT) From: Andrew Jeffery To: skiboot@lists.ozlabs.org Date: Thu, 6 Sep 2018 16:10:13 +0930 Message-Id: <20180906064015.1498-5-andrew@aj.id.au> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180906064015.1498-1-andrew@aj.id.au> References: <20180906064015.1498-1-andrew@aj.id.au> Subject: [Skiboot] [RFC PATCH 4/6] core/flash: Unlock around blocklevel calls in NVRAM accessors X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dkodihal@in.ibm.com, Andrew Jeffery , anoo@linux.ibm.com MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" This ensures progress when we don't have interrupts available for IPMI. Signed-off-by: Andrew Jeffery --- core/flash.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/core/flash.c b/core/flash.c index 3b8a5fa9f4f7..be0609015b78 100644 --- a/core/flash.c +++ b/core/flash.c @@ -118,8 +118,13 @@ static int flash_nvram_start_read(void *dst, uint32_t src, uint32_t len) goto out; } + nvram_flash->busy = true; + unlock(&flash_lock); + rc = blocklevel_read(nvram_flash->bl, nvram_offset + src, dst, len); + lock(&flash_lock); + nvram_flash->busy = false; out: unlock(&flash_lock); if (!rc) @@ -147,8 +152,14 @@ static int flash_nvram_write(uint32_t dst, void *src, uint32_t len) rc = OPAL_PARAMETER; goto out; } + + nvram_flash->busy = true; + unlock(&flash_lock); + rc = blocklevel_write(nvram_flash->bl, nvram_offset + dst, src, len); + lock(&flash_lock); + nvram_flash->busy = false; out: unlock(&flash_lock); return rc; From patchwork Thu Sep 6 06:40:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jeffery X-Patchwork-Id: 966817 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 425WG93vMmz9sDb for ; Thu, 6 Sep 2018 16:42:25 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=aj.id.au Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=aj.id.au header.i=@aj.id.au header.b="ZviHOTkD"; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="iWiLbXTr"; dkim-atps=neutral Received: from lists.ozlabs.org (unknown [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 425WG92FzpzF3T2 for ; Thu, 6 Sep 2018 16:42:25 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=aj.id.au Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=aj.id.au header.i=@aj.id.au header.b="ZviHOTkD"; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="iWiLbXTr"; dkim-atps=neutral X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=aj.id.au (client-ip=64.147.123.25; helo=wout2-smtp.messagingengine.com; envelope-from=andrew@aj.id.au; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=aj.id.au Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=aj.id.au header.i=@aj.id.au header.b="ZviHOTkD"; dkim=pass (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="iWiLbXTr"; dkim-atps=neutral Received: from wout2-smtp.messagingengine.com (wout2-smtp.messagingengine.com [64.147.123.25]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 425WDR6Y29zF3BN for ; Thu, 6 Sep 2018 16:40:55 +1000 (AEST) Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.west.internal (Postfix) with ESMTP id 547CA4E8; Thu, 6 Sep 2018 02:40:53 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute4.internal (MEProxy); Thu, 06 Sep 2018 02:40:53 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=aj.id.au; h=cc :date:from:in-reply-to:message-id:references:subject:to :x-me-sender:x-me-sender:x-sasl-enc; s=fm3; bh=ObudSLt6yBQb1UEUz 1WoP1w0Z5WQJs5sa+nY2kaNBKg=; b=ZviHOTkD0uWQ7PTcNq25RU25Xmn0+aPav WfJjCYhoANlLtXiDzfAG95GkMGtdMFqJnr1HB/VcJ7n/WSFth3vv4JAsHYGLpdys nCQEgZHKUu6quXzrSTQKe0UcnMK4fIo7vybgq5seX5RVuYTvfvWCx7bsR8PfKty7 GDZ8k+L9T75fPD2kp7Vyv1VnTVNF/zYk70sHeKZ+9U+hl2GV6waa6LAydZOY9xy3 4YFcbmBTCz4b6A1ByH2CiaNM0wctSQveZKEyaH2ce4QAjtURWfIQYd7U8UOPp4bT TFhs38o+dXQ8XnEFciSJlcTT3msJSjxZtxVhhVPI+jN6IPR73O3xA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:in-reply-to:message-id :references:subject:to:x-me-sender:x-me-sender:x-sasl-enc; s= fm3; bh=ObudSLt6yBQb1UEUz1WoP1w0Z5WQJs5sa+nY2kaNBKg=; b=iWiLbXTr +vH/ZOIWm/K/N5ZHte4wcGKTZ2o5x2Q2K3XAJgsI9P4G6LdVvr3OO5F/6wvXgemC K3vs8iO2T6u7zWXPoTLopkL1W8/poHIXujHG0gh5Ijke8pFO18iTqsJwJRE4fExS +ZWX4qgER9a6qI8r7OKcy5QbGbUMnVPZnahjTwjjY/EwQiucMQHCY5nru9PMJE9W 4xqI8Ewgdyxx83Q4aqTeletzFmlCOlUclt9DfBcT2cg/Jph7KJPutuqBObxPEvGl nr/qQJe0VpzAfRCbRAgaZIxle9jEMeBzl88JcM7JUySsUn9V2P0+E5VNk6lCOUKq qR/1bAuAXFQNNA== X-ME-Proxy: X-ME-Sender: Received: from localhost.localdomain (ppp118-210-231-68.bras1.adl4.internode.on.net [118.210.231.68]) by mail.messagingengine.com (Postfix) with ESMTPA id 6FEECE455B; Thu, 6 Sep 2018 02:40:49 -0400 (EDT) From: Andrew Jeffery To: skiboot@lists.ozlabs.org Date: Thu, 6 Sep 2018 16:10:14 +0930 Message-Id: <20180906064015.1498-6-andrew@aj.id.au> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180906064015.1498-1-andrew@aj.id.au> References: <20180906064015.1498-1-andrew@aj.id.au> Subject: [Skiboot] [RFC PATCH 5/6] libflash: Add ipmi-flash implementation X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dkodihal@in.ibm.com, Andrew Jeffery , anoo@linux.ibm.com MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" ipmi-flash adapts the "mbox" protocol to use IPMI as a transport. The name "mbox" for the protocol is now meaningless - the ASPEED BMC mailbox is no-longer relevant when using IPMI as a transport. The same commands and events are used, though the implementation assumes v2 of the protocol is supported by the BMC Signed-off-by: Andrew Jeffery --- include/platform.h | 1 + libflash/Makefile.inc | 2 +- libflash/ipmi-flash.c | 792 ++++++++++++++++++++++++++++++++++++++ libflash/ipmi-flash.h | 29 ++ platforms/astbmc/common.c | 1 + 5 files changed, 824 insertions(+), 1 deletion(-) create mode 100644 libflash/ipmi-flash.c create mode 100644 libflash/ipmi-flash.h diff --git a/include/platform.h b/include/platform.h index 1a35a86a6f8b..edcbeac9a2cf 100644 --- a/include/platform.h +++ b/include/platform.h @@ -42,6 +42,7 @@ struct bmc_platform { */ uint32_t ipmi_oem_partial_add_esel; uint32_t ipmi_oem_pnor_access_status; + uint32_t ipmi_oem_hiomap_cmd; }; /* OpenCAPI platform-specific I2C information */ diff --git a/libflash/Makefile.inc b/libflash/Makefile.inc index 2474abfccc61..c384c4e91df9 100644 --- a/libflash/Makefile.inc +++ b/libflash/Makefile.inc @@ -1,4 +1,4 @@ -LIBFLASH_SRCS = libflash.c libffs.c ecc.c blocklevel.c mbox-flash.c +LIBFLASH_SRCS = libflash.c libffs.c ecc.c blocklevel.c mbox-flash.c ipmi-flash.c LIBFLASH_OBJS = $(LIBFLASH_SRCS:%.c=%.o) SUBDIRS += libflash diff --git a/libflash/ipmi-flash.c b/libflash/ipmi-flash.c new file mode 100644 index 000000000000..02e4d817791d --- /dev/null +++ b/libflash/ipmi-flash.c @@ -0,0 +1,792 @@ +/* Copyright 2018 IBM Corp. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + * implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#define pr_fmt(fmt) "IPMI-FLASH: " fmt + +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "errors.h" +#include "ipmi-flash.h" + +#define CMD_OP_HIOMAP_EVENT 0x0f + +struct lpc_window { + uint32_t lpc_addr; /* Offset into LPC space */ + uint32_t cur_pos; /* Current position of the window in the flash */ + uint32_t size; /* Size of the window into the flash */ + bool open; +}; + +struct ipmi_flash_data { + uint8_t seq; + uint8_t version; + uint8_t block_size_shift; + uint16_t timeout; + struct blocklevel_device bl; + struct lpc_window read; + struct lpc_window write; + uint32_t total_size; + uint32_t erase_granule; + + struct lock lock; + bool update; + uint8_t status; +}; + +struct ipmi_hiomap_result { + struct ipmi_flash_data *ctx; + int16_t cc; +}; + +#define RESULT_INIT(_name, _ctx) struct ipmi_hiomap_result _name = { _ctx, -1 } + +static uint16_t msg_get_u16(void *src) +{ + uint16_t arg; + + memcpy(&arg, src, sizeof(arg)); + + return le16_to_cpu(arg); +} + +static void msg_put_u16(void *dst, uint16_t val) +{ + val = cpu_to_le16(val); + + memcpy(dst, &val, sizeof(val)); +} + +static uint32_t blocks_to_bytes(struct ipmi_flash_data *ctx, uint16_t blocks) +{ + return blocks << ctx->block_size_shift; +} + +static uint16_t bytes_to_blocks(struct ipmi_flash_data *ctx, uint32_t bytes) +{ + return bytes >> ctx->block_size_shift; +} + +#define HIOMAP_C_GET_INFO MBOX_C_GET_MBOX_INFO +#define HIOMAP_C_GET_FLASH_INFO MBOX_C_GET_FLASH_INFO +#define HIOMAP_C_CREATE_READ_WINDOW MBOX_C_CREATE_READ_WINDOW +#define HIOMAP_C_CREATE_WRITE_WINDOW MBOX_C_CREATE_WRITE_WINDOW +#define HIOMAP_C_CLOSE_WINDOW MBOX_C_CLOSE_WINDOW +#define HIOMAP_C_MARK_DIRTY MBOX_C_MARK_WRITE_DIRTY +#define HIOMAP_C_FLUSH MBOX_C_WRITE_FLUSH +#define HIOMAP_C_ACK MBOX_C_BMC_EVENT_ACK +#define HIOMAP_C_ERASE MBOX_C_MARK_WRITE_ERASED + +#define HIOMAP_E_ACK_MASK MBOX_ATTN_ACK_MASK +#define HIOMAP_E_BMC_REBOOT MBOX_ATTN_BMC_REBOOT +#define HIOMAP_E_WINDOW_RESET MBOX_ATTN_BMC_WINDOW_RESET +#define HIOMAP_E_FLASH_LOST MBOX_ATTN_BMC_FLASH_LOST +#define HIOMAP_E_DAEMON_READY MBOX_ATTN_BMC_DAEMON_READY + +/* Is the current window able perform the complete operation */ +static bool hiomap_window_valid(struct lpc_window *win, uint64_t pos, + uint64_t len) +{ + if (!win->open) + return false; + if (pos < win->cur_pos) /* start */ + return false; + if ((pos + len) > (win->cur_pos + win->size)) /* end */ + return false; + return true; +} + + +static void ipmi_flash_cmd_cb(struct ipmi_msg *msg) +{ + struct ipmi_hiomap_result *res = msg->user_data; + struct ipmi_flash_data *ctx = res->ctx; + + res->cc = msg->cc; + if (msg->cc != IPMI_CC_NO_ERROR) { + return; + } + + /* We at least need the command and sequence */ + if (msg->resp_size < 2) { + prerror("Illegal response size: %u\n", msg->resp_size); + abort(); + } + + switch (msg->data[0]) { + case HIOMAP_C_GET_INFO: + if (msg->resp_size != 6) { + prerror("%u: Unexpected response size: %u\n", msg->data[0], + msg->resp_size); + abort(); + } + ctx->version = msg->data[2]; + if (ctx->version < 2) { + prerror("Failed to negotiate protocol v2 or higher: %d\n", + ctx->version); + abort(); + } + ctx->block_size_shift = msg->data[3]; + ctx->timeout = msg_get_u16(&msg->data[4]); + break; + case HIOMAP_C_GET_FLASH_INFO: + if (msg->resp_size != 6) { + prerror("%u: Unexpected response size: %u\n", msg->data[0], + msg->resp_size); + abort(); + } + ctx->total_size = blocks_to_bytes(ctx, msg_get_u16(&msg->data[2])); + ctx->erase_granule = blocks_to_bytes(ctx, msg_get_u16(&msg->data[4])); + break; + case HIOMAP_C_CREATE_READ_WINDOW: + if (msg->resp_size != 8) { + prerror("%u: Unexpected response size: %u\n", msg->data[0], + msg->resp_size); + abort(); + } + ctx->read.lpc_addr = blocks_to_bytes(ctx, msg_get_u16(&msg->data[2])); + ctx->read.size = blocks_to_bytes(ctx, msg_get_u16(&msg->data[4])); + ctx->read.cur_pos = blocks_to_bytes(ctx, msg_get_u16(&msg->data[6])); + ctx->read.open = true; + ctx->write.open = false; + break; + case HIOMAP_C_CREATE_WRITE_WINDOW: + if (msg->resp_size != 8) { + prerror("%u: Unexpected response size: %u\n", msg->data[0], + msg->resp_size); + abort(); + } + ctx->write.lpc_addr = blocks_to_bytes(ctx, msg_get_u16(&msg->data[2])); + ctx->write.size = blocks_to_bytes(ctx, msg_get_u16(&msg->data[4])); + ctx->write.cur_pos = blocks_to_bytes(ctx, msg_get_u16(&msg->data[6])); + ctx->write.open = true; + ctx->read.open = false; + break; + case HIOMAP_C_CLOSE_WINDOW: + ctx->write.open = false; + ctx->read.open = false; + break; + case HIOMAP_C_MARK_DIRTY: + case HIOMAP_C_FLUSH: + case HIOMAP_C_ACK: + case HIOMAP_C_ERASE: + break; + default: + prlog(PR_WARNING, "Unimplemented command handler: %u\n", + msg->data[0]); + break; + }; +} + +static bool hiomap_get_info(struct ipmi_flash_data *ctx) +{ + RESULT_INIT(res, ctx); + unsigned char req[3]; + struct ipmi_msg *msg; + + ctx->status = 0; + + /* Negotiate protocol version 2 */ + req[0] = HIOMAP_C_GET_INFO; + req[1] = ctx->seq++; + req[2] = 2; + + msg = ipmi_mkmsg(IPMI_DEFAULT_INTERFACE, + bmc_platform->ipmi_oem_hiomap_cmd, ipmi_flash_cmd_cb, + &res, req, sizeof(req), 6); + ipmi_queue_msg_sync(msg); + + if (res.cc != IPMI_CC_NO_ERROR) { + prerror("%s failed: %d\n", __func__, res.cc); + return false; + } + + lock(&ctx->lock); + ctx->status |= HIOMAP_E_DAEMON_READY; + unlock(&ctx->lock); + + return true; +} + +static bool hiomap_get_flash_info(struct ipmi_flash_data *ctx) +{ + RESULT_INIT(res, ctx); + unsigned char req[2]; + struct ipmi_msg *msg; + + req[0] = HIOMAP_C_GET_FLASH_INFO; + req[1] = ctx->seq++; + msg = ipmi_mkmsg(IPMI_DEFAULT_INTERFACE, + bmc_platform->ipmi_oem_hiomap_cmd, ipmi_flash_cmd_cb, + &res, req, sizeof(req), 2 + 2 + 2); + ipmi_queue_msg_sync(msg); + + if (res.cc != IPMI_CC_NO_ERROR) { + prerror("%s failed: %d\n", __func__, res.cc); + return false; + } + + return true; +} + +static bool hiomap_window_move(struct ipmi_flash_data *ctx, + struct lpc_window *win, uint8_t command, + uint64_t pos, uint64_t len, uint64_t *size) +{ + struct lpc_window *lwin; + RESULT_INIT(res, ctx); + unsigned char req[6]; + struct ipmi_msg *msg; + bool is_read; + + if (hiomap_window_valid(win, pos, len)) { + *size = len; + return true; + } + + req[0] = command; + req[1] = ctx->seq++; + msg_put_u16(&req[2], bytes_to_blocks(ctx, pos)); + msg_put_u16(&req[4], bytes_to_blocks(ctx, len)); + + ctx->read.open = false; + ctx->write.open = false; + + msg = ipmi_mkmsg(IPMI_DEFAULT_INTERFACE, + bmc_platform->ipmi_oem_hiomap_cmd, ipmi_flash_cmd_cb, + &res, req, sizeof(req), 2 + 2 + 2 + 2); + ipmi_queue_msg_sync(msg); + + if (res.cc != IPMI_CC_NO_ERROR) { + prerror("%s failed: %d\n", __func__, res.cc); + return false; + } + + *size = len; + /* Is length past the end of the window? */ + if ((pos + len) > (win->cur_pos + win->size)) + /* Adjust size to meet current window */ + *size = (win->cur_pos + win->size) - pos; + + if (len != 0 && *size == 0) { + prerror("Invalid window properties: len: %llu, size: %llu\n", + len, *size); + abort(); + } + + is_read = command == HIOMAP_C_CREATE_READ_WINDOW; + lwin = is_read ? &ctx->read : &ctx->write; + prlog(PR_DEBUG, "Opened %s window from 0x%x for %u bytes at 0x%x\n", + is_read ? "read" : "write", lwin->cur_pos, lwin->size, + lwin->lpc_addr); + + return true; +} + +static bool hiomap_mark_dirty(struct ipmi_flash_data *ctx, uint64_t offset, + uint64_t size) +{ + RESULT_INIT(res, ctx); + unsigned char req[6]; + struct ipmi_msg *msg; + + assert(ctx->write.open); + + req[0] = HIOMAP_C_MARK_DIRTY; + req[1] = ctx->seq++; + msg_put_u16(&req[2], bytes_to_blocks(ctx, offset - ctx->write.cur_pos)); + msg_put_u16(&req[4], bytes_to_blocks(ctx, size)); + + msg = ipmi_mkmsg(IPMI_DEFAULT_INTERFACE, + bmc_platform->ipmi_oem_hiomap_cmd, ipmi_flash_cmd_cb, + &res, req, sizeof(req), 2); + ipmi_queue_msg_sync(msg); + + if (res.cc != IPMI_CC_NO_ERROR) { + prerror("%s failed: %d\n", __func__, res.cc); + return false; + } + + prlog(PR_DEBUG, "Marked flash dirty at 0x%" PRIx64 " for %" PRIu64 "\n", + offset, size); + + return true; +} + +static bool hiomap_flush(struct ipmi_flash_data *ctx) +{ + RESULT_INIT(res, ctx); + unsigned char req[2]; + struct ipmi_msg *msg; + + assert(ctx->write.open); + + req[0] = HIOMAP_C_FLUSH; + req[1] = ctx->seq++; + + msg = ipmi_mkmsg(IPMI_DEFAULT_INTERFACE, + bmc_platform->ipmi_oem_hiomap_cmd, ipmi_flash_cmd_cb, + &res, req, sizeof(req), 2); + ipmi_queue_msg_sync(msg); + + if (res.cc != IPMI_CC_NO_ERROR) { + prerror("%s failed: %d\n", __func__, res.cc); + return false; + } + + prlog(PR_DEBUG, "Flushed writes"); + + return true; +} + +static bool hiomap_ack(struct ipmi_flash_data *ctx, uint8_t ack) +{ + RESULT_INIT(res, ctx); + unsigned char req[3]; + struct ipmi_msg *msg; + + req[0] = HIOMAP_C_ACK; + req[1] = ctx->seq++; + req[2] = ack; + + msg = ipmi_mkmsg(IPMI_DEFAULT_INTERFACE, + bmc_platform->ipmi_oem_hiomap_cmd, ipmi_flash_cmd_cb, + &res, req, sizeof(req), 2); + ipmi_queue_msg_sync(msg); + + if (res.cc != IPMI_CC_NO_ERROR) { + prerror("%s failed: %d\n", __func__, res.cc); + return false; + } + + prlog(PR_DEBUG, "Acked events: 0x%x\n", ack); + + return true; +} + +static bool hiomap_erase(struct ipmi_flash_data *ctx, uint64_t offset, + uint64_t size) +{ + RESULT_INIT(res, ctx); + unsigned char req[6]; + struct ipmi_msg *msg; + + assert(ctx->write.open); + + req[0] = HIOMAP_C_ERASE; + req[1] = ctx->seq++; + msg_put_u16(&req[2], bytes_to_blocks(ctx, offset - ctx->write.cur_pos)); + msg_put_u16(&req[4], bytes_to_blocks(ctx, size)); + + msg = ipmi_mkmsg(IPMI_DEFAULT_INTERFACE, + bmc_platform->ipmi_oem_hiomap_cmd, ipmi_flash_cmd_cb, + &res, req, sizeof(req), 2); + ipmi_queue_msg_sync(msg); + + if (res.cc != IPMI_CC_NO_ERROR) { + prerror("%s failed: %d\n", __func__, res.cc); + return false; + } + + prlog(PR_DEBUG, "Erased flash at 0x%" PRIx64 " for %" PRIu64 "\n", + offset, size); + + return true; +} + +static void hiomap_event(uint8_t events, void *context) +{ + struct ipmi_flash_data *ctx = context; + + lock(&ctx->lock); + ctx->status = events; + ctx->update = true; + unlock(&ctx->lock); + + /* FIXME: mutual exclusion */ + if (events & (HIOMAP_E_BMC_REBOOT | HIOMAP_E_WINDOW_RESET)) { + ctx->read.open = false; + ctx->write.open = false; + } +} + +static int lpc_window_read(struct ipmi_flash_data *ctx, uint32_t pos, + void *buf, uint32_t len) +{ + uint32_t off = ctx->read.lpc_addr + (pos - ctx->read.cur_pos); + int rc; + + prlog(PR_TRACE, "Reading at 0x%08x for 0x%08x offset: 0x%08x\n", + pos, len, off); + + while(len) { + uint32_t chunk; + uint32_t dat; + + /* XXX: make this read until it's aligned */ + if (len > 3 && !(off & 3)) { + rc = lpc_read(OPAL_LPC_FW, off, &dat, 4); + if (!rc) + *(uint32_t *)buf = dat; + chunk = 4; + } else { + rc = lpc_read(OPAL_LPC_FW, off, &dat, 1); + if (!rc) + *(uint8_t *)buf = dat; + chunk = 1; + } + if (rc) { + prlog(PR_ERR, "lpc_read failure %d to FW 0x%08x\n", rc, off); + return rc; + } + len -= chunk; + off += chunk; + buf += chunk; + } + + return 0; +} + +static int lpc_window_write(struct ipmi_flash_data *ctx, uint32_t pos, + const void *buf, uint32_t len) +{ + uint32_t off = ctx->write.lpc_addr + (pos - ctx->write.cur_pos); + int rc; + + + prlog(PR_TRACE, "Writing at 0x%08x for 0x%08x offset: 0x%08x\n", + pos, len, off); + + while(len) { + uint32_t chunk; + + if (len > 3 && !(off & 3)) { + rc = lpc_write(OPAL_LPC_FW, off, + *(uint32_t *)buf, 4); + chunk = 4; + } else { + rc = lpc_write(OPAL_LPC_FW, off, + *(uint8_t *)buf, 1); + chunk = 1; + } + if (rc) { + prlog(PR_ERR, "lpc_write failure %d to FW 0x%08x\n", rc, off); + return rc; + } + len -= chunk; + off += chunk; + buf += chunk; + } + + return 0; +} + +/* Best-effort asynchronous event handling by blocklevel callbacks */ +static int ipmi_flash_handle_events(struct ipmi_flash_data *ctx) +{ + uint8_t status; + bool update; + + lock(&ctx->lock); + status = ctx->status; + update = ctx->update; + if (update) { + ctx->status &= ~HIOMAP_E_ACK_MASK; + ctx->update = false; + } + unlock(&ctx->lock); + + if (!update) + return 0; + + if (status & HIOMAP_E_FLASH_LOST) { + prlog(PR_INFO, "Lost control of flash device\n"); + return FLASH_ERR_AGAIN; + } + + if (!(status & HIOMAP_E_DAEMON_READY)) { + prerror("Daemon not ready\n"); + return FLASH_ERR_DEVICE_GONE; + } + + if (status & HIOMAP_E_BMC_REBOOT) { + /* Avoid handling acks if we're renegotiating, they're stale */ + if (!hiomap_get_info(ctx)) { + prerror("Failure to renegotiate after BMC reboot\n"); + return FLASH_ERR_DEVICE_GONE; + } + + return 0; + } + + if (status & HIOMAP_E_ACK_MASK) { + if (!hiomap_ack(ctx, status & HIOMAP_E_ACK_MASK)) { + prerror("Failed to ack events: 0x%x\n", + status & HIOMAP_E_ACK_MASK); + return FLASH_ERR_AGAIN; + } + } + + return 0; +} + +static int ipmi_flash_read(struct blocklevel_device *bl, uint64_t pos, + void *buf, uint64_t len) +{ + struct ipmi_flash_data *ctx; + uint64_t size; + int rc = 0; + + /* LPC is only 32bit */ + if (pos > UINT_MAX || len > UINT_MAX) + return FLASH_ERR_PARM_ERROR; + + ctx = container_of(bl, struct ipmi_flash_data, bl); + + rc = ipmi_flash_handle_events(ctx); + if (rc) + return rc; + + prlog(PR_TRACE, "Flash read at %#" PRIx64 " for %#" PRIx64 "\n", pos, len); + while (len > 0) { + /* Move window and get a new size to read */ + if (!hiomap_window_move(ctx, &ctx->read, + MBOX_C_CREATE_READ_WINDOW, pos, len, + &size)) + return FLASH_ERR_PARM_ERROR; + + /* Perform the read for this window */ + rc = lpc_window_read(ctx, pos, buf, size); + if (rc) + return rc; + + len -= size; + pos += size; + buf += size; + /* + * Ensure my window is still open, if it isn't we can't trust + * what we read + */ +#if 0 + if (!is_valid(mbox_flash, &mbox_flash->read)) + return FLASH_ERR_AGAIN; +#endif + } + return rc; + +} + +static int ipmi_flash_write(struct blocklevel_device *bl, uint64_t pos, + const void *buf, uint64_t len) +{ + struct ipmi_flash_data *ctx; + uint64_t size; + int rc = 0; + + /* LPC is only 32bit */ + if (pos > UINT_MAX || len > UINT_MAX) + return FLASH_ERR_PARM_ERROR; + + ctx = container_of(bl, struct ipmi_flash_data, bl); + + rc = ipmi_flash_handle_events(ctx); + if (rc) + return rc; + + prlog(PR_TRACE, "Flash write at %#" PRIx64 " for %#" PRIx64 "\n", pos, len); + while (len > 0) { + /* Move window and get a new size to read */ + if (!hiomap_window_move(ctx, &ctx->write, + MBOX_C_CREATE_WRITE_WINDOW, pos, len, + &size)) { + return FLASH_ERR_PARM_ERROR; + } + + /* Perform the write for this window */ + rc = lpc_window_write(ctx, pos, buf, size); + if (rc) + return rc; + + if (!hiomap_mark_dirty(ctx, pos, size)) { + return FLASH_ERR_PARM_ERROR; + } + + /* ARJ: This comment is incorrect, the BMC must flush any dirty + * regions on close + */ + /* + * Must flush here as changing the window contents + * without flushing entitles the BMC to throw away the + * data. Unlike the read case there isn't a need to explicitly + * validate the window, the flush command will fail if the + * window was compromised. + */ + if (!hiomap_flush(ctx)) { + return FLASH_ERR_PARM_ERROR; + } + + len -= size; + pos += size; + buf += size; + } + return rc; + +} + +static int ipmi_flash_erase(struct blocklevel_device *bl, uint64_t pos, + uint64_t len) +{ + struct ipmi_flash_data *ctx; + int rc; + + /* LPC is only 32bit */ + if (pos > UINT_MAX || len > UINT_MAX) + return FLASH_ERR_PARM_ERROR; + + ctx = container_of(bl, struct ipmi_flash_data, bl); + + rc = ipmi_flash_handle_events(ctx); + if (rc) + return rc; + + prlog(PR_TRACE, "Flash erase at 0x%08x for 0x%08x\n", (u32) pos, (u32) len); + while (len > 0) { + uint64_t size; + + /* Move window and get a new size to erase */ + if (!hiomap_window_move(ctx, &ctx->write, + MBOX_C_CREATE_WRITE_WINDOW, pos, len, + &size)) + return FLASH_ERR_PARM_ERROR; + + if (!hiomap_erase(ctx, pos, size)) + return FLASH_ERR_PARM_ERROR; + + /* + * Flush directly, don't mark that region dirty otherwise it + * isn't clear if a write happened there or not + */ + + if (!hiomap_flush(ctx)) + return FLASH_ERR_PARM_ERROR; + + len -= size; + pos += size; + } + + return 0; +} + +static int ipmi_flash_get_flash_info(struct blocklevel_device *bl, + const char **name, uint64_t *total_size, + uint32_t *erase_granule) +{ + struct ipmi_flash_data *ctx; + int rc; + + ctx = container_of(bl, struct ipmi_flash_data, bl); + + rc = ipmi_flash_handle_events(ctx); + if (rc) + return rc; + + if (!hiomap_get_flash_info(ctx)) { + abort(); + } + + ctx->bl.erase_mask = ctx->erase_granule - 1; + + if (name) + *name = NULL; + if (total_size) + *total_size = ctx->total_size; + if (erase_granule) + *erase_granule = ctx->erase_granule; + + return 0; +} + +int ipmi_flash_init(struct blocklevel_device **bl) +{ + struct ipmi_flash_data *ctx; + int rc; + + if (!bmc_platform->ipmi_oem_hiomap_cmd) + /* FIXME: Find a better error code */ + return FLASH_ERR_DEVICE_GONE; + + if (!bl) + return FLASH_ERR_PARM_ERROR; + + *bl = NULL; + + ctx = zalloc(sizeof(struct ipmi_flash_data)); + if (!ctx) + return FLASH_ERR_MALLOC_FAILED; + + init_lock(&ctx->lock); + + ctx->bl.read = &ipmi_flash_read; + ctx->bl.write = &ipmi_flash_write; + ctx->bl.erase = &ipmi_flash_erase; + ctx->bl.get_info = &ipmi_flash_get_flash_info; + + rc = ipmi_sel_register(CMD_OP_HIOMAP_EVENT, hiomap_event, ctx); + if (rc < 0) + return rc; + + /* Do a LPC2AHB protocol GET_INFO */ + if (!hiomap_get_info(ctx)) { + prerror("Failed to get hiomap parameters\n"); + return FLASH_ERR_DEVICE_GONE; + } + + if (!hiomap_get_flash_info(ctx)) { + prerror("Failed to get flash parameters\n"); + return FLASH_ERR_DEVICE_GONE; + } + + prlog(PR_NOTICE, "Negotiated hiomap protocol v%u\n", ctx->version); + prlog(PR_NOTICE, "Block size is %uKiB\n", + 1 << (ctx->block_size_shift - 10)); + prlog(PR_NOTICE, "BMC suggested flash timeout of %us\n", ctx->timeout); + prlog(PR_NOTICE, "Flash size is %uMiB\n", ctx->total_size >> 20); + prlog(PR_NOTICE, "Erase granule size is %uKiB\n", + ctx->erase_granule >> 10); + + ctx->bl.keep_alive = 0; + + *bl = &(ctx->bl); + + return 0; +} + +void ipmi_flash_exit(struct blocklevel_device *bl) +{ + struct ipmi_flash_data *ctx; + if (bl) { + ctx = container_of(bl, struct ipmi_flash_data, bl); + free(ctx); + } +} diff --git a/libflash/ipmi-flash.h b/libflash/ipmi-flash.h new file mode 100644 index 000000000000..4bec2ad8a092 --- /dev/null +++ b/libflash/ipmi-flash.h @@ -0,0 +1,29 @@ +/* Copyright 2018 IBM Corp. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + * implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __LIBFLASH_IPMI_FLASH_H +#define __LIBFLASH_IPMI_FLASH_H + +#include +#include + +#include "blocklevel.h" + +int ipmi_flash_lock(struct blocklevel_device *bl, uint64_t pos, uint64_t len); +int ipmi_flash_init(struct blocklevel_device **bl); +void ipmi_flash_exit(struct blocklevel_device *bl); + +#endif /* __LIBFLASH_IPMI_FLASH_H */ diff --git a/platforms/astbmc/common.c b/platforms/astbmc/common.c index 2c32db7295af..23550ef37a67 100644 --- a/platforms/astbmc/common.c +++ b/platforms/astbmc/common.c @@ -469,4 +469,5 @@ const struct bmc_platform astbmc_ami = { const struct bmc_platform astbmc_openbmc = { .name = "OpenBMC", .ipmi_oem_partial_add_esel = IPMI_CODE(0x3a, 0xf0), + .ipmi_oem_hiomap_cmd = IPMI_CODE(0x3a, 0x5a), }; From patchwork Thu Sep 6 06:40:15 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jeffery X-Patchwork-Id: 966818 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 425WGT264Nz9sDb for ; Thu, 6 Sep 2018 16:42:41 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=aj.id.au Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=aj.id.au header.i=@aj.id.au header.b="netr+RDz"; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="Ih5sUKHC"; dkim-atps=neutral Received: from lists.ozlabs.org (unknown [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 425WGT0FjkzF3TC for ; Thu, 6 Sep 2018 16:42:41 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=aj.id.au Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=aj.id.au header.i=@aj.id.au header.b="netr+RDz"; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="Ih5sUKHC"; dkim-atps=neutral X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=aj.id.au (client-ip=64.147.123.25; helo=wout2-smtp.messagingengine.com; envelope-from=andrew@aj.id.au; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=aj.id.au Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=aj.id.au header.i=@aj.id.au header.b="netr+RDz"; dkim=pass (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="Ih5sUKHC"; dkim-atps=neutral Received: from wout2-smtp.messagingengine.com (wout2-smtp.messagingengine.com [64.147.123.25]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 425WDV6zMWzF3CM for ; Thu, 6 Sep 2018 16:40:58 +1000 (AEST) Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.west.internal (Postfix) with ESMTP id 9172F4AF; Thu, 6 Sep 2018 02:40:56 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute4.internal (MEProxy); Thu, 06 Sep 2018 02:40:57 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=aj.id.au; h=cc :date:from:in-reply-to:message-id:references:subject:to :x-me-sender:x-me-sender:x-sasl-enc; s=fm3; bh=cuS7s6mTdFPx4wN5q 0CJH0p1t6bBufkA9gRlfXTr1CM=; b=netr+RDz+/V6S6ZcCb92A4Bx0asv1SwRx vNyv/LyJnoLdH/A1oGPrgX5TSg4ehsSPXPXu11haTjYsERAeANq4fbT9RTi7qt0P nkAVRs+2UJ63AMkrK1yIqC+z4jxKTYskoGfAlAnKn+s/VtcaeZtE8VkKGajkm9TA 9U7sSiWTB2TxTXxY9+8DJMQyOwGsjJDgQ5slMHgl/NPN6YkUcklf3c8FDMwwWqaM DUePaP+kMdKv0m05mGXYMiU5oqvNwoUuDW/eMYwhVEL1IBGO2D7IOK/dIbdOh/0f jzeeeDamIt6grlAEUFMx80SlSDtxLVuCMMN6/bqVwi9/57xtg0m8w== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:in-reply-to:message-id :references:subject:to:x-me-sender:x-me-sender:x-sasl-enc; s= fm3; bh=cuS7s6mTdFPx4wN5q0CJH0p1t6bBufkA9gRlfXTr1CM=; b=Ih5sUKHC ZXPdRcZu4km97VvKzyiQceuzWWA8SLl7jgIIUejnj2OO/bOD1B3+/UYHbdPUCqRM 2LuWQ08jImjagO/PsRjlQtBWuRtmnrI+csGm8AGb6qlkPknl7C98Dpe/DE1fBsHl 8DdEq4QuGXSuS7BgOYH40LWFRpk1rLvXwJ78X4E4tpTomfMVpNt6OGU0HD9oL9cB aexst/X0WdbCbBjLfkJp0d1nCuwSiN4/34twJslTGKnwCFe05MohvhLr3pNObQdA BpkQPnmuQe9sbft2RCtd4rRuqooI1by/ryO7jQ1MqHt73bd6NkdoBZSS8E6yp6vT W7KZ8XmJ3RhQTg== X-ME-Proxy: X-ME-Sender: Received: from localhost.localdomain (ppp118-210-231-68.bras1.adl4.internode.on.net [118.210.231.68]) by mail.messagingengine.com (Postfix) with ESMTPA id 23863E4015; Thu, 6 Sep 2018 02:40:52 -0400 (EDT) From: Andrew Jeffery To: skiboot@lists.ozlabs.org Date: Thu, 6 Sep 2018 16:10:15 +0930 Message-Id: <20180906064015.1498-7-andrew@aj.id.au> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180906064015.1498-1-andrew@aj.id.au> References: <20180906064015.1498-1-andrew@aj.id.au> Subject: [Skiboot] [RFC PATCH 6/6] astbmc: Prefer ipmi-flash for PNOR access X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dkodihal@in.ibm.com, Andrew Jeffery , anoo@linux.ibm.com MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" If the IPMI command is not available, fall back to the mailbox interface. Signed-off-by: Andrew Jeffery --- hw/ast-bmc/ast-io.c | 10 +++++++--- include/ast.h | 11 +++++++++-- platforms/astbmc/common.c | 8 ++++++-- platforms/astbmc/pnor.c | 35 +++++++++++++++++++++++++---------- 4 files changed, 47 insertions(+), 17 deletions(-) diff --git a/hw/ast-bmc/ast-io.c b/hw/ast-bmc/ast-io.c index a6ae85a4d24f..e8258b4cfc02 100644 --- a/hw/ast-bmc/ast-io.c +++ b/hw/ast-bmc/ast-io.c @@ -426,12 +426,16 @@ bool ast_io_init(void) return ast_io_is_rw(); } -bool ast_lpc_fw_is_mbox(void) +bool ast_lpc_fw_needs_hiomap(void) { - return dt_find_compatible_node(dt_root, NULL, "mbox"); + struct dt_node *n; + + n = dt_find_compatible_node(dt_root, NULL, "mbox"); + + return n != NULL; } -bool ast_lpc_fw_is_flash(void) +bool ast_lpc_fw_maps_flash(void) { uint8_t boot_version; uint8_t boot_flags; diff --git a/include/ast.h b/include/ast.h index b30f7bf27737..831fae340348 100644 --- a/include/ast.h +++ b/include/ast.h @@ -86,10 +86,17 @@ bool ast_can_isolate_sp(void); bool ast_sio_disable(void); bool ast_io_init(void); bool ast_io_is_rw(void); -bool ast_lpc_fw_is_flash(void); -bool ast_lpc_fw_is_mbox(void); +bool ast_lpc_fw_maps_flash(void); +bool ast_lpc_fw_needs_hiomap(void); bool ast_scratch_reg_is_mbox(void); +enum ast_flash_style { + raw_flash, + raw_mem, + hiomap_ipmi, + hiomap_mbox, +}; + /* UART configuration */ bool ast_is_vuart1_enabled(void); diff --git a/platforms/astbmc/common.c b/platforms/astbmc/common.c index 23550ef37a67..ced38bc3374f 100644 --- a/platforms/astbmc/common.c +++ b/platforms/astbmc/common.c @@ -120,11 +120,15 @@ static int astbmc_fru_init(void) void astbmc_init(void) { + /* Register the BT interface with the IPMI layer + * + * Initialise this first to enable PNOR access + */ + bt_init(); + /* Initialize PNOR/NVRAM */ pnor_init(); - /* Register the BT interface with the IPMI layer */ - bt_init(); /* Initialize elog */ elog_init(); ipmi_sel_init(); diff --git a/platforms/astbmc/pnor.c b/platforms/astbmc/pnor.c index 55784ee4594f..9241dde94a2d 100644 --- a/platforms/astbmc/pnor.c +++ b/platforms/astbmc/pnor.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -30,12 +31,16 @@ int pnor_init(void) { struct spi_flash_ctrl *pnor_ctrl = NULL; struct blocklevel_device *bl = NULL; + enum ast_flash_style style; int rc; - bool do_mbox; - do_mbox = ast_lpc_fw_is_mbox(); - if (do_mbox) { - rc = mbox_flash_init(&bl); + if (ast_lpc_fw_needs_hiomap()) { + style = hiomap_ipmi; + rc = ipmi_flash_init(&bl); + if (rc) { + style = hiomap_mbox; + rc = mbox_flash_init(&bl); + } } else { /* Open controller and flash. If the LPC->AHB doesn't point to * the PNOR flash base we assume we're booting from BMC system @@ -43,10 +48,12 @@ int pnor_init(void) * FW reads & writes). */ - if (ast_lpc_fw_is_flash()) + if (ast_lpc_fw_maps_flash()) { + style = raw_flash; rc = ast_sf_open(AST_SF_TYPE_PNOR, &pnor_ctrl); - else { + } else { printf("PLAT: Memboot detected\n"); + style = raw_mem; rc = ast_sf_open(AST_SF_TYPE_MEM, &pnor_ctrl); } if (rc) { @@ -66,12 +73,20 @@ int pnor_init(void) if (!rc) return 0; - fail: +fail: if (bl) { - if (do_mbox) - mbox_flash_exit(bl); - else + switch (style) { + case raw_flash: + case raw_mem: flash_exit(bl); + break; + case hiomap_ipmi: + ipmi_flash_exit(bl); + break; + case hiomap_mbox: + mbox_flash_exit(bl); + break; + } } if (pnor_ctrl) ast_sf_close(pnor_ctrl);