From patchwork Wed Aug 8 14:28:15 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom de Vries X-Patchwork-Id: 955078 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-483400-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="ZEQqepCK"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41ltzF6k06z9s3Z for ; Thu, 9 Aug 2018 00:28:24 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:subject:message-id:mime-version:content-type; q=dns; s= default; b=YTWhSy1bLhmEwTDMK9t6Qwpn+CShH67w430wk69wv1gZ90cDEJBF7 A8H9mamDh5e0dEAJ5s8BnJXnc8DNeiKSK+IrfMAPnbruf0R/TCCprPi2+ZO5pOyP 6vNQdLKqJN8noybB9r5rBupT51uFs42RnBdUol7RHkQHZNoJK0r3ME= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:subject:message-id:mime-version:content-type; s= default; bh=AvjJnJ0TUM0s3h03bz3c3ecAt7o=; b=ZEQqepCKJMb8GnwhoOus bWo1a3qzyye5rYLUhHaoWU4G2kL4DKN7hCTpMEFSAukYnahy/2Vz/OgUgDSEEIh9 kQ9FAlsfMk1nnJ/ayZcmHCe7n5vuQnsm3cB1XAu9XVOIHV/fB3mfScnyMYElT48i 3ImIM6ZjblBOQt81KgL/fjQ= Received: (qmail 21206 invoked by alias); 8 Aug 2018 14:28:17 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 20603 invoked by uid 89); 8 Aug 2018 14:28:17 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mx1.suse.de Received: from mx2.suse.de (HELO mx1.suse.de) (195.135.220.15) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 08 Aug 2018 14:28:16 +0000 Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 5A5D4AE15 for ; Wed, 8 Aug 2018 14:28:14 +0000 (UTC) Date: Wed, 8 Aug 2018 16:28:15 +0200 From: Tom de Vries To: gcc-patches@gcc.gnu.org Subject: [committed][libgomp, nvptx] Remove hard-coded const in nvptx_open_device Message-ID: <20180808142814.GA22476@delia> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.10.1 (2018-07-13) X-IsSubscribed: yes Hi, CU_DEVICE_ATTRIBUTE_MAX_REGISTERS_PER_MULTIPROCESSOR is defined in cuda driver api version 6.0 and higher. Currently nvptx_open_device uses a hard-coded constant instead. This patch fixes that by: - defining CU_DEVICE_ATTRIBUTE_MAX_REGISTERS_PER_MULTIPROCESSOR to the hardcoded constant at toplevel, if not present in cuda.h, and - using CU_DEVICE_ATTRIBUTE_MAX_REGISTERS_PER_MULTIPROCESSOR in nvptx_open_device Build on x86_64 with nvptx accelerator and reg-tested libgomp. Committed to trunk. Thanks, - Tom [libgomp, nvptx] Remove hard-coded const in nvptx_open_device 2018-08-08 Tom de Vries * plugin/plugin-nvptx.c (CU_DEVICE_ATTRIBUTE_MAX_REGISTERS_PER_MULTIPROCESSOR): Define. (nvptx_open_device): Use CU_DEVICE_ATTRIBUTE_MAX_REGISTERS_PER_MULTIPROCESSOR. --- libgomp/plugin/plugin-nvptx.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/libgomp/plugin/plugin-nvptx.c b/libgomp/plugin/plugin-nvptx.c index e2ea542049b0..589d6596cc2f 100644 --- a/libgomp/plugin/plugin-nvptx.c +++ b/libgomp/plugin/plugin-nvptx.c @@ -51,6 +51,7 @@ #if CUDA_VERSION < 6000 extern CUresult cuGetErrorString (CUresult, const char **); +#define CU_DEVICE_ATTRIBUTE_MAX_REGISTERS_PER_MULTIPROCESSOR 82 #endif #define DO_PRAGMA(x) _Pragma (#x) @@ -741,9 +742,11 @@ nvptx_open_device (int n) &pi, CU_DEVICE_ATTRIBUTE_MAX_REGISTERS_PER_BLOCK, dev); ptx_dev->regs_per_block = pi; - /* CU_DEVICE_ATTRIBUTE_MAX_REGISTERS_PER_MULTIPROCESSOR = 82 is defined only + /* CU_DEVICE_ATTRIBUTE_MAX_REGISTERS_PER_MULTIPROCESSOR is defined only in CUDA 6.0 and newer. */ - r = CUDA_CALL_NOCHECK (cuDeviceGetAttribute, &pi, 82, dev); + r = CUDA_CALL_NOCHECK (cuDeviceGetAttribute, &pi, + CU_DEVICE_ATTRIBUTE_MAX_REGISTERS_PER_MULTIPROCESSOR, + dev); /* Fallback: use limit of registers per block, which is usually equal. */ if (r == CUDA_ERROR_INVALID_VALUE) pi = ptx_dev->regs_per_block;