From patchwork Tue Aug 7 10:43:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baolin Wang X-Patchwork-Id: 954454 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="Jc2u/rJx"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 41lB2l2pnWz9s0n for ; Tue, 7 Aug 2018 20:43:59 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727388AbeHGM5k (ORCPT ); Tue, 7 Aug 2018 08:57:40 -0400 Received: from mail-pl0-f65.google.com ([209.85.160.65]:35767 "EHLO mail-pl0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726073AbeHGM5j (ORCPT ); Tue, 7 Aug 2018 08:57:39 -0400 Received: by mail-pl0-f65.google.com with SMTP id w3-v6so6960804plq.2 for ; Tue, 07 Aug 2018 03:43:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=ni9lYCCJ1DN/2Vf0QZIqF72U+f3npylLIvSbMNmcQyA=; b=Jc2u/rJxX49nKk3ledHSW0qa+3DjKge/MKOOHVVXFU7Z4a3Qw6n6akwx1y2VTGF++i Rtk8U5XRUwHukoR+Tsu6qXf4j3XqrUH1bDtTsCPoxyqx2e3g3yfUqNs9XK7DbKXoFr1H FiNWcyhNI5+QnocMmmz9VbIIfK+yesSKgG6og= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=ni9lYCCJ1DN/2Vf0QZIqF72U+f3npylLIvSbMNmcQyA=; b=t95xHN2muuKOjqPX7EfnmX8ZQTMnVmgwZz2mSXVhmxv/o0BwOaqy9SujhEw/11exot HxMTKYsVxAjc+CumAD1+VksPxzxudStFYcsYot8d2P8Svo7PoC0qfFXIgvP7qsLiDTu3 AVh9mKjtkHEHrLmaVQlR5N8pvu+w9OAGh8XwtKdbR4Vu/bHAbBERs6UMdLZKZDHzUg8y 0ojgJaM0SeDI6Us6BcRF+uT/na08jLf1r7K7sOdYp+9jiSVC5rTzthPgDkBo0e0WHO3i EXEDhpnPSvKEnC0EtICxGiMxdoYzWbUYimlpWjF8IYkROFqN7rz2tTetNaFYTvo90R9b VlXw== X-Gm-Message-State: AOUpUlGEjul25c77les4g2RJXcjqccKcWqWAFx690IXkbhBoMhc6yf+8 DwobLgYp/y9gra3D1Th85KpcvQ== X-Google-Smtp-Source: AAOMgpcapeW5UKOHkjUUwjQpH9++0a8wr4LafmyZGZ6zjyk+CAJMEJdsSpKTiWj5XaVWzfdvtb9Cbw== X-Received: by 2002:a17:902:2d24:: with SMTP id o33-v6mr17486946plb.38.1533638636738; Tue, 07 Aug 2018 03:43:56 -0700 (PDT) Received: from baolinwangubtpc.spreadtrum.com ([117.18.48.102]) by smtp.gmail.com with ESMTPSA id l127-v6sm2305547pfc.55.2018.08.07.03.43.53 (version=TLS1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 07 Aug 2018 03:43:56 -0700 (PDT) From: Baolin Wang To: broonie@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com Cc: orsonzhai@gmail.com, zhang.lyra@gmail.com, lanqing.liu@spreadtrum.com, baolin.wang@linaro.org, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/2] dt-bindings: spi: Add Spreadtrum SPI controller documentation Date: Tue, 7 Aug 2018 18:43:37 +0800 Message-Id: <64681bf903104c8a02f118294e616e2a12a5ebe4.1533638405.git.baolin.wang@linaro.org> X-Mailer: git-send-email 1.7.9.5 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Lanqing Liu This patch adds the binding documentation for Spreadtrum SPI controller device. Signed-off-by: Lanqing Liu Signed-off-by: Baolin Wang --- Documentation/devicetree/bindings/spi/spi-sprd.txt | 31 ++++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-sprd.txt diff --git a/Documentation/devicetree/bindings/spi/spi-sprd.txt b/Documentation/devicetree/bindings/spi/spi-sprd.txt new file mode 100644 index 0000000..06ff746 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-sprd.txt @@ -0,0 +1,31 @@ +Spreadtrum SPI Controller + +Required properties: +- compatible: Should be "sprd,sc9860-spi". +- reg: Offset and length of SPI controller register space. +- interrupts: Should contain SPI interrupt. +- clock-names: Should contain following entries: + "spi" for SPI clock, + "source" for SPI source (parent) clock, + "enable" for SPI module enable clock. +- clocks: List of clock input name strings sorted in the same order + as the clock-names property. +- #address-cells: The number of cells required to define a chip select + address on the SPI bus. Should be set to 1. +- #size-cells: Should be set to 0. + +Optional properties: +- sprd,spi-interval: Specify the intervals of two SPI frames, which can be + converted to the delay clock cycles = interval number * 4 + 10. + +Example: +spi0: spi@70a00000{ + compatible = "sprd,sc9860-spi"; + reg = <0 0x70a00000 0 0x1000>; + interrupts = ; + clock-names = "spi", "source","enable"; + clocks = <&clk_spi0>, <&ext_26m>, <&clk_ap_apb_gates 5>; + sprd,spi-interval = <9>; + #address-cells = <1>; + #size-cells = <0>; +};