From patchwork Fri Jul 27 18:45:20 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 950303 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="SeW6GUeI"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 41cdHF4ByBz9ryt for ; Sat, 28 Jul 2018 04:47:05 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388967AbeG0UKN (ORCPT ); Fri, 27 Jul 2018 16:10:13 -0400 Received: from mail-pg1-f196.google.com ([209.85.215.196]:33283 "EHLO mail-pg1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389151AbeG0UKN (ORCPT ); Fri, 27 Jul 2018 16:10:13 -0400 Received: by mail-pg1-f196.google.com with SMTP id r5-v6so3726171pgv.0 for ; Fri, 27 Jul 2018 11:47:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=TanQD+d7LdIbw0io1BUgGGGTWN/HLNDHztrgp/3rkq8=; b=SeW6GUeIspTSirkI+shn2iYVZxeU271X4a2EhoAMSeY372ivtWiBKX+LvPsi3+sklx Oya4ziotCU6SVTc6wbiU3+7CGjD2zOdRUY8sKTRhGJmGmmg6NqUOxeJcHuujgogzUzGv FPFILeZwLCtelFnN2pizkX345SIvcp+m0f4ys= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=TanQD+d7LdIbw0io1BUgGGGTWN/HLNDHztrgp/3rkq8=; b=TwwqpXGvi6nw+OoEv93GXAl8Bq3Yy2oBT4zIeH0yeKbiJ98h4OmbLp9Krzz7J0Clm2 2qPkEFSnU6Ku2FvvboOePuUs4vansUDyfgFBbeoBQYtrWTJXofrcA3Pq689sOdeurne/ BSlYpP1c/3WltSRMkB9UJKRKBNwoKmBSOZZbbZTivlXN7iMFQabRmy0Bsk+lVs+eUwxx j/5akzhH6wNYVPRbNQxjRp4KBJoI7vnrDzFjOeN7bMo/nqgdxX/PyOU797dv478J9Sb8 hR7bH2fsUPhc48VKeoKXCxncqqrd02TAbr9OjvKb1vJx33OrL1jScPNiZvmCjK4Rjk+0 oWpQ== X-Gm-Message-State: AOUpUlHQYu9ycdTwiBkgW1LLlKDg+TNG8OkQ6WNqiSKfvm+pm4PRhE7S 9LMvvsOzxh0vcqq+jZVI8ltN X-Google-Smtp-Source: AAOMgpdWw1UGVko+dJA3M6kYTG8A5Lfj39Ahgs3GSkzGuLNxlQgEHCwzQgEQIzWhXysOGuOciC7CtQ== X-Received: by 2002:a65:4541:: with SMTP id x1-v6mr7054348pgr.26.1532717223938; Fri, 27 Jul 2018 11:47:03 -0700 (PDT) Received: from localhost.localdomain ([2405:204:7308:c330:41b:cc59:b463:ec7b]) by smtp.gmail.com with ESMTPSA id t69-v6sm13817959pfj.7.2018.07.27.11.46.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 27 Jul 2018 11:47:03 -0700 (PDT) From: Manivannan Sadhasivam To: p.zabel@pengutronix.de, mturquette@baylibre.com, sboyd@kernel.org, afaerber@suse.de, robh+dt@kernel.org Cc: linux-clk@vger.kernel.org, liuwei@actions-semi.com, mp-cs@actions-semi.com, 96boards@ucrobotics.com, devicetree@vger.kernel.org, daniel.thompson@linaro.org, amit.kucheria@linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, hzhang@ucrobotics.com, bdong@ucrobotics.com, manivannanece23@gmail.com, thomas.liau@actions-semi.com, jeff.chen@actions-semi.com, pn@denx.de, edgar.righi@lsitec.org.br, sravanhome@gmail.com, Manivannan Sadhasivam Subject: [PATCH 2/9] dt-bindings: clock: Add reset controller bindings for Actions Semi Owl SoCs Date: Sat, 28 Jul 2018 00:15:20 +0530 Message-Id: <20180727184527.13287-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180727184527.13287-1-manivannan.sadhasivam@linaro.org> References: <20180727184527.13287-1-manivannan.sadhasivam@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add Reset Controller bindings to clock bindings for Actions Semi Owl SoCs, S700 and S900. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/clock/actions,owl-cmu.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/actions,owl-cmu.txt b/Documentation/devicetree/bindings/clock/actions,owl-cmu.txt index d1e60d297387..2ef86ae96df8 100644 --- a/Documentation/devicetree/bindings/clock/actions,owl-cmu.txt +++ b/Documentation/devicetree/bindings/clock/actions,owl-cmu.txt @@ -13,6 +13,7 @@ Required Properties: region. - clocks: Reference to the parent clocks ("hosc", "losc") - #clock-cells: should be 1. +- #reset-cells: should be 1. Each clock is assigned an identifier, and client nodes can use this identifier to specify the clock which they consume. @@ -36,6 +37,7 @@ Example: Clock Management Unit node: reg = <0x0 0xe0160000 0x0 0x1000>; clocks = <&hosc>, <&losc>; #clock-cells = <1>; + #reset-cells = <1>; }; Example: UART controller node that consumes clock generated by the clock From patchwork Fri Jul 27 18:45:21 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 950304 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="kc7nCAeH"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 41cdHV5Vxyz9s29 for ; Sat, 28 Jul 2018 04:47:18 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389176AbeG0UK0 (ORCPT ); Fri, 27 Jul 2018 16:10:26 -0400 Received: from mail-pl0-f65.google.com ([209.85.160.65]:46384 "EHLO mail-pl0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388871AbeG0UK0 (ORCPT ); Fri, 27 Jul 2018 16:10:26 -0400 Received: by mail-pl0-f65.google.com with SMTP id t17-v6so2667732ply.13 for ; Fri, 27 Jul 2018 11:47:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=8mrfDo7xkeP5gS1zJZIyaAkBnN9j6DHJcwUnfsPeMO8=; b=kc7nCAeHKvABHKmgMRjqAo1DC1qrHpgncMLKHFbxjC9kCpQyLXm6ikTi/8rwfbfFXj C+FjCjUuIiWubFv8WNIt6LtU5/WmUHrnRxEUA9WDseyV6zY6c/HeOClvy6lsLGhUgysK JUBzfvSzX264V4++vC7l8julcBzB6qniLq9Kg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=8mrfDo7xkeP5gS1zJZIyaAkBnN9j6DHJcwUnfsPeMO8=; b=Vnh/+fZa5jDdTuN1E8+FDIBa+7iZBe/QaRcHkPviXFzH+8agEFcPzUExlim7ftMupe AScGkC9ejlBxNp3Ju/FqzOMQSIz02wYvmeRzieE8U94BPpdWz5y1kGXYwkuW5xZsGwdp UJg7rbx87dsD+fN4Ft6SM1GDcx18v7zC44+vgwn7ZK7g/M3zeNsXlrCUYkjfetmOZa6+ fbE+ONwUX+iYJf3eHxqxBWQiztJrLEgvo+AQOSH0ABDfHQZ6wwAKhS6BstZWoHjxJsWV 8P5VpugUIFrm5RNrVwkSoqftx2kHeMkv2XhGRdLzcqSZjC6eeM84yl+/QHNyYOJ1v0Vc BEEQ== X-Gm-Message-State: AOUpUlFi2XwCXHD9bhLUcppGoUI4tdz3ZGrw/+AVXM+kH5GaqfqnWlPT j2rZSh9IGvuCComw0ZfiE0kL X-Google-Smtp-Source: AAOMgpeCGB4bnhLOQGdXUj7iZvZ/kO+78BVYzfvAtqkPJYtoawFg/ztcYmM0xgK9pY4Zlg34T82+ew== X-Received: by 2002:a17:902:ab94:: with SMTP id f20-v6mr7023099plr.231.1532717236801; Fri, 27 Jul 2018 11:47:16 -0700 (PDT) Received: from localhost.localdomain ([2405:204:7308:c330:41b:cc59:b463:ec7b]) by smtp.gmail.com with ESMTPSA id t69-v6sm13817959pfj.7.2018.07.27.11.47.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 27 Jul 2018 11:47:16 -0700 (PDT) From: Manivannan Sadhasivam To: p.zabel@pengutronix.de, mturquette@baylibre.com, sboyd@kernel.org, afaerber@suse.de, robh+dt@kernel.org Cc: linux-clk@vger.kernel.org, liuwei@actions-semi.com, mp-cs@actions-semi.com, 96boards@ucrobotics.com, devicetree@vger.kernel.org, daniel.thompson@linaro.org, amit.kucheria@linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, hzhang@ucrobotics.com, bdong@ucrobotics.com, manivannanece23@gmail.com, thomas.liau@actions-semi.com, jeff.chen@actions-semi.com, pn@denx.de, edgar.righi@lsitec.org.br, sravanhome@gmail.com, Manivannan Sadhasivam Subject: [PATCH 3/9] dt-bindings: reset: Add binding constants for Actions Semi S700 RMU Date: Sat, 28 Jul 2018 00:15:21 +0530 Message-Id: <20180727184527.13287-4-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180727184527.13287-1-manivannan.sadhasivam@linaro.org> References: <20180727184527.13287-1-manivannan.sadhasivam@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add device tree binding constants for Actions Semi S700 SoC Reset Management Unit (RMU). Signed-off-by: Manivannan Sadhasivam Reviewed-by: Rob Herring --- .../dt-bindings/reset/actions,s700-reset.h | 34 +++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 include/dt-bindings/reset/actions,s700-reset.h diff --git a/include/dt-bindings/reset/actions,s700-reset.h b/include/dt-bindings/reset/actions,s700-reset.h new file mode 100644 index 000000000000..5e3b16b8ef53 --- /dev/null +++ b/include/dt-bindings/reset/actions,s700-reset.h @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +// +// Device Tree binding constants for Actions Semi S700 Reset Management Unit +// +// Copyright (c) 2018 Linaro Ltd. + +#ifndef __DT_BINDINGS_ACTIONS_S700_RESET_H +#define __DT_BINDINGS_ACTIONS_S700_RESET_H + +#define RESET_AUDIO 0 +#define RESET_CSI 1 +#define RESET_DE 2 +#define RESET_DSI 3 +#define RESET_GPIO 4 +#define RESET_I2C0 5 +#define RESET_I2C1 6 +#define RESET_I2C2 7 +#define RESET_I2C3 8 +#define RESET_KEY 9 +#define RESET_LCD0 10 +#define RESET_SI 11 +#define RESET_SPI0 12 +#define RESET_SPI1 13 +#define RESET_SPI2 14 +#define RESET_SPI3 15 +#define RESET_UART0 16 +#define RESET_UART1 17 +#define RESET_UART2 18 +#define RESET_UART3 19 +#define RESET_UART4 20 +#define RESET_UART5 21 +#define RESET_UART6 22 + +#endif /* __DT_BINDINGS_ACTIONS_S700_RESET_H */ From patchwork Fri Jul 27 18:45:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 950305 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="N7CIHwkY"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 41cdHl27vKz9ryt for ; Sat, 28 Jul 2018 04:47:31 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389203AbeG0UKj (ORCPT ); Fri, 27 Jul 2018 16:10:39 -0400 Received: from mail-pg1-f195.google.com ([209.85.215.195]:39104 "EHLO mail-pg1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389078AbeG0UKi (ORCPT ); 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Fri, 27 Jul 2018 11:47:29 -0700 (PDT) Received: from localhost.localdomain ([2405:204:7308:c330:41b:cc59:b463:ec7b]) by smtp.gmail.com with ESMTPSA id t69-v6sm13817959pfj.7.2018.07.27.11.47.17 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 27 Jul 2018 11:47:28 -0700 (PDT) From: Manivannan Sadhasivam To: p.zabel@pengutronix.de, mturquette@baylibre.com, sboyd@kernel.org, afaerber@suse.de, robh+dt@kernel.org Cc: linux-clk@vger.kernel.org, liuwei@actions-semi.com, mp-cs@actions-semi.com, 96boards@ucrobotics.com, devicetree@vger.kernel.org, daniel.thompson@linaro.org, amit.kucheria@linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, hzhang@ucrobotics.com, bdong@ucrobotics.com, manivannanece23@gmail.com, thomas.liau@actions-semi.com, jeff.chen@actions-semi.com, pn@denx.de, edgar.righi@lsitec.org.br, sravanhome@gmail.com, Manivannan Sadhasivam Subject: [PATCH 4/9] dt-bindings: reset: Add binding constants for Actions Semi S900 RMU Date: Sat, 28 Jul 2018 00:15:22 +0530 Message-Id: <20180727184527.13287-5-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180727184527.13287-1-manivannan.sadhasivam@linaro.org> References: <20180727184527.13287-1-manivannan.sadhasivam@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add device tree binding constants for Actions Semi S900 SoC Reset Management Unit (RMU). Signed-off-by: Manivannan Sadhasivam Reviewed-by: Rob Herring --- .../dt-bindings/reset/actions,s900-reset.h | 65 +++++++++++++++++++ 1 file changed, 65 insertions(+) create mode 100644 include/dt-bindings/reset/actions,s900-reset.h diff --git a/include/dt-bindings/reset/actions,s900-reset.h b/include/dt-bindings/reset/actions,s900-reset.h new file mode 100644 index 000000000000..42c19d02e43b --- /dev/null +++ b/include/dt-bindings/reset/actions,s900-reset.h @@ -0,0 +1,65 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +// +// Device Tree binding constants for Actions Semi S900 Reset Management Unit +// +// Copyright (c) 2018 Linaro Ltd. + +#ifndef __DT_BINDINGS_ACTIONS_S900_RESET_H +#define __DT_BINDINGS_ACTIONS_S900_RESET_H + +#define RESET_CHIPID 0 +#define RESET_CPU_SCNT 1 +#define RESET_SRAMI 2 +#define RESET_DDR_CTL_PHY 3 +#define RESET_DMAC 4 +#define RESET_GPIO 5 +#define RESET_BISP_AXI 6 +#define RESET_CSI0 7 +#define RESET_CSI1 8 +#define RESET_DE 9 +#define RESET_DSI 10 +#define RESET_GPU3D_PA 11 +#define RESET_GPU3D_PB 12 +#define RESET_HDE 13 +#define RESET_I2C0 14 +#define RESET_I2C1 15 +#define RESET_I2C2 16 +#define RESET_I2C3 17 +#define RESET_I2C4 18 +#define RESET_I2C5 19 +#define RESET_IMX 20 +#define RESET_NANDC0 21 +#define RESET_NANDC1 22 +#define RESET_SD0 23 +#define RESET_SD1 24 +#define RESET_SD2 25 +#define RESET_SD3 26 +#define RESET_SPI0 27 +#define RESET_SPI1 28 +#define RESET_SPI2 29 +#define RESET_SPI3 30 +#define RESET_UART0 31 +#define RESET_UART1 32 +#define RESET_UART2 33 +#define RESET_UART3 34 +#define RESET_UART4 35 +#define RESET_UART5 36 +#define RESET_UART6 37 +#define RESET_HDMI 38 +#define RESET_LVDS 39 +#define RESET_EDP 40 +#define RESET_USB2HUB 41 +#define RESET_USB2HSIC 42 +#define RESET_USB3 43 +#define RESET_PCM1 44 +#define RESET_AUDIO 45 +#define RESET_PCM0 46 +#define RESET_SE 47 +#define RESET_GIC 48 +#define RESET_DDR_CTL_PHY_AXI 49 +#define RESET_CMU_DDR 50 +#define RESET_DMM 51 +#define RESET_HDCP2TX 52 +#define RESET_ETHERNET 53 + +#endif /* __DT_BINDINGS_ACTIONS_S900_RESET_H */