From patchwork Fri Sep 29 11:53:35 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 819887 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.infradead.org (client-ip=65.50.211.133; helo=bombadil.infradead.org; envelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="A5qb9OTq"; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=verge.net.au header.i=@verge.net.au header.b="nxSRDOYz"; dkim-atps=neutral Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3y3Vjs4zclz9t2x for ; Fri, 29 Sep 2017 22:09:53 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To: References:List-Owner; bh=2YgJ/vwfKA7IJYPOrzRwKgNs//Qeaj6QY0fxqxzxvjc=; b=A5q b9OTqC1sdPVvSqcaB48RhM1QsQErGkTuDbGnpsdeF6em1kEeiCEWklii48N0r3Zwu0zSfZBvvtDjX SGXvcfJX/ohcG7zyEPD+jlCikusFIXg2P3CxTmn19Mx7eND9qPBbRKwNZs7NHTozV+QqvRRPvkw5E CGMjs4KzmiyvAX4S13WBAF5Rq5+ROVjTB4/Y+EBgkf6sryMz/JJi5M+TbiZj91Apg4f/8+JHvT4Ud D1UUAxcA6zGHUbpsyVh6yKORVZHcx8FQUOGOmRBiVOYvVRw58QNtcBWI9NEvHCm1r0DGFJN9eU/us 8IdmlDTVSr22RjkAEM7WW3Gdd8n9UUw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dxu73-0003tN-4O; Fri, 29 Sep 2017 12:09:49 +0000 Received: from kirsty.vergenet.net ([202.4.237.240]) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dxu1y-0006OC-KJ for linux-arm-kernel@lists.infradead.org; Fri, 29 Sep 2017 12:04:38 +0000 Received: from penelope.horms.nl (unknown [217.111.208.18]) by kirsty.vergenet.net (Postfix) with ESMTPA id 620B925BF09; Fri, 29 Sep 2017 21:54:07 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; t=1506686047; bh=E48s+ZyuqM+UDfonSXpk/sk+rMm6wrncx9AQ4LvJjmo=; h=From:To:Cc:Subject:Date:From; b=nxSRDOYzkrk4laVwskebC4AV3gpbWKpk/hmhPuBdrXv7VIs40iNPxNqovk1IiUVTW 31J+0r3zy/WAR/tYxDoHvn92GHa9T/wPDAU/X1Hif3r0YVLCP82/kvuchmMt3q5PjK 7q1svRKm+PS9l5I8iqcVZG0auvtPgwudKCFiCjEo= Received: by penelope.horms.nl (Postfix, from userid 7100) id 38B18E200DA; Fri, 29 Sep 2017 07:53:40 -0400 (EDT) From: Simon Horman To: arm@kernel.org Subject: [GIT PULL] Renesas ARM Based SoC DT Updates for v4.15 Date: Fri, 29 Sep 2017 13:53:35 +0200 Message-Id: X-Mailer: git-send-email 2.1.4 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170929_050435_070656_029ABAFB X-CRM114-Status: GOOD ( 18.88 ) X-Spam-Score: -4.3 (----) X-Spam-Report: SpamAssassin version 3.4.1 on bombadil.infradead.org summary: Content analysis details: (-4.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [202.4.237.240 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain 0.0 HEADER_FROM_DIFFERENT_DOMAINS From and EnvelopeFrom 2nd level mail domains are different -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Arnd Bergmann , Kevin Hilman , Magnus Damm , linux-renesas-soc@vger.kernel.org, Olof Johansson , Simon Horman , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org Hi Olof, Hi Kevin, Hi Arnd, Please consider these Renesas ARM based SoC DT updates for v4.15. The following changes since commit 2bd6bf03f4c1c59381d62c61d03f6cc3fe71f66e: Linux 4.14-rc1 (2017-09-16 15:47:51 -0700) are available in the git repository at: https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-dt-for-v4.15 for you to fetch changes up to 7031a219f649d12acda8a70a4b6b816ee123c8e2: ARM: dts: r8a7743: Add MSIOF[012] support (2017-09-28 08:02:04 +0200) ---------------------------------------------------------------- Renesas ARM Based SoC DT Updates for v4.15 * r7s72100 (RZ/A1) Peach board - Add pin groups for SCIF2 serial debug interface and Ethernet This avoids relying on bootloader settings - Support control of LED1 using gpio-leds * r8a7743 (RZ/G1M) and r8a7745 (RZ/G1E) SoCs - Add MSIOF[012] support and define aliases for spi[0123] * r8a7743 (RZ/G1M) SoC - Add I2C and IIC core nodes * r8a7743 (RZ/G1M) iW-RainboW-G20D-Qseven development platform - Enable SDHI1 SD controller supporting high-speed and SDR50 transfers - Add chosen node to allow correct selection of serial console and the kernel command line - Enable RTC support - Enable USB2.0 host support This includes enabling USB PHY and internal PCI * r8a7743 (RZ/G1M) iW-RainboW-G20M-Qseven and r8a7745 (RZ/G1E) iW-RainboW-G22M-SM SoMs - Enable Add SPI NOR support This devices is used to boot up the system to the SoM DT * r8a7743 (RZ/G1M) iW-RainboW-G20M-Qseven SoM - Enable SDHI0 SD controller supporting high-speed transfers * r8a7745 (RZ/G1E) iW-RainboW-G22D development platform - Add pnctl support for scif4 This avoids reling on boot loader settings - Add EtherAVB support * r8a7745 (RZ/G1E) iW-RainboW-G22M-SM SoM - Add basic SoM support - Enable MMCIF eMMC support - Enable RTC support - Enable SDHI1 SD controller supporting high-speed transfers * r8a779[0-4] R-Car Gen2 SoCs - Add reset control properties Geert Uytterhoeven says: This patch series describes the reset topology on all R-Car Gen2 Socs, like was done before for R-Car Gen3 and RZ/G1. Resets usually match the corresponding module clocks. Exceptions are: - The audio module has resets for the Serial Sound Interfaces only, - The display module has only a single reset for all DU channels, but adding reset properties for the display is postponed upon request from Laurent. - Convert to new CPG/MSSR bindings Geert Uytterhoven says: Currently Renesas R-Car Gen2 SoCs use the common clk-rcar-gen2, clk-mstp, and clk-div6 drivers, which depend on most clocks being described in DT. Especially the module (MSTP) clocks are cumbersome and error prone, due to 3 arrays (clocks, clock-indices, and clock-output-names) to be kept in sync. In addition, the clk-mstp driver cannot be extended easily to also support module resets, which are provided by the same hardware module. Hence when developing support for R-Car Gen3 SoCs, another approach was chosen, which led to the CPG/MSSR driver core, and SoC-specific subdrivers (initially for R-Car Gen3, but later also for RZ/G1). This series converts the various R-Car Gen2 DTSes to migrate to the new CPG/MSSR drivers that were added in v4.13-rc1. * r8a779[0,1,3,4] R-Car Gen2 SoCs - Stop grouping clocks under a "clocks" subnode Geert Uytterhoeven says: The current practice is to not group clocks under a "clocks" subnode, but just put them together with the other on-SoC devices. Hence this patch series implements this for the various R-Car Gen2 DTSes that still need this (r8a7792.dtsi is OK). * r8a7794 (E2) Alt board - Correct inverted sense of SD wip pins ---------------------------------------------------------------- Biju Das (17): ARM: dts: r8a7743: Add SDHI controllers ARM: dts: iwg20m: Enable SDHI0 controller ARM: dts: iwg20d-q7: Add SDHI1 support ARM: dts: r8a7745: Add GPIO support ARM: dts: iwg22m: Add iWave RZG1E SODIMM SOM ARM: dts: iwg22d-sodimm: Add support for iWave G22D-SODIMM board ARM: dts: r8a7745: Add Ethernet AVB support ARM: dts: iwg20d-q7: Add chosen node ARM: dts: iwg20d-q7: Add RTC support ARM: dts: iwg22d-sodimm: Add pinctl support for scif4 ARM: dts: iwg22d-sodimm: Add Ethernet AVB support ARM: dts: r8a7743: Add internal PCI bridge nodes ARM: dts: r8a7743: Add USB PHY DT support ARM: dts: r8a7743: Link PCI USB devices to USB PHY ARM: dts: iwg20d-q7: Enable internal PCI ARM: dts: iwg20d-q7: Enable USB PHY ARM: dts: r8a7743: Add IIC cores to dtsi Fabrizio Castro (13): ARM: dts: r8a7745: Add I2C DT support ARM: dts: r8a7745: Add MMC interface support ARM: dts: iwg22m: Add eMMC support ARM: dts: iwg22m: Add RTC support ARM: dts: r8a7745: Add SDHI controllers ARM: dts: iwg22m: Enable SDHI1 controller ARM: dts: r8a7743: Add QSPI support ARM: dts: iwg20m: Add SPI NOR support ARM: dts: r8a7745: Add QSPI support ARM: dts: iwg22m: Add SPI NOR support ARM: dts: iwg22d: Enable SDHI0 controller ARM: dts: r8a7745: Add MSIOF[012] support ARM: dts: r8a7743: Add MSIOF[012] support Geert Uytterhoeven (14): ARM: dts: r8a7790: Convert to new CPG/MSSR bindings ARM: dts: r8a7792: Convert to new CPG/MSSR bindings ARM: dts: r8a7793: Convert to new CPG/MSSR bindings ARM: dts: r8a7794: Convert to new CPG/MSSR bindings ARM: dts: r8a7790: Stop grouping clocks under a "clocks" subnode ARM: dts: r8a7793: Stop grouping clocks under a "clocks" subnode ARM: dts: r8a7794: Stop grouping clocks under a "clocks" subnode ARM: dts: r8a7791: Convert to new CPG/MSSR bindings ARM: dts: r8a7791: Stop grouping clocks under a "clocks" subnode ARM: dts: r8a7790: Add reset control properties ARM: dts: r8a7791: Add reset control properties ARM: dts: r8a7792: Add reset control properties ARM: dts: r8a7793: Add reset control properties ARM: dts: r8a7794: Add reset control properties Jacopo Mondi (3): ARM: dts: gr-peach: Remove empty line ARM: dts: gr-peach: Add SCIF2 pin group ARM: dts: gr-peach: Add user led device nodes Wolfram Sang (1): ARM: dts: alt: use correct logic for SD WP pins arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/r7s72100-gr-peach.dts | 22 +- arch/arm/boot/dts/r8a7743-iwg20d-q7.dts | 97 ++++ arch/arm/boot/dts/r8a7743-iwg20m.dtsi | 43 ++ arch/arm/boot/dts/r8a7743.dtsi | 257 ++++++++++ arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 94 ++++ arch/arm/boot/dts/r8a7745-iwg22m.dtsi | 111 ++++ arch/arm/boot/dts/r8a7745.dtsi | 337 +++++++++++++ arch/arm/boot/dts/r8a7790-lager.dts | 7 +- arch/arm/boot/dts/r8a7790.dtsi | 748 +++++++++------------------ arch/arm/boot/dts/r8a7791-koelsch.dts | 4 +- arch/arm/boot/dts/r8a7791-porter.dts | 4 +- arch/arm/boot/dts/r8a7791.dtsi | 754 +++++++++------------------- arch/arm/boot/dts/r8a7792-blanche.dts | 3 +- arch/arm/boot/dts/r8a7792-wheat.dts | 3 +- arch/arm/boot/dts/r8a7792.dtsi | 378 ++++---------- arch/arm/boot/dts/r8a7793-gose.dts | 4 +- arch/arm/boot/dts/r8a7793.dtsi | 626 +++++++---------------- arch/arm/boot/dts/r8a7794-alt.dts | 7 +- arch/arm/boot/dts/r8a7794-silk.dts | 3 +- arch/arm/boot/dts/r8a7794.dtsi | 696 +++++++------------------ 21 files changed, 1931 insertions(+), 2268 deletions(-) create mode 100644 arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts create mode 100644 arch/arm/boot/dts/r8a7745-iwg22m.dtsi