From patchwork Fri Sep 29 03:29:37 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 819808 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3y3HGN2Ptjz9sBZ for ; Fri, 29 Sep 2017 13:33:48 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="D5xetYX1"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3y3HGN10fMzDsQM for ; Fri, 29 Sep 2017 13:33:48 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="D5xetYX1"; dkim-atps=neutral X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:400e:c00::242; helo=mail-pf0-x242.google.com; envelope-from=npiggin@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="D5xetYX1"; dkim-atps=neutral Received: from mail-pf0-x242.google.com (mail-pf0-x242.google.com [IPv6:2607:f8b0:400e:c00::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3y3HB273l0zDsPN for ; Fri, 29 Sep 2017 13:30:02 +1000 (AEST) Received: by mail-pf0-x242.google.com with SMTP id e69so115639pfg.4 for ; Thu, 28 Sep 2017 20:30:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=4RovJiRTZVFXnUKuesEe3kkO1YtzY6qT8K+jPrYfG/E=; b=D5xetYX1uVIbfxUN4MQD/L/zQkbzP+06fcA320/kUsLw233LFi1hHIivHuMf5gCWkI 8SQVtwlckS3N/0V1g+TVcrQIwv7ajastLmedawDS+KxyiEOIrMd+kfy0MII6/PFFBhKT Fm0MY/cqszpPOIInqOa4OqAd65bIHUmqLBKRcEtTft1tRG8/m2MBhkbiXGgKZB1Jb7Hk b/fazRamCcE6RvDW3tYGvihcXinpbe2kZMkShUitZgTx6BQojT8FUPhTvaMmPQk6dlHf Q7HcAfU+zQQhtHH2IHiUMREa3jnIJ6Ev05U595RDqubPDQH/JL9Tlq8c7irHk4twdByN SAOQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=4RovJiRTZVFXnUKuesEe3kkO1YtzY6qT8K+jPrYfG/E=; b=sLeruzQqTdMBCniyPoBVPXHtZJsBJtHj4P+FYV0Wo/SmI0/yUR0P4CPkVxZZqDk0PA UVWiXv5CMnwMnHLUAbm7IjDFzGY2BxXEHJPs342X+0mWiOGVdW+De5EaCtv3IYAz070W 3Gym85xak8ZDj18sKxysJnzygM4MKHcPL2pOc6WvfUVcfgctnvuB5DRJcAP+qVrVgtDh 6HMNM+Qaf2F9AzaY2dE6yth4avOtolD9GmzuvrVLU5itfIXSe9CZjpOakkQTXJNyujMl cjlil+kRUPGAUFEMxkQUq6/e8agVTj+o8TDoQOZUCIJy4mWrgckShzCjjFDnZtQ0faNJ 24RQ== X-Gm-Message-State: AHPjjUjGt+OPPj76yWgDVXccKNuwvg/xnX2PJsI6x/1ZiAJjBw3x9Rmk VnzX7YSHSLW/6lJH32LbMhsVrA== X-Google-Smtp-Source: AOwi7QAuXwYm4IxAeyPS/bpnrv4UPxcjlVHIrCJyw66QUWpG7PDmUr6IflhRGCp7k9kxoXUePRbKoA== X-Received: by 10.98.218.18 with SMTP id c18mr6052652pfh.256.1506655800784; Thu, 28 Sep 2017 20:30:00 -0700 (PDT) Received: from roar.au.ibm.com (220-245-40-213.tpgi.com.au. [220.245.40.213]) by smtp.gmail.com with ESMTPSA id 89sm4909873pfn.75.2017.09.28.20.29.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 28 Sep 2017 20:29:59 -0700 (PDT) From: Nicholas Piggin To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH v2 1/6] powerpc/watchdog: do not panic from locked CPU's IPI handler Date: Fri, 29 Sep 2017 13:29:37 +1000 Message-Id: <20170929032942.4321-2-npiggin@gmail.com> X-Mailer: git-send-email 2.13.3 In-Reply-To: <20170929032942.4321-1-npiggin@gmail.com> References: <20170929032942.4321-1-npiggin@gmail.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.24 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nicholas Piggin Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" The SMP watchdog will detect locked CPUs and IPI them to print a backtrace and registers. If panic on hard lockup is enabled, do not panic from this handler, because that can cause recursion into the IPI layer during the panic. The caller already panics in this case. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/watchdog.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/powerpc/kernel/watchdog.c b/arch/powerpc/kernel/watchdog.c index 2f6eadd9408d..532a1adbe89b 100644 --- a/arch/powerpc/kernel/watchdog.c +++ b/arch/powerpc/kernel/watchdog.c @@ -97,8 +97,7 @@ static void wd_lockup_ipi(struct pt_regs *regs) else dump_stack(); - if (hardlockup_panic) - nmi_panic(regs, "Hard LOCKUP"); + /* Do not panic from here because that can recurse into NMI IPI layer */ } static void set_cpumask_stuck(const struct cpumask *cpumask, u64 tb) From patchwork Fri Sep 29 03:29:38 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 819809 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3y3HK41VWYz9sBZ for ; Fri, 29 Sep 2017 13:36:08 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Q8xVj6cb"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3y3HK401W5zDsQc for ; Fri, 29 Sep 2017 13:36:08 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Q8xVj6cb"; dkim-atps=neutral X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:400e:c05::244; helo=mail-pg0-x244.google.com; envelope-from=npiggin@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Q8xVj6cb"; dkim-atps=neutral Received: from mail-pg0-x244.google.com (mail-pg0-x244.google.com [IPv6:2607:f8b0:400e:c05::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3y3HB56K2ZzDsPN for ; Fri, 29 Sep 2017 13:30:05 +1000 (AEST) Received: by mail-pg0-x244.google.com with SMTP id y192so117686pgd.5 for ; Thu, 28 Sep 2017 20:30:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=6h0qbmtWXaqANskDBM6KNJZWMvt7jvB4rYwPjBRBKiw=; b=Q8xVj6cb7Lg+dZebUxzginLmt/wsqACq43vtQKPOzL9jnAa/3g2sV0vM9shPqDFpsy V8cvr8VS+AbpBy1Kz3wG7NCfSaY6afviLzDM1oHlEGb+uq0oCnWYvMnu9K3bHTlJ+ksI CW109zHFqIGvHNnZFnPe+gEk31ZX41p53wh6jHjH+L83JjtyaStpNaTXk+NAUr44nQw+ 0NlPsEfTZICJeLPAkfVya4TDQ7MIYMB5UiSai9nM62JwCRKEGt7X7NK+7Z86GrhYJ9aS T56jPtl6gyjEkQ3NOgocD/qCWU8Rev1jyQz8UQCJ+i4/k5MRCrGerhrKLVD+TB8TlwiN XDJg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=6h0qbmtWXaqANskDBM6KNJZWMvt7jvB4rYwPjBRBKiw=; b=XNYx4ocyadHGjSnOyHAmfKm4rpTCBboBiK6h6iXQNByFLKQ+fZePkTpgdrMn3p6BbE bfq21qDmROUorQneiUKp6nuH9gk7Zyo1B1Ob1P+zIZsdAYiLNoXLgl5CZFGM0bhGKcnA ov+0ywNIWOP4J2c3dG2AOZFcEUo7jdKOEuefmPdtJpNdVDhZlEX9n9RsLU4rOj9UT4n+ KO+hq7Rcis94aFjIsxbq1vHf0HSdU0KNO5GasyqRz0/5tK8wuQwg9zA7RhiYIkgZEZkO J6CqEMHpgqRTmOuMg/AY9Msx+jgiMP+Wt+eQggM6csfNhJtY89t3R+LOqDlTQJIB5CXU mPlg== X-Gm-Message-State: AHPjjUhNqsZbnaD5+vazN0MmPPbVYruraxMK9ZwkTB+e48uNYccGZt0w T9QFYvyOQB1yS/CtplyZeg883A== X-Google-Smtp-Source: AOwi7QBNpbAWQn2tmRymY9OeC8iTgqSSVcriMAFvjG7TFTK6MbUremewWiR0LWEFh08lyDnlyftyyA== X-Received: by 10.98.252.75 with SMTP id e72mr6037883pfh.47.1506655803703; Thu, 28 Sep 2017 20:30:03 -0700 (PDT) Received: from roar.au.ibm.com (220-245-40-213.tpgi.com.au. [220.245.40.213]) by smtp.gmail.com with ESMTPSA id 89sm4909873pfn.75.2017.09.28.20.30.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 28 Sep 2017 20:30:02 -0700 (PDT) From: Nicholas Piggin To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH v2 2/6] powerpc/watchdog: do not backtrace locked CPUs twice if allcpus backtrace is enabled Date: Fri, 29 Sep 2017 13:29:38 +1000 Message-Id: <20170929032942.4321-3-npiggin@gmail.com> X-Mailer: git-send-email 2.13.3 In-Reply-To: <20170929032942.4321-1-npiggin@gmail.com> References: <20170929032942.4321-1-npiggin@gmail.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.24 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nicholas Piggin Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" If sysctl_hardlockup_all_cpu_backtrace is enabled, there is no need to IPI stuck CPUs for backtrace before trigger_allbutself_cpu_backtrace(), which does the same thing again. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/watchdog.c | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/arch/powerpc/kernel/watchdog.c b/arch/powerpc/kernel/watchdog.c index 532a1adbe89b..920e61c79f47 100644 --- a/arch/powerpc/kernel/watchdog.c +++ b/arch/powerpc/kernel/watchdog.c @@ -133,15 +133,18 @@ static void watchdog_smp_panic(int cpu, u64 tb) pr_emerg("Watchdog CPU:%d detected Hard LOCKUP other CPUS:%*pbl\n", cpu, cpumask_pr_args(&wd_smp_cpus_pending)); - /* - * Try to trigger the stuck CPUs. - */ - for_each_cpu(c, &wd_smp_cpus_pending) { - if (c == cpu) - continue; - smp_send_nmi_ipi(c, wd_lockup_ipi, 1000000); + if (!sysctl_hardlockup_all_cpu_backtrace) { + /* + * Try to trigger the stuck CPUs, unless we are going to + * get a backtrace on all of them anyway. + */ + for_each_cpu(c, &wd_smp_cpus_pending) { + if (c == cpu) + continue; + smp_send_nmi_ipi(c, wd_lockup_ipi, 1000000); + } + smp_flush_nmi_ipi(1000000); } - smp_flush_nmi_ipi(1000000); /* Take the stuck CPUs out of the watch group */ set_cpumask_stuck(&wd_smp_cpus_pending, tb); From patchwork Fri Sep 29 03:29:39 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 819810 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3y3HMJ08zlz9sBZ for ; Fri, 29 Sep 2017 13:38:04 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="PpUBooLt"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3y3HMH5bm2zDsQ2 for ; Fri, 29 Sep 2017 13:38:03 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="PpUBooLt"; dkim-atps=neutral X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:400e:c05::243; helo=mail-pg0-x243.google.com; envelope-from=npiggin@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="PpUBooLt"; dkim-atps=neutral Received: from mail-pg0-x243.google.com (mail-pg0-x243.google.com [IPv6:2607:f8b0:400e:c05::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3y3HB934nLzDsPN for ; Fri, 29 Sep 2017 13:30:09 +1000 (AEST) Received: by mail-pg0-x243.google.com with SMTP id u136so164637pgc.0 for ; Thu, 28 Sep 2017 20:30:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=dIuhdcgQkWcIO/kJZuDXIDQcxsryi1QYzM1OPwkIVZ0=; b=PpUBooLta4BI4ATUYP/5lKrU/pfMjEPFY0+7ir7Lo68YuYTFot2qpRvONd4Aura0JR y3CWIwaMg2QsYJQ23mIDNRJ9k2y+8tivR93hsbUTycONhV1QgFP9YFAbjg9LT2c/ozOH V0DrRvAWx7zKxudOd1Tv8Bur9D8wGs4rhwi11/aAdC8Omx/iHw7k3+tjq7y6e+93U+/7 9O0vRXea1AsfiCB0pzbxCiHplbPTXWWxx1CTZR5GBuvlHTthsOxsqfAFXyaJ8/LjFm2u f9kzrjWmaTg1pDOKG77tJdRTCZbv+maJPM5wrPvev4bQ19vD/6rXQXXU6FHmm0vzFhIt 4Yqg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=dIuhdcgQkWcIO/kJZuDXIDQcxsryi1QYzM1OPwkIVZ0=; b=qQYss81JWPNla3P9C3ANz1vIgXvfPzWHtctZNWpCPfWBeK9sXhafgjoYlnSdpeMdk+ VynB6PxOQuMhNAXY2SjSe3bPXRXAulwR8paBmyuzAxDn98VOyEeZLyDOzKo735bZsWnn kZBZaNTZ3J0gLI5L9XHCCJ4fosZsSic8qMzHPfuA+YJzPhYCgk3Cy573fxhf/5TGlJOD PkaSLD0KORPFh4FvrX5189HE0E0Mqlbd4Rb/RVe65+kW/efmlwdmAPn3Wbffr+HQUEbI LGRDxBBGZIgqH0TYiRsrs2/+WVyQlgFS1Vc4LkcP0CnaOXW24QclVvywgtZ5RfzoRpGC OcIw== X-Gm-Message-State: AHPjjUg/WUGPdSRfSRW0obmRk/CEul8qyY3JVEHj7/fxAjYSMt2lCLuY v1J3J3TaxzH0+3zvWC81FdOy/w== X-Google-Smtp-Source: AOwi7QD5Hk7SCWLO+p0Cc82GFf3T0VG5Nf3+g4RThopdBrGkl5np9Sk4ayaa16J/cRAcLQGNjWlKvA== X-Received: by 10.84.129.193 with SMTP id b59mr5678476plb.33.1506655807059; Thu, 28 Sep 2017 20:30:07 -0700 (PDT) Received: from roar.au.ibm.com (220-245-40-213.tpgi.com.au. [220.245.40.213]) by smtp.gmail.com with ESMTPSA id 89sm4909873pfn.75.2017.09.28.20.30.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 28 Sep 2017 20:30:05 -0700 (PDT) From: Nicholas Piggin To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH v2 3/6] powerpc/watchdog: do not trigger SMP crash from touch_nmi_watchdog Date: Fri, 29 Sep 2017 13:29:39 +1000 Message-Id: <20170929032942.4321-4-npiggin@gmail.com> X-Mailer: git-send-email 2.13.3 In-Reply-To: <20170929032942.4321-1-npiggin@gmail.com> References: <20170929032942.4321-1-npiggin@gmail.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.24 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nicholas Piggin Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" In xmon, touch_nmi_watchdog() is not expected to be checking that other CPUs have not touched the watchdog, so the code will just call touch_nmi_watchdog() once before re-enabling hard interrupts. Just update our CPU's state, and ignore apparently stuck SMP threads. Arguably touch_nmi_watchdog should check for SMP lockups, and callers should be fixed, but that's not trivial for the input code of xmon. --- arch/powerpc/kernel/watchdog.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/kernel/watchdog.c b/arch/powerpc/kernel/watchdog.c index 920e61c79f47..1fb9379dc683 100644 --- a/arch/powerpc/kernel/watchdog.c +++ b/arch/powerpc/kernel/watchdog.c @@ -277,9 +277,12 @@ void arch_touch_nmi_watchdog(void) { unsigned long ticks = tb_ticks_per_usec * wd_timer_period_ms * 1000; int cpu = smp_processor_id(); + u64 tb = get_tb(); - if (get_tb() - per_cpu(wd_timer_tb, cpu) >= ticks) - watchdog_timer_interrupt(cpu); + if (tb - per_cpu(wd_timer_tb, cpu) >= ticks) { + per_cpu(wd_timer_tb, cpu) = tb; + wd_smp_clear_cpu_pending(cpu, tb); + } } EXPORT_SYMBOL(arch_touch_nmi_watchdog); From patchwork Fri Sep 29 03:29:40 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 819811 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3y3HPh4PNDz9t3B for ; Fri, 29 Sep 2017 13:40:08 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Jx+jY5Sg"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3y3HPh3Fz4zDsQ6 for ; Fri, 29 Sep 2017 13:40:08 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Jx+jY5Sg"; dkim-atps=neutral X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:400e:c05::244; helo=mail-pg0-x244.google.com; envelope-from=npiggin@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Jx+jY5Sg"; dkim-atps=neutral Received: from mail-pg0-x244.google.com (mail-pg0-x244.google.com [IPv6:2607:f8b0:400e:c05::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3y3HBD3KyvzDsQL for ; Fri, 29 Sep 2017 13:30:12 +1000 (AEST) Received: by mail-pg0-x244.google.com with SMTP id d8so152742pgt.3 for ; Thu, 28 Sep 2017 20:30:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=3qkX38bBdDtI1NNNQZ9YOle5nNrzchrgQ2Jn52j/VgI=; b=Jx+jY5SgD6I74wRJHdD3CBhuTpb4UyNDw0uXQFXMajU0sky8xwedLfkEuJeWGZNgIV pYkR3skhMM8PnohaXzuVbnAs+8QGD8CabMd9V9GUlPh+ihXG4cqhLSQ5k7w/N+iP8d3z 0Bd1EwTCZj+8UWaR7I9ldAUhbzCY1uyebLZXXAwS5RTbyBK4HecTo0FvEtgb+5DcwE+E UhDpW/UHnR5TfALmpayxnwvumC39p9EN5IwS5B/ru1qj99yrLN9MSX4yRTr1qsyNRLEU Y5dIvu++f2qNCKkM0nQe6mfGxrrNvRITlL6e7FMGSQT9pPJzOgZpW/zxE2rotfAddmel aYPw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=3qkX38bBdDtI1NNNQZ9YOle5nNrzchrgQ2Jn52j/VgI=; b=cvzxKjartjLaRo+U9hsfKSiKFdTj/77tmWhIyMkyScYQ1qsAZEPbV+wZYV1ibqYdrN duKrK6zc+J8tiylXr07UsP3PLooE3v4guOr0Q8WnsQPmDo8BBnXla+aeEHvsXvLzDvaI alx+2kNeW2ECt9NuZK4FYLhpz3eVmW1TwtvKSZ9dBArxxg2H4GrOi1oRP0uDUlXr7H72 p5TCl+QLuL/OuwNEskzUPdJTbGUov0IxFuFYZstC9jQUrd44Y3sKS3TLivysGUq1OIdf AkuJGMb/fzH4qQSpgSjcY6pPHUB6VnRlIO8R/fPo8Uwc17TyP5WYuotQTygUZOwQKEyB Z7Dw== X-Gm-Message-State: AHPjjUh+KXWGewygbFiy4/cJ9eNsaBy9fLp/AGPG+a8r93bWzEgQ7Q33 VvOZMxA09Y5NCu/AqD1iVeZSQA== X-Google-Smtp-Source: AOwi7QCDn9+E/H+FL02Wte0bTC/0NbVNDSGavywSj4NnGOur48u2CP2TeZ1sdxykdtb4PlEdZ7YEZg== X-Received: by 10.101.93.136 with SMTP id f8mr6030923pgt.60.1506655810232; Thu, 28 Sep 2017 20:30:10 -0700 (PDT) Received: from roar.au.ibm.com (220-245-40-213.tpgi.com.au. [220.245.40.213]) by smtp.gmail.com with ESMTPSA id 89sm4909873pfn.75.2017.09.28.20.30.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 28 Sep 2017 20:30:09 -0700 (PDT) From: Nicholas Piggin To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH v2 4/6] powerpc/xmon: avoid tripping SMP hardlockup watchdog Date: Fri, 29 Sep 2017 13:29:40 +1000 Message-Id: <20170929032942.4321-5-npiggin@gmail.com> X-Mailer: git-send-email 2.13.3 In-Reply-To: <20170929032942.4321-1-npiggin@gmail.com> References: <20170929032942.4321-1-npiggin@gmail.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.24 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nicholas Piggin Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" The SMP hardlockup watchdog cross-checks other CPUs for lockups, which causes xmon headaches because it's assuming interrupts hard disabled means no watchdog troubles. Try to improve that by calling touch_nmi_watchdog() in obvious places where secondaries are spinning. Also annotate these spin loops with spin_begin/end calls. Signed-off-by: Nicholas Piggin --- arch/powerpc/xmon/xmon.c | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c index 33351c6704b1..d9a12102b111 100644 --- a/arch/powerpc/xmon/xmon.c +++ b/arch/powerpc/xmon/xmon.c @@ -530,14 +530,19 @@ static int xmon_core(struct pt_regs *regs, int fromipi) waiting: secondary = 1; + spin_begin(); while (secondary && !xmon_gate) { if (in_xmon == 0) { - if (fromipi) + if (fromipi) { + spin_end(); goto leave; + } secondary = test_and_set_bit(0, &in_xmon); } - barrier(); + spin_cpu_relax(); + touch_nmi_watchdog(); } + spin_end(); if (!secondary && !xmon_gate) { /* we are the first cpu to come in */ @@ -568,21 +573,25 @@ static int xmon_core(struct pt_regs *regs, int fromipi) mb(); xmon_gate = 1; barrier(); + touch_nmi_watchdog(); } cmdloop: while (in_xmon) { if (secondary) { + spin_begin(); if (cpu == xmon_owner) { if (!test_and_set_bit(0, &xmon_taken)) { secondary = 0; + spin_end(); continue; } /* missed it */ while (cpu == xmon_owner) - barrier(); + spin_cpu_relax(); } - barrier(); + spin_cpu_relax(); + touch_nmi_watchdog(); } else { cmd = cmds(regs); if (cmd != 0) { From patchwork Fri Sep 29 03:29:41 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 819812 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3y3HRq5mN0z9t3B for ; Fri, 29 Sep 2017 13:41:59 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="n9MgM/3v"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3y3HRq4ZNMzDsQ5 for ; Fri, 29 Sep 2017 13:41:59 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="n9MgM/3v"; dkim-atps=neutral X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:400e:c05::244; helo=mail-pg0-x244.google.com; envelope-from=npiggin@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="n9MgM/3v"; dkim-atps=neutral Received: from mail-pg0-x244.google.com (mail-pg0-x244.google.com [IPv6:2607:f8b0:400e:c05::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3y3HBH2DlfzDsQf for ; Fri, 29 Sep 2017 13:30:15 +1000 (AEST) Received: by mail-pg0-x244.google.com with SMTP id y192so118018pgd.5 for ; Thu, 28 Sep 2017 20:30:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=05o4G2t8aiAISvPVxsbBFZWeGxJ+e2iJVxDqJnRSJuc=; b=n9MgM/3vQyLvc8/3ThI8Fx9Yxek1i9oyIRjPCwKE3e/8M8m0WLgP7MPCihjSBzHJa3 ZLJZS5ugRKC3BJM2iz4G9OAT+7UqAw5x8QrADP2R4en+fmW37fFGDH27sdtdUcDhcgP+ cu8bbvacP3GdvOkc6dQLbPOwxycBCLbTwVUCd9YTISxjbDn6FWo7uV36aY6QvU1RRJuT NrZeR7NbP5KJ072sAn0KGdezQ2s880jfNKyJtLfjNitckIZcsbWohckHEarj+qb9/jf2 zTbpRYgxr36VV4YPRXEOKHIXIEGEq4DC310b0w0ntgUqSekubUV2yhk+QqYq9/P70a6Q Lotw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=05o4G2t8aiAISvPVxsbBFZWeGxJ+e2iJVxDqJnRSJuc=; b=PphmEYDwkN3T5NxzemCb6q8XMxWBDH+w3FT69XIaEUjJYs3nABsSTIuJtYJpSEHGC+ ALTz8/JJiD78wtJbEDRZveatvJG3EWTRe0LM57/Rj+jBw+dOy1XFZVAWZ7aU+PbcmdVw uW7gRaYgTZ4hxO3dyZWY8Hf9pmzvtqmPUCv5nf/qOZMJeTRF3KqtxsNu6P/Udkdhq/5Y 4oWsXrmVRio1jSlN0fQktK1EIIhmlmZaBGXfCHcXdrmCCaOqn7Q7v31R3uN8o1w7VvMx OzuXrZJTKQL5VLoTlVEhXS9G2Lnx8Dle3zgM//M/4nNOk+6sHNH/MbbOb31+XkY8OwEH Rj2g== X-Gm-Message-State: AHPjjUhDCYFL6dlzSl56qhEO7DLYc+8D/4ql8Csns42RTwEnq+45+48M LdmmFxWHXFCYywj0MyCTKvY3rw== X-Google-Smtp-Source: AOwi7QBGZ1A/Gen40EMX7gTmWoSgYeUcxPwaCG/x9l9oZ++9d+ymZwAsmKg1rsLEDardfDeCNQPHRg== X-Received: by 10.99.110.199 with SMTP id j190mr6012990pgc.330.1506655813166; Thu, 28 Sep 2017 20:30:13 -0700 (PDT) Received: from roar.au.ibm.com (220-245-40-213.tpgi.com.au. [220.245.40.213]) by smtp.gmail.com with ESMTPSA id 89sm4909873pfn.75.2017.09.28.20.30.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 28 Sep 2017 20:30:12 -0700 (PDT) From: Nicholas Piggin To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH v2 5/6] powerpc/64s: Implement system reset idle wakeup reason Date: Fri, 29 Sep 2017 13:29:41 +1000 Message-Id: <20170929032942.4321-6-npiggin@gmail.com> X-Mailer: git-send-email 2.13.3 In-Reply-To: <20170929032942.4321-1-npiggin@gmail.com> References: <20170929032942.4321-1-npiggin@gmail.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.24 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nicholas Piggin Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" It is possible to wake from idle due to a system reset exception, in which case the CPU takes a system reset interrupt to wake from idle, with system reset as the wakeup reason. The regular (not idle wakeup) system reset interrupt handler must be invoked in this case, otherwise the system reset interrupt is lost. Handle the system reset interrupt immediately after CPU state has been restored. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/irq.c | 41 ++++++++++++++++++++++++++++++++++++++--- 1 file changed, 38 insertions(+), 3 deletions(-) diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c index 4e65bf82f5e0..4813b83b22aa 100644 --- a/arch/powerpc/kernel/irq.c +++ b/arch/powerpc/kernel/irq.c @@ -394,11 +394,19 @@ bool prep_irq_for_idle_irqsoff(void) /* * Take the SRR1 wakeup reason, index into this table to find the * appropriate irq_happened bit. + * + * Sytem reset exceptions taken in idle state also come through here, + * but they are NMI interrupts so do not need to wait for IRQs to be + * restored, and should be taken as early as practical. These are marked + * with 0xff in the table. The Power ISA specifies 0100b as the system + * reset interrupt reason. */ +#define IRQ_SYSTEM_RESET 0xff + static const u8 srr1_to_lazyirq[0x10] = { 0, 0, 0, PACA_IRQ_DBELL, - 0, + IRQ_SYSTEM_RESET, PACA_IRQ_DBELL, PACA_IRQ_DEC, 0, @@ -407,15 +415,42 @@ static const u8 srr1_to_lazyirq[0x10] = { PACA_IRQ_HMI, 0, 0, 0, 0, 0 }; +static noinline void replay_system_reset(void) +{ + struct pt_regs regs; + + ppc_save_regs(®s); + regs.trap = 0x100; + get_paca()->in_nmi = 1; + system_reset_exception(®s); + get_paca()->in_nmi = 0; +} + void irq_set_pending_from_srr1(unsigned long srr1) { unsigned int idx = (srr1 & SRR1_WAKEMASK_P8) >> 18; + u8 reason = srr1_to_lazyirq[idx]; + + /* + * Take the system reset now, which is immediately after registers + * are restored from idle. It's an NMI, so interrupts need not be + * re-enabled before it is taken. + */ + if (unlikely(reason == IRQ_SYSTEM_RESET)) { + replay_system_reset(); + return; + } /* * The 0 index (SRR1[42:45]=b0000) must always evaluate to 0, - * so this can be called unconditionally with srr1 wake reason. + * so this can be called unconditionally with the SRR1 wake + * reason as returned by the idle code, which uses 0 to mean no + * interrupt. + * + * If a future CPU was to designate this as an interrupt reason, + * then a new index for no interrupt must be assigned. */ - local_paca->irq_happened |= srr1_to_lazyirq[idx]; + local_paca->irq_happened |= reason; } #endif /* CONFIG_PPC_BOOK3S */ From patchwork Fri Sep 29 03:29:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 819813 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3y3HVQ2lWyz9t3R for ; Fri, 29 Sep 2017 13:44:14 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="MIGAVkJ+"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3y3HVQ1VTHzDsPN for ; Fri, 29 Sep 2017 13:44:14 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="MIGAVkJ+"; dkim-atps=neutral X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:400e:c00::243; helo=mail-pf0-x243.google.com; envelope-from=npiggin@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="MIGAVkJ+"; dkim-atps=neutral Received: from mail-pf0-x243.google.com (mail-pf0-x243.google.com [IPv6:2607:f8b0:400e:c00::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3y3HBL4Gz0zDsQS for ; Fri, 29 Sep 2017 13:30:18 +1000 (AEST) Received: by mail-pf0-x243.google.com with SMTP id e69so116208pfg.4 for ; Thu, 28 Sep 2017 20:30:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=TLJ4KGbpjc/4J7pebHcdpeBGJfRep93podxZ80PQNsM=; b=MIGAVkJ+n9TxBRLZqb73E9KVhphiX5X7a6WSqWVxKLy6aKovKR1SQfbmMprGQ6qUmY aGlHQEnNVNUc66zdxFjmRgZsq8injlmmSvli3YgeFLNwOVItTtCBvNlXxdk/QztrIH0+ 5eT5R07E2QmgXbhV4o4wq6fMa7eyExnH2b0ngjPKEPkng7SftDh4FmQeePqRIfgBXN/0 7RCXTVV9R/1OUecQrFLKrN3gE55oVpF2UOPf4q58HN696KofllOT5yyIye8Nd+PJz/n1 ILcCH0P9PG7xZEJPKYtnUE9e7XATj+dT4TKydX8thc9byN/2AN3i4kFGAPqI89wjiL0O CzDQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=TLJ4KGbpjc/4J7pebHcdpeBGJfRep93podxZ80PQNsM=; b=OtYuEnz01c2m+XwjwOkFNC/0z1xtWjo53mLkPglwFbXh5q1UtPpxfHOVQGtLbJb9ng oawmv4cRDrwX1ed185WOJs7d/WgaznePyOoy6ROusdLjt/EnkOzybJh2qz1N0nmXFOz7 Hgs7/nzGjLXI57EyppZNDlhwYudCuYdHug05/Q2R7f1Q2XYFsYsl4i78qQWpYm5p8wK4 wB29xpwujkvtrw5mIsKiczhCCOufBXRlFKJU1dX1VXyTIFRoC4GheIp6boO0M83C5UEb 4U765dZB6lvQdNTOK3ORXaTK5PXq8TEgm2ZFmnBNtXD4v1mwhlP7na/5q1lBDJoWO8y5 8tDg== X-Gm-Message-State: AHPjjUhWzuxBSFaHcM6PjakTj6txWcW8VkXBsDUDtuMfHHXMg0SAIf6E 1dr/IVQ9R1aPZVu+vBHZ4g4FXg== X-Google-Smtp-Source: AOwi7QBinKfPyWvIxO/d67u8ePxPj3H6PrYdoX3xlb0hFwbzSs8aEQOQ3vIR5dDHcbRoMEnEhuKsqw== X-Received: by 10.98.70.90 with SMTP id t87mr5958174pfa.114.1506655816142; Thu, 28 Sep 2017 20:30:16 -0700 (PDT) Received: from roar.au.ibm.com (220-245-40-213.tpgi.com.au. [220.245.40.213]) by smtp.gmail.com with ESMTPSA id 89sm4909873pfn.75.2017.09.28.20.30.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 28 Sep 2017 20:30:15 -0700 (PDT) From: Nicholas Piggin To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH v2 6/6] powerpc/powernv: implement NMI IPI with OPAL_SIGNAL_SYSTEM_RESET Date: Fri, 29 Sep 2017 13:29:42 +1000 Message-Id: <20170929032942.4321-7-npiggin@gmail.com> X-Mailer: git-send-email 2.13.3 In-Reply-To: <20170929032942.4321-1-npiggin@gmail.com> References: <20170929032942.4321-1-npiggin@gmail.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.24 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nicholas Piggin Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" This allows MSR[EE]=0 lockups to be detected on an OPAL (bare metal) system similarly to the hcall NMI IPI on pseries guests, when the platform/firmware supports it. This is an example of CPU10 spinning with interrupts hard disabled: Watchdog CPU:32 detected Hard LOCKUP other CPUS:10 Watchdog CPU:10 Hard LOCKUP CPU: 10 PID: 4410 Comm: bash Not tainted 4.13.0-rc7-00074-ge89ce1f89f62-dirty #34 task: c0000003a82b4400 task.stack: c0000003af55c000 NIP: c0000000000a7b38 LR: c000000000659044 CTR: c0000000000a7b00 REGS: c00000000fd23d80 TRAP: 0100 Not tainted (4.13.0-rc7-00074-ge89ce1f89f62-dirty) MSR: 90000000000c1033 CR: 28422222 XER: 20000000 CFAR: c0000000000a7b38 SOFTE: 0 GPR00: c000000000659044 c0000003af55fbb0 c000000001072a00 0000000000000078 GPR04: c0000003c81b5c80 c0000003c81cc7e8 9000000000009033 0000000000000000 GPR08: 0000000000000000 c0000000000a7b00 0000000000000001 9000000000001003 GPR12: c0000000000a7b00 c00000000fd83200 0000000010180df8 0000000010189e60 GPR16: 0000000010189ed8 0000000010151270 000000001018bd88 000000001018de78 GPR20: 00000000370a0668 0000000000000001 00000000101645e0 0000000010163c10 GPR24: 00007fffd14d6294 00007fffd14d6290 c000000000fba6f0 0000000000000004 GPR28: c000000000f351d8 0000000000000078 c000000000f4095c 0000000000000000 NIP [c0000000000a7b38] sysrq_handle_xmon+0x38/0x40 LR [c000000000659044] __handle_sysrq+0xe4/0x270 Call Trace: [c0000003af55fbd0] [c000000000659044] __handle_sysrq+0xe4/0x270 [c0000003af55fc70] [c000000000659810] write_sysrq_trigger+0x70/0xa0 [c0000003af55fca0] [c0000000003da650] proc_reg_write+0xb0/0x110 [c0000003af55fcf0] [c0000000003423bc] __vfs_write+0x6c/0x1b0 [c0000003af55fd90] [c000000000344398] vfs_write+0xd8/0x240 [c0000003af55fde0] [c00000000034632c] SyS_write+0x6c/0x110 [c0000003af55fe30] [c00000000000b220] system_call+0x58/0x6c Signed-off-by: Nicholas Piggin --- arch/powerpc/include/asm/opal-api.h | 1 + arch/powerpc/include/asm/opal.h | 2 + arch/powerpc/platforms/powernv/opal-wrappers.S | 1 + arch/powerpc/platforms/powernv/setup.c | 1 + arch/powerpc/platforms/powernv/smp.c | 52 ++++++++++++++++++++++++++ 5 files changed, 57 insertions(+) diff --git a/arch/powerpc/include/asm/opal-api.h b/arch/powerpc/include/asm/opal-api.h index 450a60b81d2a..9d191ebea706 100644 --- a/arch/powerpc/include/asm/opal-api.h +++ b/arch/powerpc/include/asm/opal-api.h @@ -188,6 +188,7 @@ #define OPAL_XIVE_DUMP 142 #define OPAL_XIVE_RESERVED3 143 #define OPAL_XIVE_RESERVED4 144 +#define OPAL_SIGNAL_SYSTEM_RESET 145 #define OPAL_NPU_INIT_CONTEXT 146 #define OPAL_NPU_DESTROY_CONTEXT 147 #define OPAL_NPU_MAP_LPAR 148 diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h index 726c23304a57..7d7613c49f2b 100644 --- a/arch/powerpc/include/asm/opal.h +++ b/arch/powerpc/include/asm/opal.h @@ -281,6 +281,8 @@ int opal_get_power_shift_ratio(u32 handle, int token, u32 *psr); int opal_set_power_shift_ratio(u32 handle, int token, u32 psr); int opal_sensor_group_clear(u32 group_hndl, int token); +int64_t opal_signal_system_reset(int32_t cpu); + /* Internal functions */ extern int early_init_dt_scan_opal(unsigned long node, const char *uname, int depth, void *data); diff --git a/arch/powerpc/platforms/powernv/opal-wrappers.S b/arch/powerpc/platforms/powernv/opal-wrappers.S index 8c1ede2d3f7e..37cd170201a2 100644 --- a/arch/powerpc/platforms/powernv/opal-wrappers.S +++ b/arch/powerpc/platforms/powernv/opal-wrappers.S @@ -307,6 +307,7 @@ OPAL_CALL(opal_xive_get_vp_info, OPAL_XIVE_GET_VP_INFO); OPAL_CALL(opal_xive_set_vp_info, OPAL_XIVE_SET_VP_INFO); OPAL_CALL(opal_xive_sync, OPAL_XIVE_SYNC); OPAL_CALL(opal_xive_dump, OPAL_XIVE_DUMP); +OPAL_CALL(opal_signal_system_reset, OPAL_SIGNAL_SYSTEM_RESET); OPAL_CALL(opal_npu_init_context, OPAL_NPU_INIT_CONTEXT); OPAL_CALL(opal_npu_destroy_context, OPAL_NPU_DESTROY_CONTEXT); OPAL_CALL(opal_npu_map_lpar, OPAL_NPU_MAP_LPAR); diff --git a/arch/powerpc/platforms/powernv/setup.c b/arch/powerpc/platforms/powernv/setup.c index 897aa1400eb8..cf52d53da460 100644 --- a/arch/powerpc/platforms/powernv/setup.c +++ b/arch/powerpc/platforms/powernv/setup.c @@ -282,6 +282,7 @@ static void __init pnv_setup_machdep_opal(void) ppc_md.restart = pnv_restart; pm_power_off = pnv_power_off; ppc_md.halt = pnv_halt; + /* ppc_md.system_reset_exception gets filled in by pnv_smp_init() */ ppc_md.machine_check_exception = opal_machine_check; ppc_md.mce_check_early_recovery = opal_mce_check_early_recovery; ppc_md.hmi_exception_early = opal_hmi_exception_early; diff --git a/arch/powerpc/platforms/powernv/smp.c b/arch/powerpc/platforms/powernv/smp.c index c17f81e433f7..c52b351716b2 100644 --- a/arch/powerpc/platforms/powernv/smp.c +++ b/arch/powerpc/platforms/powernv/smp.c @@ -290,6 +290,54 @@ static void __init pnv_smp_probe(void) } } +static int pnv_system_reset_exception(struct pt_regs *regs) +{ + if (smp_handle_nmi_ipi(regs)) + return 1; + return 0; +} + +static int pnv_cause_nmi_ipi(int cpu) +{ + int64_t rc; + + if (cpu >= 0) { + rc = opal_signal_system_reset(get_hard_smp_processor_id(cpu)); + if (rc != OPAL_SUCCESS) + return 0; + return 1; + + } else if (cpu == NMI_IPI_ALL_OTHERS) { + bool success = true; + int c; + + + /* + * We do not use broadcasts (yet), because it's not clear + * exactly what semantics Linux wants or the firmware should + * provide. + */ + for_each_online_cpu(c) { + if (c == smp_processor_id()) + continue; + + rc = opal_signal_system_reset( + get_hard_smp_processor_id(c)); + if (rc != OPAL_SUCCESS) + success = false; + } + if (success) + return 1; + + /* + * Caller will fall back to doorbells, which may pick + * up the remainders. + */ + } + + return 0; +} + static struct smp_ops_t pnv_smp_ops = { .message_pass = NULL, /* Use smp_muxed_ipi_message_pass */ .cause_ipi = NULL, /* Filled at runtime by pnv_smp_probe() */ @@ -308,6 +356,10 @@ static struct smp_ops_t pnv_smp_ops = { /* This is called very early during platform setup_arch */ void __init pnv_smp_init(void) { + if (opal_check_token(OPAL_SIGNAL_SYSTEM_RESET)) { + ppc_md.system_reset_exception = pnv_system_reset_exception; + pnv_smp_ops.cause_nmi_ipi = pnv_cause_nmi_ipi; + } smp_ops = &pnv_smp_ops; #ifdef CONFIG_HOTPLUG_CPU