From patchwork Fri Jul 13 11:02:58 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Corentin LABBE X-Patchwork-Id: 943418 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-ide-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=baylibre-com.20150623.gappssmtp.com header.i=@baylibre-com.20150623.gappssmtp.com header.b="HZRXHqQW"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 41Rqfd1Xdyz9s0n for ; Fri, 13 Jul 2018 21:03:21 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729617AbeGMLR1 (ORCPT ); Fri, 13 Jul 2018 07:17:27 -0400 Received: from mail-wr1-f66.google.com ([209.85.221.66]:43926 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727283AbeGMLR1 (ORCPT ); Fri, 13 Jul 2018 07:17:27 -0400 Received: by mail-wr1-f66.google.com with SMTP id b15-v6so24743650wrv.10 for ; Fri, 13 Jul 2018 04:03:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=06XgonBAUAzG/IWfHRvq4KPgrVcZhKwaTfH5JfBakzQ=; b=HZRXHqQWYMttiqcxJUM20p7C/ykU/cF1gDNpVKC6m8PUS2qcrfKI/UesStY+fLxkTX taSeqGEYyrRGur9j2n+uQaroTXnqkYaodRDdsiMUAl80qUNQqOK2vHmjV9g0rkJmk2Sf OFgiGgUkQkAA0VYfcf75u5WaSbu7Afzu+WY/PccC/FjBK7XHHx8i15hrdfiTzs2EowgV l+mDHIUg3xccnhDXntrXFy3t9utB9Jx7zu4gPvTwkIAcj9hMqlJlJiuN9LtJjflvKx3c czXEMeC98NpsUCDBOCOPEt9Fcv3W0LxpCgArTmq3M5AJLlya6QTo2qJEIrzI0q0VpOU0 tGSA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=06XgonBAUAzG/IWfHRvq4KPgrVcZhKwaTfH5JfBakzQ=; b=KNJ9CDGUKpo28c8U+VcfIiOa2Ew2hPeofHaHPlLm2uTARHKcHDjqn5VDU0ZknP39Ry Vc0b35s35+wraPpRebk4s/AffLKIHfxNgynFefRGUONj+DRjpaS9sgZXXq3eLLhA3qzr kOFr5wgbgquKJ/CAINeKh4Y0kKgXvlp0PP2HNuw1A8wmbhHlIJeB3xleChhVPHqUdkV2 k7jP84gWR7bFusMOE23kr+n6SO6rOpg2hHWKp3lO5paWMcKgrmRWIFtkqnqplRqAVoEN sq351VsqdyaCWFcARu1jf2zoyMMmmc6msK7le6cMg6zP3ZJ512C72BdG6F46AhObLbAs 7niA== X-Gm-Message-State: AOUpUlGPipUpXPt82e23jJ68LzjBdRFgRoagaWsG6zKjFrk4vj70qbUN jPPjMIhv2kToBzRrx1XuZIPoTg== X-Google-Smtp-Source: AAOMgpcGqQmNop83jtxfMZy3n6SOunUFLPBkCXTRkXcsml7F6MftHE4WN7gbulFF74DxM/l7ayGN5Q== X-Received: by 2002:adf:c581:: with SMTP id m1-v6mr1035974wrg.253.1531479794918; Fri, 13 Jul 2018 04:03:14 -0700 (PDT) Received: from localhost.localdomain ([51.15.160.169]) by smtp.googlemail.com with ESMTPSA id y14-v6sm4598045wrq.45.2018.07.13.04.03.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 13 Jul 2018 04:03:14 -0700 (PDT) From: Corentin Labbe To: hdegoede@redhat.com, linux@armlinux.org.uk, mark.rutland@arm.com, maxime.ripard@free-electrons.com, robh+dt@kernel.org, tj@kernel.org, wens@csie.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, thierry.reding@gmail.com, icenowy@aosc.io, Corentin Labbe Subject: [PATCH v3 1/9] ata: ahci_platform: add support for AHCI controller regulator Date: Fri, 13 Jul 2018 11:02:58 +0000 Message-Id: <1531479786-4911-2-git-send-email-clabbe@baylibre.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1531479786-4911-1-git-send-email-clabbe@baylibre.com> References: <1531479786-4911-1-git-send-email-clabbe@baylibre.com> Sender: linux-ide-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-ide@vger.kernel.org The SoC R40 AHCI controller need a regulator to work. So this patch add a way to add an optional regulator on AHCI controller. Signed-off-by: Corentin Labbe --- drivers/ata/ahci.h | 1 + drivers/ata/libahci_platform.c | 27 +++++++++++++++++++++++++-- 2 files changed, 26 insertions(+), 2 deletions(-) diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h index 1609ebab4e23..633d3ec5c1df 100644 --- a/drivers/ata/ahci.h +++ b/drivers/ata/ahci.h @@ -351,6 +351,7 @@ struct ahci_host_priv { bool got_runtime_pm; /* Did we do pm_runtime_get? */ struct clk *clks[AHCI_MAX_CLKS]; /* Optional */ struct regulator **target_pwrs; /* Optional */ + struct regulator *ahci_regulator;/* Optional */ /* * If platform uses PHYs. There is a 1:1 relation between the port number and * the PHY position in this array. diff --git a/drivers/ata/libahci_platform.c b/drivers/ata/libahci_platform.c index fe8939e161ea..d997a30ce793 100644 --- a/drivers/ata/libahci_platform.c +++ b/drivers/ata/libahci_platform.c @@ -138,7 +138,7 @@ EXPORT_SYMBOL_GPL(ahci_platform_disable_clks); * ahci_platform_enable_regulators - Enable regulators * @hpriv: host private area to store config values * - * This function enables all the regulators found in + * This function enables all the regulators found in controller and * hpriv->target_pwrs, if any. If a regulator fails to be enabled, it * disables all the regulators already enabled in reverse order and * returns an error. @@ -150,6 +150,12 @@ int ahci_platform_enable_regulators(struct ahci_host_priv *hpriv) { int rc, i; + if (hpriv->ahci_regulator) { + rc = regulator_enable(hpriv->ahci_regulator); + if (rc) + return rc; + } + for (i = 0; i < hpriv->nports; i++) { if (!hpriv->target_pwrs[i]) continue; @@ -166,6 +172,8 @@ int ahci_platform_enable_regulators(struct ahci_host_priv *hpriv) if (hpriv->target_pwrs[i]) regulator_disable(hpriv->target_pwrs[i]); + if (hpriv->ahci_regulator) + regulator_disable(hpriv->ahci_regulator); return rc; } EXPORT_SYMBOL_GPL(ahci_platform_enable_regulators); @@ -174,7 +182,8 @@ EXPORT_SYMBOL_GPL(ahci_platform_enable_regulators); * ahci_platform_disable_regulators - Disable regulators * @hpriv: host private area to store config values * - * This function disables all regulators found in hpriv->target_pwrs. + * This function disables all regulators found in hpriv->target_pwrs and + * AHCI controller. */ void ahci_platform_disable_regulators(struct ahci_host_priv *hpriv) { @@ -185,6 +194,9 @@ void ahci_platform_disable_regulators(struct ahci_host_priv *hpriv) continue; regulator_disable(hpriv->target_pwrs[i]); } + + if (hpriv->ahci_regulator) + regulator_disable(hpriv->ahci_regulator); } EXPORT_SYMBOL_GPL(ahci_platform_disable_regulators); /** @@ -336,6 +348,7 @@ static int ahci_platform_get_regulator(struct ahci_host_priv *hpriv, u32 port, * * 1) mmio registers (IORESOURCE_MEM 0, mandatory) * 2) regulator for controlling the targets power (optional) + * regulator for controlling the AHCI controller (optional) * 3) 0 - AHCI_MAX_CLKS clocks, as specified in the devs devicetree node, * or for non devicetree enabled platforms a single clock * 4) phys (optional) @@ -391,6 +404,16 @@ struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev) hpriv->clks[i] = clk; } + hpriv->ahci_regulator = devm_regulator_get_optional(dev, "ahci"); + + if (IS_ERR(hpriv->ahci_regulator)) { + rc = PTR_ERR(hpriv->ahci_regulator); + if (rc == -EPROBE_DEFER) + goto err_out; + rc = 0; + hpriv->ahci_regulator = NULL; + } + hpriv->nports = child_nodes = of_get_child_count(dev->of_node); /* From patchwork Fri Jul 13 11:02:59 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Corentin LABBE X-Patchwork-Id: 943430 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-ide-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=baylibre-com.20150623.gappssmtp.com header.i=@baylibre-com.20150623.gappssmtp.com header.b="ObC8GisN"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 41RqgX63f3z9s0n for ; Fri, 13 Jul 2018 21:04:08 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729681AbeGMLR1 (ORCPT ); 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Fri, 13 Jul 2018 04:03:15 -0700 (PDT) From: Corentin Labbe To: hdegoede@redhat.com, linux@armlinux.org.uk, mark.rutland@arm.com, maxime.ripard@free-electrons.com, robh+dt@kernel.org, tj@kernel.org, wens@csie.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, thierry.reding@gmail.com, icenowy@aosc.io, Corentin Labbe Subject: [PATCH v3 2/9] dt-bindings: ata: ahci-platform: document ahci-supply Date: Fri, 13 Jul 2018 11:02:59 +0000 Message-Id: <1531479786-4911-3-git-send-email-clabbe@baylibre.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1531479786-4911-1-git-send-email-clabbe@baylibre.com> References: <1531479786-4911-1-git-send-email-clabbe@baylibre.com> Sender: linux-ide-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-ide@vger.kernel.org This patch document the new optional ahci-supply. Signed-off-by: Corentin Labbe Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/ata/ahci-platform.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt b/Documentation/devicetree/bindings/ata/ahci-platform.txt index c760ecb81381..5f362af2724c 100644 --- a/Documentation/devicetree/bindings/ata/ahci-platform.txt +++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt @@ -33,6 +33,7 @@ Optional properties: - target-supply : regulator for SATA target power - phys : reference to the SATA PHY node - phy-names : must be "sata-phy" +- ahci-supply : regulator for AHCI controller - ports-implemented : Mask that indicates which ports that the HBA supports are available for software to use. Useful if PORTS_IMPL is not programmed by the BIOS, which is true with From patchwork Fri Jul 13 11:03:00 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Corentin LABBE X-Patchwork-Id: 943429 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-ide-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=baylibre-com.20150623.gappssmtp.com header.i=@baylibre-com.20150623.gappssmtp.com header.b="UPiDDMdw"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 41RqgP4Xr7z9s0n for ; Fri, 13 Jul 2018 21:04:01 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729781AbeGMLR3 (ORCPT ); Fri, 13 Jul 2018 07:17:29 -0400 Received: from mail-wm0-f67.google.com ([74.125.82.67]:39682 "EHLO mail-wm0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729761AbeGMLR2 (ORCPT ); Fri, 13 Jul 2018 07:17:28 -0400 Received: by mail-wm0-f67.google.com with SMTP id h20-v6so8931069wmb.4 for ; Fri, 13 Jul 2018 04:03:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=8N17TUv2hsESNkx+Cax5KPCXmGDz3bBQAuV4+ifEOls=; b=UPiDDMdwwisjWbFptcD7wMvpO4rpaX9GJpiXihlJa/leVosGuqvzxHECySKr1roFCA 8yxKz5LigOqZAb7auOJplzz2t2s3wNajJXTsoFScY8XyoD0nOZr93Gc7+NhTkAhhidLM rcQ+Rcx2mdPslTKu05p9U4aonJMOVuRHDYGCsicAp8B4EhMtHDtI9iuEL+cU9Gjm9H/7 cuOhXX5xgi+JRTosxC5rYYc4c4Dh38hz66dGZW07jgcLvIOmFo5BU4WiUN5BmHptF1Ld tPfWttP5IwMT/gVu8fUAsKtAEVkKJv15IEloHsob8CcpAoyzxH73CVqA55Xet6WC1AoE dgYw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=8N17TUv2hsESNkx+Cax5KPCXmGDz3bBQAuV4+ifEOls=; b=j+FMxGJVKnFdZSbNRCIIxDyZ3bKZT0ApZgAUc5mXDxijCH8pFUP0lxoM8kk86b289G xgmFxlkYZkAcZZk908FoPWTFw16CkAZ9xpUVb12aY12MEiIu9zls/EvrGoCX4t73+PHj 72Xo4msRAYy62gHKQ7jFekS0XtPQgy2fAl16HEVQvtcuWj8QCO+sRjbrlTFS+qIMqrZd FZ1HKsLvtYTydVXi2Pnm6XRQX4jbhFX0HTJArdSExb7osY8LZ3NkvLZewOLt0WBofwfx RWhI12dh2O4bUNFoEUNjwQFCf9/730MwwvT1TaCN7gIugDUyd4sHPPHBKxV0701m9IHj eoaQ== X-Gm-Message-State: AOUpUlHDQ83cj3ITRtAGcd+Kf0W29BeWAji8MRorSF2KXJ95JjDZFCZE JM6Ea227tZE0oWu6W8Fi/yxbLA== X-Google-Smtp-Source: AAOMgpfceD8wgllGeLora+iAMfI4WgNaZbkS083h7AN41AH07yVtf9OTL+kXCKDncba73+qgSkuPYg== X-Received: by 2002:a1c:ed4:: with SMTP id 203-v6mr3771055wmo.96.1531479797060; Fri, 13 Jul 2018 04:03:17 -0700 (PDT) Received: from localhost.localdomain ([51.15.160.169]) by smtp.googlemail.com with ESMTPSA id y14-v6sm4598045wrq.45.2018.07.13.04.03.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 13 Jul 2018 04:03:16 -0700 (PDT) From: Corentin Labbe To: hdegoede@redhat.com, linux@armlinux.org.uk, mark.rutland@arm.com, maxime.ripard@free-electrons.com, robh+dt@kernel.org, tj@kernel.org, wens@csie.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, thierry.reding@gmail.com, icenowy@aosc.io, Corentin Labbe Subject: [PATCH v3 3/9] ata: ahci_platform: add support for AHCI controller reset Date: Fri, 13 Jul 2018 11:03:00 +0000 Message-Id: <1531479786-4911-4-git-send-email-clabbe@baylibre.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1531479786-4911-1-git-send-email-clabbe@baylibre.com> References: <1531479786-4911-1-git-send-email-clabbe@baylibre.com> Sender: linux-ide-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-ide@vger.kernel.org The SoC R40 AHCI controller need a reset to work. So this patch add a way to add an optional reset on AHCI controller. Signed-off-by: Corentin Labbe --- drivers/ata/ahci.h | 2 ++ drivers/ata/libahci_platform.c | 28 ++++++++++++++++++++++++---- 2 files changed, 26 insertions(+), 4 deletions(-) diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h index 633d3ec5c1df..274c1885a5ad 100644 --- a/drivers/ata/ahci.h +++ b/drivers/ata/ahci.h @@ -40,6 +40,7 @@ #include #include #include +#include /* Enclosure Management Control */ #define EM_CTRL_MSG_TYPE 0x000f0000 @@ -352,6 +353,7 @@ struct ahci_host_priv { struct clk *clks[AHCI_MAX_CLKS]; /* Optional */ struct regulator **target_pwrs; /* Optional */ struct regulator *ahci_regulator;/* Optional */ + struct reset_control *ahci_reset; /* Optional */ /* * If platform uses PHYs. There is a 1:1 relation between the port number and * the PHY position in this array. diff --git a/drivers/ata/libahci_platform.c b/drivers/ata/libahci_platform.c index d997a30ce793..1199ba411c15 100644 --- a/drivers/ata/libahci_platform.c +++ b/drivers/ata/libahci_platform.c @@ -207,7 +207,8 @@ EXPORT_SYMBOL_GPL(ahci_platform_disable_regulators); * following order: * 1) Regulator * 2) Clocks (through ahci_platform_enable_clks) - * 3) Phys + * 3) reset + * 4) Phys * * If resource enabling fails at any point the previous enabled resources * are disabled in reverse order. @@ -227,12 +228,19 @@ int ahci_platform_enable_resources(struct ahci_host_priv *hpriv) if (rc) goto disable_regulator; - rc = ahci_platform_enable_phys(hpriv); + rc = reset_control_assert(hpriv->ahci_reset); if (rc) goto disable_clks; + rc = ahci_platform_enable_phys(hpriv); + if (rc) + goto disable_reset; + return 0; +disable_reset: + reset_control_deassert(hpriv->ahci_reset); + disable_clks: ahci_platform_disable_clks(hpriv); @@ -250,13 +258,16 @@ EXPORT_SYMBOL_GPL(ahci_platform_enable_resources); * This function disables all ahci_platform managed resources in the * following order: * 1) Phys - * 2) Clocks (through ahci_platform_disable_clks) - * 3) Regulator + * 2) reset + * 3) Clocks (through ahci_platform_disable_clks) + * 4) Regulator */ void ahci_platform_disable_resources(struct ahci_host_priv *hpriv) { ahci_platform_disable_phys(hpriv); + reset_control_deassert(hpriv->ahci_reset); + ahci_platform_disable_clks(hpriv); ahci_platform_disable_regulators(hpriv); @@ -414,6 +425,15 @@ struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev) hpriv->ahci_regulator = NULL; } + hpriv->ahci_reset = devm_reset_control_get_optional(dev, "ahci"); + if (IS_ERR(hpriv->ahci_reset)) { + rc = PTR_ERR(hpriv->ahci_reset); + if (rc == -EPROBE_DEFER) + goto err_out; + rc = 0; + hpriv->ahci_reset = NULL; + } + hpriv->nports = child_nodes = of_get_child_count(dev->of_node); /* From patchwork Fri Jul 13 11:03:01 2018 Content-Type: text/plain; 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Fri, 13 Jul 2018 04:03:17 -0700 (PDT) From: Corentin Labbe To: hdegoede@redhat.com, linux@armlinux.org.uk, mark.rutland@arm.com, maxime.ripard@free-electrons.com, robh+dt@kernel.org, tj@kernel.org, wens@csie.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, thierry.reding@gmail.com, icenowy@aosc.io, Corentin Labbe Subject: [PATCH v3 4/9] dt-bindings: ata: ahci-platform: document AHCI reset Date: Fri, 13 Jul 2018 11:03:01 +0000 Message-Id: <1531479786-4911-5-git-send-email-clabbe@baylibre.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1531479786-4911-1-git-send-email-clabbe@baylibre.com> References: <1531479786-4911-1-git-send-email-clabbe@baylibre.com> Sender: linux-ide-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-ide@vger.kernel.org This patch document the new optional resets for ahci node. Signed-off-by: Corentin Labbe --- Documentation/devicetree/bindings/ata/ahci-platform.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt b/Documentation/devicetree/bindings/ata/ahci-platform.txt index 5f362af2724c..a5281d7557e3 100644 --- a/Documentation/devicetree/bindings/ata/ahci-platform.txt +++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt @@ -34,6 +34,8 @@ Optional properties: - phys : reference to the SATA PHY node - phy-names : must be "sata-phy" - ahci-supply : regulator for AHCI controller +- resets : phandle to the reset line of AHCI controller + If set, must have a reset-names set as "ahci" - ports-implemented : Mask that indicates which ports that the HBA supports are available for software to use. Useful if PORTS_IMPL is not programmed by the BIOS, which is true with From patchwork Fri Jul 13 11:03:02 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Corentin LABBE X-Patchwork-Id: 943425 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-ide-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=baylibre-com.20150623.gappssmtp.com header.i=@baylibre-com.20150623.gappssmtp.com header.b="F1wxKGd6"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 41RqgH14QTz9s0n for ; Fri, 13 Jul 2018 21:03:55 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727434AbeGMLSD (ORCPT ); Fri, 13 Jul 2018 07:18:03 -0400 Received: from mail-wm0-f68.google.com ([74.125.82.68]:52811 "EHLO mail-wm0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729779AbeGMLRa (ORCPT ); Fri, 13 Jul 2018 07:17:30 -0400 Received: by mail-wm0-f68.google.com with SMTP id o11-v6so2496106wmh.2 for ; Fri, 13 Jul 2018 04:03:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=AIrLCVk3WV7PfwjgVa3iXAVs17yODr8EjHYzi7ivObo=; b=F1wxKGd6xKcYvrKG5B6sBUNPtH0LVPAGKOsyncIGxamHRWtXOw7GxCAFjOTUM/nyQO uPs22aGRu1kE8aPWLu6LWSPMK8th8cAtYsOyyWSBC4QOq/jhvMc1rjBSXUnpKCOVs3qc DiQDmbiu9+jfCCDmB1VPC1MkvsApHKfPYu8YSqDWgoyUSmOdTtbMIXzZ8Ch5Vu04IqAk GgB9xlXQzDRim5ucvn+3C5lm7WWcRKnuvnUNWKX3OrFb04tXS05AI2tQ/0sBijERswXq mhe0mxXQXiQQKOXc+eutc840PHeZ+wzeKLTq9coAMmHNS5O+NGkSRHvJHUsm3n+KwQv/ AXXg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=AIrLCVk3WV7PfwjgVa3iXAVs17yODr8EjHYzi7ivObo=; b=Jlz8YC7YgcTJ6zGSBiSw9w4ZcpoHtgACbYlF8DO7y3TtBXoLGVfnTbom5JcacL7HNE Dv47Tgn1mVyWXkvFK7f0GKx1FUpcf3jG0hCIj6N2E4inXFbzQFZUkzwT+dZYZnRhkj72 YtDJaB2TIki8jweJWInm4q7RTYF2dvcnadl8/Eha0i2WaFwO8N2c60NffBZKQAcedyXf PI0Z5tTANIOFdFUHp1U2qm4RyQv9mLTgswKW6vl5caEDqzu1Pok6c/U9iz52DHr1ub9y n333fV4hnZrwugGkJCb/oxLJeD6y1N85zyucb1oxpkz5HMOeeL/siKNbdOTOdzKyr1e4 yYig== X-Gm-Message-State: AOUpUlHGp9dS1HC6iVrMN/9BFrlPKOtztHHcVS5h0XYpURq6iJ+HwBcD DhNCMYfegqQg+7M/XGsoD8KdVA== X-Google-Smtp-Source: AAOMgpc+hN7TjdWDyb27fHqHavLY0x5wEoVE1Sj2FgyrFKcjMx9wUZp9X7ksJ1X7c297/F7Bgjq/qg== X-Received: by 2002:a1c:57c1:: with SMTP id l184-v6mr1346359wmb.16.1531479799007; Fri, 13 Jul 2018 04:03:19 -0700 (PDT) Received: from localhost.localdomain ([51.15.160.169]) by smtp.googlemail.com with ESMTPSA id y14-v6sm4598045wrq.45.2018.07.13.04.03.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 13 Jul 2018 04:03:18 -0700 (PDT) From: Corentin Labbe To: hdegoede@redhat.com, linux@armlinux.org.uk, mark.rutland@arm.com, maxime.ripard@free-electrons.com, robh+dt@kernel.org, tj@kernel.org, wens@csie.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, thierry.reding@gmail.com, icenowy@aosc.io, Corentin Labbe Subject: [PATCH v3 5/9] dt-bindings: ata: ahci-platform: fix indentation of target-supply Date: Fri, 13 Jul 2018 11:03:02 +0000 Message-Id: <1531479786-4911-6-git-send-email-clabbe@baylibre.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1531479786-4911-1-git-send-email-clabbe@baylibre.com> References: <1531479786-4911-1-git-send-email-clabbe@baylibre.com> Sender: linux-ide-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-ide@vger.kernel.org This patch fix the indentation of target-supply's ':'. Signed-off-by: Corentin Labbe Acked-by: Rob Herring --- Documentation/devicetree/bindings/ata/ahci-platform.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt b/Documentation/devicetree/bindings/ata/ahci-platform.txt index a5281d7557e3..47652521a6ed 100644 --- a/Documentation/devicetree/bindings/ata/ahci-platform.txt +++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt @@ -50,7 +50,7 @@ Sub-nodes required properties: - reg : the port number And at least one of the following properties: - phys : reference to the SATA PHY node -- target-supply : regulator for SATA target power +- target-supply : regulator for SATA target power Examples: sata@ffe08000 { From patchwork Fri Jul 13 11:03:03 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Corentin LABBE X-Patchwork-Id: 943424 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-ide-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=baylibre-com.20150623.gappssmtp.com header.i=@baylibre-com.20150623.gappssmtp.com header.b="o80Djutf"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 41Rqg83kDxz9s3T for ; Fri, 13 Jul 2018 21:03:48 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727471AbeGMLRv (ORCPT ); Fri, 13 Jul 2018 07:17:51 -0400 Received: from mail-wm0-f67.google.com ([74.125.82.67]:52812 "EHLO mail-wm0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730070AbeGMLRc (ORCPT ); Fri, 13 Jul 2018 07:17:32 -0400 Received: by mail-wm0-f67.google.com with SMTP id o11-v6so2496173wmh.2 for ; Fri, 13 Jul 2018 04:03:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=FmKePY8cO2Z3BAl+6ruUNdCH+AeRm0CrHUVMa6DpYGY=; b=o80Djutf0GiwdjrCGE6+2U7Ek0QNYxax81Cd5yZ60zXBw2tNF+l3En4pNrBve+vAnu H1cjmEVWN/S7QK8Szk9ybus/dkALaOmdEgY3iSWNrSXiSIoXLdCQGNWAUdmrLRADHllo YW58rkRCdGPhK04K4D5qH4lYdrN5JUMbe7//wVqnaptjswGdKLWYZ5EqLgODmEh5jZj5 Bwk66WLMk7pwpl52zNHn7i6/HmGCjgeS0NdEs6h6voJ492uiE69vlJ19mRe1gJnGj1yY WP46FybQHa7VS7AbIjKJ2Q0af4PUrKmmqK49vjcNtMxRzqNxE0r24ksQTmieYkH1AVLE 58lA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=FmKePY8cO2Z3BAl+6ruUNdCH+AeRm0CrHUVMa6DpYGY=; b=jfWw0yceDiaMlo7ydRRsK/It2BGG8y+5JK70UPYaDqAQsI/0xBJY3VWqhTFvdhlTBP /A8DtmWUNnqTlq8QRxi5+dJExwTP7EUCw8rpPzw1eEQfoj0rBEiYEUhrp5FVGutYvCz4 yJtmwgySQdUCRDX+DhUgkI9WB77zzkr+XTP49QRPWKz+wFGQKr+b1XRYcyhu4Nrzyc/I Bxv4B42O7AzSqoyoHeo1VVC1JTPvrDfXtEI4lEBSjLcVmxXVMM/B503XnAeeDB2aMoBg BsDKEIEAoiEh4ZMGB+iICiZrJHydKLWfRpWL2xdRfvJNPybkGteJ+xgh4xvlHhbglJVA 4z+A== X-Gm-Message-State: AOUpUlEq/jIbi5YNjCQI6EvbOsAust2LQWNY8bE9Za+GQtBJiiDeiURv TOXK2bw78paZdkalMDJ3bQA0/Q== X-Google-Smtp-Source: AAOMgpfSZrikfitDhPmgJUjjpozvPsPOMpR8HhDBAf3tkltcMaueTldnMwJbSJ7B1t2BQ8fU9IIxsA== X-Received: by 2002:a1c:910f:: with SMTP id t15-v6mr3848854wmd.51.1531479799995; Fri, 13 Jul 2018 04:03:19 -0700 (PDT) Received: from localhost.localdomain ([51.15.160.169]) by smtp.googlemail.com with ESMTPSA id y14-v6sm4598045wrq.45.2018.07.13.04.03.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 13 Jul 2018 04:03:19 -0700 (PDT) From: Corentin Labbe To: hdegoede@redhat.com, linux@armlinux.org.uk, mark.rutland@arm.com, maxime.ripard@free-electrons.com, robh+dt@kernel.org, tj@kernel.org, wens@csie.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, thierry.reding@gmail.com, icenowy@aosc.io, Corentin Labbe Subject: [PATCH v3 6/9] ata: ahci_platform: add support for port regulator Date: Fri, 13 Jul 2018 11:03:03 +0000 Message-Id: <1531479786-4911-7-git-send-email-clabbe@baylibre.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1531479786-4911-1-git-send-email-clabbe@baylibre.com> References: <1531479786-4911-1-git-send-email-clabbe@baylibre.com> Sender: linux-ide-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-ide@vger.kernel.org The SoC R40 AHCI controller need a port regulator to work. We cannot use the "target-supply" since it's not a target power regulator. So this patch add a way to add an optional port regulator. Signed-off-by: Corentin Labbe --- drivers/ata/ahci.h | 1 + drivers/ata/libahci_platform.c | 47 +++++++++++++++++++++++++++++++++++++----- 2 files changed, 43 insertions(+), 5 deletions(-) diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h index 274c1885a5ad..716fd679dd3e 100644 --- a/drivers/ata/ahci.h +++ b/drivers/ata/ahci.h @@ -352,6 +352,7 @@ struct ahci_host_priv { bool got_runtime_pm; /* Did we do pm_runtime_get? */ struct clk *clks[AHCI_MAX_CLKS]; /* Optional */ struct regulator **target_pwrs; /* Optional */ + struct regulator **port_regulators;/* Optional */ struct regulator *ahci_regulator;/* Optional */ struct reset_control *ahci_reset; /* Optional */ /* diff --git a/drivers/ata/libahci_platform.c b/drivers/ata/libahci_platform.c index 1199ba411c15..d7574b3e1f6a 100644 --- a/drivers/ata/libahci_platform.c +++ b/drivers/ata/libahci_platform.c @@ -148,7 +148,7 @@ EXPORT_SYMBOL_GPL(ahci_platform_disable_clks); */ int ahci_platform_enable_regulators(struct ahci_host_priv *hpriv) { - int rc, i; + int rc, i, j; if (hpriv->ahci_regulator) { rc = regulator_enable(hpriv->ahci_regulator); @@ -164,9 +164,21 @@ int ahci_platform_enable_regulators(struct ahci_host_priv *hpriv) if (rc) goto disable_target_pwrs; } + for (j = 0; j < hpriv->nports; j++) { + if (!hpriv->port_regulators[j]) + continue; + + rc = regulator_enable(hpriv->port_regulators[j]); + if (rc) + goto disable_port_regulators; + } return 0; +disable_port_regulators: + while (--j >= 0) + if (hpriv->port_regulators[j]) + regulator_disable(hpriv->port_regulators[j]); disable_target_pwrs: while (--i >= 0) if (hpriv->target_pwrs[i]) @@ -190,9 +202,10 @@ void ahci_platform_disable_regulators(struct ahci_host_priv *hpriv) int i; for (i = 0; i < hpriv->nports; i++) { - if (!hpriv->target_pwrs[i]) - continue; - regulator_disable(hpriv->target_pwrs[i]); + if (hpriv->target_pwrs[i]) + regulator_disable(hpriv->target_pwrs[i]); + if (hpriv->port_regulators[i]) + regulator_disable(hpriv->port_regulators[i]); } if (hpriv->ahci_regulator) @@ -291,9 +304,12 @@ static void ahci_platform_put_resources(struct device *dev, void *res) * SATA device itself. So we can't use devm for automatically * releasing them. We have to do it manually here. */ - for (c = 0; c < hpriv->nports; c++) + for (c = 0; c < hpriv->nports; c++) { if (hpriv->target_pwrs && hpriv->target_pwrs[c]) regulator_put(hpriv->target_pwrs[c]); + if (hpriv->port_regulators && hpriv->port_regulators[c]) + regulator_put(hpriv->port_regulators[c]); + } } static int ahci_platform_get_phy(struct ahci_host_priv *hpriv, u32 port, @@ -338,6 +354,7 @@ static int ahci_platform_get_regulator(struct ahci_host_priv *hpriv, u32 port, struct device *dev) { struct regulator *target_pwr; + struct regulator *port_regulator; int rc = 0; target_pwr = regulator_get_optional(dev, "target"); @@ -346,6 +363,21 @@ static int ahci_platform_get_regulator(struct ahci_host_priv *hpriv, u32 port, hpriv->target_pwrs[port] = target_pwr; else rc = PTR_ERR(target_pwr); + /* Only EPROBE_DEFER is important since it's an optional regulator */ + if (rc != -EPROBE_DEFER) + rc = 0; + else + return rc; + + port_regulator = regulator_get_optional(dev, "port"); + + if (!IS_ERR(port_regulator)) + hpriv->port_regulators[port] = port_regulator; + else + rc = PTR_ERR(port_regulator); + /* Only EPROBE_DEFER is important since it's an optional regulator */ + if (rc != -EPROBE_DEFER) + rc = 0; return rc; } @@ -454,6 +486,11 @@ struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev) rc = -ENOMEM; goto err_out; } + hpriv->port_regulators = devm_kcalloc(dev, hpriv->nports, sizeof(*hpriv->port_regulators), GFP_KERNEL); + if (!hpriv->port_regulators) { + rc = -ENOMEM; + goto err_out; + } if (child_nodes) { for_each_child_of_node(dev->of_node, child) { From patchwork Fri Jul 13 11:03:04 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Corentin LABBE X-Patchwork-Id: 943423 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; 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Fri, 13 Jul 2018 04:03:20 -0700 (PDT) Received: from localhost.localdomain ([51.15.160.169]) by smtp.googlemail.com with ESMTPSA id y14-v6sm4598045wrq.45.2018.07.13.04.03.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 13 Jul 2018 04:03:20 -0700 (PDT) From: Corentin Labbe To: hdegoede@redhat.com, linux@armlinux.org.uk, mark.rutland@arm.com, maxime.ripard@free-electrons.com, robh+dt@kernel.org, tj@kernel.org, wens@csie.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, thierry.reding@gmail.com, icenowy@aosc.io, Corentin Labbe Subject: [PATCH v3 7/9] dt-bindings: ata: ahci-platform: document port-supply Date: Fri, 13 Jul 2018 11:03:04 +0000 Message-Id: <1531479786-4911-8-git-send-email-clabbe@baylibre.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1531479786-4911-1-git-send-email-clabbe@baylibre.com> References: <1531479786-4911-1-git-send-email-clabbe@baylibre.com> Sender: linux-ide-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-ide@vger.kernel.org This patch document the new optional port-supply Signed-off-by: Corentin Labbe --- Documentation/devicetree/bindings/ata/ahci-platform.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt b/Documentation/devicetree/bindings/ata/ahci-platform.txt index 47652521a6ed..40a636b9851e 100644 --- a/Documentation/devicetree/bindings/ata/ahci-platform.txt +++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt @@ -31,6 +31,7 @@ Optional properties: - dma-coherent : Present if dma operations are coherent - clocks : a list of phandle + clock specifier pairs - target-supply : regulator for SATA target power +- port-supply : regulator for SATA port - phys : reference to the SATA PHY node - phy-names : must be "sata-phy" - ahci-supply : regulator for AHCI controller @@ -51,6 +52,7 @@ Sub-nodes required properties: And at least one of the following properties: - phys : reference to the SATA PHY node - target-supply : regulator for SATA target power +- port-supply : regulator for SATA port Examples: sata@ffe08000 { From patchwork Fri Jul 13 11:03:05 2018 Content-Type: text/plain; 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Fri, 13 Jul 2018 04:03:21 -0700 (PDT) From: Corentin Labbe To: hdegoede@redhat.com, linux@armlinux.org.uk, mark.rutland@arm.com, maxime.ripard@free-electrons.com, robh+dt@kernel.org, tj@kernel.org, wens@csie.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, thierry.reding@gmail.com, icenowy@aosc.io, Corentin Labbe Subject: [PATCH v3 8/9] ARM: dts: sun8i: r40: add sata node Date: Fri, 13 Jul 2018 11:03:05 +0000 Message-Id: <1531479786-4911-9-git-send-email-clabbe@baylibre.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1531479786-4911-1-git-send-email-clabbe@baylibre.com> References: <1531479786-4911-1-git-send-email-clabbe@baylibre.com> Sender: linux-ide-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-ide@vger.kernel.org R40 have a sata controller which is the same as A20. This patch adds a DT node for it. Signed-off-by: Icenowy Zheng Signed-off-by: Corentin Labbe --- arch/arm/boot/dts/sun8i-r40.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi index d4ad55eb2245..bd369112a400 100644 --- a/arch/arm/boot/dts/sun8i-r40.dtsi +++ b/arch/arm/boot/dts/sun8i-r40.dtsi @@ -550,6 +550,22 @@ #size-cells = <0>; }; + ahci: sata@1c18000 { + compatible = "allwinner,sun4i-a10-ahci"; + reg = <0x01c18000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_SATA>, <&ccu CLK_SATA>; + resets = <&ccu RST_BUS_SATA>; + resets-name = "ahci"; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + + sata_port0: sata-port@0 { + reg = <0>; + }; + }; + gmac: ethernet@1c50000 { compatible = "allwinner,sun8i-r40-gmac"; syscon = <&ccu>; From patchwork Fri Jul 13 11:03:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Corentin LABBE X-Patchwork-Id: 943420 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-ide-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=baylibre-com.20150623.gappssmtp.com header.i=@baylibre-com.20150623.gappssmtp.com header.b="0vUtQgRq"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 41Rqfk1q6zz9sBk for ; Fri, 13 Jul 2018 21:03:26 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731264AbeGMLRf (ORCPT ); Fri, 13 Jul 2018 07:17:35 -0400 Received: from mail-wr1-f68.google.com ([209.85.221.68]:41021 "EHLO mail-wr1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731225AbeGMLRe (ORCPT ); Fri, 13 Jul 2018 07:17:34 -0400 Received: by mail-wr1-f68.google.com with SMTP id j5-v6so18171498wrr.8 for ; Fri, 13 Jul 2018 04:03:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=SfJgK+bi2J4jnNDfFkUldHkyAJ+BTKp6VkmyhXu1Liw=; b=0vUtQgRqrhrcCTCxiTyPB2gMyDKTjOtnwyhLR3z+T0lqxSPMoTXWSwRa7gwcZOq2l6 lJmVmR3rg0oIsZodbjJL4422vtEPef7FoHcvpKe8qgyOq0bzDZzEI4JS4veKbi79GxSN fPnUZ+w4hRxHlTMcolJ5GYCm8jG2KW55vVoJBJ26Mu06bFOpuRQJ6MK25yJuxYLbvWpK 7govz89z43l+lWqSh45/WDTSwjxtPP8MQeWc9TMDQHIWocJe94ANMrc9y/WSH7LHp0Bk GGEBSwG+aeQtIxPfTCW+5vNHAhUTWDUPYW7g9+EFeBEg1eB4CzEr45wutzKZBM43V0rq X+2Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=SfJgK+bi2J4jnNDfFkUldHkyAJ+BTKp6VkmyhXu1Liw=; b=D3REqh/3EZTzbLIG0YRZrE4fgo87fk5IeoAT1l0ZASkBTmg5lCWZcSohlZcRiNT7ZR SAZKOhLjYT79CCmA5ZTPhbcFHD4HDk8Z+EY39TQnPwz94MpxTqGuRXE9L1A8hJJfAcgL M4Zsq2AqYuD8q5lTv0Gmxm4hrWYBfrUd6/+vWElyi55RhYtjmdALDXtfbNvB1vMOzEQw t+g0PZEI/x/7D/Qk8GFnoFF/Z/091grzrJBjeZtVaeOkqw/QjvZC4fDIHAA6xeLtiTre EMK6TrIxwOJ2++yT4WqkIQRFG9/3ntFGnLW9qkyzlu24Q7u1IsZLpmx52ImiSPTeabqf IwtQ== X-Gm-Message-State: AOUpUlFlaJpxD4XXJ/8wURAOunep9gLELh6wsNIRUwY4cMlcZKsKk/9s SW/ANL0GG9LgWBtydBShuOeWBNZz X-Google-Smtp-Source: AAOMgpemNzvlOgDFPXh5okghH6kVXV8GINaY35f04D3N6LGr50cZy/lj5IuZkH+1fFLQdGa9Ya1djQ== X-Received: by 2002:adf:a541:: with SMTP id j1-v6mr5009144wrb.155.1531479802631; Fri, 13 Jul 2018 04:03:22 -0700 (PDT) Received: from localhost.localdomain ([51.15.160.169]) by smtp.googlemail.com with ESMTPSA id y14-v6sm4598045wrq.45.2018.07.13.04.03.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 13 Jul 2018 04:03:22 -0700 (PDT) From: Corentin Labbe To: hdegoede@redhat.com, linux@armlinux.org.uk, mark.rutland@arm.com, maxime.ripard@free-electrons.com, robh+dt@kernel.org, tj@kernel.org, wens@csie.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, thierry.reding@gmail.com, icenowy@aosc.io, Corentin Labbe Subject: [PATCH v3 9/9] ARM: dts: sun8i: sun8i-r40-bananapi-m2-ultra: enable AHCI Date: Fri, 13 Jul 2018 11:03:06 +0000 Message-Id: <1531479786-4911-10-git-send-email-clabbe@baylibre.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1531479786-4911-1-git-send-email-clabbe@baylibre.com> References: <1531479786-4911-1-git-send-email-clabbe@baylibre.com> Sender: linux-ide-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-ide@vger.kernel.org This patch enable the AHCI controller. Since this controller need two regulator, this patch add them. Signed-off-by: Corentin Labbe --- arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts index c39b9169ea64..07eaf6cd9d19 100644 --- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts +++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts @@ -105,6 +105,11 @@ }; }; +&ahci { + ahci-supply = <®_dldo4>; + status = "okay"; +}; + &de { status = "okay"; }; @@ -251,6 +256,22 @@ regulator-name = "vcc-wifi"; }; +®_dldo4 { + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-name = "vdd2v5-sata"; +}; + +®_eldo3 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-name = "vdd1v2-sata"; +}; + +&sata_port0 { + port-supply = <®_eldo3>; +}; + &tcon_tv0 { status = "okay"; };