From patchwork Thu Jul 12 03:48:43 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Herrenschmidt X-Patchwork-Id: 942798 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=kernel.crashing.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 41R3Pg1VSJz9s01 for ; Thu, 12 Jul 2018 14:49:27 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726570AbeGLE4z (ORCPT ); Thu, 12 Jul 2018 00:56:55 -0400 Received: from gate.crashing.org ([63.228.1.57]:36090 "EHLO gate.crashing.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726443AbeGLE4z (ORCPT ); Thu, 12 Jul 2018 00:56:55 -0400 Received: from pasglop.ozlabs.ibm.com (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.14.1) with ESMTP id w6C3mnNT020207; Wed, 11 Jul 2018 22:48:54 -0500 From: Benjamin Herrenschmidt To: linux-aspeed@lists.ozlabs.org Cc: devicetree@vger.kernel.org, OpenBMC Maillist , Andrew Jeffery , Joel Stanley , Rob Herring , linux-kernel@vger.kernel.org, Benjamin Herrenschmidt Subject: [PATCH v3 1/5] dt-bindings: fsi: Document binding for the fsi-master-ast-cf "device" Date: Thu, 12 Jul 2018 13:48:43 +1000 Message-Id: <20180712034847.12878-2-benh@kernel.crashing.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180712034847.12878-1-benh@kernel.crashing.org> References: <20180712034847.12878-1-benh@kernel.crashing.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This isn't per-se a real device, it's a pseudo-device that represents the use of the Aspeed built-in ColdFire to implement the FSI protocol by bitbanging the GPIOs instead of doing it from the ARM core. Thus it's a drop-in replacement for the existing fsi-master-gpio pseudo-device for use on systems based on the Aspeed chips. It has most of the same properties, plus some more needed to operate the coprocessor. Signed-off-by: Benjamin Herrenschmidt Reviewed-by: Rob Herring --- .../bindings/fsi/fsi-master-ast-cf.txt | 36 +++++++++++++++++++ 1 file changed, 36 insertions(+) create mode 100644 Documentation/devicetree/bindings/fsi/fsi-master-ast-cf.txt diff --git a/Documentation/devicetree/bindings/fsi/fsi-master-ast-cf.txt b/Documentation/devicetree/bindings/fsi/fsi-master-ast-cf.txt new file mode 100644 index 000000000000..431bf8a423ce --- /dev/null +++ b/Documentation/devicetree/bindings/fsi/fsi-master-ast-cf.txt @@ -0,0 +1,36 @@ +Device-tree bindings for ColdFire offloaded gpio-based FSI master driver +------------------------------------------------------------------------ + +Required properties: + - compatible = + "aspeed,ast2400-cf-fsi-master" for an AST2400 based system + or + "aspeed,ast2500-cf-fsi-master" for an AST2500 based system + + - clock-gpios = ; : GPIO for FSI clock + - data-gpios = ; : GPIO for FSI data signal + - enable-gpios = ; : GPIO for enable signal + - trans-gpios = ; : GPIO for voltage translator enable + - mux-gpios = ; : GPIO for pin multiplexing with other + functions (eg, external FSI masters) + - memory-region = ; : Reference to the reserved memory for + the ColdFire. Must be 2M aligned on + AST2400 and 1M aligned on AST2500 + - aspeed,sram = ; : Reference to the SRAM node. + - aspeed,cvic = ; : Reference to the CVIC node. + +Examples: + + fsi-master { + compatible = "aspeed,ast2500-cf-fsi-master", "fsi-master"; + + clock-gpios = <&gpio 0>; + data-gpios = <&gpio 1>; + enable-gpios = <&gpio 2>; + trans-gpios = <&gpio 3>; + mux-gpios = <&gpio 4>; + + memory-region = <&coldfire_memory>; + sram = <&sram>; + cvic = <&cvic>; + }