From patchwork Mon Jul 2 22:09:20 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VGFtw6FzIFN6xbFjcw==?= X-Patchwork-Id: 938259 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=protonmail.ch Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 41KM7W49Wpz9s3C for ; Tue, 3 Jul 2018 08:17:27 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753332AbeGBWR0 (ORCPT ); Mon, 2 Jul 2018 18:17:26 -0400 Received: from hera.iit.uni-miskolc.hu ([193.6.5.4]:56476 "EHLO hera.iit.uni-miskolc.hu" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753258AbeGBWR0 (ORCPT ); Mon, 2 Jul 2018 18:17:26 -0400 X-Greylist: delayed 479 seconds by postgrey-1.27 at vger.kernel.org; Mon, 02 Jul 2018 18:17:25 EDT Received: from localhost (localhost [127.0.0.1]) by hera.iit.uni-miskolc.hu (Postfix) with ESMTP id B3025100831 for ; Tue, 3 Jul 2018 00:09:24 +0200 (CEST) X-Virus-Scanned: Kamavis at iit.uni-miskolc.hu Received: from hera.iit.uni-miskolc.hu ([127.0.0.1]) by localhost (hera.iit.uni-miskolc.hu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id p6_n2WP23aNs for ; Tue, 3 Jul 2018 00:09:21 +0200 (CEST) Received: from titan.hitronhub.home (unknown [IPv6:2a02:8109:8f80:409c:226:9eff:fe30:2af8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: szucst@iit.uni-miskolc.hu) by hera.iit.uni-miskolc.hu (Postfix) with ESMTPSA id 7CB67100819 for ; Tue, 3 Jul 2018 00:09:21 +0200 (CEST) From: =?utf-8?b?VGFtw6FzIFN6xbFjcw==?= To: linux-tegra@vger.kernel.org Subject: [PATCH] mmc: tegra: enable ddr_signaling for MMC_TIMING_MMC_DDR52 Date: Tue, 3 Jul 2018 00:09:20 +0200 Message-Id: <20180702220920.7676-1-tszucs@protonmail.ch> X-Mailer: git-send-email 2.11.0 MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org This fixes sampling errors with eMMC modules using DDR52 when host capabilities via setting NVQUIRK_ENABLE_DDR50 and NVQUIRK_ENABLE_SDHCI_SPEC_300 are enabled. Signed-off-by: Tamás Szűcs --- drivers/mmc/host/sdhci-tegra.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index b877c13184c2..ae4ef27f1202 100644 --- a/drivers/mmc/host/sdhci-tegra.c +++ b/drivers/mmc/host/sdhci-tegra.c @@ -228,7 +228,7 @@ static void tegra_sdhci_set_uhs_signaling(struct sdhci_host *host, struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); - if (timing == MMC_TIMING_UHS_DDR50) + if (timing == MMC_TIMING_UHS_DDR50 || timing == MMC_TIMING_MMC_DDR52) tegra_host->ddr_signaling = true; return sdhci_set_uhs_signaling(host, timing);