From patchwork Mon Jun 25 22:25:13 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 934599 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41F3fz046Wz9ryk for ; Tue, 26 Jun 2018 08:26:19 +1000 (AEST) Received: from localhost ([::1]:49505 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fXZw8-0001hN-Gz for incoming@patchwork.ozlabs.org; Mon, 25 Jun 2018 18:26:16 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54236) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fXZvQ-0001ga-6i for qemu-devel@nongnu.org; Mon, 25 Jun 2018 18:25:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fXZvO-00033U-7R for qemu-devel@nongnu.org; Mon, 25 Jun 2018 18:25:31 -0400 Received: from mx1.redhat.com ([209.132.183.28]:35658) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fXZvN-00032k-P0 for qemu-devel@nongnu.org; Mon, 25 Jun 2018 18:25:30 -0400 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 0B47F307D865; Mon, 25 Jun 2018 22:25:29 +0000 (UTC) Received: from localhost (ovpn-116-16.gru2.redhat.com [10.97.116.16]) by smtp.corp.redhat.com (Postfix) with ESMTP id 9271B19EF9; Mon, 25 Jun 2018 22:25:28 +0000 (UTC) From: Eduardo Habkost To: Peter Maydell , qemu-devel@nongnu.org Date: Mon, 25 Jun 2018 19:25:13 -0300 Message-Id: <20180625222524.382-2-ehabkost@redhat.com> In-Reply-To: <20180625222524.382-1-ehabkost@redhat.com> References: <20180625222524.382-1-ehabkost@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.48]); Mon, 25 Jun 2018 22:25:29 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 01/12] i386: Add support for CPUID_8000_001E for AMD X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Babu Moger , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Babu Moger Add support for cpuid leaf CPUID_8000_001E. Build the config that closely match the underlying hardware. Please refer to the Processor Programming Reference (PPR) for AMD Family 17h Model for more details. Signed-off-by: Babu Moger Message-Id: <1528498581-131037-2-git-send-email-babu.moger@amd.com> Signed-off-by: Eduardo Habkost --- target/i386/cpu.c | 86 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 86 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 1e69e68f25..86fb1a4fb8 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -427,6 +427,87 @@ static void encode_cache_cpuid8000001d(CPUCacheInfo *cache, CPUState *cs, (cache->complex_indexing ? CACHE_COMPLEX_IDX : 0); } +/* Data structure to hold the configuration info for a given core index */ +struct core_topology { + /* core complex id of the current core index */ + int ccx_id; + /* + * Adjusted core index for this core in the topology + * This can be 0,1,2,3 with max 4 cores in a core complex + */ + int core_id; + /* Node id for this core index */ + int node_id; + /* Number of nodes in this config */ + int num_nodes; +}; + +/* + * Build the configuration closely match the EPYC hardware. Using the EPYC + * hardware configuration values (MAX_CCX, MAX_CORES_IN_CCX, MAX_CORES_IN_NODE) + * right now. This could change in future. + * nr_cores : Total number of cores in the config + * core_id : Core index of the current CPU + * topo : Data structure to hold all the config info for this core index + */ +static void build_core_topology(int nr_cores, int core_id, + struct core_topology *topo) +{ + int nodes, cores_in_ccx; + + /* First get the number of nodes required */ + nodes = nodes_in_socket(nr_cores); + + cores_in_ccx = cores_in_core_complex(nr_cores); + + topo->node_id = core_id / (cores_in_ccx * MAX_CCX); + topo->ccx_id = (core_id % (cores_in_ccx * MAX_CCX)) / cores_in_ccx; + topo->core_id = core_id % cores_in_ccx; + topo->num_nodes = nodes; +} + +/* Encode cache info for CPUID[8000001E] */ +static void encode_topo_cpuid8000001e(CPUState *cs, X86CPU *cpu, + uint32_t *eax, uint32_t *ebx, + uint32_t *ecx, uint32_t *edx) +{ + struct core_topology topo = {0}; + + build_core_topology(cs->nr_cores, cpu->core_id, &topo); + *eax = cpu->apic_id; + /* + * CPUID_Fn8000001E_EBX + * 31:16 Reserved + * 15:8 Threads per core (The number of threads per core is + * Threads per core + 1) + * 7:0 Core id (see bit decoding below) + * SMT: + * 4:3 node id + * 2 Core complex id + * 1:0 Core id + * Non SMT: + * 5:4 node id + * 3 Core complex id + * 1:0 Core id + */ + if (cs->nr_threads - 1) { + *ebx = ((cs->nr_threads - 1) << 8) | (topo.node_id << 3) | + (topo.ccx_id << 2) | topo.core_id; + } else { + *ebx = (topo.node_id << 4) | (topo.ccx_id << 3) | topo.core_id; + } + /* + * CPUID_Fn8000001E_ECX + * 31:11 Reserved + * 10:8 Nodes per processor (Nodes per processor is number of nodes + 1) + * 7:0 Node id (see bit decoding below) + * 2 Socket id + * 1:0 Node id + */ + *ecx = ((topo.num_nodes - 1) << 8) | (cpu->socket_id << 2) | topo.node_id; + *edx = 0; +} + /* * Definitions of the hardcoded cache entries we expose: * These are legacy cache values. If there is a need to change any @@ -4120,6 +4201,11 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, break; } break; + case 0x8000001E: + assert(cpu->core_id <= 255); + encode_topo_cpuid8000001e(cs, cpu, + eax, ebx, ecx, edx); + break; case 0xC0000000: *eax = env->cpuid_xlevel2; *ebx = 0; From patchwork Mon Jun 25 22:25:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 934602 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41F3kJ41nNz9ryk for ; Tue, 26 Jun 2018 08:29:11 +1000 (AEST) Received: from localhost ([::1]:49514 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fXZyt-0003yg-Qb for incoming@patchwork.ozlabs.org; Mon, 25 Jun 2018 18:29:07 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54244) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fXZvQ-0001gb-Rs for qemu-devel@nongnu.org; Mon, 25 Jun 2018 18:25:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fXZvP-00034d-SC for qemu-devel@nongnu.org; Mon, 25 Jun 2018 18:25:32 -0400 Received: from mx1.redhat.com ([209.132.183.28]:43436) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fXZvP-000347-Ho for qemu-devel@nongnu.org; Mon, 25 Jun 2018 18:25:31 -0400 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id C2F4F3082A42; Mon, 25 Jun 2018 22:25:30 +0000 (UTC) Received: from localhost (ovpn-116-16.gru2.redhat.com [10.97.116.16]) by smtp.corp.redhat.com (Postfix) with ESMTP id 520FD8CF81; Mon, 25 Jun 2018 22:25:30 +0000 (UTC) From: Eduardo Habkost To: Peter Maydell , qemu-devel@nongnu.org Date: Mon, 25 Jun 2018 19:25:14 -0300 Message-Id: <20180625222524.382-3-ehabkost@redhat.com> In-Reply-To: <20180625222524.382-1-ehabkost@redhat.com> References: <20180625222524.382-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.45]); Mon, 25 Jun 2018 22:25:30 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 02/12] i386: improve alignment of CPU model listing X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Daniel P. Berrangé Since the addition of the -IBRS CPU model variants, the descriptions shown by '-cpu help' are not well aligned, as several model names overflow the space allowed. Right aligning the CPU model names is also not attractive, because it obscures the common name prefixes of many models. The CPU model name field needs to be 4 characters larger, and be left aligned instead. Signed-off-by: Daniel P. Berrangé Message-Id: <20180606165527.17365-2-berrange@redhat.com> Signed-off-by: Eduardo Habkost --- target/i386/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 86fb1a4fb8..e1d7157d8c 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -3380,7 +3380,7 @@ static void x86_cpu_list_entry(gpointer data, gpointer user_data) desc = cc->cpu_def->model_id; } - (*s->cpu_fprintf)(s->file, "x86 %16s %-48s\n", + (*s->cpu_fprintf)(s->file, "x86 %-20s %-48s\n", name, desc); g_free(name); } From patchwork Mon Jun 25 22:25:15 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 934600 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41F3g21z7Tz9ryk for ; Tue, 26 Jun 2018 08:26:22 +1000 (AEST) Received: from localhost ([::1]:49506 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fXZwB-0001jL-RW for incoming@patchwork.ozlabs.org; Mon, 25 Jun 2018 18:26:19 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54260) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fXZvT-0001hM-0o for qemu-devel@nongnu.org; Mon, 25 Jun 2018 18:25:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fXZvR-00036Q-UI for qemu-devel@nongnu.org; Mon, 25 Jun 2018 18:25:35 -0400 Received: from mx1.redhat.com ([209.132.183.28]:36920) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fXZvR-00035a-DI for qemu-devel@nongnu.org; Mon, 25 Jun 2018 18:25:33 -0400 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 9B3B48553C; Mon, 25 Jun 2018 22:25:32 +0000 (UTC) Received: from localhost (ovpn-116-16.gru2.redhat.com [10.97.116.16]) by smtp.corp.redhat.com (Postfix) with ESMTP id 2D07C8BE3B; Mon, 25 Jun 2018 22:25:31 +0000 (UTC) From: Eduardo Habkost To: Peter Maydell , qemu-devel@nongnu.org Date: Mon, 25 Jun 2018 19:25:15 -0300 Message-Id: <20180625222524.382-4-ehabkost@redhat.com> In-Reply-To: <20180625222524.382-1-ehabkost@redhat.com> References: <20180625222524.382-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Mon, 25 Jun 2018 22:25:32 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 03/12] i386: improve sorting of CPU model names X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Daniel P. Berrangé The current list of CPU model names output by "-cpu help" is sorted alphabetically based on the internal QOM class name. The text that is displayed, however, uses the CPU model name, which is equivalent to the QOM class name, minus a suffix. Unfortunately that suffix has an effect on the sort ordering, for example, causing the various Broadwell variants to appear reversed: x86 486 x86 Broadwell-IBRS Intel Core Processor (Broadwell, IBRS) x86 Broadwell-noTSX-IBRS Intel Core Processor (Broadwell, no TSX, IBRS x86 Broadwell-noTSX Intel Core Processor (Broadwell, no TSX) x86 Broadwell Intel Core Processor (Broadwell) x86 Conroe Intel Celeron_4x0 (Conroe/Merom Class Core 2) By sorting on the actual CPU model name text that is displayed, the result is x86 486 x86 Broadwell Intel Core Processor (Broadwell) x86 Broadwell-IBRS Intel Core Processor (Broadwell, IBRS) x86 Broadwell-noTSX Intel Core Processor (Broadwell, no TSX) x86 Broadwell-noTSX-IBRS Intel Core Processor (Broadwell, no TSX, IBRS) x86 Conroe Intel Celeron_4x0 (Conroe/Merom Class Core 2) This requires extra string allocations during sorting, but this is not a concern given the usage scenario and the number of CPU models that exist. Signed-off-by: Daniel P. Berrangé Message-Id: <20180606165527.17365-3-berrange@redhat.com> Signed-off-by: Eduardo Habkost --- target/i386/cpu.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index e1d7157d8c..19ac1e6569 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -3351,15 +3351,19 @@ static gint x86_cpu_list_compare(gconstpointer a, gconstpointer b) ObjectClass *class_b = (ObjectClass *)b; X86CPUClass *cc_a = X86_CPU_CLASS(class_a); X86CPUClass *cc_b = X86_CPU_CLASS(class_b); - const char *name_a, *name_b; + char *name_a, *name_b; + int ret; if (cc_a->ordering != cc_b->ordering) { - return cc_a->ordering - cc_b->ordering; + ret = cc_a->ordering - cc_b->ordering; } else { - name_a = object_class_get_name(class_a); - name_b = object_class_get_name(class_b); - return strcmp(name_a, name_b); + name_a = x86_cpu_class_get_model_name(cc_a); + name_b = x86_cpu_class_get_model_name(cc_b); + ret = strcmp(name_a, name_b); + g_free(name_a); + g_free(name_b); } + return ret; } static GSList *get_sorted_cpu_model_list(void) From patchwork Mon Jun 25 22:25:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 934604 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41F3kP6BX7z9s0W for ; Tue, 26 Jun 2018 08:29:17 +1000 (AEST) Received: from localhost ([::1]:49517 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fXZz1-00042v-Dz for incoming@patchwork.ozlabs.org; Mon, 25 Jun 2018 18:29:15 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54273) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fXZvV-0001jM-9f for qemu-devel@nongnu.org; Mon, 25 Jun 2018 18:25:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fXZvT-00037u-MZ for qemu-devel@nongnu.org; Mon, 25 Jun 2018 18:25:37 -0400 Received: from mx1.redhat.com ([209.132.183.28]:38052) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fXZvT-000372-7a for qemu-devel@nongnu.org; Mon, 25 Jun 2018 18:25:35 -0400 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 7B568C049D5F; Mon, 25 Jun 2018 22:25:34 +0000 (UTC) Received: from localhost (ovpn-116-16.gru2.redhat.com [10.97.116.16]) by smtp.corp.redhat.com (Postfix) with ESMTP id 075258CF81; Mon, 25 Jun 2018 22:25:33 +0000 (UTC) From: Eduardo Habkost To: Peter Maydell , qemu-devel@nongnu.org Date: Mon, 25 Jun 2018 19:25:16 -0300 Message-Id: <20180625222524.382-5-ehabkost@redhat.com> In-Reply-To: <20180625222524.382-1-ehabkost@redhat.com> References: <20180625222524.382-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Mon, 25 Jun 2018 22:25:34 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 04/12] i386: display known CPUID features linewrapped, in alphabetical order X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Daniel P. Berrangé When using '-cpu help' the list of CPUID features is grouped according to the internal low level CPUID grouping. The data printed results in very long lines too. This combines to make it hard for users to read the output and identify if QEMU knows about the feature they wish to use. This change gets rid of the grouping of features and treats all flags as single list. The list is sorted into alphabetical order and the printing with line wrapping at the 77th column. Signed-off-by: Daniel P. Berrangé Message-Id: <20180606165527.17365-4-berrange@redhat.com> Signed-off-by: Eduardo Habkost --- target/i386/cpu.c | 41 +++++++++++++++++++++++++++-------------- 1 file changed, 27 insertions(+), 14 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 19ac1e6569..9da4920421 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -3331,17 +3331,21 @@ static void x86_cpu_class_check_missing_features(X86CPUClass *xcc, /* Print all cpuid feature names in featureset */ -static void listflags(FILE *f, fprintf_function print, const char **featureset) +static void listflags(FILE *f, fprintf_function print, GList *features) { - int bit; - bool first = true; - - for (bit = 0; bit < 32; bit++) { - if (featureset[bit]) { - print(f, "%s%s", first ? "" : " ", featureset[bit]); - first = false; + size_t len = 0; + GList *tmp; + + for (tmp = features; tmp; tmp = tmp->next) { + const char *name = tmp->data; + if ((len + strlen(name) + 1) >= 75) { + print(f, "\n"); + len = 0; } + print(f, "%s%s", len == 0 ? " " : " ", name); + len += strlen(name) + 1; } + print(f, "\n"); } /* Sort alphabetically by type name, respecting X86CPUClass::ordering. */ @@ -3392,26 +3396,35 @@ static void x86_cpu_list_entry(gpointer data, gpointer user_data) /* list available CPU models and flags */ void x86_cpu_list(FILE *f, fprintf_function cpu_fprintf) { - int i; + int i, j; CPUListState s = { .file = f, .cpu_fprintf = cpu_fprintf, }; GSList *list; + GList *names = NULL; (*cpu_fprintf)(f, "Available CPUs:\n"); list = get_sorted_cpu_model_list(); g_slist_foreach(list, x86_cpu_list_entry, &s); g_slist_free(list); - (*cpu_fprintf)(f, "\nRecognized CPUID flags:\n"); + names = NULL; for (i = 0; i < ARRAY_SIZE(feature_word_info); i++) { FeatureWordInfo *fw = &feature_word_info[i]; - - (*cpu_fprintf)(f, " "); - listflags(f, cpu_fprintf, fw->feat_names); - (*cpu_fprintf)(f, "\n"); + for (j = 0; j < 32; j++) { + if (fw->feat_names[j]) { + names = g_list_append(names, (gpointer)fw->feat_names[j]); + } + } } + + names = g_list_sort(names, (GCompareFunc)strcmp); + + (*cpu_fprintf)(f, "\nRecognized CPUID flags:\n"); + listflags(f, cpu_fprintf, names); + (*cpu_fprintf)(f, "\n"); + g_list_free(names); } static void x86_cpu_definition_entry(gpointer data, gpointer user_data) From patchwork Mon Jun 25 22:25:17 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 934607 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41F3p138bvz9ryk for ; Tue, 26 Jun 2018 08:32:25 +1000 (AEST) Received: from localhost ([::1]:49535 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fXa22-0006Xj-Vm for incoming@patchwork.ozlabs.org; Mon, 25 Jun 2018 18:32:23 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54291) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fXZvY-0001m7-Gl for qemu-devel@nongnu.org; Mon, 25 Jun 2018 18:25:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fXZvV-00039B-AB for qemu-devel@nongnu.org; Mon, 25 Jun 2018 18:25:40 -0400 Received: from mx1.redhat.com ([209.132.183.28]:43450) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fXZvV-00038i-35 for qemu-devel@nongnu.org; Mon, 25 Jun 2018 18:25:37 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 52FDC3082A30; Mon, 25 Jun 2018 22:25:36 +0000 (UTC) Received: from localhost (ovpn-116-16.gru2.redhat.com [10.97.116.16]) by smtp.corp.redhat.com (Postfix) with ESMTP id D54484385; Mon, 25 Jun 2018 22:25:35 +0000 (UTC) From: Eduardo Habkost To: Peter Maydell , qemu-devel@nongnu.org Date: Mon, 25 Jun 2018 19:25:17 -0300 Message-Id: <20180625222524.382-6-ehabkost@redhat.com> In-Reply-To: <20180625222524.382-1-ehabkost@redhat.com> References: <20180625222524.382-1-ehabkost@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.45]); Mon, 25 Jun 2018 22:25:36 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 05/12] i386: Remove osxsave CPUID flag name X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" OSXAVE is not a static feature flag: it changes dynamically at runtime depending on CR4, and it was never configurable: KVM never returned OSXSAVE on GET_SUPPORTED_CPUID, and it is not included in TCG_EXT_FEATURES. Remove OSXSAVE from the feature name array so users don't try to configure it manually. Signed-off-by: Eduardo Habkost Message-Id: <20180611203855.13269-1-ehabkost@redhat.com> Reviewed-by: Richard Henderson Signed-off-by: Eduardo Habkost --- target/i386/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 9da4920421..60deae3100 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -788,7 +788,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = { "fma", "cx16", "xtpr", "pdcm", NULL, "pcid", "dca", "sse4.1", "sse4.2", "x2apic", "movbe", "popcnt", - "tsc-deadline", "aes", "xsave", "osxsave", + "tsc-deadline", "aes", "xsave", NULL /* osxsave */, "avx", "f16c", "rdrand", "hypervisor", }, .cpuid_eax = 1, .cpuid_reg = R_ECX, From patchwork Mon Jun 25 22:25:18 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 934601 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41F3gC1Fxyz9ryk for ; Tue, 26 Jun 2018 08:26:31 +1000 (AEST) Received: from localhost ([::1]:49507 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fXZwK-0001pB-Dc for incoming@patchwork.ozlabs.org; Mon, 25 Jun 2018 18:26:28 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54303) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fXZvZ-0001mW-1C for qemu-devel@nongnu.org; Mon, 25 Jun 2018 18:25:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fXZvY-0003BX-33 for qemu-devel@nongnu.org; Mon, 25 Jun 2018 18:25:41 -0400 Received: from mx1.redhat.com ([209.132.183.28]:34732) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fXZvX-0003At-Rf for qemu-devel@nongnu.org; Mon, 25 Jun 2018 18:25:39 -0400 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 14DDE5F732; Mon, 25 Jun 2018 22:25:39 +0000 (UTC) Received: from localhost (ovpn-116-16.gru2.redhat.com [10.97.116.16]) by smtp.corp.redhat.com (Postfix) with ESMTP id 9AD9B7D4F0; Mon, 25 Jun 2018 22:25:37 +0000 (UTC) From: Eduardo Habkost To: Peter Maydell , qemu-devel@nongnu.org Date: Mon, 25 Jun 2018 19:25:18 -0300 Message-Id: <20180625222524.382-7-ehabkost@redhat.com> In-Reply-To: <20180625222524.382-1-ehabkost@redhat.com> References: <20180625222524.382-1-ehabkost@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Mon, 25 Jun 2018 22:25:39 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 06/12] i386: Remove ospke CPUID flag name X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" OSPKE is not a static feature flag: it changes dynamically at runtime depending on CR4, and it was never configurable: KVM never returned OSPKE on GET_SUPPORTED_CPUID, and on TCG enables it automatically if CR4_PKE_MASK is set. Remove OSPKE from the feature name array so users don't try to configure it manually. Signed-off-by: Eduardo Habkost Message-Id: <20180611203712.12086-1-ehabkost@redhat.com> Reviewed-by: Richard Henderson Signed-off-by: Eduardo Habkost --- target/i386/cpu.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 60deae3100..d7dfefcde0 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -738,7 +738,8 @@ static void x86_cpu_vendor_words2str(char *dst, uint32_t vendor1, CPUID_7_0_EBX_HLE, CPUID_7_0_EBX_AVX2, CPUID_7_0_EBX_INVPCID, CPUID_7_0_EBX_RTM, CPUID_7_0_EBX_RDSEED */ -#define TCG_7_0_ECX_FEATURES (CPUID_7_0_ECX_PKU | CPUID_7_0_ECX_OSPKE | \ +#define TCG_7_0_ECX_FEATURES (CPUID_7_0_ECX_PKU | \ + /* CPUID_7_0_ECX_OSPKE is dynamic */ \ CPUID_7_0_ECX_LA57) #define TCG_7_0_EDX_FEATURES 0 #define TCG_APM_FEATURES 0 @@ -955,7 +956,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = { [FEAT_7_0_ECX] = { .feat_names = { NULL, "avx512vbmi", "umip", "pku", - "ospke", NULL, "avx512vbmi2", NULL, + NULL /* ospke */, NULL, "avx512vbmi2", NULL, "gfni", "vaes", "vpclmulqdq", "avx512vnni", "avx512bitalg", NULL, "avx512-vpopcntdq", NULL, "la57", NULL, NULL, NULL, From patchwork Mon Jun 25 22:25:19 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 934606 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41F3nw3mNSz9ryk for ; Tue, 26 Jun 2018 08:32:20 +1000 (AEST) Received: from localhost ([::1]:49532 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fXa1y-0006SI-5j for incoming@patchwork.ozlabs.org; Mon, 25 Jun 2018 18:32:18 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54315) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fXZvb-0001oX-3n for qemu-devel@nongnu.org; Mon, 25 Jun 2018 18:25:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fXZva-0003DJ-1s for qemu-devel@nongnu.org; Mon, 25 Jun 2018 18:25:43 -0400 Received: from mx1.redhat.com ([209.132.183.28]:56592) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fXZvZ-0003Ca-Rg for qemu-devel@nongnu.org; Mon, 25 Jun 2018 18:25:41 -0400 Received: from smtp.corp.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.25]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 0D88C30832D3; Mon, 25 Jun 2018 22:25:41 +0000 (UTC) Received: from localhost (ovpn-116-16.gru2.redhat.com [10.97.116.16]) by smtp.corp.redhat.com (Postfix) with ESMTP id 892F42010D56; Mon, 25 Jun 2018 22:25:40 +0000 (UTC) From: Eduardo Habkost To: Peter Maydell , qemu-devel@nongnu.org Date: Mon, 25 Jun 2018 19:25:19 -0300 Message-Id: <20180625222524.382-8-ehabkost@redhat.com> In-Reply-To: <20180625222524.382-1-ehabkost@redhat.com> References: <20180625222524.382-1-ehabkost@redhat.com> X-Scanned-By: MIMEDefang 2.84 on 10.5.11.25 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.44]); Mon, 25 Jun 2018 22:25:41 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 07/12] i386: define the AMD 'amd-ssbd' CPUID feature bit X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Konrad Rzeszutek Wilk , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Konrad Rzeszutek Wilk AMD future CPUs expose _two_ ways to utilize the Intel equivalant of the Speculative Store Bypass Disable. The first is via the virtualized VIRT_SPEC CTRL MSR (0xC001_011f) and the second is via the SPEC_CTRL MSR (0x48). The document titled: 124441_AMD64_SpeculativeStoreBypassDisable_Whitepaper_final.pdf gives priority of SPEC CTRL MSR over the VIRT SPEC CTRL MSR. A copy of this document is available at https://bugzilla.kernel.org/show_bug.cgi?id=199889 Anyhow, this means that on future AMD CPUs there will be _two_ ways to deal with SSBD. Signed-off-by: Konrad Rzeszutek Wilk Message-Id: <20180601153809.15259-2-konrad.wilk@oracle.com> Signed-off-by: Eduardo Habkost --- target/i386/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index d7dfefcde0..7234bebfcb 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1009,7 +1009,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = { "ibpb", NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, - NULL, "virt-ssbd", NULL, NULL, + "amd-ssbd", "virt-ssbd", NULL, NULL, NULL, NULL, NULL, NULL, }, .cpuid_eax = 0x80000008, From patchwork Mon Jun 25 22:25:20 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 934603 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41F3kL2LNRz9ryk for ; Tue, 26 Jun 2018 08:29:14 +1000 (AEST) Received: from localhost ([::1]:49516 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fXZyx-000419-Sc for incoming@patchwork.ozlabs.org; Mon, 25 Jun 2018 18:29:11 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54326) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fXZvc-0001qU-S0 for qemu-devel@nongnu.org; Mon, 25 Jun 2018 18:25:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fXZvb-0003Et-Q8 for qemu-devel@nongnu.org; Mon, 25 Jun 2018 18:25:44 -0400 Received: from mx1.redhat.com ([209.132.183.28]:42868) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fXZvb-0003EE-Jo for qemu-devel@nongnu.org; Mon, 25 Jun 2018 18:25:43 -0400 Received: from smtp.corp.redhat.com (int-mx11.intmail.prod.int.phx2.redhat.com [10.5.11.26]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id D41008763C; Mon, 25 Jun 2018 22:25:42 +0000 (UTC) Received: from localhost (ovpn-116-16.gru2.redhat.com [10.97.116.16]) by smtp.corp.redhat.com (Postfix) with ESMTP id 6733B30001E5; Mon, 25 Jun 2018 22:25:42 +0000 (UTC) From: Eduardo Habkost To: Peter Maydell , qemu-devel@nongnu.org Date: Mon, 25 Jun 2018 19:25:20 -0300 Message-Id: <20180625222524.382-9-ehabkost@redhat.com> In-Reply-To: <20180625222524.382-1-ehabkost@redhat.com> References: <20180625222524.382-1-ehabkost@redhat.com> X-Scanned-By: MIMEDefang 2.84 on 10.5.11.26 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Mon, 25 Jun 2018 22:25:42 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 08/12] i386: Define AMD's no SSB mitigation needed. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Konrad Rzeszutek Wilk , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Konrad Rzeszutek Wilk AMD future CPUs expose a mechanism to tell the guest that the Speculative Store Bypass Disable is not needed and that the CPU is all good. This is exposed via the CPUID 8000_0008.EBX[26] bit. See 124441_AMD64_SpeculativeStoreBypassDisable_Whitepaper_final.pdf A copy of this document is available at https://bugzilla.kernel.org/show_bug.cgi?id=199889 Signed-off-by: Konrad Rzeszutek Wilk Message-Id: <20180601153809.15259-3-konrad.wilk@oracle.com> Signed-off-by: Eduardo Habkost --- target/i386/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 7234bebfcb..7a4484bb06 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1009,7 +1009,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = { "ibpb", NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, - "amd-ssbd", "virt-ssbd", NULL, NULL, + "amd-ssbd", "virt-ssbd", "amd-no-ssb", NULL, NULL, NULL, NULL, NULL, }, .cpuid_eax = 0x80000008, From patchwork Mon Jun 25 22:25:21 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 934609 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41F3sn37H9z9s0W for ; Tue, 26 Jun 2018 08:35:41 +1000 (AEST) Received: from localhost ([::1]:49549 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fXa5D-0001NE-1p for incoming@patchwork.ozlabs.org; Mon, 25 Jun 2018 18:35:39 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54346) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fXZve-0001rz-Jz for qemu-devel@nongnu.org; Mon, 25 Jun 2018 18:25:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fXZvd-0003GW-Rh for qemu-devel@nongnu.org; Mon, 25 Jun 2018 18:25:46 -0400 Received: from mx1.redhat.com ([209.132.183.28]:44478) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fXZvd-0003Fu-Lc for qemu-devel@nongnu.org; Mon, 25 Jun 2018 18:25:45 -0400 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id E25B481DF0; Mon, 25 Jun 2018 22:25:44 +0000 (UTC) Received: from localhost (ovpn-116-16.gru2.redhat.com [10.97.116.16]) by smtp.corp.redhat.com (Postfix) with ESMTP id 32E2B19EF9; Mon, 25 Jun 2018 22:25:44 +0000 (UTC) From: Eduardo Habkost To: Peter Maydell , qemu-devel@nongnu.org Date: Mon, 25 Jun 2018 19:25:21 -0300 Message-Id: <20180625222524.382-10-ehabkost@redhat.com> In-Reply-To: <20180625222524.382-1-ehabkost@redhat.com> References: <20180625222524.382-1-ehabkost@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Mon, 25 Jun 2018 22:25:44 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 09/12] i386: Allow TOPOEXT to be enabled on older kernels X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Babu Moger , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Babu Moger Enabling TOPOEXT feature might cause compatibility issues if older kernels does not set this feature. Lets set this feature unconditionally. Signed-off-by: Babu Moger Message-Id: <1528939107-17193-2-git-send-email-babu.moger@amd.com> [ehabkost: rewrite comment and commit message] Signed-off-by: Eduardo Habkost --- target/i386/kvm.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/target/i386/kvm.c b/target/i386/kvm.c index 445e0e0b11..2d174f3a91 100644 --- a/target/i386/kvm.c +++ b/target/i386/kvm.c @@ -372,6 +372,13 @@ uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function, if (host_tsx_blacklisted()) { ret &= ~(CPUID_7_0_EBX_RTM | CPUID_7_0_EBX_HLE); } + } else if (function == 0x80000001 && reg == R_ECX) { + /* + * It's safe to enable TOPOEXT even if it's not returned by + * GET_SUPPORTED_CPUID. Unconditionally enabling TOPOEXT here allows + * us to keep CPU models including TOPOEXT runnable on older kernels. + */ + ret |= CPUID_EXT3_TOPOEXT; } else if (function == 0x80000001 && reg == R_EDX) { /* On Intel, kvm returns cpuid according to the Intel spec, * so add missing bits according to the AMD spec: From patchwork Mon Jun 25 22:25:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 934605 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41F3kc3p9lz9ryk for ; Tue, 26 Jun 2018 08:29:28 +1000 (AEST) Received: from localhost ([::1]:49519 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fXZzB-0004Ci-V5 for incoming@patchwork.ozlabs.org; Mon, 25 Jun 2018 18:29:25 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54364) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fXZvh-0001u8-SQ for qemu-devel@nongnu.org; Mon, 25 Jun 2018 18:25:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fXZvf-0003IM-Om for qemu-devel@nongnu.org; Mon, 25 Jun 2018 18:25:49 -0400 Received: from mx1.redhat.com ([209.132.183.28]:47334) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fXZvf-0003Hi-Fp for qemu-devel@nongnu.org; Mon, 25 Jun 2018 18:25:47 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id B1352344515; Mon, 25 Jun 2018 22:25:46 +0000 (UTC) Received: from localhost (ovpn-116-16.gru2.redhat.com [10.97.116.16]) by smtp.corp.redhat.com (Postfix) with ESMTP id 3EB677FD57; Mon, 25 Jun 2018 22:25:46 +0000 (UTC) From: Eduardo Habkost To: Peter Maydell , qemu-devel@nongnu.org Date: Mon, 25 Jun 2018 19:25:22 -0300 Message-Id: <20180625222524.382-11-ehabkost@redhat.com> In-Reply-To: <20180625222524.382-1-ehabkost@redhat.com> References: <20180625222524.382-1-ehabkost@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.29]); Mon, 25 Jun 2018 22:25:46 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 10/12] i386: Fix up the Node id for CPUID_8000_001E X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Babu Moger , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Babu Moger This is part of topoext support. To keep the compatibility, it is better we support all the combination of nr_cores and nr_threads currently supported. By allowing more nr_cores and nr_threads, we might end up with more nodes than we can actually support with the real hardware. We need to fix up the node id to make this work. We can achieve this by shifting the socket_id bits left to address more nodes. Signed-off-by: Babu Moger Message-Id: <1529443919-67509-2-git-send-email-babu.moger@amd.com> Reviewed-by: Eduardo Habkost Signed-off-by: Eduardo Habkost --- target/i386/cpu.c | 26 +++++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 7a4484bb06..130391c840 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -19,6 +19,7 @@ #include "qemu/osdep.h" #include "qemu/cutils.h" +#include "qemu/bitops.h" #include "cpu.h" #include "exec/exec-all.h" @@ -472,6 +473,8 @@ static void encode_topo_cpuid8000001e(CPUState *cs, X86CPU *cpu, uint32_t *ecx, uint32_t *edx) { struct core_topology topo = {0}; + unsigned long nodes; + int shift; build_core_topology(cs->nr_cores, cpu->core_id, &topo); *eax = cpu->apic_id; @@ -504,7 +507,28 @@ static void encode_topo_cpuid8000001e(CPUState *cs, X86CPU *cpu, * 2 Socket id * 1:0 Node id */ - *ecx = ((topo.num_nodes - 1) << 8) | (cpu->socket_id << 2) | topo.node_id; + if (topo.num_nodes <= 4) { + *ecx = ((topo.num_nodes - 1) << 8) | (cpu->socket_id << 2) | + topo.node_id; + } else { + /* + * Node id fix up. Actual hardware supports up to 4 nodes. But with + * more than 32 cores, we may end up with more than 4 nodes. + * Node id is a combination of socket id and node id. Only requirement + * here is that this number should be unique accross the system. + * Shift the socket id to accommodate more nodes. We dont expect both + * socket id and node id to be big number at the same time. This is not + * an ideal config but we need to to support it. Max nodes we can have + * is 32 (255/8) with 8 cores per node and 255 max cores. We only need + * 5 bits for nodes. Find the left most set bit to represent the total + * number of nodes. find_last_bit returns last set bit(0 based). Left + * shift(+1) the socket id to represent all the nodes. + */ + nodes = topo.num_nodes - 1; + shift = find_last_bit(&nodes, 8); + *ecx = ((topo.num_nodes - 1) << 8) | (cpu->socket_id << (shift + 1)) | + topo.node_id; + } *edx = 0; } From patchwork Mon Jun 25 22:25:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 934608 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41F3pK5sWfz9ryk for ; Tue, 26 Jun 2018 08:32:41 +1000 (AEST) Received: from localhost ([::1]:49537 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fXa2J-0006gC-CD for incoming@patchwork.ozlabs.org; Mon, 25 Jun 2018 18:32:39 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54372) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fXZvi-0001uA-Gm for qemu-devel@nongnu.org; Mon, 25 Jun 2018 18:25:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fXZvh-0003Jr-HF for qemu-devel@nongnu.org; Mon, 25 Jun 2018 18:25:50 -0400 Received: from mx1.redhat.com ([209.132.183.28]:56622) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fXZvh-0003JE-9H for qemu-devel@nongnu.org; Mon, 25 Jun 2018 18:25:49 -0400 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 899BA30832E8; Mon, 25 Jun 2018 22:25:48 +0000 (UTC) Received: from localhost (ovpn-116-16.gru2.redhat.com [10.97.116.16]) by smtp.corp.redhat.com (Postfix) with ESMTP id 14B718BE3B; Mon, 25 Jun 2018 22:25:47 +0000 (UTC) From: Eduardo Habkost To: Peter Maydell , qemu-devel@nongnu.org Date: Mon, 25 Jun 2018 19:25:23 -0300 Message-Id: <20180625222524.382-12-ehabkost@redhat.com> In-Reply-To: <20180625222524.382-1-ehabkost@redhat.com> References: <20180625222524.382-1-ehabkost@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.44]); Mon, 25 Jun 2018 22:25:48 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 11/12] i386: Enable TOPOEXT feature on AMD EPYC CPU X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Babu Moger , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Babu Moger Enable TOPOEXT feature on EPYC CPU. This is required to support hyperthreading on VM guests. Also extend xlevel to 0x8000001E. Disable topoext on PC_COMPAT_2_12 and keep xlevel 0x8000000a. Signed-off-by: Babu Moger Message-Id: <1529443919-67509-3-git-send-email-babu.moger@amd.com> [ehabkost: Added EPYC-IBPB.xlevel to PC_COMPAT_2_12] Signed-off-by: Eduardo Habkost --- include/hw/i386/pc.h | 12 ++++++++++++ target/i386/cpu.c | 10 ++++++---- 2 files changed, 18 insertions(+), 4 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index fc8dedca12..316230e570 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -303,6 +303,18 @@ bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); .driver = TYPE_X86_CPU,\ .property = "legacy-cache",\ .value = "on",\ + },{\ + .driver = TYPE_X86_CPU,\ + .property = "topoext",\ + .value = "off",\ + },{\ + .driver = "EPYC-" TYPE_X86_CPU,\ + .property = "xlevel",\ + .value = stringify(0x8000000a),\ + },{\ + .driver = "EPYC-IBPB" TYPE_X86_CPU,\ + .property = "xlevel",\ + .value = stringify(0x8000000a),\ }, #define PC_COMPAT_2_11 \ diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 130391c840..d6ed29b484 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -2579,7 +2579,8 @@ static X86CPUDefinition builtin_x86_defs[] = { .features[FEAT_8000_0001_ECX] = CPUID_EXT3_OSVW | CPUID_EXT3_3DNOWPREFETCH | CPUID_EXT3_MISALIGNSSE | CPUID_EXT3_SSE4A | CPUID_EXT3_ABM | - CPUID_EXT3_CR8LEG | CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM, + CPUID_EXT3_CR8LEG | CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM | + CPUID_EXT3_TOPOEXT, .features[FEAT_7_0_EBX] = CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_RDSEED | @@ -2594,7 +2595,7 @@ static X86CPUDefinition builtin_x86_defs[] = { CPUID_XSAVE_XGETBV1, .features[FEAT_6_EAX] = CPUID_6_EAX_ARAT, - .xlevel = 0x8000000A, + .xlevel = 0x8000001E, .model_id = "AMD EPYC Processor", .cache_info = &epyc_cache_info, }, @@ -2624,7 +2625,8 @@ static X86CPUDefinition builtin_x86_defs[] = { .features[FEAT_8000_0001_ECX] = CPUID_EXT3_OSVW | CPUID_EXT3_3DNOWPREFETCH | CPUID_EXT3_MISALIGNSSE | CPUID_EXT3_SSE4A | CPUID_EXT3_ABM | - CPUID_EXT3_CR8LEG | CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM, + CPUID_EXT3_CR8LEG | CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM | + CPUID_EXT3_TOPOEXT, .features[FEAT_8000_0008_EBX] = CPUID_8000_0008_EBX_IBPB, .features[FEAT_7_0_EBX] = @@ -2641,7 +2643,7 @@ static X86CPUDefinition builtin_x86_defs[] = { CPUID_XSAVE_XGETBV1, .features[FEAT_6_EAX] = CPUID_6_EAX_ARAT, - .xlevel = 0x8000000A, + .xlevel = 0x8000001E, .model_id = "AMD EPYC Processor (with IBPB)", .cache_info = &epyc_cache_info, }, From patchwork Mon Jun 25 22:25:24 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 934610 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41F3t43PrWz9ryk for ; Tue, 26 Jun 2018 08:35:56 +1000 (AEST) Received: from localhost ([::1]:49553 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fXa5S-0001a8-0f for incoming@patchwork.ozlabs.org; Mon, 25 Jun 2018 18:35:54 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54385) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fXZvk-0001vv-8a for qemu-devel@nongnu.org; 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Mon, 25 Jun 2018 22:25:50 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 12/12] i386: Remove generic SMT thread check X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Babu Moger , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Babu Moger Remove generic non-intel check while validating hyperthreading support. Certain AMD CPUs can support hyperthreading now. CPU family with TOPOEXT feature can support hyperthreading now. Signed-off-by: Babu Moger Tested-by: Geoffrey McRae Reviewed-by: Eduardo Habkost Message-Id: <1529443919-67509-4-git-send-email-babu.moger@amd.com> Signed-off-by: Eduardo Habkost --- target/i386/cpu.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index d6ed29b484..e6c2f8a22a 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -4985,17 +4985,22 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp) qemu_init_vcpu(cs); - /* Only Intel CPUs support hyperthreading. Even though QEMU fixes this - * issue by adjusting CPUID_0000_0001_EBX and CPUID_8000_0008_ECX - * based on inputs (sockets,cores,threads), it is still better to gives + /* + * Most Intel and certain AMD CPUs support hyperthreading. Even though QEMU + * fixes this issue by adjusting CPUID_0000_0001_EBX and CPUID_8000_0008_ECX + * based on inputs (sockets,cores,threads), it is still better to give * users a warning. * * NOTE: the following code has to follow qemu_init_vcpu(). Otherwise * cs->nr_threads hasn't be populated yet and the checking is incorrect. */ - if (!IS_INTEL_CPU(env) && cs->nr_threads > 1 && !ht_warned) { - error_report("AMD CPU doesn't support hyperthreading. Please configure" - " -smp options properly."); + if (IS_AMD_CPU(env) && + !(env->features[FEAT_8000_0001_ECX] & CPUID_EXT3_TOPOEXT) && + cs->nr_threads > 1 && !ht_warned) { + error_report("This family of AMD CPU doesn't support " + "hyperthreading(%d). Please configure -smp " + "options properly or try enabling topoext feature.", + cs->nr_threads); ht_warned = true; }