From patchwork Tue Jun 19 11:00:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 931538 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="WfaaAVbh"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 4194pr2bZ1z9s5c for ; Tue, 19 Jun 2018 21:04:20 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966168AbeFSLD6 (ORCPT ); Tue, 19 Jun 2018 07:03:58 -0400 Received: from mail-lf0-f68.google.com ([209.85.215.68]:41922 "EHLO mail-lf0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S937604AbeFSLCz (ORCPT ); Tue, 19 Jun 2018 07:02:55 -0400 Received: by mail-lf0-f68.google.com with SMTP id d24-v6so29457253lfa.8; Tue, 19 Jun 2018 04:02:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=pxYh6jL+znz1tCJ55OEGuSWPrbXHvzMiPRmuAWLzAkY=; b=WfaaAVbhi2CarT8csJGBY7fBF7hlyoylTJ8LRv0bZu4GH3OoHCeEY4cqtiU9DZZTnr 3ArE/Y6Qrxfs6db0N3e+xOX2OJhX48Mpl2KohXlewS8+MYYPxpfXtcmb+4Mn0J59wDUM C4pb6h4QMVyzH38rre/9gG/absThvjtoqflWiRvwJ1DEJBRvI0UNRrOO8jYShjkWGYF+ gx0/jxvosNDZ0EhlrlXDT52gRhqlyfbdgSXtYQSkL8AdH1sC4q2GubzJ7Fs4lFBlNGoh 1G8+XSFRoGffU8JiddFqy6CbP35CkXmMGRoCEqPMH15fHLr8iCbfWwg7uwaBy/G25C4F 1kdg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=pxYh6jL+znz1tCJ55OEGuSWPrbXHvzMiPRmuAWLzAkY=; b=ssTRs7HQYBSf/aHpG4T5pEuUEkd4HMHSs0mpslW9/j6nQDuV6jPY0XJY97N4iqZguw 65irU/O64l0eQ5wqrgomQKrO0vEGfUvoTIAMqyGC7bI720Qxa1mn3wuvbFsu74BQvdlo FuHFcsLHet9ldLxv9gSaPA3sYTFaK6g8ux0mo8B18/sxuk2XJ3ECItcR9f4p75b24qvU Hyy3ZW7S25rblOnBKxr8JJOK8w+KedD/AN8Mw3JGTwQx7AgFSSRsgEjBGrSvaDmWAFF9 lPFwkZ14B8Am9DLnb80NJNxyaVpfWdaLQSZUoRvKRsBwF5ftXFTVArNLy9hT8ohJreYq cZcA== X-Gm-Message-State: APt69E3ZoFH3UdZe0fi897anRWg55Vpow5Mxnlto0BlBD2Lj33oLDyIg R1y+6/43/CJpZc2UxYjymEI= X-Google-Smtp-Source: ADUXVKIH/Awg/Kf9LnqnGaLnUbGEG9buBEQ67FdmkKQ92QiCmn7D4hC9XtN8lXagiU+Uoh9ISaJVhw== X-Received: by 2002:a2e:82ce:: with SMTP id n14-v6mr10498493ljh.34.1529406173603; Tue, 19 Jun 2018 04:02:53 -0700 (PDT) Received: from localhost.localdomain (109-252-91-84.nat.spd-mgts.ru. [109.252.91.84]) by smtp.gmail.com with ESMTPSA id m84-v6sm3118543lje.91.2018.06.19.04.02.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 19 Jun 2018 04:02:53 -0700 (PDT) From: Dmitry Osipenko To: Russell King , Thierry Reding , Jonathan Hunter Cc: linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Peter Geis , =?utf-8?b?TWljaGHFgiBNaXJvc8WCYXc=?= Subject: [PATCH v2 1/5] ARM: trusted_foundations: Implement L2 cache initialization callback Date: Tue, 19 Jun 2018 14:00:23 +0300 Message-Id: <20180619110027.16935-2-digetx@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180619110027.16935-1-digetx@gmail.com> References: <20180619110027.16935-1-digetx@gmail.com> Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Implement L2 cache initialization firmware callback that should be invoked early in boot to enable cache HW. Signed-off-by: Dmitry Osipenko --- arch/arm/firmware/trusted_foundations.c | 27 +++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm/firmware/trusted_foundations.c b/arch/arm/firmware/trusted_foundations.c index 3fb1b5a1dce9..30df6547020f 100644 --- a/arch/arm/firmware/trusted_foundations.c +++ b/arch/arm/firmware/trusted_foundations.c @@ -18,8 +18,13 @@ #include #include #include +#include #include +#define TF_CACHE_MAINT 0xfffff100 + +#define TF_CACHE_INIT 1 + #define TF_SET_CPU_BOOT_ADDR_SMC 0xfffff200 #define TF_CPU_PM 0xfffffffc @@ -63,9 +68,31 @@ static int tf_prepare_idle(void) return 0; } +#ifdef CONFIG_CACHE_L2X0 +static void tf_cache_write_sec(unsigned long val, unsigned int reg) +{ + /* + * The L2X0 cache driver shouldn't invoke a write to a secure registers, + * though it's better to reinsure by printing a warning message. + */ + pr_warn("%s: Ignoring write [0x%x]: 0x%08lx\n", __func__, reg, val); +} + +static int tf_init_cache(void) +{ + outer_cache.write_sec = tf_cache_write_sec; + tf_generic_smc(TF_CACHE_MAINT, TF_CACHE_INIT, 0); + + return 0; +} +#endif /* CONFIG_CACHE_L2X0 */ + static const struct firmware_ops trusted_foundations_ops = { .set_cpu_boot_addr = tf_set_cpu_boot_addr, .prepare_idle = tf_prepare_idle, +#ifdef CONFIG_CACHE_L2X0 + .l2x0_init = tf_init_cache, +#endif }; void register_trusted_foundations(struct trusted_foundations_platform_data *pd) From patchwork Tue Jun 19 11:00:24 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 931536 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="NEfIu4KZ"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 4194p31MxWz9s5c for ; Tue, 19 Jun 2018 21:03:39 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S937684AbeFSLC6 (ORCPT ); Tue, 19 Jun 2018 07:02:58 -0400 Received: from mail-lf0-f66.google.com ([209.85.215.66]:33797 "EHLO mail-lf0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S937664AbeFSLC4 (ORCPT ); Tue, 19 Jun 2018 07:02:56 -0400 Received: by mail-lf0-f66.google.com with SMTP id v84-v6so6292194lfa.1; Tue, 19 Jun 2018 04:02:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=dVJytHozbSHzujAtq9KrPjw+U5xn8yv4LHlVSEw8WUs=; b=NEfIu4KZ6f8HbyPF1sIHbqRb9cd16iAwpBUL0thIjRNIYcHZHIpbG93vjJrfnraEae le2mVMUlxRgPvrVqt8RdjkrO8HEkzmdh4QyhLsdkJcAUcUhGIBwItF43sxkoUyZFXUHz vYjZlimYSoeSmnA/QG0AIK4OyPK3UT4/uC2oHbHozj5X7BP8kO33AG92EqB51x5lgco2 kcsmBxJD+6rLPihHsbD5Y9zWIcSb9BwKW6vlgv/4e4wsNko6D2eXM9Qnv9MFaXWsyCXU upUyf1Uf7GM5wpqFO3xu/wurMQA9NC7MSM7B1tT04Jruq49ovgbzgrlHiNJZzZRVhBRs PpGA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=dVJytHozbSHzujAtq9KrPjw+U5xn8yv4LHlVSEw8WUs=; b=LijIBjNm10DnpLkzVdSLIiq2eXytdRmcEVWxISn8Qm9xe6oH2aRx1uHPbl3bucL68d BeLQzHHzBsUfQnfDYtW9dm0W2Shwckav9QyfbiQkhNqPBZsf7JA2ctI363bOR6cUcZR2 PW0ripRNm1BunlL23yfGMgJGTd692vOq640931AbFVyU+43qePky+ViAxyczXKQKXBWL Q0otM96Of0mpkXQKhyesWND+qHYjHrltNdnCEgz7FRyZhT02iElrfQR585eoFAb7sAEx UERsOegcJzGpmscoNZXmTAt9wjfK43KZpP4wh5rZtkoOtC70GRPUAO/RjrZ54HTy5EMJ bcdg== X-Gm-Message-State: APt69E2CFbeQKeCJvl/C1YqO4YIsbmPXGped3CxkrBJBYOWbkei46ZLV 9j4y48GcAOrnZbGsIEcJmHA= X-Google-Smtp-Source: ADUXVKJWUQvj1kXFOLMz1V3ErEK+2/TCxVKgeB3HVxq0p9Ze4bQveabZAlGxg43Qg98XXRJK3w7gKQ== X-Received: by 2002:a2e:6d11:: with SMTP id i17-v6mr1744800ljc.116.1529406174585; Tue, 19 Jun 2018 04:02:54 -0700 (PDT) Received: from localhost.localdomain (109-252-91-84.nat.spd-mgts.ru. [109.252.91.84]) by smtp.gmail.com with ESMTPSA id m84-v6sm3118543lje.91.2018.06.19.04.02.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 19 Jun 2018 04:02:54 -0700 (PDT) From: Dmitry Osipenko To: Russell King , Thierry Reding , Jonathan Hunter Cc: linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Peter Geis , =?utf-8?b?TWljaGHFgiBNaXJvc8WCYXc=?= Subject: [PATCH v2 2/5] ARM: trusted_foundations: Provide information about whether firmware is registered Date: Tue, 19 Jun 2018 14:00:24 +0300 Message-Id: <20180619110027.16935-3-digetx@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180619110027.16935-1-digetx@gmail.com> References: <20180619110027.16935-1-digetx@gmail.com> Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Add a helper that provides information about whether Trusted Foundations firmware operations have been registered. Signed-off-by: Dmitry Osipenko --- arch/arm/firmware/trusted_foundations.c | 5 +++++ arch/arm/include/asm/trusted_foundations.h | 7 +++++++ 2 files changed, 12 insertions(+) diff --git a/arch/arm/firmware/trusted_foundations.c b/arch/arm/firmware/trusted_foundations.c index 30df6547020f..f6eeb67de217 100644 --- a/arch/arm/firmware/trusted_foundations.c +++ b/arch/arm/firmware/trusted_foundations.c @@ -124,3 +124,8 @@ void of_register_trusted_foundations(void) panic("Trusted Foundation: missing version-minor property\n"); register_trusted_foundations(&pdata); } + +bool trusted_foundations_registered(void) +{ + return firmware_ops == &trusted_foundations_ops; +} diff --git a/arch/arm/include/asm/trusted_foundations.h b/arch/arm/include/asm/trusted_foundations.h index 00748350cf72..bfd0d780824b 100644 --- a/arch/arm/include/asm/trusted_foundations.h +++ b/arch/arm/include/asm/trusted_foundations.h @@ -31,6 +31,7 @@ #include #include #include +#include struct trusted_foundations_platform_data { unsigned int version_major; @@ -41,6 +42,7 @@ struct trusted_foundations_platform_data { void register_trusted_foundations(struct trusted_foundations_platform_data *pd); void of_register_trusted_foundations(void); +bool trusted_foundations_registered(void); #else /* CONFIG_TRUSTED_FOUNDATIONS */ @@ -68,6 +70,11 @@ static inline void of_register_trusted_foundations(void) if (of_find_compatible_node(NULL, NULL, "tlm,trusted-foundations")) register_trusted_foundations(NULL); } + +static inline bool trusted_foundations_registered(void) +{ + return false; +} #endif /* CONFIG_TRUSTED_FOUNDATIONS */ #endif From patchwork Tue Jun 19 11:00:25 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 931537 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="bGZCcgI4"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 4194p408kDz9s7F for ; Tue, 19 Jun 2018 21:03:40 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966165AbeFSLDi (ORCPT ); Tue, 19 Jun 2018 07:03:38 -0400 Received: from mail-lf0-f65.google.com ([209.85.215.65]:33094 "EHLO mail-lf0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S937680AbeFSLC5 (ORCPT ); Tue, 19 Jun 2018 07:02:57 -0400 Received: by mail-lf0-f65.google.com with SMTP id y20-v6so29488700lfy.0; Tue, 19 Jun 2018 04:02:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=wqBEXI/eK4btprn1ZlQif0SZPhK1vXHNPfXfXMAW+ao=; b=bGZCcgI4+1VgH+bDj4+Uvgk7Jrd+GlhFutSLaaaZPi13V/SmSw4QKP22h4nkTuWxMu k/DCRpReuRpTbOhwsuS5pIs0hQoyIUJjTxMj7WxAZhrXnj23N3c1gz8IE8wZjDayJiQM YKrrbQwYPO59hTWzuWbgAYcfk1huVnzzylqniaG98gGw436BU6EUibjG63UVAWCT29eF mv5SqJrgu1zculeFBpOcAFvKnd7Z8R9MA0co1vxhPWJ6VwJAZMbAPcOQ45mWBlDR71xz 68dvT//1MgzqBmOxFFAFySY2KEJr4tY2EQurZJ89+zsHb3MKH78eg7u4zj1o4Ml15Kqm yubg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=wqBEXI/eK4btprn1ZlQif0SZPhK1vXHNPfXfXMAW+ao=; b=jME/Bipvz1QrXx6b9TfwUEV1BTWt2iiMKeKHo4Uhub2TW0hUdlW7eiAbdwE4U2rY5Z iy/CFFaPaqOxfNXYHxNYnjUDpf1fFBNVpwxKoY/0GpDzeiIHiRalZrNHye6ndCzYUKdf vG46xLX1hJwvmbXusMRRg18FCdJVJRdnScJGl6pSqoqkyMHXoHzgtghTfVZ6W1v3+W5V alhABrq9cQsbhXt0oKwelMDBxonxm6OpmAVPyJsT12wAWSvLh4nExdolGfzEaB7hhhqA /MQ7vTg9a6vjgLFuL75YqhayNCvYZGTf446+ZRifaZ+HtUoh3Ock4axfC/KBUJ25AYqk zBBg== X-Gm-Message-State: APt69E09XPn9lM0I5vtCOfJrruRr8HL+uU3I02PI0Wc/1ahRmL6oeHGW GlkI8Ph92hRt/PdL2w2P2O0aONTU X-Google-Smtp-Source: ADUXVKI/58IcEpOy2WiHYyrAaOPIaSlyubEKECO1ziSC6IIviV4QmXB5dW3st3TJdQd+H2h6EnNokA== X-Received: by 2002:a2e:4942:: with SMTP id b2-v6mr11191138ljd.138.1529406175535; Tue, 19 Jun 2018 04:02:55 -0700 (PDT) Received: from localhost.localdomain (109-252-91-84.nat.spd-mgts.ru. [109.252.91.84]) by smtp.gmail.com with ESMTPSA id m84-v6sm3118543lje.91.2018.06.19.04.02.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 19 Jun 2018 04:02:55 -0700 (PDT) From: Dmitry Osipenko To: Russell King , Thierry Reding , Jonathan Hunter Cc: linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Peter Geis , =?utf-8?b?TWljaGHFgiBNaXJvc8WCYXc=?= Subject: [PATCH v2 3/5] ARM: tegra: Setup L2 cache using Trusted Foundations firmware Date: Tue, 19 Jun 2018 14:00:25 +0300 Message-Id: <20180619110027.16935-4-digetx@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180619110027.16935-1-digetx@gmail.com> References: <20180619110027.16935-1-digetx@gmail.com> Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org On Tegra20/30 L2 cache must be initialized using firmware call if CPU is running in insecure mode. Initialize L2 cache and setup the outer-cache callbacks in early boot using the firmware API. Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/tegra.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/mach-tegra/tegra.c b/arch/arm/mach-tegra/tegra.c index f9587be48235..590b1cf1a8c4 100644 --- a/arch/arm/mach-tegra/tegra.c +++ b/arch/arm/mach-tegra/tegra.c @@ -38,6 +38,7 @@ #include #include +#include #include #include #include @@ -70,9 +71,23 @@ u32 tegra_uart_config[3] = { 0, }; +static void __init tegra_trusted_foundations_l2x0_cache_init(void) +{ + if (IS_ENABLED(CONFIG_CACHE_L2X0) && + IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC) && + of_machine_is_compatible("nvidia,tegra20")) + call_firmware_op(l2x0_init); + + if (IS_ENABLED(CONFIG_CACHE_L2X0) && + IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC) && + of_machine_is_compatible("nvidia,tegra30")) + call_firmware_op(l2x0_init); +} + static void __init tegra_init_early(void) { of_register_trusted_foundations(); + tegra_trusted_foundations_l2x0_cache_init(); tegra_cpu_reset_handler_init(); } From patchwork Tue Jun 19 11:00:26 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 931535 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Z0YP3ppR"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 4194p036GWz9s5c for ; Tue, 19 Jun 2018 21:03:36 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966079AbeFSLDY (ORCPT ); Tue, 19 Jun 2018 07:03:24 -0400 Received: from mail-lf0-f66.google.com ([209.85.215.66]:46903 "EHLO mail-lf0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S937591AbeFSLC6 (ORCPT ); Tue, 19 Jun 2018 07:02:58 -0400 Received: by mail-lf0-f66.google.com with SMTP id u5-v6so8218826lff.13; Tue, 19 Jun 2018 04:02:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=k4qnPvHb0NZBUOnlNBHbpGIEhOz4uE+W521CnV0Z9Do=; b=Z0YP3ppR+QzZPWzy5c5RKy04UpBf35VQ94q4bSVSvlE9NmI3UX3TrySAVNmPVOpCSR R3bnsql0QawcAmsJYB4zzH05NB45sk2I8XaNvBVZXiZOMiyTre5miTaHX6jWBl6E7DEY 1Mk8Ig+kGY/U5o8wRSC/tPNeTF+h05hOE6/7MQRYGyQWIqZYfDpcEJF/6QgH1k6dGqnP rEh18x2f4x5g90ERwgBU7751zZm/TXbv1TaDvvAv9ntIzkHeBogNAGXVvIO7WNxX7XfO b6PhaPZ846gtQSmUKfsEJx0NdWarwTTXfj32SFI7IHsGm6Sjph9RDREkLwjuv69e2zKZ tFvQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=k4qnPvHb0NZBUOnlNBHbpGIEhOz4uE+W521CnV0Z9Do=; b=prJ+cFB3cnji2YHNzjXOVEUXBDdtwHi3+AKwmpSYL+z965ojdsxe/a/lgq+yNFpRya IY9Gz1dOYbMit6gKxx9n32eIWD5GuD6wB8ifCvhXiBCE9k8RUfiYXCDskkZAmCdCx9Mt bPQvpEsjtZ6ZYdrNfdNFPBORECe6Ov6oUBcJjn3UU223Pna+crzN0JaPOyVs79UEcrES gx27cBN1dCRV7llT0IElaOT5Y5rWrCcsKL+mN9Mw+Zcq4mzAvubMZFA6wNVdJVlk1U+Q eUsV4vDGlYkwQk25v8wwzOz9iiqf0AB33mJiIFz2zuaJySbvqs20CsPUXiW5rmjDwTOJ 1bTQ== X-Gm-Message-State: APt69E1gen1cZ0UozLNUPTlbDOJrA4ZCfYhFXgxjEBpAs+xPOL0dZCU2 qXLZUxsCzkLT8JrQuQPy1NI= X-Google-Smtp-Source: ADUXVKJjXdcv4E4BlNSs7BRgvpM6WQB25/mKKdyhKDHNeFpq5CNHrg/xJX1CE3crH8bjx/nbm+oQow== X-Received: by 2002:a19:9a8d:: with SMTP id c135-v6mr6072300lfe.140.1529406176489; Tue, 19 Jun 2018 04:02:56 -0700 (PDT) Received: from localhost.localdomain (109-252-91-84.nat.spd-mgts.ru. [109.252.91.84]) by smtp.gmail.com with ESMTPSA id m84-v6sm3118543lje.91.2018.06.19.04.02.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 19 Jun 2018 04:02:55 -0700 (PDT) From: Dmitry Osipenko To: Russell King , Thierry Reding , Jonathan Hunter Cc: linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Peter Geis , =?utf-8?b?TWljaGHFgiBNaXJvc8WCYXc=?= Subject: [PATCH v2 4/5] ARM: tegra: Don't apply CPU erratas in insecure mode Date: Tue, 19 Jun 2018 14:00:26 +0300 Message-Id: <20180619110027.16935-5-digetx@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180619110027.16935-1-digetx@gmail.com> References: <20180619110027.16935-1-digetx@gmail.com> Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org CPU isn't allowed to touch secure registers while running under secure monitor. Hence skip applying CPU erratas in the reset handler if Trusted Foundations firmware presents. Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/reset-handler.S | 24 ++++++++++++------------ arch/arm/mach-tegra/reset.c | 3 +++ arch/arm/mach-tegra/reset.h | 9 +++++++-- arch/arm/mach-tegra/sleep-tegra20.S | 4 ++++ 4 files changed, 26 insertions(+), 14 deletions(-) diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S index 805f306fa6f7..e9f2a7775998 100644 --- a/arch/arm/mach-tegra/reset-handler.S +++ b/arch/arm/mach-tegra/reset-handler.S @@ -29,8 +29,6 @@ #define PMC_SCRATCH41 0x140 -#define RESET_DATA(x) ((TEGRA_RESET_##x)*4) - #ifdef CONFIG_PM_SLEEP /* * tegra_resume @@ -121,6 +119,12 @@ ENTRY(__tegra_cpu_reset_handler) cpsid aif, 0x13 @ SVC mode, interrupts disabled tegra_get_soc_id TEGRA_APB_MISC_BASE, r6 + + adr r12, __tegra_cpu_reset_handler_data + ldr r0, [r12, #RESET_DATA(TF_PRESENT)] + cmp r0, #0 + bne after_errata + #ifdef CONFIG_ARCH_TEGRA_2x_SOC t20_check: cmp r6, #TEGRA20 @@ -155,7 +159,6 @@ after_errata: and r10, r10, #0x3 @ R10 = CPU number mov r11, #1 mov r11, r11, lsl r10 @ R11 = CPU mask - adr r12, __tegra_cpu_reset_handler_data #ifdef CONFIG_SMP /* Does the OS know about this CPU? */ @@ -169,10 +172,9 @@ after_errata: cmp r6, #TEGRA20 bne 1f /* If not CPU0, don't let CPU0 reset CPU1 now that CPU1 is coming up. */ - mov32 r5, TEGRA_IRAM_BASE + TEGRA_IRAM_RESET_HANDLER_OFFSET mov r0, #CPU_NOT_RESETTABLE cmp r10, #0 - strneb r0, [r5, #__tegra20_cpu1_resettable_status_offset] + strneb r0, [r12, #RESET_DATA(RESETTABLE_STATUS)] 1: #endif @@ -277,14 +279,12 @@ ENDPROC(__tegra_cpu_reset_handler) .align L1_CACHE_SHIFT .type __tegra_cpu_reset_handler_data, %object .globl __tegra_cpu_reset_handler_data + .globl __tegra_cpu_reset_handler_data_offset + .equ __tegra_cpu_reset_handler_data_offset, \ + . - __tegra_cpu_reset_handler_start __tegra_cpu_reset_handler_data: - .rept TEGRA_RESET_DATA_SIZE - .long 0 + .rept TEGRA_RESET_DATA_SIZE + .long 0 .endr - .globl __tegra20_cpu1_resettable_status_offset - .equ __tegra20_cpu1_resettable_status_offset, \ - . - __tegra_cpu_reset_handler_start - .byte 0 .align L1_CACHE_SHIFT - ENTRY(__tegra_cpu_reset_handler_end) diff --git a/arch/arm/mach-tegra/reset.c b/arch/arm/mach-tegra/reset.c index dc558892753c..b02ae7699842 100644 --- a/arch/arm/mach-tegra/reset.c +++ b/arch/arm/mach-tegra/reset.c @@ -24,6 +24,7 @@ #include #include #include +#include #include "iomap.h" #include "irammap.h" @@ -89,6 +90,8 @@ static void __init tegra_cpu_reset_handler_enable(void) void __init tegra_cpu_reset_handler_init(void) { + __tegra_cpu_reset_handler_data[TEGRA_RESET_TF_PRESENT] = + trusted_foundations_registered(); #ifdef CONFIG_SMP __tegra_cpu_reset_handler_data[TEGRA_RESET_MASK_PRESENT] = diff --git a/arch/arm/mach-tegra/reset.h b/arch/arm/mach-tegra/reset.h index 9c479c7925b8..db0e6b3097ab 100644 --- a/arch/arm/mach-tegra/reset.h +++ b/arch/arm/mach-tegra/reset.h @@ -25,7 +25,11 @@ #define TEGRA_RESET_STARTUP_SECONDARY 3 #define TEGRA_RESET_STARTUP_LP2 4 #define TEGRA_RESET_STARTUP_LP1 5 -#define TEGRA_RESET_DATA_SIZE 6 +#define TEGRA_RESET_RESETTABLE_STATUS 6 +#define TEGRA_RESET_TF_PRESENT 7 +#define TEGRA_RESET_DATA_SIZE 8 + +#define RESET_DATA(x) ((TEGRA_RESET_##x)*4) #ifndef __ASSEMBLY__ @@ -49,7 +53,8 @@ void __tegra_cpu_reset_handler_end(void); (u32)__tegra_cpu_reset_handler_start))) #define tegra20_cpu1_resettable_status \ (IO_ADDRESS(TEGRA_IRAM_BASE + TEGRA_IRAM_RESET_HANDLER_OFFSET + \ - (u32)__tegra20_cpu1_resettable_status_offset)) + ((u32)&__tegra_cpu_reset_handler_data[TEGRA_RESET_RESETTABLE_STATUS] - \ + (u32)__tegra_cpu_reset_handler_start))) #endif #define tegra_cpu_reset_handler_offset \ diff --git a/arch/arm/mach-tegra/sleep-tegra20.S b/arch/arm/mach-tegra/sleep-tegra20.S index 5c8e638ee51a..11f423e4a263 100644 --- a/arch/arm/mach-tegra/sleep-tegra20.S +++ b/arch/arm/mach-tegra/sleep-tegra20.S @@ -28,6 +28,7 @@ #include #include "irammap.h" +#include "reset.h" #include "sleep.h" #define EMC_CFG 0xc @@ -54,6 +55,9 @@ #define APB_MISC_XM2CFGCPADCTRL2 0x8e4 #define APB_MISC_XM2CFGDPADCTRL2 0x8e8 +#define __tegra20_cpu1_resettable_status_offset \ + (__tegra_cpu_reset_handler_data_offset + RESET_DATA(RESETTABLE_STATUS)) + .macro pll_enable, rd, r_car_base, pll_base ldr \rd, [\r_car_base, #\pll_base] tst \rd, #(1 << 30) From patchwork Tue Jun 19 11:00:27 2018 Content-Type: text/plain; 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[109.252.91.84]) by smtp.gmail.com with ESMTPSA id m84-v6sm3118543lje.91.2018.06.19.04.02.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 19 Jun 2018 04:02:57 -0700 (PDT) From: Dmitry Osipenko To: Russell King , Thierry Reding , Jonathan Hunter Cc: linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Peter Geis , =?utf-8?b?TWljaGHFgiBNaXJvc8WCYXc=?= Subject: [PATCH v2 5/5] ARM: tegra: Always boot CPU in ARM-mode Date: Tue, 19 Jun 2018 14:00:27 +0300 Message-Id: <20180619110027.16935-6-digetx@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180619110027.16935-1-digetx@gmail.com> References: <20180619110027.16935-1-digetx@gmail.com> Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org CPU always jumps into the reset handler in ARM-mode from the Trusted Foundations firmware, hence make CPU to always jump into kernel in ARM-mode regardless of the firmware presence to support Thumb2 kernel + TF case. Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/reset-handler.S | 1 + arch/arm/mach-tegra/reset.c | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S index e9f2a7775998..8eda5c786f50 100644 --- a/arch/arm/mach-tegra/reset-handler.S +++ b/arch/arm/mach-tegra/reset-handler.S @@ -113,6 +113,7 @@ ENTRY(__tegra_cpu_reset_handler_start) * must be position-independent. */ + .arm .align L1_CACHE_SHIFT ENTRY(__tegra_cpu_reset_handler) diff --git a/arch/arm/mach-tegra/reset.c b/arch/arm/mach-tegra/reset.c index b02ae7699842..3f1ef4561298 100644 --- a/arch/arm/mach-tegra/reset.c +++ b/arch/arm/mach-tegra/reset.c @@ -97,7 +97,7 @@ void __init tegra_cpu_reset_handler_init(void) __tegra_cpu_reset_handler_data[TEGRA_RESET_MASK_PRESENT] = *((u32 *)cpu_possible_mask); __tegra_cpu_reset_handler_data[TEGRA_RESET_STARTUP_SECONDARY] = - __pa_symbol((void *)secondary_startup); + __pa_symbol((void *)secondary_startup_arm); #endif #ifdef CONFIG_PM_SLEEP