From patchwork Wed Jun 13 11:32:28 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baolin Wang X-Patchwork-Id: 928830 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="ToGNKbzt"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 415Pkv5d4mz9s3C for ; Wed, 13 Jun 2018 21:33:11 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935377AbeFMLdJ (ORCPT ); Wed, 13 Jun 2018 07:33:09 -0400 Received: from mail-pg0-f66.google.com ([74.125.83.66]:43319 "EHLO mail-pg0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S935188AbeFMLdG (ORCPT ); Wed, 13 Jun 2018 07:33:06 -0400 Received: by mail-pg0-f66.google.com with SMTP id a14-v6so1139031pgw.10 for ; Wed, 13 Jun 2018 04:33:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=TC4aJIvxEIYrPXern0Rc+4UcSzw/M0o3C1R8YeUHl08=; b=ToGNKbztYKVJuwQfH3NUqwqVSrmWcnJ/V/Lu4lK7tWqUNX0Ycw/fAs4RHZGWn/a6IK NBUwVLSfREgo24d7Kn4dkfX7QlrCb3BAslDCMPbG27P6hndw9NhkdWTqYHhkCMzShVE9 suhwXXANECmrptzVgSivQlR5hb872yGcKAYFs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=TC4aJIvxEIYrPXern0Rc+4UcSzw/M0o3C1R8YeUHl08=; b=US1Sirzon3EY5pq6cGlIq2T0vKbsG7NJqBDQx0vJmRR+Wtbnu6Rn6tIzfyvRhdj0lR vPNQjctW3ym6ov2aoTbRwIfw6ISJglBip2UKXBV9eSZw/g32k8Xv3tmbP1n7hqf1Y8XT UArg312bEAN2EVr8OnINmS9D/h/Xa7IbSXRrUMdTFDgiIsGr7Mr7bGUvbRqbXbYBekig S7KwjVLCBSXDcu9EQVPlILB2s6IsrSIFKpZ26eZBvWPEx5jtAFVI+5k15dq93GEInFw0 4THal77M1UsEuGwaOBdKbWxGudLW1S5syHvvbJ5ESCtzAJ1rsuFG/VivYlPESyDL66W1 SlQQ== X-Gm-Message-State: APt69E3HE7Z+BijA6faXG91pp2IceS3Iaw8OYT/hATGaBmcz7sR9i/7/ ZVZXQ2kl0lGE0XidfTJ+YckNyg== X-Google-Smtp-Source: ADUXVKKzQfMfnO8ykqMJBeCWIYmiaCgb2wHka8P8c4rEuN2awU4GI6O3qXorjueE7/gg/ocIfSmGAA== X-Received: by 2002:a62:1c43:: with SMTP id c64-v6mr4532860pfc.176.1528889585571; Wed, 13 Jun 2018 04:33:05 -0700 (PDT) Received: from baolinwangubtpc.spreadtrum.com ([117.18.48.102]) by smtp.gmail.com with ESMTPSA id h8-v6sm2745370pgq.35.2018.06.13.04.32.57 (version=TLS1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 13 Jun 2018 04:33:05 -0700 (PDT) From: Baolin Wang To: tglx@linutronix.de, john.stultz@linaro.org, daniel.lezcano@linaro.org, arnd@arndb.de, tony@atomide.com, aaro.koskinen@iki.fi, linux@armlinux.org.uk, mark.rutland@arm.com, marc.zyngier@arm.com Cc: baolin.wang@linaro.org, broonie@kernel.org, paulmck@linux.vnet.ibm.com, mlichvar@redhat.com, rdunlap@infradead.org, kstewart@linuxfoundation.org, gregkh@linuxfoundation.org, pombredanne@nexb.com, thierry.reding@gmail.com, jonathanh@nvidia.com, heiko@sntech.de, linus.walleij@linaro.org, viresh.kumar@linaro.org, mingo@kernel.org, hpa@zytor.com, peterz@infradead.org, douly.fnst@cn.fujitsu.com, len.brown@intel.com, rajvi.jingar@intel.com, alexandre.belloni@bootlin.com, x86@kernel.org, linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org Subject: [PATCH 1/8] time: Add persistent clock support Date: Wed, 13 Jun 2018 19:32:28 +0800 Message-Id: X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: In-Reply-To: References: Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org On our Spreadtrum SC9860 platform, we registered the high resolution ARM generic timer as one clocksource to update the OS time, but the ARM generic timer will be stopped in suspend state. So we use one 64bit always-on timer (but low resolution) of Spreadtrum to calculate the suspend time to compensate the OS time. Though we can register the always-on timer as one clocksource, we need re-calculate the mult/shift with one larger conversion range to calculate the suspend time. But now we have too many different ways of dealing with persistent timekeeping across architectures, and there will be many duplicate code if we register one timer to be one persistent clock. Thus it will be more helpful if we add one common framework for timer drivers to be registered as one persistent clock and implement the common read_persistent_clock64() to compensate the OS time. Moreover we can register the clocksource with CLOCK_SOURCE_SUSPEND_NONSTOP to be one persistent clock, then we can simplify the suspend/resume accounting by removing CLOCK_SOURCE_SUSPEND_NONSTOP timing. After that we can only compensate the OS time by persistent clock or RTC. Signed-off-by: Baolin Wang --- include/linux/persistent_clock.h | 23 +++++ kernel/time/Kconfig | 4 + kernel/time/Makefile | 1 + kernel/time/alarmtimer.c | 4 + kernel/time/persistent_clock.c | 184 ++++++++++++++++++++++++++++++++++++++ 5 files changed, 216 insertions(+) create mode 100644 include/linux/persistent_clock.h create mode 100644 kernel/time/persistent_clock.c diff --git a/include/linux/persistent_clock.h b/include/linux/persistent_clock.h new file mode 100644 index 0000000..7d42c1a --- /dev/null +++ b/include/linux/persistent_clock.h @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0 +#ifndef __PERSISTENT_CLOCK_H__ +#define __PERSISTENT_CLOCK_H__ + +#ifdef CONFIG_PERSISTENT_CLOCK +extern int persistent_clock_init_and_register(u64 (*read)(void), + u64 mask, u32 freq, + u64 maxsec); +extern void persistent_clock_cleanup(void); +extern void persistent_clock_start_alarmtimer(void); +#else +static inline int persistent_clock_init_and_register(u64 (*read)(void), + u64 mask, u32 freq, + u64 maxsec) +{ + return 0; +} + +static inline void persistent_clock_cleanup(void) { } +static inline void persistent_clock_start_alarmtimer(void) { } +#endif + +#endif diff --git a/kernel/time/Kconfig b/kernel/time/Kconfig index 78eabc4..7188600 100644 --- a/kernel/time/Kconfig +++ b/kernel/time/Kconfig @@ -47,6 +47,10 @@ config GENERIC_CLOCKEVENTS_MIN_ADJUST config GENERIC_CMOS_UPDATE bool +# Persistent clock support +config PERSISTENT_CLOCK + bool + if GENERIC_CLOCKEVENTS menu "Timers subsystem" diff --git a/kernel/time/Makefile b/kernel/time/Makefile index f1e46f3..f6d368f 100644 --- a/kernel/time/Makefile +++ b/kernel/time/Makefile @@ -18,3 +18,4 @@ obj-$(CONFIG_GENERIC_SCHED_CLOCK) += sched_clock.o obj-$(CONFIG_TICK_ONESHOT) += tick-oneshot.o tick-sched.o obj-$(CONFIG_DEBUG_FS) += timekeeping_debug.o obj-$(CONFIG_TEST_UDELAY) += test_udelay.o +obj-$(CONFIG_PERSISTENT_CLOCK) += persistent_clock.o diff --git a/kernel/time/alarmtimer.c b/kernel/time/alarmtimer.c index 639321b..1518fdb 100644 --- a/kernel/time/alarmtimer.c +++ b/kernel/time/alarmtimer.c @@ -29,6 +29,7 @@ #include #include #include +#include #include "posix-timers.h" @@ -892,6 +893,9 @@ static int __init alarmtimer_init(void) error = PTR_ERR(pdev); goto out_drv; } + + /* Start one alarmtimer to update persistent clock */ + persistent_clock_start_alarmtimer(); return 0; out_drv: diff --git a/kernel/time/persistent_clock.c b/kernel/time/persistent_clock.c new file mode 100644 index 0000000..edaa659 --- /dev/null +++ b/kernel/time/persistent_clock.c @@ -0,0 +1,184 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2018 Linaro, Inc. + * + * Author: Baolin Wang + */ + +#include +#include +#include + +/** + * persistent_clock_read_data - data required to read persistent clock + * @read: Returns a cycle value from persistent clock. + * @last_cycles: Clock cycle value at last update. + * @last_ns: Time value (nanoseconds) at last update. + * @mask: Bitmask for two's complement subtraction of non 64bit clocks. + * @mult: Cycle to nanosecond multiplier. + * @shift: Cycle to nanosecond divisor. + */ +struct persistent_clock_read_data { + u64 (*read)(void); + u64 last_cycles; + u64 last_ns; + u64 mask; + u32 mult; + u32 shift; +}; + +/** + * persistent_clock - represent the persistent clock + * @read_data: Data required to read from persistent clock. + * @seq: Sequence counter for protecting updates. + * @freq: The frequency of the persistent clock. + * @wrap: Duration for persistent clock can run before wrapping. + * @alarm: Update timeout for persistent clock wrap. + * @alarm_inited: Indicate if the alarm has been initialized. + */ +struct persistent_clock { + struct persistent_clock_read_data read_data; + seqcount_t seq; + u32 freq; + ktime_t wrap; + struct alarm alarm; + bool alarm_inited; +}; + +static struct persistent_clock p; + +void read_persistent_clock64(struct timespec64 *ts) +{ + struct persistent_clock_read_data *read_data = &p.read_data; + unsigned long seq; + u64 delta, nsecs; + + if (!read_data->read) { + ts->tv_sec = 0; + ts->tv_nsec = 0; + return; + } + + do { + seq = read_seqcount_begin(&p.seq); + delta = (read_data->read() - read_data->last_cycles) & + read_data->mask; + + nsecs = read_data->last_ns + + clocksource_cyc2ns(delta, read_data->mult, + read_data->shift); + *ts = ns_to_timespec64(nsecs); + } while (read_seqcount_retry(&p.seq, seq)); +} + +static void persistent_clock_update(void) +{ + struct persistent_clock_read_data *read_data = &p.read_data; + u64 cycles, delta; + + write_seqcount_begin(&p.seq); + + cycles = read_data->read(); + delta = (cycles - read_data->last_cycles) & read_data->mask; + read_data->last_ns += clocksource_cyc2ns(delta, read_data->mult, + read_data->shift); + read_data->last_cycles = cycles; + + write_seqcount_end(&p.seq); +} + +static enum alarmtimer_restart persistent_clock_alarm_fired(struct alarm *alarm, + ktime_t now) +{ + persistent_clock_update(); + + alarm_forward(&p.alarm, now, p.wrap); + return ALARMTIMER_RESTART; +} + +int persistent_clock_init_and_register(u64 (*read)(void), u64 mask, + u32 freq, u64 maxsec) +{ + struct persistent_clock_read_data *read_data = &p.read_data; + u64 wrap, res, secs = maxsec; + + if (!read || !mask || !freq) + return -EINVAL; + + if (!secs) { + /* + * If the timer driver did not specify the maximum conversion + * seconds of the persistent clock, then we calculate the + * conversion range with the persistent clock's bits and + * frequency. + */ + secs = mask; + do_div(secs, freq); + + /* + * Some persistent counter can be larger than 32bit, so we + * need limit the max suspend time to have a good conversion + * precision. So 24 hours may be enough usually. + */ + if (secs > 86400) + secs = 86400; + } + + /* Calculate the mult/shift to convert cycles to ns. */ + clocks_calc_mult_shift(&read_data->mult, &read_data->shift, freq, + NSEC_PER_SEC, (u32)secs); + + /* Calculate how many nanoseconds until we risk wrapping. */ + wrap = clocks_calc_max_nsecs(read_data->mult, read_data->shift, 0, + mask, NULL); + p.wrap = ns_to_ktime(wrap); + + p.freq = freq; + read_data->mask = mask; + read_data->read = read; + + persistent_clock_update(); + + /* Calculate the ns resolution of this persistent clock. */ + res = clocksource_cyc2ns(1ULL, read_data->mult, read_data->shift); + + pr_info("persistent clock: mask %llu at %uHz, resolution %lluns, wraps every %lluns\n", + mask, freq, res, wrap); + return 0; +} + +void persistent_clock_cleanup(void) +{ + p.read_data.read = NULL; + + if (p.alarm_inited) { + alarm_cancel(&p.alarm); + p.alarm_inited = false; + } +} + +void persistent_clock_start_alarmtimer(void) +{ + struct persistent_clock_read_data *read_data = &p.read_data; + ktime_t now; + + /* + * If no persistent clock function has been provided or the alarmtimer + * has been initialized at that point, just return. + */ + if (!read_data->read || p.alarm_inited) + return; + + persistent_clock_update(); + + /* + * Since the persistent clock will not be stopped when system enters the + * suspend state, thus we need start one alarmtimer to wakeup the system + * to update the persistent clock before wrapping. We should start the + * update alarmtimer after the alarmtimer subsystem was initialized. + */ + alarm_init(&p.alarm, ALARM_BOOTTIME, persistent_clock_alarm_fired); + now = ktime_get_boottime(); + alarm_start(&p.alarm, ktime_add(now, p.wrap)); + p.alarm_inited = true; +} From patchwork Wed Jun 13 11:32:29 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baolin Wang X-Patchwork-Id: 928832 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="DUOpp5nA"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 415Pl933Ygz9s47 for ; Wed, 13 Jun 2018 21:33:25 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935415AbeFMLdT (ORCPT ); Wed, 13 Jun 2018 07:33:19 -0400 Received: from mail-pl0-f68.google.com ([209.85.160.68]:41322 "EHLO mail-pl0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S935398AbeFMLdP (ORCPT ); Wed, 13 Jun 2018 07:33:15 -0400 Received: by mail-pl0-f68.google.com with SMTP id az12-v6so1379971plb.8 for ; Wed, 13 Jun 2018 04:33:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=ChAuc8lHvl/YQvwortB1kFZ67NvvCDDalDvR66fi15s=; b=DUOpp5nAmdrtHRyQb6PaSZNfAE3m6sZnlPGP1mmIAaHXGQp0FoXsqh51Vcw28Tw5xn fG0ENvQ0ssbmVGPyGu5b9cEr2UNxsC5JIcmUEYGFN5n1bVfJIo7vMhCpV1ZKsXvMBf4f D/bTyXn2tIZVgc9tlCNd0EgRE0byK1KWocuEw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=ChAuc8lHvl/YQvwortB1kFZ67NvvCDDalDvR66fi15s=; b=WaXyW5FmnS/3b9d3wUnYigZwSr2etZmmfapVsxBow3CKgd46542FPAcebA9VRW1nhU TSTvfn+EFKWxcZe7FFHDcUQHYZdtIQXznsbcAcqx30asCE110yEZ6WnVU1GfQXQryh97 CPRcouqRycFEFBw8HVQZmxKrrukpHuURjhw+AumeNhMlk1i+M1YfxrNtLN7KyLXIOk9J 0MLHFi01ojf6rmQMsltL7hJsPwHnHd7vl4fapQoyApVbk+acmu2Y/9fdVvNsJn9yLWow 0nCKg1FvlbYrnANPyq3eNRy0Nf9sgc5ur5aY3LRis+87hf8fD4ltWX3ETE1rpW5o2mIk V7ag== X-Gm-Message-State: APt69E35vb6A54qpPhn9a2PwwQ0SEjBuUdID/JnFTEADEP/HwaV0Qo+u 2hZb5/mao4YX9SzxG5tMRQntAg== X-Google-Smtp-Source: ADUXVKJyd2UpfyXGO955Lxj4ezEgVH7f/LyMWkVY544weQZGGStnRqbMnqyQ9Jrkuu2ugV1s1PJ/8Q== X-Received: by 2002:a17:902:1127:: with SMTP id d36-v6mr4855932pla.267.1528889594807; Wed, 13 Jun 2018 04:33:14 -0700 (PDT) Received: from baolinwangubtpc.spreadtrum.com ([117.18.48.102]) by smtp.gmail.com with ESMTPSA id h8-v6sm2745370pgq.35.2018.06.13.04.33.05 (version=TLS1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 13 Jun 2018 04:33:14 -0700 (PDT) From: Baolin Wang To: tglx@linutronix.de, john.stultz@linaro.org, daniel.lezcano@linaro.org, arnd@arndb.de, tony@atomide.com, aaro.koskinen@iki.fi, linux@armlinux.org.uk, mark.rutland@arm.com, marc.zyngier@arm.com Cc: baolin.wang@linaro.org, broonie@kernel.org, paulmck@linux.vnet.ibm.com, mlichvar@redhat.com, rdunlap@infradead.org, kstewart@linuxfoundation.org, gregkh@linuxfoundation.org, pombredanne@nexb.com, thierry.reding@gmail.com, jonathanh@nvidia.com, heiko@sntech.de, linus.walleij@linaro.org, viresh.kumar@linaro.org, mingo@kernel.org, hpa@zytor.com, peterz@infradead.org, douly.fnst@cn.fujitsu.com, len.brown@intel.com, rajvi.jingar@intel.com, alexandre.belloni@bootlin.com, x86@kernel.org, linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org Subject: [PATCH 2/8] clocksource: sprd: Add one persistent timer for Spreadtrum platform Date: Wed, 13 Jun 2018 19:32:29 +0800 Message-Id: <95ec43d6f335e31d6e1da4eb0db522008728363b.1528878545.git.baolin.wang@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: In-Reply-To: References: Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org On Spreadtrum SC9860 platform, we need one persistent timer to calculate the suspend time to compensate the OS time. This patch registers one Spreadtrum AON timer as persistent timer, which runs at 32bit and periodic mode. Signed-off-by: Baolin Wang --- drivers/clocksource/Kconfig | 1 + drivers/clocksource/timer-sprd.c | 80 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 81 insertions(+) diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index dec0dd8..7f11c6c 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -455,6 +455,7 @@ config SPRD_TIMER depends on (ARCH_SPRD || COMPILE_TEST) default ARCH_SPRD select TIMER_OF + select PERSISTENT_CLOCK help Enables support for the Spreadtrum timer driver. diff --git a/drivers/clocksource/timer-sprd.c b/drivers/clocksource/timer-sprd.c index ef9ebea..c6f657a 100644 --- a/drivers/clocksource/timer-sprd.c +++ b/drivers/clocksource/timer-sprd.c @@ -3,8 +3,11 @@ * Copyright (C) 2017 Spreadtrum Communications Inc. */ +#include #include #include +#include +#include #include "timer-of.h" @@ -157,3 +160,80 @@ static int __init sprd_timer_init(struct device_node *np) } TIMER_OF_DECLARE(sc9860_timer, "sprd,sc9860-timer", sprd_timer_init); + +void __iomem *pbase; + +static u64 sprd_persistent_timer_read(void) +{ + return ~(u64)readl_relaxed(pbase + TIMER_VALUE_SHDW_LO) & + CLOCKSOURCE_MASK(32); +} + +static void sprd_persistent_timer_disable(void) +{ + sprd_timer_disable(pbase); +} + +static void sprd_persistent_timer_enable(void) +{ + sprd_timer_disable(pbase); + sprd_timer_update_counter(pbase, TIMER_VALUE_LO_MASK); + sprd_timer_enable(pbase, TIMER_CTL_PERIOD_MODE); +} + +static int __init sprd_persistent_timer_init(struct device_node *np) +{ + struct clk *clk; + u32 freq; + int ret; + + clk = of_clk_get(np, 0); + if (IS_ERR(clk)) { + pr_err("Can't get timer clock for %pOF\n", np); + return PTR_ERR(clk); + } + + ret = clk_prepare_enable(clk); + if (ret) { + pr_err("Failed to enable clock for %pOF\n", np); + clk_put(clk); + return ret; + } + + freq = clk_get_rate(clk); + if (!freq) { + pr_err("Failed to get clock rate for %pOF\n", np); + ret = -EINVAL; + goto clk_rate_err; + } + + pbase = of_io_request_and_map(np, 0, of_node_full_name(np)); + if (IS_ERR(pbase)) { + pr_err("Can't map timer registers for %pOF\n", np); + ret = PTR_ERR(pbase); + goto clk_rate_err; + } + + sprd_persistent_timer_enable(); + + ret = persistent_clock_init_and_register(sprd_persistent_timer_read, + CLOCKSOURCE_MASK(32), freq, 0); + if (ret) { + pr_err("Failed to register persistent clock for %pOF\n", np); + goto persist_err; + } + + return 0; + +persist_err: + sprd_persistent_timer_disable(); + iounmap(pbase); +clk_rate_err: + clk_disable_unprepare(clk); + clk_put(clk); + + return ret; +} + +TIMER_OF_DECLARE(sc9860_persistent_timer, "sprd,sc9860-persistent-timer", + sprd_persistent_timer_init); From patchwork Wed Jun 13 11:32:30 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baolin Wang X-Patchwork-Id: 928838 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; 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Wed, 13 Jun 2018 04:33:23 -0700 (PDT) Received: from baolinwangubtpc.spreadtrum.com ([117.18.48.102]) by smtp.gmail.com with ESMTPSA id h8-v6sm2745370pgq.35.2018.06.13.04.33.15 (version=TLS1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 13 Jun 2018 04:33:23 -0700 (PDT) From: Baolin Wang To: tglx@linutronix.de, john.stultz@linaro.org, daniel.lezcano@linaro.org, arnd@arndb.de, tony@atomide.com, aaro.koskinen@iki.fi, linux@armlinux.org.uk, mark.rutland@arm.com, marc.zyngier@arm.com Cc: baolin.wang@linaro.org, broonie@kernel.org, paulmck@linux.vnet.ibm.com, mlichvar@redhat.com, rdunlap@infradead.org, kstewart@linuxfoundation.org, gregkh@linuxfoundation.org, pombredanne@nexb.com, thierry.reding@gmail.com, jonathanh@nvidia.com, heiko@sntech.de, linus.walleij@linaro.org, viresh.kumar@linaro.org, mingo@kernel.org, hpa@zytor.com, peterz@infradead.org, douly.fnst@cn.fujitsu.com, len.brown@intel.com, rajvi.jingar@intel.com, alexandre.belloni@bootlin.com, x86@kernel.org, linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org Subject: [PATCH 3/8] arm: time: Remove the persistent clock support for ARM architecture Date: Wed, 13 Jun 2018 19:32:30 +0800 Message-Id: X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: In-Reply-To: References: Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org We have introduced the persistent clock framework to support the OS time compensating from persistent clock, and we will convert all drivers to use common persistent clock framework instead of the persistent clock support used only for the ARM architecture. So we can remove these code with converting the Omap 32k counter and tegra20 timer. Moreover there are no drivers will register read_boot_clock64(), so remove it too. Signed-off-by: Baolin Wang --- arch/arm/include/asm/mach/time.h | 4 ---- arch/arm/kernel/time.c | 36 ---------------------------- arch/arm/plat-omap/Kconfig | 1 + arch/arm/plat-omap/counter_32k.c | 44 ++++++----------------------------- drivers/clocksource/tegra20_timer.c | 12 +++++++--- 5 files changed, 17 insertions(+), 80 deletions(-) diff --git a/arch/arm/include/asm/mach/time.h b/arch/arm/include/asm/mach/time.h index 0f79e4d..3cbcafc 100644 --- a/arch/arm/include/asm/mach/time.h +++ b/arch/arm/include/asm/mach/time.h @@ -12,8 +12,4 @@ extern void timer_tick(void); -typedef void (*clock_access_fn)(struct timespec64 *); -extern int register_persistent_clock(clock_access_fn read_boot, - clock_access_fn read_persistent); - #endif diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c index cf2701c..713905c 100644 --- a/arch/arm/kernel/time.c +++ b/arch/arm/kernel/time.c @@ -76,42 +76,6 @@ void timer_tick(void) } #endif -static void dummy_clock_access(struct timespec64 *ts) -{ - ts->tv_sec = 0; - ts->tv_nsec = 0; -} - -static clock_access_fn __read_persistent_clock = dummy_clock_access; -static clock_access_fn __read_boot_clock = dummy_clock_access; - -void read_persistent_clock64(struct timespec64 *ts) -{ - __read_persistent_clock(ts); -} - -void read_boot_clock64(struct timespec64 *ts) -{ - __read_boot_clock(ts); -} - -int __init register_persistent_clock(clock_access_fn read_boot, - clock_access_fn read_persistent) -{ - /* Only allow the clockaccess functions to be registered once */ - if (__read_persistent_clock == dummy_clock_access && - __read_boot_clock == dummy_clock_access) { - if (read_boot) - __read_boot_clock = read_boot; - if (read_persistent) - __read_persistent_clock = read_persistent; - - return 0; - } - - return -EINVAL; -} - void __init time_init(void) { if (machine_desc->init_time) { diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index c0a242c..073a80f 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 config ARCH_OMAP + select PERSISTENT_CLOCK bool if ARCH_OMAP diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c index 2438b96..5d52f7c 100644 --- a/arch/arm/plat-omap/counter_32k.c +++ b/arch/arm/plat-omap/counter_32k.c @@ -19,8 +19,7 @@ #include #include #include - -#include +#include #include @@ -44,33 +43,6 @@ static u64 notrace omap_32k_read_sched_clock(void) } /** - * omap_read_persistent_clock64 - Return time from a persistent clock. - * - * Reads the time from a source which isn't disabled during PM, the - * 32k sync timer. Convert the cycles elapsed since last read into - * nsecs and adds to a monotonically increasing timespec64. - */ -static struct timespec64 persistent_ts; -static cycles_t cycles; -static unsigned int persistent_mult, persistent_shift; - -static void omap_read_persistent_clock64(struct timespec64 *ts) -{ - unsigned long long nsecs; - cycles_t last_cycles; - - last_cycles = cycles; - cycles = sync32k_cnt_reg ? readl_relaxed(sync32k_cnt_reg) : 0; - - nsecs = clocksource_cyc2ns(cycles - last_cycles, - persistent_mult, persistent_shift); - - timespec64_add_ns(&persistent_ts, nsecs); - - *ts = persistent_ts; -} - -/** * omap_init_clocksource_32k - setup and register counter 32k as a * kernel clocksource * @pbase: base addr of counter_32k module @@ -95,13 +67,6 @@ int __init omap_init_clocksource_32k(void __iomem *vbase) else sync32k_cnt_reg = vbase + OMAP2_32KSYNCNT_CR_OFF_LOW; - /* - * 120000 rough estimate from the calculations in - * __clocksource_update_freq_scale. - */ - clocks_calc_mult_shift(&persistent_mult, &persistent_shift, - 32768, NSEC_PER_SEC, 120000); - ret = clocksource_mmio_init(sync32k_cnt_reg, "32k_counter", 32768, 250, 32, clocksource_mmio_readl_up); if (ret) { @@ -110,7 +75,12 @@ int __init omap_init_clocksource_32k(void __iomem *vbase) } sched_clock_register(omap_32k_read_sched_clock, 32, 32768); - register_persistent_clock(NULL, omap_read_persistent_clock64); + /* + * 120000 rough estimate from the calculations in + * __clocksource_update_freq_scale. + */ + persistent_clock_init_and_register(omap_32k_read_sched_clock, + CLOCKSOURCE_MASK(32), 32768, 120000); pr_info("OMAP clocksource: 32k_counter at 32768 Hz\n"); return 0; diff --git a/drivers/clocksource/tegra20_timer.c b/drivers/clocksource/tegra20_timer.c index c337a81..97a34cb 100644 --- a/drivers/clocksource/tegra20_timer.c +++ b/drivers/clocksource/tegra20_timer.c @@ -124,7 +124,7 @@ static u64 tegra_rtc_read_ms(void) } /* - * tegra_read_persistent_clock64 - Return time from a persistent clock. + * read_persistent_clock64 - Return time from a persistent clock. * * Reads the time from a source which isn't disabled during PM, the * 32k sync timer. Convert the cycles elapsed since last read into @@ -133,10 +133,16 @@ static u64 tegra_rtc_read_ms(void) * tegra_rtc driver could be executing to avoid race conditions * on the RTC shadow register */ -static void tegra_read_persistent_clock64(struct timespec64 *ts) +void read_persistent_clock64(struct timespec64 *ts) { u64 delta; + if (!rtc_base) { + ts->tv_sec = 0; + ts->tv_nsec = 0; + return; + } + last_persistent_ms = persistent_ms; persistent_ms = tegra_rtc_read_ms(); delta = persistent_ms - last_persistent_ms; @@ -259,6 +265,6 @@ static int __init tegra20_init_rtc(struct device_node *np) else clk_prepare_enable(clk); - return register_persistent_clock(NULL, tegra_read_persistent_clock64); + return 0; } TIMER_OF_DECLARE(tegra20_rtc, "nvidia,tegra20-rtc", tegra20_init_rtc); From patchwork Wed Jun 13 11:32:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baolin Wang X-Patchwork-Id: 928837 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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Wed, 13 Jun 2018 04:33:32 -0700 (PDT) Received: from baolinwangubtpc.spreadtrum.com ([117.18.48.102]) by smtp.gmail.com with ESMTPSA id h8-v6sm2745370pgq.35.2018.06.13.04.33.24 (version=TLS1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 13 Jun 2018 04:33:31 -0700 (PDT) From: Baolin Wang To: tglx@linutronix.de, john.stultz@linaro.org, daniel.lezcano@linaro.org, arnd@arndb.de, tony@atomide.com, aaro.koskinen@iki.fi, linux@armlinux.org.uk, mark.rutland@arm.com, marc.zyngier@arm.com Cc: baolin.wang@linaro.org, broonie@kernel.org, paulmck@linux.vnet.ibm.com, mlichvar@redhat.com, rdunlap@infradead.org, kstewart@linuxfoundation.org, gregkh@linuxfoundation.org, pombredanne@nexb.com, thierry.reding@gmail.com, jonathanh@nvidia.com, heiko@sntech.de, linus.walleij@linaro.org, viresh.kumar@linaro.org, mingo@kernel.org, hpa@zytor.com, peterz@infradead.org, douly.fnst@cn.fujitsu.com, len.brown@intel.com, rajvi.jingar@intel.com, alexandre.belloni@bootlin.com, x86@kernel.org, linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org Subject: [PATCH 4/8] clocksource: arm_arch_timer: Register the persistent clock Date: Wed, 13 Jun 2018 19:32:31 +0800 Message-Id: <5b450836ee0db88de27d47e43368de02c550425b.1528878545.git.baolin.wang@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: In-Reply-To: References: Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Register the persistent clock to compensate the suspend time for OS time, if the ARM counter clocksource will not be stopped in suspend state. Signed-off-by: Baolin Wang --- drivers/clocksource/Kconfig | 1 + drivers/clocksource/arm_arch_timer.c | 10 ++++++++++ 2 files changed, 11 insertions(+) diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index 7f11c6c..5e51fcf 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -308,6 +308,7 @@ config ARC_TIMERS_64BIT config ARM_ARCH_TIMER bool + select PERSISTENT_CLOCK select TIMER_OF if OF select TIMER_ACPI if ACPI diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 57cb2f0..671be63 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -32,6 +32,7 @@ #include #include +#include #undef pr_fmt #define pr_fmt(fmt) "arch_timer: " fmt @@ -950,6 +951,15 @@ static void __init arch_counter_register(unsigned type) /* 56 bits minimum, so we assume worst case rollover */ sched_clock_register(arch_timer_read_counter, 56, arch_timer_rate); + + /* + * Register the persistent clock if the clocksource will not be stopped + * in suspend state. + */ + if (!arch_counter_suspend_stop) + persistent_clock_init_and_register(arch_timer_read_counter, + CLOCKSOURCE_MASK(56), + arch_timer_rate, 0); } static void arch_timer_stop(struct clock_event_device *clk) From patchwork Wed Jun 13 11:32:32 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baolin Wang X-Patchwork-Id: 928836 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="GwSPbK0O"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 415Pmw3f4kz9s3C for ; Wed, 13 Jun 2018 21:34:56 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935464AbeFMLdn (ORCPT ); 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Wed, 13 Jun 2018 04:33:40 -0700 (PDT) Received: from baolinwangubtpc.spreadtrum.com ([117.18.48.102]) by smtp.gmail.com with ESMTPSA id h8-v6sm2745370pgq.35.2018.06.13.04.33.32 (version=TLS1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 13 Jun 2018 04:33:40 -0700 (PDT) From: Baolin Wang To: tglx@linutronix.de, john.stultz@linaro.org, daniel.lezcano@linaro.org, arnd@arndb.de, tony@atomide.com, aaro.koskinen@iki.fi, linux@armlinux.org.uk, mark.rutland@arm.com, marc.zyngier@arm.com Cc: baolin.wang@linaro.org, broonie@kernel.org, paulmck@linux.vnet.ibm.com, mlichvar@redhat.com, rdunlap@infradead.org, kstewart@linuxfoundation.org, gregkh@linuxfoundation.org, pombredanne@nexb.com, thierry.reding@gmail.com, jonathanh@nvidia.com, heiko@sntech.de, linus.walleij@linaro.org, viresh.kumar@linaro.org, mingo@kernel.org, hpa@zytor.com, peterz@infradead.org, douly.fnst@cn.fujitsu.com, len.brown@intel.com, rajvi.jingar@intel.com, alexandre.belloni@bootlin.com, x86@kernel.org, linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org Subject: [PATCH 5/8] clocksource: timer-ti-32k: Register the persistent clock Date: Wed, 13 Jun 2018 19:32:32 +0800 Message-Id: <904493423cadb90576a712acdb3b512b4ed44887.1528878545.git.baolin.wang@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: In-Reply-To: References: Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Since the 32K counter is always available, then we can register the persistent clock to compensate the suspend time for the OS time. Signed-off-by: Baolin Wang --- drivers/clocksource/Kconfig | 1 + drivers/clocksource/timer-ti-32k.c | 4 ++++ 2 files changed, 5 insertions(+) diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index 5e51fcf..3cd136f 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -262,6 +262,7 @@ config CLKSRC_TI_32K bool "Texas Instruments 32.768 Hz Clocksource" if COMPILE_TEST depends on GENERIC_SCHED_CLOCK select TIMER_OF if OF + select PERSISTENT_CLOCK help This option enables support for Texas Instruments 32.768 Hz clocksource available on many OMAP-like platforms. diff --git a/drivers/clocksource/timer-ti-32k.c b/drivers/clocksource/timer-ti-32k.c index 880a861..353ff9d 100644 --- a/drivers/clocksource/timer-ti-32k.c +++ b/drivers/clocksource/timer-ti-32k.c @@ -41,6 +41,7 @@ #include #include #include +#include /* * 32KHz clocksource ... always available, on pretty most chips except @@ -120,6 +121,9 @@ static int __init ti_32k_timer_init(struct device_node *np) } sched_clock_register(omap_32k_read_sched_clock, 32, 32768); + persistent_clock_init_and_register(omap_32k_read_sched_clock, + CLOCKSOURCE_MASK(32), 32768, 0); + pr_info("OMAP clocksource: 32k_counter at 32768 Hz\n"); return 0; From patchwork Wed Jun 13 11:32:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baolin Wang X-Patchwork-Id: 928835 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="DHjcCH44"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 415Pmq0Nhtz9s3C for ; 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Signed-off-by: Baolin Wang --- drivers/clocksource/Kconfig | 1 + drivers/clocksource/time-pistachio.c | 3 +++ 2 files changed, 4 insertions(+) diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index 3cd136f..af552ba 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -255,6 +255,7 @@ config CLKSRC_PISTACHIO bool "Clocksource for Pistachio SoC" if COMPILE_TEST depends on HAS_IOMEM select TIMER_OF + select PERSISTENT_CLOCK help Enables the clocksource for the Pistachio SoC. diff --git a/drivers/clocksource/time-pistachio.c b/drivers/clocksource/time-pistachio.c index a2dd85d..5c3eb71 100644 --- a/drivers/clocksource/time-pistachio.c +++ b/drivers/clocksource/time-pistachio.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -212,6 +213,8 @@ static int __init pistachio_clksrc_of_init(struct device_node *node) raw_spin_lock_init(&pcs_gpt.lock); sched_clock_register(pistachio_read_sched_clock, 32, rate); + persistent_clock_init_and_register(pistachio_read_sched_clock, + CLOCKSOURCE_MASK(32), rate, 0); return clocksource_register_hz(&pcs_gpt.cs, rate); } TIMER_OF_DECLARE(pistachio_gptimer, "img,pistachio-gptimer", From patchwork Wed Jun 13 11:32:34 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baolin Wang X-Patchwork-Id: 928834 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="ZEpVWiWr"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 415Pmk28R5z9s3C for ; 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Signed-off-by: Baolin Wang --- arch/x86/Kconfig | 1 + arch/x86/kernel/tsc.c | 21 +++++++++++++++++++++ 2 files changed, 22 insertions(+) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 297789a..549dd01 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -200,6 +200,7 @@ config X86 select USER_STACKTRACE_SUPPORT select VIRT_TO_BUS select X86_FEATURE_NAMES if PROC_FS + select PERSISTENT_CLOCK config INSTRUCTION_DECODER def_bool y diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 74392d9..cb4f495 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include @@ -1032,6 +1033,11 @@ static u64 read_tsc(struct clocksource *cs) return (u64)rdtsc_ordered(); } +static u64 notrace tsc_read_persistent_clock(void) +{ + return (u64)rdtsc_ordered(); +} + static void tsc_cs_mark_unstable(struct clocksource *cs) { if (tsc_unstable) @@ -1300,6 +1306,14 @@ static void tsc_refine_calibration_work(struct work_struct *work) if (boot_cpu_has(X86_FEATURE_ART)) art_related_clocksource = &clocksource_tsc; clocksource_register_khz(&clocksource_tsc, tsc_khz); + + if (clocksource_tsc.flags & CLOCK_SOURCE_SUSPEND_NONSTOP) { + persistent_clock_init_and_register(tsc_read_persistent_clock, + CLOCKSOURCE_MASK(64), + tsc_khz * 1000, 0); + persistent_clock_start_alarmtimer(); + } + unreg: clocksource_unregister(&clocksource_tsc_early); } @@ -1327,6 +1341,13 @@ static int __init init_tsc_clocksource(void) if (boot_cpu_has(X86_FEATURE_ART)) art_related_clocksource = &clocksource_tsc; clocksource_register_khz(&clocksource_tsc, tsc_khz); + + if (clocksource_tsc.flags & CLOCK_SOURCE_SUSPEND_NONSTOP) { + persistent_clock_init_and_register(tsc_read_persistent_clock, + CLOCKSOURCE_MASK(64), + tsc_khz * 1000, 0); + persistent_clock_start_alarmtimer(); + } unreg: clocksource_unregister(&clocksource_tsc_early); return 0; From patchwork Wed Jun 13 11:32:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baolin Wang X-Patchwork-Id: 928833 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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Wed, 13 Jun 2018 04:34:06 -0700 (PDT) Received: from baolinwangubtpc.spreadtrum.com ([117.18.48.102]) by smtp.gmail.com with ESMTPSA id h8-v6sm2745370pgq.35.2018.06.13.04.33.58 (version=TLS1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 13 Jun 2018 04:34:06 -0700 (PDT) From: Baolin Wang To: tglx@linutronix.de, john.stultz@linaro.org, daniel.lezcano@linaro.org, arnd@arndb.de, tony@atomide.com, aaro.koskinen@iki.fi, linux@armlinux.org.uk, mark.rutland@arm.com, marc.zyngier@arm.com Cc: baolin.wang@linaro.org, broonie@kernel.org, paulmck@linux.vnet.ibm.com, mlichvar@redhat.com, rdunlap@infradead.org, kstewart@linuxfoundation.org, gregkh@linuxfoundation.org, pombredanne@nexb.com, thierry.reding@gmail.com, jonathanh@nvidia.com, heiko@sntech.de, linus.walleij@linaro.org, viresh.kumar@linaro.org, mingo@kernel.org, hpa@zytor.com, peterz@infradead.org, douly.fnst@cn.fujitsu.com, len.brown@intel.com, rajvi.jingar@intel.com, alexandre.belloni@bootlin.com, x86@kernel.org, linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org Subject: [PATCH 8/8] time: timekeeping: Remove time compensating from nonstop clocksources Date: Wed, 13 Jun 2018 19:32:35 +0800 Message-Id: <7901216d145d942553641c74f5ee6241acf18976.1528878545.git.baolin.wang@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: In-Reply-To: References: Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Since we have converted all nonstop clocksources to use persistent clock, thus we can simplify the time compensating by removing the nonstop clocksources. Now we can compensate the suspend time for the OS time from the persistent clock or rtc device. Signed-off-by: Baolin Wang --- kernel/time/timekeeping.c | 19 ++++--------------- 1 file changed, 4 insertions(+), 15 deletions(-) diff --git a/kernel/time/timekeeping.c b/kernel/time/timekeeping.c index 4786df9..3026d98 100644 --- a/kernel/time/timekeeping.c +++ b/kernel/time/timekeeping.c @@ -1666,7 +1666,6 @@ void timekeeping_inject_sleeptime64(struct timespec64 *delta) void timekeeping_resume(void) { struct timekeeper *tk = &tk_core.timekeeper; - struct clocksource *clock = tk->tkr_mono.clock; unsigned long flags; struct timespec64 ts_new, ts_delta; u64 cycle_now; @@ -1682,27 +1681,17 @@ void timekeeping_resume(void) /* * After system resumes, we need to calculate the suspended time and - * compensate it for the OS time. There are 3 sources that could be - * used: Nonstop clocksource during suspend, persistent clock and rtc - * device. + * compensate it for the OS time. There are 2 sources that could be + * used: persistent clock and rtc device. * * One specific platform may have 1 or 2 or all of them, and the * preference will be: - * suspend-nonstop clocksource -> persistent clock -> rtc + * persistent clock -> rtc * The less preferred source will only be tried if there is no better * usable source. The rtc part is handled separately in rtc core code. */ cycle_now = tk_clock_read(&tk->tkr_mono); - if ((clock->flags & CLOCK_SOURCE_SUSPEND_NONSTOP) && - cycle_now > tk->tkr_mono.cycle_last) { - u64 nsec, cyc_delta; - - cyc_delta = clocksource_delta(cycle_now, tk->tkr_mono.cycle_last, - tk->tkr_mono.mask); - nsec = mul_u64_u32_shr(cyc_delta, clock->mult, clock->shift); - ts_delta = ns_to_timespec64(nsec); - sleeptime_injected = true; - } else if (timespec64_compare(&ts_new, &timekeeping_suspend_time) > 0) { + if (timespec64_compare(&ts_new, &timekeeping_suspend_time) > 0) { ts_delta = timespec64_sub(ts_new, timekeeping_suspend_time); sleeptime_injected = true; }