From patchwork Tue Jun 12 22:19:20 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 928508 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=sourceware.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=libc-alpha-return-93106-incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.b="yS1DGz9j"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41547j6LsMz9s0W for ; Wed, 13 Jun 2018 08:20:01 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=NhbrA07B0lfIQLAEl4/s/p7Vz0Rh2pf QB9DieUtFxiqakNc526gOWsRK98/ezomeNzLVsm2hbW8WhJzXngiWsD7flPvZe/H E71p4WpNM345p6mKBGOzAGLl80I+qWpFhavbHf9zP2V3DBsN56zxW1yTuPRIJmfM LEHT7Vbztgng= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=2ocC+nyK4ZpkRLz+dLGf20JzHZg=; b=yS1DG z9jQ+mSyYDx7pWLR3OmR/pwf5XnH9ch90QcFq1mV8NUI3VmtXKlJriuRzEP2dggj Y7eKLHMgqc3mYEH0qvVHeX3HyPxLvkSPBct4/zzBQWboYhWiQeO9EecZeEyErHL1 5w73KBFU26xhdwxn5P3xFe0VdPCKJSuGPe7mlA= Received: (qmail 91090 invoked by alias); 12 Jun 2018 22:19:45 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 91049 invoked by uid 89); 12 Jun 2018 22:19:44 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.1 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_SHORT, SPF_SOFTFAIL autolearn=ham version=3.3.2 spammy=Hx-languages-length:5780, Packages, PACKAGE X-HELO: mga01.intel.com X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 From: "H.J. Lu" To: libc-alpha@sourceware.org Subject: [PATCH 01/20] Initial empty CPU run-time library for C: libcpu-rt-c Date: Tue, 12 Jun 2018 15:19:20 -0700 Message-Id: <20180612221939.19545-2-hjl.tools@gmail.com> In-Reply-To: <20180612221939.19545-1-hjl.tools@gmail.com> References: <20180612221939.19545-1-hjl.tools@gmail.com> Add the --enable-cpu-rt configure option to enable the CPU run-time library for C, libcpu-rt-c. libcpu-rt-c contains a subset of the C library with the optimized functions. The resulting libcpu-rt-c.so should be binary compatible with older versions of libc.so so that libcpu-rt-c.so can be used with LD_PRELOAD or linked directly with applications. * Makeconfig (rpath-dirs): Add cpu-rt-c. (all-subdirs): Likewise. * configure: Regenerated. * configure.ac: Add --enable-cpu-rt. (build-cpu-rt): New LIBC_CONFIG_VAR. * shlib-versions: Add libcpu_rt-c. * cpu-rt-c/Makefile: New file. --- Makeconfig | 4 ++-- configure | 17 +++++++++++++++++ configure.ac | 11 +++++++++++ cpu-rt-c/Makefile | 42 ++++++++++++++++++++++++++++++++++++++++++ shlib-versions | 3 +++ 5 files changed, 75 insertions(+), 2 deletions(-) create mode 100644 cpu-rt-c/Makefile diff --git a/Makeconfig b/Makeconfig index 1afe86475c..ed894b7c8f 100644 --- a/Makeconfig +++ b/Makeconfig @@ -566,7 +566,7 @@ link-libc-printers-tests = $(link-libc-rpath) \ $(link-libc-tests-after-rpath-link) # This is how to find at build-time things that will be installed there. -rpath-dirs = math elf dlfcn nss nis rt resolv crypt mathvec support +rpath-dirs = math elf dlfcn nss nis rt resolv crypt mathvec cpu-rt-c support rpath-link = \ $(common-objdir):$(subst $(empty) ,:,$(patsubst ../$(subdir),.,$(rpath-dirs:%=$(common-objpfx)%))) else # build-static @@ -1206,7 +1206,7 @@ all-subdirs = csu assert ctype locale intl catgets math setjmp signal \ grp pwd posix io termios resource misc socket sysvipc gmon \ gnulib iconv iconvdata wctype manual shadow gshadow po argp \ crypt localedata timezone rt conform debug mathvec support \ - dlfcn elf + dlfcn elf cpu-rt-c ifndef avoid-generated # sysd-sorted itself will contain rules making the sysd-sorted target diff --git a/configure b/configure index 7a8bd3f817..580bebb75d 100755 --- a/configure +++ b/configure @@ -788,6 +788,7 @@ enable_nscd enable_pt_chown enable_tunables enable_mathvec +enable_cpu_rt with_cpu ' ac_precious_vars='build_alias @@ -1461,6 +1462,8 @@ Optional Features: 'no' and 'valstring' --enable-mathvec Enable building and installing mathvec [default depends on architecture] + --enable-cpu-rt Enable building and installing CPU run-time library + [default depends on architecture] Optional Packages: --with-PACKAGE[=ARG] use PACKAGE [ARG=yes] @@ -3741,6 +3744,14 @@ else fi +# Check whether --enable-cpu-rt was given. +if test "${enable_cpu_rt+set}" = set; then : + enableval=$enable_cpu_rt; build_cpu_rt=$enableval +else + build_cpu_rt=notset +fi + + # We keep the original values in `$config_*' and never modify them, so we # can write them unchanged into config.make. Everything else uses # $machine, $vendor, and $os, and changes them whenever convenient. @@ -6678,6 +6689,12 @@ fi config_vars="$config_vars build-mathvec = $build_mathvec" +if test x"$build_cpu_rt" = xnotset; then + build_cpu_rt=no +fi +config_vars="$config_vars +build-cpu-rt = $build_cpu_rt" + diff --git a/configure.ac b/configure.ac index ca1282a6b3..a851d958f1 100644 --- a/configure.ac +++ b/configure.ac @@ -453,6 +453,12 @@ AC_ARG_ENABLE([mathvec], [build_mathvec=$enableval], [build_mathvec=notset]) +AC_ARG_ENABLE([cpu-rt], + [AS_HELP_STRING([--enable-cpu-rt], + [Enable building and installing CPU run-time library @<:@default depends on architecture@:>@])], + [build_cpu_rt=$enableval], + [build_cpu_rt=notset]) + # We keep the original values in `$config_*' and never modify them, so we # can write them unchanged into config.make. Everything else uses # $machine, $vendor, and $os, and changes them whenever convenient. @@ -1737,6 +1743,11 @@ if test x"$build_mathvec" = xnotset; then fi LIBC_CONFIG_VAR([build-mathvec], [$build_mathvec]) +if test x"$build_cpu_rt" = xnotset; then + build_cpu_rt=no +fi +LIBC_CONFIG_VAR([build-cpu-rt], [$build_cpu_rt]) + AC_SUBST(libc_extra_cflags) AC_SUBST(libc_extra_cppflags) diff --git a/cpu-rt-c/Makefile b/cpu-rt-c/Makefile new file mode 100644 index 0000000000..f138911347 --- /dev/null +++ b/cpu-rt-c/Makefile @@ -0,0 +1,42 @@ +# Copyright (C) 2018 Free Software Foundation, Inc. +# This file is part of the GNU C Library. + +# The GNU C Library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public +# License as published by the Free Software Foundation; either +# version 2.1 of the License, or (at your option) any later version. + +# The GNU C Library is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# Lesser General Public License for more details. + +# You should have received a copy of the GNU Lesser General Public +# License along with the GNU C Library; if not, see +# . + +# Makefile for the CPU run-time library for C. + +subdir := cpu-rt-c + +include ../Makeconfig + +ifeq ($(build-cpu-rt),yes) +extra-libs := libcpu-rt-c +extra-libs-others = $(extra-libs) + +libcpu-rt-c-sysdep_routines += $(cpu-rt-c-routines) +libcpu-rt-c-tests += $(addprefix test-,$(cpu-rt-c-routines)) +tests += $(libcpu-rt-c-tests) +endif + +include ../Rules + +ifeq ($(build-cpu-rt),yes) +ifeq ($(build-shared),yes) +libcpu-rt-c = $(objpfx)libcpu-rt-c.so +else +libcpu-rt-c = $(objpfx)libcpu-rt-c.a +endif +$(addprefix $(objpfx),$(libcpu-rt-c-tests)): $(libcpu-rt-c) +endif diff --git a/shlib-versions b/shlib-versions index b9cb99d2fb..43e4c63f54 100644 --- a/shlib-versions +++ b/shlib-versions @@ -75,3 +75,6 @@ libgcc_s=1 # The vector math library libmvec=1 + +# The CPU run-time library for C +libcpu_rt_c=1 From patchwork Tue Jun 12 22:19:21 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 928509 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=sourceware.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=libc-alpha-return-93107-incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.b="xT6MKzMn"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41547v0G28z9s0W for ; Wed, 13 Jun 2018 08:20:10 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=QGRJmCKea9b0W1fWsuZCVu12snk5rQL 7Uie/9962Rq3DYWeZ7d5qj3i8SHNsiuYWsERTGn+oNXKVyZMN2/PzNBWQ52XPyea kbko5BUvdwPc4/owo3VdxFl2Xvq934lnmrAAOXVJlWwWJteNiZ88esl0G8JSeAn/ cv5ICw42iYmw= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=2ryi7pKgVFF+/JrrmjBK/1UScgo=; b=xT6MK zMnYw8Nmeeutwi9GP9v3YA4o8CV4dYOADRjueXbN8lmy3WqN+gesSgk3XiN+4Tla dV2gu3d8/ZWTsNWx/9JbaAxA31Fdf9ZPma61S1zJ+GZZ5j/rUn9jcZYmladDls4b 0ezb4jXenM6Iaq0IVx6YgDwPB3BcEp0gkovH5A= Received: (qmail 91362 invoked by alias); 12 Jun 2018 22:19:47 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 91241 invoked by uid 89); 12 Jun 2018 22:19:46 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.1 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_SHORT, SPF_SOFTFAIL autolearn=ham version=3.3.2 spammy=lean, UD:sym X-HELO: mga01.intel.com X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 From: "H.J. Lu" To: libc-alpha@sourceware.org Subject: [PATCH 02/20] libcpu-rt-c/x86: Add cacheinfo Date: Tue, 12 Jun 2018 15:19:21 -0700 Message-Id: <20180612221939.19545-3-hjl.tools@gmail.com> In-Reply-To: <20180612221939.19545-1-hjl.tools@gmail.com> References: <20180612221939.19545-1-hjl.tools@gmail.com> Add cacheinfo to libcpu-rt-c, excluding __cache_sysconf. Don't drag in in libcpu-rt-c. We want to keep libcpu-rt-c as lean as possible and still have access to CPU cache information. * sysdeps/x86/Makefile (libcpu-rt-c-sysdep_routines): Add cacheinfo. * sysdeps/x86/cacheinfo.c: Include only for libc. (assert): [IS_IN (libcpu_rt_c)]: New function. (__cache_sysconf): Make it libc only. --- sysdeps/x86/Makefile | 4 ++++ sysdeps/x86/cacheinfo.c | 19 +++++++++++++++++-- 2 files changed, 21 insertions(+), 2 deletions(-) diff --git a/sysdeps/x86/Makefile b/sysdeps/x86/Makefile index d25d6f0ae4..63ddaf03da 100644 --- a/sysdeps/x86/Makefile +++ b/sysdeps/x86/Makefile @@ -1,3 +1,7 @@ +ifeq ($(subdir),cpu-rt-c) +libcpu-rt-c-sysdep_routines += cacheinfo +endif + ifeq ($(subdir),csu) gen-as-const-headers += cpu-features-offsets.sym endif diff --git a/sysdeps/x86/cacheinfo.c b/sysdeps/x86/cacheinfo.c index b9444ddd52..b23d2791b4 100644 --- a/sysdeps/x86/cacheinfo.c +++ b/sysdeps/x86/cacheinfo.c @@ -16,9 +16,22 @@ License along with the GNU C Library; if not, see . */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) -#include +#if IS_IN (libcpu_rt_c) +# include + +__attribute__ ((__noreturn__)) +static inline void +assert (int expr __attribute__ ((unused))) +{ + /* This shouldn't happen in the CPU run-time library. */ + ABORT_INSTRUCTION; + __builtin_unreachable (); +} +#else +# include +#endif #include #include #include @@ -436,6 +449,7 @@ handle_amd (int name) } +# if IS_IN (libc) /* Get the value of the system variable NAME. */ long int attribute_hidden @@ -454,6 +468,7 @@ __cache_sysconf (int name) /* CPU not known, we have no information. */ return 0; } +# endif /* Data cache size for use in memory and string routines, typically From patchwork Tue Jun 12 22:19:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 928513 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=sourceware.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=libc-alpha-return-93110-incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.b="N09uUhbc"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41548P0gVzz9s0W for ; Wed, 13 Jun 2018 08:20:36 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=b9ZumwtkTSSrxIUiiyKkcEi0uWZjrRo DJKRKnTyFRwEb963W+Md0cMJZGYISTwPhX8DIJm3Nr63zx26wkyWhvoIV75UJSIZ 7XOJd8G38T4Pp3tej14kZjTwXYa2Zn0tfcgiuiASUXDpeVLCF7yiqltzSgkCLdTP Z8l8nKcHeyos= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=TMrb1aUrL/MIVv+TUEsEFNPfsyQ=; b=N09uU hbc9O71MuDOaLboCkEpParOZaEH70+qbpkHwZSAUpxjMF27Mf2zwKwMCenAnI/MC 3FNuPs8kp5DlqJUY2SPEvHTKFp9et+lPgEOiZKOA3TUZJMvNVd88Pj8xsEgxpOE3 /3S53bXhgTbk1ijxx46kBeVNlwVtK7Yu0eC3Pc= Received: (qmail 91996 invoked by alias); 12 Jun 2018 22:19:51 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 91791 invoked by uid 89); 12 Jun 2018 22:19:50 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.1 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_SHORT, SPF_SOFTFAIL autolearn=ham version=3.3.2 spammy=ia64 X-HELO: mga01.intel.com X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 From: "H.J. Lu" To: libc-alpha@sourceware.org Subject: [PATCH 03/20] libcpu-rt-c/x86: Add cpu-rt-tunables.c Date: Tue, 12 Jun 2018 15:19:22 -0700 Message-Id: <20180612221939.19545-4-hjl.tools@gmail.com> In-Reply-To: <20180612221939.19545-1-hjl.tools@gmail.com> References: <20180612221939.19545-1-hjl.tools@gmail.com> Add cpu-rt-tunables.c to support GLIBC_TUNABLES in libcpu-rt-c. * cpu-rt-c/cpu-rt-misc.c: New file. * cpu-rt-c/cpu-rt-support.h: Likewise. * cpu-rt-c/cpu-rt-tunables.c: Likewise. * cpu-rt-c/dl-tunables.h: Likewise. * sysdeps/x86/cpu-rt-misc.c: Likewise. * sysdeps/x86/cpu-rt-support.h: Likewise. * elf/dl-misc.c (_dl_sysdep_read_whole_file): Make it libc only. (_dl_debug_vdprintf): Likewise. (_dl_debug_printf): Likewise. (_dl_debug_printf_c): Likewise. (_dl_dprintf): Likewise. (_dl_name_match_p): Likewise. (_dl_higher_prime_number): Likewise. * sysdeps/i386/dl-procinfo.c: Support libcpu-rt-c. * sysdeps/unix/sysv/linux/i386/dl-procinfo.h: Likewise. * sysdeps/x86/dl-procinfo.c: Likewise. * sysdeps/x86/dl-procinfo.h: Likewise. * sysdeps/x86/ldsodefs.h: Likewise. * sysdeps/x86/Makefile (libcpu-rt-c-sysdep_routines): Add cpu-rt-misc and cpu-rt-tunables. (tunables-type): New. (CPPFLAGS-cpu-rt-tunables.c): Likewise. (CFLAGS-cpu-rt-tunables.c): Likewise. * sysdeps/x86/cpu-features.c: Don't include nor in libcpu-rt-c. Include in libcpu-rt-c. (init_cpu_features_tunables): New. Extracted from ... (init_cpu_features): This. Call init_cpu_features_tunables if not in libcpu-rt-c. Don't access dl_platform, dl_hwcap nor dl_hwcap_mask in libcpu-rt-c. * sysdeps/x86/cpu-features.h (__cpu_rt_x86_init_cpu_features): New hidden prototype in libcpu-rt-c. (INIT_ARCH): Defined to __cpu_rt_x86_init_cpu_features in libcpu-rt-c. * sysdeps/x86/cpu-tunables.c: Include , instead of , in libcpu-rt-c. --- cpu-rt-c/cpu-rt-misc.c | 22 ++++++++ cpu-rt-c/cpu-rt-support.h | 38 +++++++++++++ cpu-rt-c/cpu-rt-tunables.c | 28 ++++++++++ cpu-rt-c/dl-tunables.h | 57 +++++++++++++++++++ elf/dl-misc.c | 2 + elf/dl-tunables.c | 2 +- sysdeps/i386/dl-procinfo.c | 16 +++--- sysdeps/unix/sysv/linux/i386/dl-procinfo.h | 4 +- sysdeps/x86/Makefile | 11 +++- sysdeps/x86/cpu-features.c | 46 ++++++++++----- sysdeps/x86/cpu-features.h | 12 +++- sysdeps/x86/cpu-rt-misc.c | 65 ++++++++++++++++++++++ sysdeps/x86/cpu-rt-support.h | 21 +++++++ sysdeps/x86/cpu-tunables.c | 6 +- sysdeps/x86/dl-procinfo.c | 41 ++++++++------ sysdeps/x86/dl-procinfo.h | 15 +++-- sysdeps/x86/ldsodefs.h | 17 +++++- 17 files changed, 349 insertions(+), 54 deletions(-) create mode 100644 cpu-rt-c/cpu-rt-misc.c create mode 100644 cpu-rt-c/cpu-rt-support.h create mode 100644 cpu-rt-c/cpu-rt-tunables.c create mode 100644 cpu-rt-c/dl-tunables.h create mode 100644 sysdeps/x86/cpu-rt-misc.c create mode 100644 sysdeps/x86/cpu-rt-support.h diff --git a/cpu-rt-c/cpu-rt-misc.c b/cpu-rt-c/cpu-rt-misc.c new file mode 100644 index 0000000000..6ec8ca8bea --- /dev/null +++ b/cpu-rt-c/cpu-rt-misc.c @@ -0,0 +1,22 @@ +/* Miscellaneous support functions for the CPU run-time library. + Copyright (C) 2018 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#if HAVE_TUNABLES +# define CPU_RT_MISC +# include +#endif diff --git a/cpu-rt-c/cpu-rt-support.h b/cpu-rt-c/cpu-rt-support.h new file mode 100644 index 0000000000..5cb65e22d6 --- /dev/null +++ b/cpu-rt-c/cpu-rt-support.h @@ -0,0 +1,38 @@ +/* Support header file for the CPU run-time library. + This file is part of the GNU C Library. + Copyright (C) 2018 Free Software Foundation, Inc. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#ifndef _CPU_RT_SUPPORT_H +#define _CPU_RT_SUPPORT_H 1 + +/* It is safe to use the CPU run-time library with AT_SECURE and SUID + binaries. */ +#define __libc_enable_secure __redirect___libc_enable_secure +#include +#include +#undef __libc_enable_secure +#define __libc_enable_secure 0 + +#ifdef CPU_RT_MISC +# define _dl_strtoul __cpu_rt_strtoul +#else +extern uint64_t __cpu_rt_strtoul (const char *, char **) + attribute_hidden; +# define _dl_strtoul(nptr, endptr) __cpu_rt_strtoul ((nptr), (endptr)) +#endif + +#endif diff --git a/cpu-rt-c/cpu-rt-tunables.c b/cpu-rt-c/cpu-rt-tunables.c new file mode 100644 index 0000000000..2a27054aa7 --- /dev/null +++ b/cpu-rt-c/cpu-rt-tunables.c @@ -0,0 +1,28 @@ +/* The tunable framework for the CPU run-time library. + This file is part of the GNU C Library. + Copyright (C) 2018 Free Software Foundation, Inc. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#if HAVE_TUNABLES +# define CPU_RT_TUNABLES +# include + +/* Make tunable_list writable. */ +# undef attribute_relro +# define attribute_relro + +# include +#endif diff --git a/cpu-rt-c/dl-tunables.h b/cpu-rt-c/dl-tunables.h new file mode 100644 index 0000000000..051f7b3c17 --- /dev/null +++ b/cpu-rt-c/dl-tunables.h @@ -0,0 +1,57 @@ +/* The tunable framework for the CPU run-time library. + This file is part of the GNU C Library. + Copyright (C) 2018 Free Software Foundation, Inc. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#ifndef _CPU_RT_TUNABLES_H +#define _CPU_RT_TUNABLES_H 1 + +#ifdef CPU_RT_TUNABLES +# define __tunables_init __cpu_rt_tunables_init +# define __tunable_get_val __cpu_rt_tunable_get_val +# define __tunable_set_val __cpu_rt_tunable_set_val +#else +# define __tunables_init __redirect___tunables_init +# define __tunable_get_val __redirect___tunable_get_val +# define __tunable_set_val __redirect___tunable_set_val +#endif + +#include + +#ifdef CPU_RT_TUNABLES +extern void __cpu_rt_tunables_init (char **) attribute_hidden; +extern void __cpu_rt_tunable_get_val (tunable_id_t, void *, + tunable_callback_t) + attribute_hidden; +extern void __cpu_rt_tunable_set_val (tunable_id_t, void *) + attribute_hidden; +#else +# undef __tunables_init +# define __tunables_init __cpu_rt_tunables_init +# undef __tunable_get_val +# define __tunable_get_val __cpu_rt_tunable_get_val +# undef __tunable_set_val +# define __tunable_set_val __cpu_rt_tunable_set_val + +extern __typeof (__redirect___tunables_init) __cpu_rt_tunables_init + attribute_hidden; +extern __typeof (__redirect___tunable_get_val) __cpu_rt_tunable_get_val + attribute_hidden; +extern __typeof (__redirect___tunable_set_val) __cpu_rt_tunable_set_val + attribute_hidden; +#endif + +#endif diff --git a/elf/dl-misc.c b/elf/dl-misc.c index 2eb81eeb02..336bc7d61a 100644 --- a/elf/dl-misc.c +++ b/elf/dl-misc.c @@ -35,6 +35,7 @@ #include #include +#if !IS_IN (libcpu_rt_c) /* Read the whole contents of FILE into new mmap'd space with given protections. *SIZEP gets the size of the file. On error MAP_FAILED is returned. */ @@ -357,6 +358,7 @@ _dl_higher_prime_number (unsigned long int n) return *low; } +#endif /* A stripped down strtoul-like implementation for very early use. It does not set errno if the result is outside bounds because it may get diff --git a/elf/dl-tunables.c b/elf/dl-tunables.c index 4c9d36e398..6d3957ddb8 100644 --- a/elf/dl-tunables.c +++ b/elf/dl-tunables.c @@ -28,7 +28,7 @@ #include #define TUNABLES_INTERNAL 1 -#include "dl-tunables.h" +#include #include diff --git a/sysdeps/i386/dl-procinfo.c b/sysdeps/i386/dl-procinfo.c index cd779e3078..954b214cac 100644 --- a/sysdeps/i386/dl-procinfo.c +++ b/sysdeps/i386/dl-procinfo.c @@ -42,23 +42,25 @@ #include -#if !defined PROCINFO_DECL && defined SHARED +#if !IS_IN (libcpu_rt_c) +# if !defined PROCINFO_DECL && defined SHARED ._dl_x86_cap_flags -#else +# else PROCINFO_CLASS const char _dl_x86_cap_flags[32][8] -#endif -#ifndef PROCINFO_DECL +# endif +# ifndef PROCINFO_DECL = { "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce", "cx8", "apic", "10", "sep", "mtrr", "pge", "mca", "cmov", "pat", "pse36", "pn", "clflush", "20", "dts", "acpi", "mmx", "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", "pbe" } -#endif -#if !defined SHARED || defined PROCINFO_DECL +# endif +# if !defined SHARED || defined PROCINFO_DECL ; -#else +# else , +# endif #endif #undef PROCINFO_DECL diff --git a/sysdeps/unix/sysv/linux/i386/dl-procinfo.h b/sysdeps/unix/sysv/linux/i386/dl-procinfo.h index b454367b72..3f931891e2 100644 --- a/sysdeps/unix/sysv/linux/i386/dl-procinfo.h +++ b/sysdeps/unix/sysv/linux/i386/dl-procinfo.h @@ -21,7 +21,8 @@ #define _DL_I386_PROCINFO_H 1 #include -#undef _dl_procinfo +#if !IS_IN (libcpu_rt_c) +# undef _dl_procinfo static inline int __attribute__ ((unused)) _dl_procinfo (unsigned int type, unsigned long int word) @@ -44,4 +45,5 @@ _dl_procinfo (unsigned int type, unsigned long int word) return 0; } +# endif #endif diff --git a/sysdeps/x86/Makefile b/sysdeps/x86/Makefile index 63ddaf03da..40fd14bd47 100644 --- a/sysdeps/x86/Makefile +++ b/sysdeps/x86/Makefile @@ -1,5 +1,14 @@ ifeq ($(subdir),cpu-rt-c) -libcpu-rt-c-sysdep_routines += cacheinfo +libcpu-rt-c-sysdep_routines += cacheinfo cpu-rt-misc cpu-rt-tunables + +tunables-type = $(addprefix TUNABLES_FRONTEND_,$(have-tunables)) +CPPFLAGS-cpu-rt-tunables.c += -DTUNABLES_FRONTEND=$(tunables-type) + +# Make sure that the compiler does not insert any library calls in tunables +# code paths. +ifeq (yes,$(have-loop-to-function)) +CFLAGS-cpu-rt-tunables.c += -fno-tree-loop-distribute-patterns +endif endif ifeq ($(subdir),csu) diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c index 0fc3674c4b..bd57dfab95 100644 --- a/sysdeps/x86/cpu-features.c +++ b/sysdeps/x86/cpu-features.c @@ -18,13 +18,19 @@ #include #include -#include +#if !IS_IN (libcpu_rt_c) +# include +#endif #include #if HAVE_TUNABLES # define TUNABLE_NAMESPACE tune # include /* Get STDOUT_FILENO for _dl_printf. */ -# include +# if IS_IN (libcpu_rt_c) +# include +# else +# include +# endif extern void TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *) attribute_hidden; @@ -177,6 +183,20 @@ get_common_indeces (struct cpu_features *cpu_features, } } +#if HAVE_TUNABLES +static inline void +init_cpu_features_tunables (struct cpu_features *cpu_features) +{ + TUNABLE_GET (hwcaps, tunable_val_t *, TUNABLE_CALLBACK (set_hwcaps)); + cpu_features->non_temporal_threshold + = TUNABLE_GET (x86_non_temporal_threshold, long int, NULL); + cpu_features->data_cache_size + = TUNABLE_GET (x86_data_cache_size, long int, NULL); + cpu_features->shared_cache_size + = TUNABLE_GET (x86_shared_cache_size, long int, NULL); +} +#endif + static inline void init_cpu_features (struct cpu_features *cpu_features) { @@ -378,24 +398,19 @@ no_cpuid: cpu_features->model = model; cpu_features->kind = kind; -#if HAVE_TUNABLES - TUNABLE_GET (hwcaps, tunable_val_t *, TUNABLE_CALLBACK (set_hwcaps)); - cpu_features->non_temporal_threshold - = TUNABLE_GET (x86_non_temporal_threshold, long int, NULL); - cpu_features->data_cache_size - = TUNABLE_GET (x86_data_cache_size, long int, NULL); - cpu_features->shared_cache_size - = TUNABLE_GET (x86_shared_cache_size, long int, NULL); -#endif +#if !IS_IN (libcpu_rt_c) +# if HAVE_TUNABLES + init_cpu_features_tunables (cpu_features); +# endif /* Reuse dl_platform, dl_hwcap and dl_hwcap_mask for x86. */ -#if !HAVE_TUNABLES && defined SHARED +# if !HAVE_TUNABLES && defined SHARED /* The glibc.tune.hwcap_mask tunable is initialized already, so no need to do this. */ GLRO(dl_hwcap_mask) = HWCAP_IMPORTANT; -#endif +# endif -#ifdef __x86_64__ +# ifdef __x86_64__ GLRO(dl_hwcap) = HWCAP_X86_64; if (cpu_features->kind == arch_kind_intel) { @@ -431,7 +446,7 @@ no_cpuid: if (platform != NULL) GLRO(dl_platform) = platform; } -#else +# else GLRO(dl_hwcap) = 0; if (CPU_FEATURES_CPU_P (cpu_features, SSE2)) GLRO(dl_hwcap) |= HWCAP_X86_SSE2; @@ -440,5 +455,6 @@ no_cpuid: GLRO(dl_platform) = "i686"; else if (CPU_FEATURES_ARCH_P (cpu_features, I586)) GLRO(dl_platform) = "i586"; +# endif #endif } diff --git a/sysdeps/x86/cpu-features.h b/sysdeps/x86/cpu-features.h index 624e681e96..a043f5d17d 100644 --- a/sysdeps/x86/cpu-features.h +++ b/sysdeps/x86/cpu-features.h @@ -161,8 +161,16 @@ extern const struct cpu_features *__get_cpu_features (void) __attribute__ ((const)); # if defined (_LIBC) && !IS_IN (nonlib) -/* Unused for x86. */ -# define INIT_ARCH() +/* Call _cpu_rt_x86_init_cpu_features to support LD_PRELOAD of the CPU + run-time library on non-lazy binding shared objects. */ +# if IS_IN (libcpu_rt_c) +extern void __cpu_rt_x86_init_cpu_features (void) + __attribute__ ((visibility ("hidden"))); +# define INIT_ARCH() __cpu_rt_x86_init_cpu_features () +# else +/* Unused for x86 when not in the CPU run-time library. */ +# define INIT_ARCH() +# endif # define __get_cpu_features() (&GLRO(dl_x86_cpu_features)) # endif diff --git a/sysdeps/x86/cpu-rt-misc.c b/sysdeps/x86/cpu-rt-misc.c new file mode 100644 index 0000000000..83a95b51ad --- /dev/null +++ b/sysdeps/x86/cpu-rt-misc.c @@ -0,0 +1,65 @@ +/* Miscellaneous support functions for the CPU run-time library. X86 + version. + This file is part of the GNU C Library. + Copyright (C) 2018 Free Software Foundation, Inc. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#if HAVE_TUNABLES +# include +# include +#else +# include +#endif +#include +#include + +void +__cpu_rt_x86_init_cpu_features (void) +{ + /* Since IFUNC selector in the CPU run-time library may be called before + dl_x86_cpu_features is initialized by DT_INIT_ARRAY with LD_PRELOAD + on non-lazy binding shared objects, __cpu_rt_x86_init_cpu_features + must be called from all IFUNC selectors. Since dl_x86_cpu_features + is hidden in the CPU run-time library, it can be accessed without + dynamic relocations and we can skip calling init_cpu_features if + not needed. */ + if (GLRO(dl_x86_cpu_features).kind == arch_kind_unknown) + init_cpu_features (&GLRO(dl_x86_cpu_features)); +} + +#if HAVE_TUNABLES +static void +cpu_rt_init (int argc __attribute__ ((unused)), + char **argv __attribute__ ((unused)), + char **environ) +{ + __cpu_rt_x86_init_cpu_features (); + __tunables_init (environ); + init_cpu_features_tunables (&GLRO(dl_x86_cpu_features)); +} + +# ifdef SHARED +# define INIT_SECTION ".init_array" +# else +# define INIT_SECTION ".preinit_array" +# endif + +static void (*const cpu_rt_init_array []) (int, char **, char **) + __attribute__ ((used, section (INIT_SECTION), aligned (sizeof (void *)))) = +{ + &cpu_rt_init +}; +#endif diff --git a/sysdeps/x86/cpu-rt-support.h b/sysdeps/x86/cpu-rt-support.h new file mode 100644 index 0000000000..77d1111050 --- /dev/null +++ b/sysdeps/x86/cpu-rt-support.h @@ -0,0 +1,21 @@ +/* Support header file for the CPU run-time library. X86 version. + This file is part of the GNU C Library. + Copyright (C) 2018 Free Software Foundation, Inc. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include + +#define HWCAP_IMPORTANT 0 diff --git a/sysdeps/x86/cpu-tunables.c b/sysdeps/x86/cpu-tunables.c index af761dcbbc..3d1c26577f 100644 --- a/sysdeps/x86/cpu-tunables.c +++ b/sysdeps/x86/cpu-tunables.c @@ -21,7 +21,11 @@ # include # include # include /* Get STDOUT_FILENO for _dl_printf. */ -# include +# if IS_IN (libcpu_rt_c) +# include +# else +# include +# endif # include # include # include diff --git a/sysdeps/x86/dl-procinfo.c b/sysdeps/x86/dl-procinfo.c index 4b0538ede8..f623404a93 100644 --- a/sysdeps/x86/dl-procinfo.c +++ b/sysdeps/x86/dl-procinfo.c @@ -40,49 +40,56 @@ */ #if !IS_IN (ldconfig) -# if !defined PROCINFO_DECL && defined SHARED +# if !defined PROCINFO_DECL && defined SHARED && !IS_IN (libcpu_rt_c) ._dl_x86_cpu_features # else +# if IS_IN (libcpu_rt_c) +PROCINFO_CLASS struct cpu_features __cpu_rt_dl_x86_cpu_features + attribute_hidden +# else PROCINFO_CLASS struct cpu_features _dl_x86_cpu_features +# endif # endif # ifndef PROCINFO_DECL = { } # endif -# if !defined SHARED || defined PROCINFO_DECL +# if !defined SHARED || defined PROCINFO_DECL || IS_IN (libcpu_rt_c) ; # else , # endif #endif -#if !defined PROCINFO_DECL && defined SHARED +#if !IS_IN (libcpu_rt_c) +# if !defined PROCINFO_DECL && defined SHARED ._dl_x86_hwcap_flags -#else +# else PROCINFO_CLASS const char _dl_x86_hwcap_flags[3][9] -#endif -#ifndef PROCINFO_DECL +# endif +# ifndef PROCINFO_DECL = { "sse2", "x86_64", "avx512_1" } -#endif -#if !defined SHARED || defined PROCINFO_DECL +# endif +# if !defined SHARED || defined PROCINFO_DECL ; -#else +# else , -#endif +# endif -#if !defined PROCINFO_DECL && defined SHARED +# if !defined PROCINFO_DECL && defined SHARED ._dl_x86_platforms -#else +# else PROCINFO_CLASS const char _dl_x86_platforms[4][9] -#endif -#ifndef PROCINFO_DECL +# endif +# ifndef PROCINFO_DECL = { "i586", "i686", "haswell", "xeon_phi" } -#endif -#if !defined SHARED || defined PROCINFO_DECL +# endif +# if !defined SHARED || defined PROCINFO_DECL ; -#else +# else , +# endif #endif diff --git a/sysdeps/x86/dl-procinfo.h b/sysdeps/x86/dl-procinfo.h index 55cafc26e2..c2e6da9310 100644 --- a/sysdeps/x86/dl-procinfo.h +++ b/sysdeps/x86/dl-procinfo.h @@ -18,16 +18,18 @@ #ifndef _DL_PROCINFO_H #define _DL_PROCINFO_H 1 -#include -#include -#define _DL_HWCAP_COUNT HWCAP_COUNT -#define _DL_PLATFORMS_COUNT HWCAP_PLATFORMS_COUNT +#if !IS_IN (libcpu_rt_c) +# include +# include + +# define _DL_HWCAP_COUNT HWCAP_COUNT +# define _DL_PLATFORMS_COUNT HWCAP_PLATFORMS_COUNT /* Start at 48 to reserve spaces for hardware capabilities. */ -#define _DL_FIRST_PLATFORM 48 +# define _DL_FIRST_PLATFORM 48 /* Mask to filter out platforms. */ -#define _DL_HWCAP_PLATFORM (((1ULL << _DL_PLATFORMS_COUNT) - 1) \ +# define _DL_HWCAP_PLATFORM (((1ULL << _DL_PLATFORMS_COUNT) - 1) \ << _DL_FIRST_PLATFORM) static inline int @@ -44,5 +46,6 @@ _dl_string_platform (const char *str) } return -1; }; +#endif /* !IS_IN (libcpu_rt) */ #endif /* dl-procinfo.h */ diff --git a/sysdeps/x86/ldsodefs.h b/sysdeps/x86/ldsodefs.h index 0616215b7a..f0967f81b2 100644 --- a/sysdeps/x86/ldsodefs.h +++ b/sysdeps/x86/ldsodefs.h @@ -23,6 +23,16 @@ #include #include +#if IS_IN (libcpu_rt_c) +# define EXTERN extern +# define GLRO(name) __cpu_rt_##name +# define PROCINFO_DECL +# ifndef PROCINFO_CLASS +# define PROCINFO_CLASS EXTERN +# endif +# include +# include +#else struct La_i86_regs; struct La_i86_retval; struct La_x86_64_regs; @@ -30,7 +40,7 @@ struct La_x86_64_retval; struct La_x32_regs; struct La_x32_retval; -#define ARCH_PLTENTER_MEMBERS \ +# define ARCH_PLTENTER_MEMBERS \ Elf32_Addr (*i86_gnu_pltenter) (Elf32_Sym *, unsigned int, uintptr_t *, \ uintptr_t *, struct La_i86_regs *, \ unsigned int *, const char *name, \ @@ -45,7 +55,7 @@ struct La_x32_retval; unsigned int *, const char *name, \ long int *framesizep) -#define ARCH_PLTEXIT_MEMBERS \ +# define ARCH_PLTEXIT_MEMBERS \ unsigned int (*i86_gnu_pltexit) (Elf32_Sym *, unsigned int, uintptr_t *, \ uintptr_t *, const struct La_i86_regs *, \ struct La_i86_retval *, const char *); \ @@ -61,6 +71,7 @@ struct La_x32_retval; struct La_x86_64_retval *, \ const char *) -#include_next +# include_next +#endif /* !IS_IN (libcpu_rt_c) */ #endif From patchwork Tue Jun 12 22:19:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 928510 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=sourceware.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=libc-alpha-return-93108-incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.b="YVT4OqSW"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4154835KRyz9s0W for ; Wed, 13 Jun 2018 08:20:19 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=XFkCR1lHAbo1uAQaEReXnADPBKnCZb6 eVrTD6FLrIwYYs+Qe62qLh5QCWFDGLhB09PAYceazNgn6nBt/OI509RbjNLwpAtk h6AfdNKdju8HGdbc3FtGpQXYW3I+8pgD/BvPCFOR9d4SjZ/MH3z3FToeWl8gmHQ5 nBp9wIr4bOFE= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=M8hh2zAfDx7Vqt0jhmkfGdjfqSU=; b=YVT4O qSWnMncz/pZGj/js2TvckcjWrueCnlGsgzXCQvh+Y+x1Tnh39257+P4B6r4bTOu0 t4CQZmgfiC7X66Dr6zMgmTF6fR3xw45etrm+fBSmDJ6163uLO7W5SB8yjMEQVtyC yM025ah8Yq4v2xovwAtsd+pN09RTJjUA/v2r5Y= Received: (qmail 91567 invoked by alias); 12 Jun 2018 22:19:48 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 91457 invoked by uid 89); 12 Jun 2018 22:19:48 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.1 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_SHORT, SPF_SOFTFAIL autolearn=ham version=3.3.2 spammy=2711, UD:sym X-HELO: mga01.intel.com X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 From: "H.J. Lu" To: libc-alpha@sourceware.org Subject: [PATCH 04/20] libcpu-rt-c/x86-64: Add memchr Date: Tue, 12 Jun 2018 15:19:23 -0700 Message-Id: <20180612221939.19545-5-hjl.tools@gmail.com> In-Reply-To: <20180612221939.19545-1-hjl.tools@gmail.com> References: <20180612221939.19545-1-hjl.tools@gmail.com> * sysdeps/x86_64/Makefile (cpu-rt-c-routines): Add memchr. (vpath %.c $(..)string): New. * sysdeps/x86_64/memchr.S: Don't define alias __memchr in libcpu-rt-c. * sysdeps/x86_64/multiarch/Makefile (libcpu-rt-c-sysdep_routines): Add memchr-sse2 and memchr-avx2. * sysdeps/x86_64/multiarch/memchr-avx2.S: Support libcpu-rt-c. * sysdeps/x86_64/multiarch/memchr-sse2.S: Likewise. * sysdeps/x86_64/multiarch/memchr.c: Likewise. --- sysdeps/x86_64/Makefile | 7 +++++++ sysdeps/x86_64/memchr.S | 2 +- sysdeps/x86_64/multiarch/Makefile | 4 ++++ sysdeps/x86_64/multiarch/memchr-avx2.S | 2 +- sysdeps/x86_64/multiarch/memchr-sse2.S | 2 +- sysdeps/x86_64/multiarch/memchr.c | 6 ++++-- 6 files changed, 18 insertions(+), 5 deletions(-) diff --git a/sysdeps/x86_64/Makefile b/sysdeps/x86_64/Makefile index 9f1562f1b2..d8f6d83d88 100644 --- a/sysdeps/x86_64/Makefile +++ b/sysdeps/x86_64/Makefile @@ -146,6 +146,13 @@ CFLAGS-tst-avx512mod.c += $(AVX512-CFLAGS) endif endif +ifeq ($(subdir),cpu-rt-c) +cpu-rt-c-routines += memchr + +# For the CPU run-time tests. +vpath %.c $(..)string +endif + ifeq ($(subdir),csu) gen-as-const-headers += tlsdesc.sym rtld-offsets.sym endif diff --git a/sysdeps/x86_64/memchr.S b/sysdeps/x86_64/memchr.S index feef5d4f24..2a17b01733 100644 --- a/sysdeps/x86_64/memchr.S +++ b/sysdeps/x86_64/memchr.S @@ -324,7 +324,7 @@ L(return_null): ret END(MEMCHR) -#ifndef USE_AS_WMEMCHR +#if !defined USE_AS_WMEMCHR && !IS_IN (libcpu_rt_c) strong_alias (memchr, __memchr) libc_hidden_builtin_def(memchr) #endif diff --git a/sysdeps/x86_64/multiarch/Makefile b/sysdeps/x86_64/multiarch/Makefile index bb5e970735..2c43179b0f 100644 --- a/sysdeps/x86_64/multiarch/Makefile +++ b/sysdeps/x86_64/multiarch/Makefile @@ -65,3 +65,7 @@ sysdep_routines += memcpy_chk-nonshared mempcpy_chk-nonshared \ memmove_chk-nonshared memset_chk-nonshared \ wmemset_chk-nonshared endif + +ifeq ($(subdir),cpu-rt-c) +libcpu-rt-c-sysdep_routines += memchr-sse2 memchr-avx2 +endif diff --git a/sysdeps/x86_64/multiarch/memchr-avx2.S b/sysdeps/x86_64/multiarch/memchr-avx2.S index 5f5e772554..15710b69f6 100644 --- a/sysdeps/x86_64/multiarch/memchr-avx2.S +++ b/sysdeps/x86_64/multiarch/memchr-avx2.S @@ -16,7 +16,7 @@ License along with the GNU C Library; if not, see . */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # include diff --git a/sysdeps/x86_64/multiarch/memchr-sse2.S b/sysdeps/x86_64/multiarch/memchr-sse2.S index 8a5e7fd1c5..6f299d5119 100644 --- a/sysdeps/x86_64/multiarch/memchr-sse2.S +++ b/sysdeps/x86_64/multiarch/memchr-sse2.S @@ -16,7 +16,7 @@ License along with the GNU C Library; if not, see . */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define memchr __memchr_sse2 # undef strong_alias diff --git a/sysdeps/x86_64/multiarch/memchr.c b/sysdeps/x86_64/multiarch/memchr.c index 016f57846a..25927f72ed 100644 --- a/sysdeps/x86_64/multiarch/memchr.c +++ b/sysdeps/x86_64/multiarch/memchr.c @@ -18,7 +18,7 @@ . */ /* Define multiple versions only for the definition in libc. */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define memchr __redirect_memchr # include # undef memchr @@ -27,9 +27,11 @@ # include "ifunc-avx2.h" libc_ifunc_redirected (__redirect_memchr, memchr, IFUNC_SELECTOR ()); +# if !IS_IN (libcpu_rt_c) strong_alias (memchr, __memchr) -# ifdef SHARED +# ifdef SHARED __hidden_ver1 (memchr, __GI_memchr, __redirect_memchr) __attribute__((visibility ("hidden"))); +# endif # endif #endif From patchwork Tue Jun 12 22:19:24 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 928512 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=sourceware.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=libc-alpha-return-93109-incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.b="FoDHMtIO"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41548D0gxxz9s2t for ; Wed, 13 Jun 2018 08:20:27 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=wfHRzAXKO5JIzp+j2EY3DXx4XBgvb/+ IkqdAM3R61uucN7LQG8CPZKjmXGXUDWC20Th6jTatzZdhvqJK2UvW6adwCUw65X/ Ql7CbIfux0sfLJXPQu8i4H9B5jSnZIGM8QKsZSdwtolm00WfeOQ4aItP94HeWKcH H2MbhGDoWe/I= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=OLT/WXPDbfP2C1ZiGOaIothoiZQ=; b=FoDHM tIOCz7tAZ+S5799k/a3es80oH/k6OE3eBG0t+WgY6fFio56dEFMzpLQ7MU8H70v0 LAOxN4hcOlbWYAtFrgB9mxReKgiR7Rg7AgIfCM1m88tBvqBd/+6xVyHMke2bw1DF 6co+6UKFO6J8FtHyWCdRLInT5Mit0YlThPboJs= Received: (qmail 91680 invoked by alias); 12 Jun 2018 22:19:49 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 91537 invoked by uid 89); 12 Jun 2018 22:19:48 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.1 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_SHORT, SPF_SOFTFAIL autolearn=ham version=3.3.2 spammy=Hx-languages-length:4220 X-HELO: mga01.intel.com X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 From: "H.J. Lu" To: libc-alpha@sourceware.org Subject: [PATCH 05/20] libcpu-rt-c/x86-64: Add memcmp Date: Tue, 12 Jun 2018 15:19:24 -0700 Message-Id: <20180612221939.19545-6-hjl.tools@gmail.com> In-Reply-To: <20180612221939.19545-1-hjl.tools@gmail.com> References: <20180612221939.19545-1-hjl.tools@gmail.com> * sysdeps/x86_64/Makefile (cpu-rt-c-routines): Add memcmp. * sysdeps/x86_64/multiarch/Makefile (libcpu-rt-c-sysdep_routines): Add memcmp-sse2, memcmp-ssse3, memcmp-sse4 and memcmp-avx2-movbe. * sysdeps/x86_64/multiarch/memcmp-avx2-movbe.S: Support libcpu-rt-c. * sysdeps/x86_64/multiarch/memcmp-sse2.S: Likewise. * sysdeps/x86_64/multiarch/memcmp-sse4.S: Likewise. * sysdeps/x86_64/multiarch/memcmp-ssse3.S: Likewise. * sysdeps/x86_64/multiarch/memcmp.c: Likewise. --- sysdeps/x86_64/Makefile | 2 +- sysdeps/x86_64/multiarch/Makefile | 4 +++- sysdeps/x86_64/multiarch/memcmp-avx2-movbe.S | 2 +- sysdeps/x86_64/multiarch/memcmp-sse2.S | 2 +- sysdeps/x86_64/multiarch/memcmp-sse4.S | 2 +- sysdeps/x86_64/multiarch/memcmp-ssse3.S | 2 +- sysdeps/x86_64/multiarch/memcmp.c | 4 ++-- 7 files changed, 10 insertions(+), 8 deletions(-) diff --git a/sysdeps/x86_64/Makefile b/sysdeps/x86_64/Makefile index d8f6d83d88..1eb13d01da 100644 --- a/sysdeps/x86_64/Makefile +++ b/sysdeps/x86_64/Makefile @@ -147,7 +147,7 @@ endif endif ifeq ($(subdir),cpu-rt-c) -cpu-rt-c-routines += memchr +cpu-rt-c-routines += memchr memcmp # For the CPU run-time tests. vpath %.c $(..)string diff --git a/sysdeps/x86_64/multiarch/Makefile b/sysdeps/x86_64/multiarch/Makefile index 2c43179b0f..9bb6c8c3cd 100644 --- a/sysdeps/x86_64/multiarch/Makefile +++ b/sysdeps/x86_64/multiarch/Makefile @@ -67,5 +67,7 @@ sysdep_routines += memcpy_chk-nonshared mempcpy_chk-nonshared \ endif ifeq ($(subdir),cpu-rt-c) -libcpu-rt-c-sysdep_routines += memchr-sse2 memchr-avx2 +libcpu-rt-c-sysdep_routines += memchr-sse2 memchr-avx2 \ + memcmp-sse2 memcmp-ssse3 memcmp-sse4 \ + memcmp-avx2-movbe endif diff --git a/sysdeps/x86_64/multiarch/memcmp-avx2-movbe.S b/sysdeps/x86_64/multiarch/memcmp-avx2-movbe.S index 30f764c393..614fe23392 100644 --- a/sysdeps/x86_64/multiarch/memcmp-avx2-movbe.S +++ b/sysdeps/x86_64/multiarch/memcmp-avx2-movbe.S @@ -16,7 +16,7 @@ License along with the GNU C Library; if not, see . */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) /* memcmp/wmemcmp is implemented as: 1. For size from 2 to 7 bytes, load as big endian with movbe and bswap diff --git a/sysdeps/x86_64/multiarch/memcmp-sse2.S b/sysdeps/x86_64/multiarch/memcmp-sse2.S index 6058aa751e..5811cccc15 100644 --- a/sysdeps/x86_64/multiarch/memcmp-sse2.S +++ b/sysdeps/x86_64/multiarch/memcmp-sse2.S @@ -16,7 +16,7 @@ License along with the GNU C Library; if not, see . */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define memcmp __memcmp_sse2 # ifdef SHARED diff --git a/sysdeps/x86_64/multiarch/memcmp-sse4.S b/sysdeps/x86_64/multiarch/memcmp-sse4.S index 0d96d6b775..89dfb7f04a 100644 --- a/sysdeps/x86_64/multiarch/memcmp-sse4.S +++ b/sysdeps/x86_64/multiarch/memcmp-sse4.S @@ -17,7 +17,7 @@ License along with the GNU C Library; if not, see . */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # include diff --git a/sysdeps/x86_64/multiarch/memcmp-ssse3.S b/sysdeps/x86_64/multiarch/memcmp-ssse3.S index 6f76c64123..2990c3dd2b 100644 --- a/sysdeps/x86_64/multiarch/memcmp-ssse3.S +++ b/sysdeps/x86_64/multiarch/memcmp-ssse3.S @@ -17,7 +17,7 @@ License along with the GNU C Library; if not, see . */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # include diff --git a/sysdeps/x86_64/multiarch/memcmp.c b/sysdeps/x86_64/multiarch/memcmp.c index 6f3ca43128..53d604b883 100644 --- a/sysdeps/x86_64/multiarch/memcmp.c +++ b/sysdeps/x86_64/multiarch/memcmp.c @@ -18,7 +18,7 @@ . */ /* Define multiple versions only for the definition in libc. */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define memcmp __redirect_memcmp # include # undef memcmp @@ -30,7 +30,7 @@ libc_ifunc_redirected (__redirect_memcmp, memcmp, IFUNC_SELECTOR ()); # undef bcmp weak_alias (memcmp, bcmp) -# ifdef SHARED +# if defined SHARED && !IS_IN (libcpu_rt_c) __hidden_ver1 (memcmp, __GI_memcmp, __redirect_memcmp) __attribute__ ((visibility ("hidden"))); # endif From patchwork Tue Jun 12 22:19:25 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 928515 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=sourceware.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=libc-alpha-return-93112-incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.b="t2gig9Zl"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41548m3Yx3z9s0W for ; Wed, 13 Jun 2018 08:20:56 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=yLuHbOah2WbVCZD4mI4b2h17CerRfcg B+v42bAldpHK9hH5tjwky4nEleihnq8888cm5k1/bh2N9jqtuTmgpYOKuzqMhic0 TWkOZqF1bN7HnsU5LXq9ZhDHPtEGn+zWMHbMLr728I85yc+uz+kY97shvPEjvrjP NXl0nFm+8eis= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=Oe0+AE6PyYrvis0IYZMPQwWo3BE=; b=t2gig 9Zl8Lahh/IZFGeqBz2p6Algu9z/StWrbemdG6iyaYCIhuWxjFdTUwi7eDKor2zbZ WS0ADpYNzS1TaxYAbsvL2Ss1f2BDffgz+FQ1x1SkCRPyjJO1EvP3TBYkGj+CN+4W jognO65PGH/XI8tfAE7WSMGR/EA9kVPxWmBLXo= Received: (qmail 92261 invoked by alias); 12 Jun 2018 22:19:53 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 92063 invoked by uid 89); 12 Jun 2018 22:19:52 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-23.8 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_SHORT, KAM_STOCKGEN, SPF_SOFTFAIL autolearn=ham version=3.3.2 spammy= X-HELO: mga01.intel.com X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 From: "H.J. Lu" To: libc-alpha@sourceware.org Subject: [PATCH 06/20] libcpu-rt-c/x86-64: Add memcpy, memmove and mempcpy Date: Tue, 12 Jun 2018 15:19:25 -0700 Message-Id: <20180612221939.19545-7-hjl.tools@gmail.com> In-Reply-To: <20180612221939.19545-1-hjl.tools@gmail.com> References: <20180612221939.19545-1-hjl.tools@gmail.com> * sysdeps/x86_64/Makefile (cpu-rt-c-routines): Add memcpy, memmove and mempcpy. * sysdeps/x86_64/memmove.S: Support libcpu-rt-c. * sysdeps/x86_64/multiarch/memcpy-ssse3-back.S: Likewise. * sysdeps/x86_64/multiarch/memcpy-ssse3.S: Likewise. * sysdeps/x86_64/multiarch/memcpy.c: Likewise. * sysdeps/x86_64/multiarch/memmove-avx-unaligned-erms.S: Likewise. * sysdeps/x86_64/multiarch/memmove-avx512-no-vzeroupper.S: Likewise. * sysdeps/x86_64/multiarch/memmove-avx512-unaligned-erms.S: Likewise. * sysdeps/x86_64/multiarch/memmove-sse2-unaligned-erms.S: Likewise. * sysdeps/x86_64/multiarch/memmove-vec-unaligned-erms.S: Likewise. * sysdeps/x86_64/multiarch/memmove.c: Likewise. * sysdeps/x86_64/multiarch/mempcpy.c: Likewise. * sysdeps/x86_64/multiarch/Makefile (libcpu-rt-c-sysdep_routines): Add memcpy-ssse3, memcpy-ssse3-back memmove-sse2-unaligned-erms, memmove-ssse3, memmove-ssse3-back, memmove-avx-unaligned-erms, memmove-avx512-unaligned-erms and memmove-avx512-no-vzeroupper. --- sysdeps/x86_64/Makefile | 2 +- sysdeps/x86_64/memmove.S | 12 +++++-- sysdeps/x86_64/multiarch/Makefile | 8 ++++- sysdeps/x86_64/multiarch/memcpy-ssse3-back.S | 6 ++-- sysdeps/x86_64/multiarch/memcpy-ssse3.S | 6 ++-- sysdeps/x86_64/multiarch/memcpy.c | 14 +++++--- .../multiarch/memmove-avx-unaligned-erms.S | 2 +- .../multiarch/memmove-avx512-no-vzeroupper.S | 8 +++-- .../multiarch/memmove-avx512-unaligned-erms.S | 2 +- .../multiarch/memmove-sse2-unaligned-erms.S | 2 +- .../multiarch/memmove-vec-unaligned-erms.S | 33 ++++++++++++------- sysdeps/x86_64/multiarch/memmove.c | 10 ++++-- sysdeps/x86_64/multiarch/mempcpy.c | 10 ++++-- 13 files changed, 82 insertions(+), 33 deletions(-) diff --git a/sysdeps/x86_64/Makefile b/sysdeps/x86_64/Makefile index 1eb13d01da..978cff6cba 100644 --- a/sysdeps/x86_64/Makefile +++ b/sysdeps/x86_64/Makefile @@ -147,7 +147,7 @@ endif endif ifeq ($(subdir),cpu-rt-c) -cpu-rt-c-routines += memchr memcmp +cpu-rt-c-routines += memchr memcmp memcpy memmove mempcpy # For the CPU run-time tests. vpath %.c $(..)string diff --git a/sysdeps/x86_64/memmove.S b/sysdeps/x86_64/memmove.S index 9cc92ff9a9..ec2b624966 100644 --- a/sysdeps/x86_64/memmove.S +++ b/sysdeps/x86_64/memmove.S @@ -29,7 +29,7 @@ #define SECTION(p) p #ifdef USE_MULTIARCH -# if !IS_IN (libc) +# if !(IS_IN (libc) || IS_IN (libcpu_rt_c)) # define MEMCPY_SYMBOL(p,s) memcpy # endif #else @@ -39,8 +39,12 @@ # define MEMCPY_SYMBOL(p,s) memcpy # endif #endif -#if !defined USE_MULTIARCH || !IS_IN (libc) -# define MEMPCPY_SYMBOL(p,s) __mempcpy +#if !defined USE_MULTIARCH || !(IS_IN (libc) || IS_IN (libcpu_rt_c)) +# if IS_IN (libcpu_rt_c) +# define MEMPCPY_SYMBOL(p,s) mempcpy +# else +# define MEMPCPY_SYMBOL(p,s) __mempcpy +# endif #endif #ifndef MEMMOVE_SYMBOL # define MEMMOVE_CHK_SYMBOL(p,s) p @@ -55,9 +59,11 @@ libc_hidden_builtin_def (memmove) strong_alias (memmove, __memcpy) libc_hidden_ver (memmove, memcpy) # endif +# if !IS_IN (libcpu_rt_c) libc_hidden_def (__mempcpy) weak_alias (__mempcpy, mempcpy) libc_hidden_builtin_def (mempcpy) +# endif # if defined SHARED && IS_IN (libc) # undef memcpy diff --git a/sysdeps/x86_64/multiarch/Makefile b/sysdeps/x86_64/multiarch/Makefile index 9bb6c8c3cd..8e86e44e33 100644 --- a/sysdeps/x86_64/multiarch/Makefile +++ b/sysdeps/x86_64/multiarch/Makefile @@ -69,5 +69,11 @@ endif ifeq ($(subdir),cpu-rt-c) libcpu-rt-c-sysdep_routines += memchr-sse2 memchr-avx2 \ memcmp-sse2 memcmp-ssse3 memcmp-sse4 \ - memcmp-avx2-movbe + memcmp-avx2-movbe memcpy-ssse3 \ + memcpy-ssse3-back \ + memmove-sse2-unaligned-erms \ + memmove-ssse3 memmove-ssse3-back \ + memmove-avx-unaligned-erms \ + memmove-avx512-unaligned-erms \ + memmove-avx512-no-vzeroupper endif diff --git a/sysdeps/x86_64/multiarch/memcpy-ssse3-back.S b/sysdeps/x86_64/multiarch/memcpy-ssse3-back.S index 7e37035487..9bcd5957cf 100644 --- a/sysdeps/x86_64/multiarch/memcpy-ssse3-back.S +++ b/sysdeps/x86_64/multiarch/memcpy-ssse3-back.S @@ -19,7 +19,7 @@ #include -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) #include "asm-syntax.h" @@ -44,10 +44,12 @@ .section .text.ssse3,"ax",@progbits #if !defined USE_AS_MEMPCPY && !defined USE_AS_MEMMOVE +# if IS_IN (libc) ENTRY (MEMPCPY_CHK) cmpq %rdx, %rcx jb HIDDEN_JUMPTARGET (__chk_fail) END (MEMPCPY_CHK) +# endif ENTRY (MEMPCPY) movq %rdi, %rax @@ -56,7 +58,7 @@ ENTRY (MEMPCPY) END (MEMPCPY) #endif -#if !defined USE_AS_BCOPY +#if !defined USE_AS_BCOPY && IS_IN (libc) ENTRY (MEMCPY_CHK) cmpq %rdx, %rcx jb HIDDEN_JUMPTARGET (__chk_fail) diff --git a/sysdeps/x86_64/multiarch/memcpy-ssse3.S b/sysdeps/x86_64/multiarch/memcpy-ssse3.S index 5dd209034b..988ce0fc83 100644 --- a/sysdeps/x86_64/multiarch/memcpy-ssse3.S +++ b/sysdeps/x86_64/multiarch/memcpy-ssse3.S @@ -19,7 +19,7 @@ #include -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) #include "asm-syntax.h" @@ -44,10 +44,12 @@ .section .text.ssse3,"ax",@progbits #if !defined USE_AS_MEMPCPY && !defined USE_AS_MEMMOVE +# if IS_IN (libc) ENTRY (MEMPCPY_CHK) cmpq %rdx, %rcx jb HIDDEN_JUMPTARGET (__chk_fail) END (MEMPCPY_CHK) +# endif ENTRY (MEMPCPY) movq %rdi, %rax @@ -56,7 +58,7 @@ ENTRY (MEMPCPY) END (MEMPCPY) #endif -#if !defined USE_AS_BCOPY +#if !defined USE_AS_BCOPY && IS_IN (libc) ENTRY (MEMCPY_CHK) cmpq %rdx, %rcx jb HIDDEN_JUMPTARGET (__chk_fail) diff --git a/sysdeps/x86_64/multiarch/memcpy.c b/sysdeps/x86_64/multiarch/memcpy.c index 419f76aefc..ee3bb2706c 100644 --- a/sysdeps/x86_64/multiarch/memcpy.c +++ b/sysdeps/x86_64/multiarch/memcpy.c @@ -18,7 +18,7 @@ . */ /* Define multiple versions only for the definition in libc. */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define memcpy __redirect_memcpy # include # undef memcpy @@ -26,14 +26,20 @@ # define SYMBOL_NAME memcpy # include "ifunc-memmove.h" +# if IS_IN (libcpu_rt_c) +# define __new_memcpy memcpy +# endif + libc_ifunc_redirected (__redirect_memcpy, __new_memcpy, IFUNC_SELECTOR ()); -# ifdef SHARED +# if !IS_IN (libcpu_rt_c) +# ifdef SHARED __hidden_ver1 (__new_memcpy, __GI_memcpy, __redirect_memcpy) __attribute__ ((visibility ("hidden"))); -# endif +# endif -# include +# include versioned_symbol (libc, __new_memcpy, memcpy, GLIBC_2_14); +# endif #endif diff --git a/sysdeps/x86_64/multiarch/memmove-avx-unaligned-erms.S b/sysdeps/x86_64/multiarch/memmove-avx-unaligned-erms.S index e195e93f15..e996ace136 100644 --- a/sysdeps/x86_64/multiarch/memmove-avx-unaligned-erms.S +++ b/sysdeps/x86_64/multiarch/memmove-avx-unaligned-erms.S @@ -1,4 +1,4 @@ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define VEC_SIZE 32 # define VEC(i) ymm##i # define VMOVNT vmovntdq diff --git a/sysdeps/x86_64/multiarch/memmove-avx512-no-vzeroupper.S b/sysdeps/x86_64/multiarch/memmove-avx512-no-vzeroupper.S index effc3ac2de..6cd1accfc5 100644 --- a/sysdeps/x86_64/multiarch/memmove-avx512-no-vzeroupper.S +++ b/sysdeps/x86_64/multiarch/memmove-avx512-no-vzeroupper.S @@ -18,15 +18,18 @@ #include -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # include "asm-syntax.h" .section .text.avx512,"ax",@progbits +# if IS_IN (libc) ENTRY (__mempcpy_chk_avx512_no_vzeroupper) cmpq %rdx, %rcx jb HIDDEN_JUMPTARGET (__chk_fail) END (__mempcpy_chk_avx512_no_vzeroupper) +strong_alias (__memmove_chk_avx512_no_vzeroupper, __memcpy_chk_avx512_no_vzeroupper) +# endif ENTRY (__mempcpy_avx512_no_vzeroupper) movq %rdi, %rax @@ -34,10 +37,12 @@ ENTRY (__mempcpy_avx512_no_vzeroupper) jmp L(start) END (__mempcpy_avx512_no_vzeroupper) +# if IS_IN (libc) ENTRY (__memmove_chk_avx512_no_vzeroupper) cmpq %rdx, %rcx jb HIDDEN_JUMPTARGET (__chk_fail) END (__memmove_chk_avx512_no_vzeroupper) +# endif ENTRY (__memmove_avx512_no_vzeroupper) mov %rdi, %rax @@ -411,5 +416,4 @@ L(gobble_256bytes_nt_loop_bkw): END (__memmove_avx512_no_vzeroupper) strong_alias (__memmove_avx512_no_vzeroupper, __memcpy_avx512_no_vzeroupper) -strong_alias (__memmove_chk_avx512_no_vzeroupper, __memcpy_chk_avx512_no_vzeroupper) #endif diff --git a/sysdeps/x86_64/multiarch/memmove-avx512-unaligned-erms.S b/sysdeps/x86_64/multiarch/memmove-avx512-unaligned-erms.S index aac1515cf6..95381d458e 100644 --- a/sysdeps/x86_64/multiarch/memmove-avx512-unaligned-erms.S +++ b/sysdeps/x86_64/multiarch/memmove-avx512-unaligned-erms.S @@ -1,4 +1,4 @@ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define VEC_SIZE 64 # define VEC(i) zmm##i # define VMOVNT vmovntdq diff --git a/sysdeps/x86_64/multiarch/memmove-sse2-unaligned-erms.S b/sysdeps/x86_64/multiarch/memmove-sse2-unaligned-erms.S index 7c6163ddcb..eae941e58e 100644 --- a/sysdeps/x86_64/multiarch/memmove-sse2-unaligned-erms.S +++ b/sysdeps/x86_64/multiarch/memmove-sse2-unaligned-erms.S @@ -16,7 +16,7 @@ License along with the GNU C Library; if not, see . */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define MEMMOVE_SYMBOL(p,s) p##_sse2_##s #else weak_alias (__mempcpy, mempcpy) diff --git a/sysdeps/x86_64/multiarch/memmove-vec-unaligned-erms.S b/sysdeps/x86_64/multiarch/memmove-vec-unaligned-erms.S index e2ede45e9f..ada93ea6ad 100644 --- a/sysdeps/x86_64/multiarch/memmove-vec-unaligned-erms.S +++ b/sysdeps/x86_64/multiarch/memmove-vec-unaligned-erms.S @@ -131,7 +131,7 @@ L(start): jb L(less_vec) cmpq $(VEC_SIZE * 2), %rdx ja L(more_2x_vec) -#if !defined USE_MULTIARCH || !IS_IN (libc) +#if !defined USE_MULTIARCH || !(IS_IN (libc) || IS_IN (libcpu_rt_c)) L(last_2x_vec): #endif /* From VEC and to 2 * VEC. No branch when size == VEC_SIZE. */ @@ -140,18 +140,20 @@ L(last_2x_vec): VMOVU %VEC(0), (%rdi) VMOVU %VEC(1), -VEC_SIZE(%rdi,%rdx) VZEROUPPER -#if !defined USE_MULTIARCH || !IS_IN (libc) +#if !defined USE_MULTIARCH || !(IS_IN (libc) || IS_IN (libcpu_rt_c)) L(nop): #endif ret -#if defined USE_MULTIARCH && IS_IN (libc) +#if defined USE_MULTIARCH && (IS_IN (libc) || IS_IN (libcpu_rt_c)) END (MEMMOVE_SYMBOL (__memmove, unaligned)) # if VEC_SIZE == 16 +# if IS_IN (libc) ENTRY (__mempcpy_chk_erms) cmpq %rdx, %rcx jb HIDDEN_JUMPTARGET (__chk_fail) END (__mempcpy_chk_erms) +# endif /* Only used to measure performance of REP MOVSB. */ ENTRY (__mempcpy_erms) @@ -163,10 +165,12 @@ ENTRY (__mempcpy_erms) jmp L(start_movsb) END (__mempcpy_erms) +# if IS_IN (libc) ENTRY (__memmove_chk_erms) cmpq %rdx, %rcx jb HIDDEN_JUMPTARGET (__chk_fail) END (__memmove_chk_erms) +# endif ENTRY (__memmove_erms) movq %rdi, %rax @@ -195,10 +199,12 @@ L(movsb_backward): ret END (__memmove_erms) strong_alias (__memmove_erms, __memcpy_erms) +# if IS_IN (libc) strong_alias (__memmove_chk_erms, __memcpy_chk_erms) +# endif # endif -# ifdef SHARED +# if defined SHARED && IS_IN (libc) ENTRY (MEMMOVE_CHK_SYMBOL (__mempcpy_chk, unaligned_erms)) cmpq %rdx, %rcx jb HIDDEN_JUMPTARGET (__chk_fail) @@ -212,10 +218,12 @@ ENTRY (MEMMOVE_SYMBOL (__mempcpy, unaligned_erms)) END (MEMMOVE_SYMBOL (__mempcpy, unaligned_erms)) # ifdef SHARED +# if IS_IN (libc) ENTRY (MEMMOVE_CHK_SYMBOL (__memmove_chk, unaligned_erms)) cmpq %rdx, %rcx jb HIDDEN_JUMPTARGET (__chk_fail) END (MEMMOVE_CHK_SYMBOL (__memmove_chk, unaligned_erms)) +# endif # endif ENTRY (MEMMOVE_SYMBOL (__memmove, unaligned_erms)) @@ -321,7 +329,7 @@ L(between_2_3): movw %si, (%rdi) ret -#if defined USE_MULTIARCH && IS_IN (libc) +#if defined USE_MULTIARCH && (IS_IN (libc) || IS_IN (libcpu_rt_c)) L(movsb_more_2x_vec): cmpq $REP_MOVSB_THRESHOLD, %rdx ja L(movsb) @@ -392,7 +400,8 @@ L(more_8x_vec): subq %r8, %rdi /* Adjust length. */ addq %r8, %rdx -#if (defined USE_MULTIARCH || VEC_SIZE == 16) && IS_IN (libc) +#if ((defined USE_MULTIARCH || VEC_SIZE == 16) \ + && (IS_IN (libc) || IS_IN (libcpu_rt_c))) /* Check non-temporal store threshold. */ cmpq __x86_shared_non_temporal_threshold(%rip), %rdx ja L(large_forward) @@ -444,7 +453,8 @@ L(more_8x_vec_backward): subq %r8, %r9 /* Adjust length. */ subq %r8, %rdx -#if (defined USE_MULTIARCH || VEC_SIZE == 16) && IS_IN (libc) +#if ((defined USE_MULTIARCH || VEC_SIZE == 16) \ + && (IS_IN (libc) || IS_IN (libcpu_rt_c))) /* Check non-temporal store threshold. */ cmpq __x86_shared_non_temporal_threshold(%rip), %rdx ja L(large_backward) @@ -474,7 +484,8 @@ L(loop_4x_vec_backward): VZEROUPPER ret -#if (defined USE_MULTIARCH || VEC_SIZE == 16) && IS_IN (libc) +#if ((defined USE_MULTIARCH || VEC_SIZE == 16) \ + && (IS_IN (libc) || IS_IN (libcpu_rt_c))) L(large_forward): /* Don't use non-temporal store if there is overlap between destination and source since destination may be in cache @@ -547,16 +558,16 @@ L(loop_large_backward): #endif END (MEMMOVE_SYMBOL (__memmove, unaligned_erms)) -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # ifdef USE_MULTIARCH strong_alias (MEMMOVE_SYMBOL (__memmove, unaligned_erms), MEMMOVE_SYMBOL (__memcpy, unaligned_erms)) -# ifdef SHARED +# if defined SHARED && IS_IN (libc) strong_alias (MEMMOVE_SYMBOL (__memmove_chk, unaligned_erms), MEMMOVE_SYMBOL (__memcpy_chk, unaligned_erms)) # endif # endif -# ifdef SHARED +# if defined SHARED && IS_IN (libc) strong_alias (MEMMOVE_CHK_SYMBOL (__memmove_chk, unaligned), MEMMOVE_CHK_SYMBOL (__memcpy_chk, unaligned)) # endif diff --git a/sysdeps/x86_64/multiarch/memmove.c b/sysdeps/x86_64/multiarch/memmove.c index d512228eae..a4fad5ae60 100644 --- a/sysdeps/x86_64/multiarch/memmove.c +++ b/sysdeps/x86_64/multiarch/memmove.c @@ -18,7 +18,7 @@ . */ /* Define multiple versions only for the definition in libc. */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define memmove __redirect_memmove # include # undef memmove @@ -26,12 +26,18 @@ # define SYMBOL_NAME memmove # include "ifunc-memmove.h" +# if IS_IN (libcpu_rt_c) +# define __libc_memmove memmove +# endif + libc_ifunc_redirected (__redirect_memmove, __libc_memmove, IFUNC_SELECTOR ()); +# if !IS_IN (libcpu_rt_c) strong_alias (__libc_memmove, memmove); -# ifdef SHARED +# ifdef SHARED __hidden_ver1 (__libc_memmove, __GI_memmove, __redirect_memmove) __attribute__ ((visibility ("hidden"))); +# endif # endif #endif diff --git a/sysdeps/x86_64/multiarch/mempcpy.c b/sysdeps/x86_64/multiarch/mempcpy.c index 9fe41dda82..fe3ece0774 100644 --- a/sysdeps/x86_64/multiarch/mempcpy.c +++ b/sysdeps/x86_64/multiarch/mempcpy.c @@ -18,7 +18,7 @@ . */ /* Define multiple versions only for the definition in libc. */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define mempcpy __redirect_mempcpy # define __mempcpy __redirect___mempcpy # define NO_MEMPCPY_STPCPY_REDIRECT @@ -30,13 +30,19 @@ # define SYMBOL_NAME mempcpy # include "ifunc-memmove.h" +# if IS_IN (libcpu_rt_c) +# define __mempcpy mempcpy +# endif + libc_ifunc_redirected (__redirect_mempcpy, __mempcpy, IFUNC_SELECTOR ()); +# if !IS_IN (libcpu_rt_c) weak_alias (__mempcpy, mempcpy) -# ifdef SHARED +# ifdef SHARED __hidden_ver1 (__mempcpy, __GI___mempcpy, __redirect___mempcpy) __attribute__ ((visibility ("hidden"))); __hidden_ver1 (mempcpy, __GI_mempcpy, __redirect_mempcpy) __attribute__ ((visibility ("hidden"))); +# endif # endif #endif From patchwork Tue Jun 12 22:19:26 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 928514 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=sourceware.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=libc-alpha-return-93111-incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.b="rzx7fmwv"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41548b2W3Qz9s31 for ; Wed, 13 Jun 2018 08:20:47 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=YvJgQvu34Iwy/1zOgzM8iShgl0IbJgA Ax5MJ7Pfiwj9HrB3ncV5usrRt73LwzmMbv3vXRZhUdddEA2Crgs9vGTJ5Qn+C6V+ OZJYx0JTjRhz3z9ZsKCsTFJXw4ZfA4raGgp8bT1ctiInusFbUvWctSbflAypn0oy j1SFbz3skMc0= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=Ec0qYiBSgh3xYd3Ughb0HDbV2uQ=; b=rzx7f mwvTS4B5tiPPEMXmU306ecqviuA4BwhPJvhLDpl427kvbk6HHds6mARjwyBUZyd2 tQfOV75ds3ZJ+Dn+kbC+AUG2QNUetmruBU1zLUTdERP3r1QkG+LtEdEE9xclIN58 Jw/qgspRGTtvu1ZnajxvA6Jx2dNlVVNsSZUlRg= Received: (qmail 92101 invoked by alias); 12 Jun 2018 22:19:52 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 91878 invoked by uid 89); 12 Jun 2018 22:19:50 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-23.8 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_SHORT, KAM_STOCKGEN, SPF_SOFTFAIL autolearn=ham version=3.3.2 spammy= X-HELO: mga01.intel.com X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 From: "H.J. Lu" To: libc-alpha@sourceware.org Subject: [PATCH 07/20] libcpu-rt-c/x86-64: Add memrchr Date: Tue, 12 Jun 2018 15:19:26 -0700 Message-Id: <20180612221939.19545-8-hjl.tools@gmail.com> In-Reply-To: <20180612221939.19545-1-hjl.tools@gmail.com> References: <20180612221939.19545-1-hjl.tools@gmail.com> * sysdeps/x86_64/Makefile (cpu-rt-c-routines): Add memrchr. * sysdeps/x86_64/memrchr.S: Support libcpu-rt-c. * sysdeps/x86_64/multiarch/memrchr-avx2.S: Likewise. * sysdeps/x86_64/multiarch/memrchr-sse2.S: Likewise. * sysdeps/x86_64/multiarch/memrchr.c: Likewise. * sysdeps/x86_64/multiarch/Makefile (libcpu-rt-c-sysdep_routines): Add memrchr-sse2 and memrchr-avx2. --- sysdeps/x86_64/Makefile | 2 +- sysdeps/x86_64/memrchr.S | 6 ++++++ sysdeps/x86_64/multiarch/Makefile | 3 ++- sysdeps/x86_64/multiarch/memrchr-avx2.S | 2 +- sysdeps/x86_64/multiarch/memrchr-sse2.S | 2 +- sysdeps/x86_64/multiarch/memrchr.c | 8 +++++++- 6 files changed, 18 insertions(+), 5 deletions(-) diff --git a/sysdeps/x86_64/Makefile b/sysdeps/x86_64/Makefile index 978cff6cba..da3264f27f 100644 --- a/sysdeps/x86_64/Makefile +++ b/sysdeps/x86_64/Makefile @@ -147,7 +147,7 @@ endif endif ifeq ($(subdir),cpu-rt-c) -cpu-rt-c-routines += memchr memcmp memcpy memmove mempcpy +cpu-rt-c-routines += memchr memcmp memcpy memmove mempcpy memrchr # For the CPU run-time tests. vpath %.c $(..)string diff --git a/sysdeps/x86_64/memrchr.S b/sysdeps/x86_64/memrchr.S index b8e3fa1d87..1488225145 100644 --- a/sysdeps/x86_64/memrchr.S +++ b/sysdeps/x86_64/memrchr.S @@ -20,6 +20,10 @@ #include +#if !defined __memrchr && IS_IN (libcpu_rt_c) +# define __memrchr memrchr +#endif + .text ENTRY (__memrchr) movd %esi, %xmm1 @@ -377,4 +381,6 @@ L(length_less16_part2_return): ret END (__memrchr) +#if !IS_IN (libcpu_rt_c) weak_alias (__memrchr, memrchr) +#endif diff --git a/sysdeps/x86_64/multiarch/Makefile b/sysdeps/x86_64/multiarch/Makefile index 8e86e44e33..582ca629d0 100644 --- a/sysdeps/x86_64/multiarch/Makefile +++ b/sysdeps/x86_64/multiarch/Makefile @@ -75,5 +75,6 @@ libcpu-rt-c-sysdep_routines += memchr-sse2 memchr-avx2 \ memmove-ssse3 memmove-ssse3-back \ memmove-avx-unaligned-erms \ memmove-avx512-unaligned-erms \ - memmove-avx512-no-vzeroupper + memmove-avx512-no-vzeroupper \ + memrchr-sse2 memrchr-avx2 endif diff --git a/sysdeps/x86_64/multiarch/memrchr-avx2.S b/sysdeps/x86_64/multiarch/memrchr-avx2.S index b41a58bcba..ee4d461fe2 100644 --- a/sysdeps/x86_64/multiarch/memrchr-avx2.S +++ b/sysdeps/x86_64/multiarch/memrchr-avx2.S @@ -16,7 +16,7 @@ License along with the GNU C Library; if not, see . */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # include diff --git a/sysdeps/x86_64/multiarch/memrchr-sse2.S b/sysdeps/x86_64/multiarch/memrchr-sse2.S index 12281663ec..f0d0668262 100644 --- a/sysdeps/x86_64/multiarch/memrchr-sse2.S +++ b/sysdeps/x86_64/multiarch/memrchr-sse2.S @@ -16,7 +16,7 @@ License along with the GNU C Library; if not, see . */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define __memrchr __memrchr_sse2 # undef weak_alias diff --git a/sysdeps/x86_64/multiarch/memrchr.c b/sysdeps/x86_64/multiarch/memrchr.c index d227fe7819..da4cff9e22 100644 --- a/sysdeps/x86_64/multiarch/memrchr.c +++ b/sysdeps/x86_64/multiarch/memrchr.c @@ -18,7 +18,7 @@ . */ /* Define multiple versions only for the definition in libc. */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define memrchr __redirect_memrchr # include # undef memrchr @@ -26,6 +26,12 @@ # define SYMBOL_NAME memrchr # include "ifunc-avx2.h" +# if IS_IN (libcpu_rt_c) +# define __memrchr memrchr +# endif + libc_ifunc_redirected (__redirect_memrchr, __memrchr, IFUNC_SELECTOR ()); +# if !IS_IN (libcpu_rt_c) weak_alias (__memrchr, memrchr) +# endif #endif From patchwork Tue Jun 12 22:19:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 928516 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=sourceware.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=libc-alpha-return-93113-incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.b="mqdpKOFE"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4154904Zbrz9s0W for ; Wed, 13 Jun 2018 08:21:08 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=GF9mKFhmTPyBOisTmjvqWA/3xnFx1bs it+jz7TGVXvB1S9KQuRpbwWdqum68OYui/BJGyT0x26HEQndRKNIFFMfc8YwW75K 7hLKMBKB+2yR2xDLO4PktBS0ufRMhiG7hFFaGdzyUzv0bESOO+xLhKs/fjQ8dXM0 iF0jjalwCoJI= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=vAew0nBJA0KM1VpBqqUT8/hPC14=; b=mqdpK OFESWWGQy/Mz0LZUyBsmOMbBVBDCgDdqteoLv1Oj7oegvnqRQDnCw1gRmX0DQplB DEIh5YgosQ/KWt/7dEj08RbwYwSIvbf2kV69IsHN7Bk18eJcpKqrrJROOw3hV0Fg MDvzuPglJnDb/aPgAMsrsfQ3DxuaKUT4LedtjE= Received: (qmail 92417 invoked by alias); 12 Jun 2018 22:19:54 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 92218 invoked by uid 89); 12 Jun 2018 22:19:52 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-23.8 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_SHORT, KAM_STOCKGEN, SPF_SOFTFAIL autolearn=ham version=3.3.2 spammy= X-HELO: mga01.intel.com X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 From: "H.J. Lu" To: libc-alpha@sourceware.org Subject: [PATCH 08/20] libcpu-rt-c/x86-64: Add memset and wmemset Date: Tue, 12 Jun 2018 15:19:27 -0700 Message-Id: <20180612221939.19545-9-hjl.tools@gmail.com> In-Reply-To: <20180612221939.19545-1-hjl.tools@gmail.com> References: <20180612221939.19545-1-hjl.tools@gmail.com> * sysdeps/x86_64/Makefile (cpu-rt-c-routines): Add memset and wmemset. * sysdeps/x86_64/memset.S: Support libcpu-rt-c. * sysdeps/x86_64/multiarch/memset-avx2-unaligned-erms.S: Likewise. * sysdeps/x86_64/multiarch/memset-avx512-no-vzeroupper.S: Likewise. * sysdeps/x86_64/multiarch/memset-avx512-unaligned-erms.S: Likewise. * sysdeps/x86_64/multiarch/memset-sse2-unaligned-erms.S: Likewise. * sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S: Likewise. * sysdeps/x86_64/multiarch/memset.c: Likewise. * sysdeps/x86_64/multiarch/wmemset.c: Likewise. * sysdeps/x86_64/multiarch/Makefile (libcpu-rt-c-sysdep_routines): Add memset-sse2-unaligned-erms, memset-avx2-unaligned-erms, memset-avx512-unaligned-erms and memset-avx512-no-vzeroupper. --- sysdeps/x86_64/Makefile | 6 ++++-- sysdeps/x86_64/memset.S | 6 +++++- sysdeps/x86_64/multiarch/Makefile | 6 +++++- .../multiarch/memset-avx2-unaligned-erms.S | 2 +- .../multiarch/memset-avx512-no-vzeroupper.S | 4 ++-- .../multiarch/memset-avx512-unaligned-erms.S | 2 +- .../multiarch/memset-sse2-unaligned-erms.S | 8 +++++--- .../multiarch/memset-vec-unaligned-erms.S | 17 ++++++++++++----- sysdeps/x86_64/multiarch/memset.c | 4 ++-- sysdeps/x86_64/multiarch/wmemset.c | 10 ++++++++-- 10 files changed, 45 insertions(+), 20 deletions(-) diff --git a/sysdeps/x86_64/Makefile b/sysdeps/x86_64/Makefile index da3264f27f..d5e4912074 100644 --- a/sysdeps/x86_64/Makefile +++ b/sysdeps/x86_64/Makefile @@ -147,10 +147,12 @@ endif endif ifeq ($(subdir),cpu-rt-c) -cpu-rt-c-routines += memchr memcmp memcpy memmove mempcpy memrchr +cpu-rt-c-routines += memchr memcmp memcpy memmove mempcpy memrchr \ + memset \ + wmemset # For the CPU run-time tests. -vpath %.c $(..)string +vpath %.c $(..)string $(..)wcsmbs endif ifeq ($(subdir),csu) diff --git a/sysdeps/x86_64/memset.S b/sysdeps/x86_64/memset.S index b342679576..4036de674d 100644 --- a/sysdeps/x86_64/memset.S +++ b/sysdeps/x86_64/memset.S @@ -47,7 +47,11 @@ #ifndef WMEMSET_SYMBOL # define WMEMSET_CHK_SYMBOL(p,s) p -# define WMEMSET_SYMBOL(p,s) __wmemset +# if IS_IN (libcpu_rt_c) +# define WMEMSET_SYMBOL(p,s) wmemset +# else +# define WMEMSET_SYMBOL(p,s) __wmemset +# endif #endif #include "multiarch/memset-vec-unaligned-erms.S" diff --git a/sysdeps/x86_64/multiarch/Makefile b/sysdeps/x86_64/multiarch/Makefile index 582ca629d0..9262251b2c 100644 --- a/sysdeps/x86_64/multiarch/Makefile +++ b/sysdeps/x86_64/multiarch/Makefile @@ -76,5 +76,9 @@ libcpu-rt-c-sysdep_routines += memchr-sse2 memchr-avx2 \ memmove-avx-unaligned-erms \ memmove-avx512-unaligned-erms \ memmove-avx512-no-vzeroupper \ - memrchr-sse2 memrchr-avx2 + memrchr-sse2 memrchr-avx2 \ + memset-sse2-unaligned-erms \ + memset-avx2-unaligned-erms \ + memset-avx512-unaligned-erms \ + memset-avx512-no-vzeroupper endif diff --git a/sysdeps/x86_64/multiarch/memset-avx2-unaligned-erms.S b/sysdeps/x86_64/multiarch/memset-avx2-unaligned-erms.S index 7ab3d89849..3943970235 100644 --- a/sysdeps/x86_64/multiarch/memset-avx2-unaligned-erms.S +++ b/sysdeps/x86_64/multiarch/memset-avx2-unaligned-erms.S @@ -1,4 +1,4 @@ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define VEC_SIZE 32 # define VEC(i) ymm##i # define VMOVU vmovdqu diff --git a/sysdeps/x86_64/multiarch/memset-avx512-no-vzeroupper.S b/sysdeps/x86_64/multiarch/memset-avx512-no-vzeroupper.S index 689cc1199c..d1bf841c56 100644 --- a/sysdeps/x86_64/multiarch/memset-avx512-no-vzeroupper.S +++ b/sysdeps/x86_64/multiarch/memset-avx512-no-vzeroupper.S @@ -18,7 +18,7 @@ #include -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) #include "asm-syntax.h" #ifndef MEMSET @@ -27,7 +27,7 @@ #endif .section .text.avx512,"ax",@progbits -#if defined PIC +#if defined PIC && IS_IN (libc) ENTRY (MEMSET_CHK) cmpq %rdx, %rcx jb HIDDEN_JUMPTARGET (__chk_fail) diff --git a/sysdeps/x86_64/multiarch/memset-avx512-unaligned-erms.S b/sysdeps/x86_64/multiarch/memset-avx512-unaligned-erms.S index 0783979ca5..dcddf27573 100644 --- a/sysdeps/x86_64/multiarch/memset-avx512-unaligned-erms.S +++ b/sysdeps/x86_64/multiarch/memset-avx512-unaligned-erms.S @@ -1,4 +1,4 @@ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define VEC_SIZE 64 # define VEC(i) zmm##i # define VMOVU vmovdqu64 diff --git a/sysdeps/x86_64/multiarch/memset-sse2-unaligned-erms.S b/sysdeps/x86_64/multiarch/memset-sse2-unaligned-erms.S index be6671759b..359cfb63e3 100644 --- a/sysdeps/x86_64/multiarch/memset-sse2-unaligned-erms.S +++ b/sysdeps/x86_64/multiarch/memset-sse2-unaligned-erms.S @@ -21,7 +21,7 @@ #include #include -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define MEMSET_SYMBOL(p,s) p##_sse2_##s # define WMEMSET_SYMBOL(p,s) p##_sse2_##s @@ -30,9 +30,11 @@ # define libc_hidden_builtin_def(name) # endif -# undef weak_alias -# define weak_alias(original, alias) \ +# if !IS_IN (libcpu_rt_c) +# undef weak_alias +# define weak_alias(original, alias) \ .weak bzero; bzero = __bzero +# endif # undef strong_alias # define strong_alias(ignored1, ignored2) diff --git a/sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S b/sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S index dc9cb88b37..08a831aad2 100644 --- a/sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S +++ b/sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S @@ -73,18 +73,23 @@ #endif .section SECTION(.text),"ax",@progbits -#if VEC_SIZE == 16 && IS_IN (libc) +#if VEC_SIZE == 16 && (IS_IN (libc) || IS_IN (libcpu_rt_c)) +# if IS_IN (libcpu_rt_c) +# define __bzero bzero +# endif ENTRY (__bzero) movq %rdi, %rax /* Set return value. */ movq %rsi, %rdx /* Set n. */ pxor %xmm0, %xmm0 jmp L(entry_from_bzero) END (__bzero) +# if !IS_IN (libcpu_rt_c) weak_alias (__bzero, bzero) +# endif #endif -#if IS_IN (libc) -# if defined SHARED +#if IS_IN (libc) || IS_IN (libcpu_rt_c) +# if defined SHARED && IS_IN (libc) ENTRY_CHK (WMEMSET_CHK_SYMBOL (__wmemset_chk, unaligned)) cmpq %rdx, %rcx jb HIDDEN_JUMPTARGET (__chk_fail) @@ -117,14 +122,16 @@ L(entry_from_bzero): VMOVU %VEC(0), (%rdi) VZEROUPPER ret -#if defined USE_MULTIARCH && IS_IN (libc) +#if defined USE_MULTIARCH && (IS_IN (libc) || IS_IN (libcpu_rt_c)) END (MEMSET_SYMBOL (__memset, unaligned)) -# if VEC_SIZE == 16 +# if VEC_SIZE == 16 && (IS_IN (libc) || IS_IN (libcpu_rt_c)) +# if IS_IN (libc) ENTRY (__memset_chk_erms) cmpq %rdx, %rcx jb HIDDEN_JUMPTARGET (__chk_fail) END (__memset_chk_erms) +# endif /* Only used to measure performance of REP STOSB. */ ENTRY (__memset_erms) diff --git a/sysdeps/x86_64/multiarch/memset.c b/sysdeps/x86_64/multiarch/memset.c index 064841d5fc..8a17a76006 100644 --- a/sysdeps/x86_64/multiarch/memset.c +++ b/sysdeps/x86_64/multiarch/memset.c @@ -18,7 +18,7 @@ . */ /* Define multiple versions only for the definition in libc. */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define memset __redirect_memset # include # undef memset @@ -28,7 +28,7 @@ libc_ifunc_redirected (__redirect_memset, memset, IFUNC_SELECTOR ()); -# ifdef SHARED +# if defined SHARED && !IS_IN (libcpu_rt_c) __hidden_ver1 (memset, __GI_memset, __redirect_memset) __attribute__ ((visibility ("hidden"))); # endif diff --git a/sysdeps/x86_64/multiarch/wmemset.c b/sysdeps/x86_64/multiarch/wmemset.c index 9fee77ea81..a382bdbad1 100644 --- a/sysdeps/x86_64/multiarch/wmemset.c +++ b/sysdeps/x86_64/multiarch/wmemset.c @@ -18,7 +18,7 @@ . */ /* Define multiple versions only for the definition in libc. */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define wmemset __redirect_wmemset # define __wmemset __redirect___wmemset # include @@ -28,13 +28,19 @@ # define SYMBOL_NAME wmemset # include "ifunc-wmemset.h" +# if IS_IN (libcpu_rt_c) +# define __wmemset wmemset +# endif + libc_ifunc_redirected (__redirect_wmemset, __wmemset, IFUNC_SELECTOR ()); +# if !IS_IN (libcpu_rt_c) weak_alias (__wmemset, wmemset) -# ifdef SHARED +# ifdef SHARED __hidden_ver1 (__wmemset, __GI___wmemset, __redirect___wmemset) __attribute__ ((visibility ("hidden"))); __hidden_ver1 (wmemset, __GI_wmemset, __redirect_wmemset) __attribute__ ((visibility ("hidden"))); +# endif # endif #endif From patchwork Tue Jun 12 22:19:28 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 928517 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=sourceware.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=libc-alpha-return-93114-incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.b="f8QE+WNd"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4154995xd5z9s31 for ; Wed, 13 Jun 2018 08:21:17 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=J3OwKfeQgnuIK7KpnDrMWRlccJoHlRz 98mbJ4W9PfZs5jp8eJk+rVymWgzE+FF2bKmYvGM3mihQn2lxblcqRoBSAS4u0+7H TZUVUitTYmMUIY11X6gdZmuaSsbU8yfCPTTY7WFlyVPPNbBOjvZQGt8cFOPLoNu/ y/ZmhqAyfG90= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=j27hw0d6FZe92udnDGQrdNHqlAI=; b=f8QE+ WNd+Lb7iVZCo/zA/gdYKv3g2rjN6nU3xMz3FuF5kWYaSswNBpoCIGQa62RMxDttS 2bShvE5MLtZv336guxQj2+6xF1IXzMPErnjuERoCU+aiG/EHcWD0WSDNXHdkhuHW YQHrPF6y+bFLGuxcKQCuJtYC/72E8xkyzTNmxQ= Received: (qmail 92589 invoked by alias); 12 Jun 2018 22:19:55 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 92363 invoked by uid 89); 12 Jun 2018 22:19:53 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.2 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_SHORT, SPF_SOFTFAIL autolearn=ham version=3.3.2 spammy=4013 X-HELO: mga01.intel.com X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 From: "H.J. Lu" To: libc-alpha@sourceware.org Subject: [PATCH 09/20] libcpu-rt-c/i386: Add memcmp Date: Tue, 12 Jun 2018 15:19:28 -0700 Message-Id: <20180612221939.19545-10-hjl.tools@gmail.com> In-Reply-To: <20180612221939.19545-1-hjl.tools@gmail.com> References: <20180612221939.19545-1-hjl.tools@gmail.com> Add memcmp to i386 libcpu-rt-c so that libcpu-rt-c with tunables can be built for i386. * sysdeps/i386/Makefile (cpu-rt-c-routines): Add memcmp. (vpath %.c $(..)string): New. * sysdeps/i386/i686/multiarch/Makefile (libcpu-rt-c-sysdep_routines): Add memcmp-ia32, memcmp-ssse3 and memcmp-sse4. * sysdeps/i386/i686/multiarch/memcmp-ia32.S: Support libcpu-rt-c. * sysdeps/i386/i686/multiarch/memcmp-sse4.S: Likewise. * sysdeps/i386/i686/multiarch/memcmp-ssse3.S: Likewise. * sysdeps/i386/i686/multiarch/memcmp.c: Likewise. --- sysdeps/i386/Makefile | 7 +++++++ sysdeps/i386/i686/multiarch/Makefile | 4 ++++ sysdeps/i386/i686/multiarch/memcmp-ia32.S | 8 ++++++-- sysdeps/i386/i686/multiarch/memcmp-sse4.S | 2 +- sysdeps/i386/i686/multiarch/memcmp-ssse3.S | 2 +- sysdeps/i386/i686/multiarch/memcmp.c | 2 +- 6 files changed, 20 insertions(+), 5 deletions(-) diff --git a/sysdeps/i386/Makefile b/sysdeps/i386/Makefile index 1682394e76..313c88d164 100644 --- a/sysdeps/i386/Makefile +++ b/sysdeps/i386/Makefile @@ -40,6 +40,13 @@ $(objpfx)tst-audit3.out: $(objpfx)tst-auditmod3b.so tst-audit3-ENV = LD_AUDIT=$(objpfx)tst-auditmod3b.so endif +ifeq ($(subdir),cpu-rt-c) +cpu-rt-c-routines += memcmp + +# For the CPU run-time tests. +vpath %.c $(..)string +endif + ifeq ($(subdir),csu) gen-as-const-headers += tlsdesc.sym endif diff --git a/sysdeps/i386/i686/multiarch/Makefile b/sysdeps/i386/i686/multiarch/Makefile index bf75a9947f..7cc686a8a2 100644 --- a/sysdeps/i386/i686/multiarch/Makefile +++ b/sysdeps/i386/i686/multiarch/Makefile @@ -53,3 +53,7 @@ ifeq ($(subdir),debug) sysdep_routines += memcpy_chk-nonshared mempcpy_chk-nonshared \ memmove_chk-nonshared memset_chk-nonshared endif + +ifeq ($(subdir),cpu-rt-c) +libcpu-rt-c-sysdep_routines += memcmp-ia32 memcmp-ssse3 memcmp-sse4 +endif diff --git a/sysdeps/i386/i686/multiarch/memcmp-ia32.S b/sysdeps/i386/i686/multiarch/memcmp-ia32.S index b468350474..8dbf6ac640 100644 --- a/sysdeps/i386/i686/multiarch/memcmp-ia32.S +++ b/sysdeps/i386/i686/multiarch/memcmp-ia32.S @@ -16,7 +16,7 @@ License along with the GNU C Library; if not, see . */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define memcmp __memcmp_ia32 # ifdef SHARED @@ -24,8 +24,12 @@ /* IFUNC doesn't work with the hidden functions in shared library since they will be called without setting up EBX needed for PLT which is used by IFUNC. */ -# define libc_hidden_builtin_def(name) \ +# if IS_IN (libcpu_rt_c) +# define libc_hidden_builtin_def(name) +# else +# define libc_hidden_builtin_def(name) \ .globl __GI_memcmp; __GI_memcmp = memcmp +# endif # endif # undef weak_alias diff --git a/sysdeps/i386/i686/multiarch/memcmp-sse4.S b/sysdeps/i386/i686/multiarch/memcmp-sse4.S index be37108987..55c37e5717 100644 --- a/sysdeps/i386/i686/multiarch/memcmp-sse4.S +++ b/sysdeps/i386/i686/multiarch/memcmp-sse4.S @@ -17,7 +17,7 @@ License along with the GNU C Library; if not, see . */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # include diff --git a/sysdeps/i386/i686/multiarch/memcmp-ssse3.S b/sysdeps/i386/i686/multiarch/memcmp-ssse3.S index 31a0b2908e..088eb2b4ff 100644 --- a/sysdeps/i386/i686/multiarch/memcmp-ssse3.S +++ b/sysdeps/i386/i686/multiarch/memcmp-ssse3.S @@ -17,7 +17,7 @@ License along with the GNU C Library; if not, see . */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # include diff --git a/sysdeps/i386/i686/multiarch/memcmp.c b/sysdeps/i386/i686/multiarch/memcmp.c index dd5a93a26c..58687e7603 100644 --- a/sysdeps/i386/i686/multiarch/memcmp.c +++ b/sysdeps/i386/i686/multiarch/memcmp.c @@ -18,7 +18,7 @@ . */ /* Define multiple versions only for the definition in libc. */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define memcmp __redirect_memcmp # include # undef memcmp From patchwork Tue Jun 12 22:19:29 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 928518 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=sourceware.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=libc-alpha-return-93115-incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.b="f3Z7igKY"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41549N3h4gz9s0W for ; Wed, 13 Jun 2018 08:21:28 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=vUNJaEAXthZZm27BgjYc4jlhHOPWal0 kvfnhqUsP2dIqHUWFTzSdAAdtjyTMT9w8YREQAZ89NXDBjV055iJnhob5I8YFIyi /8nj5yZOoi7XJNuBQKwKtiwanmb+kMnmZU4ie4oWUaaepW09xElstus8R2v41ccu Rnz2zgT7ixzM= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=inzb64AhddMSrmWfktPgwR1DBVE=; b=f3Z7i gKYJR05SEEbsVo6RypY3yNlJhUvoX93W+JP6j5c1mkFw4Qnjdh/S37Kiq9HuDb9A l52P3tsE6nb8ymRU8t6NAkZXrJPmB/dK29hhYMvE9AvPslkzbEOsW15FGPB3GnRj 718RuoT6Uorv50LJFrW/ygf83h/xgGaUsfAaj8= Received: (qmail 92788 invoked by alias); 12 Jun 2018 22:19:56 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 92404 invoked by uid 89); 12 Jun 2018 22:19:53 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.2 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, SPF_SOFTFAIL autolearn=ham version=3.3.2 spammy= X-HELO: mga01.intel.com X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 From: "H.J. Lu" To: libc-alpha@sourceware.org Subject: [PATCH 10/20] libcpu-rt-c: Don't use IFUNC memcmp in init_cpu_features Date: Tue, 12 Jun 2018 15:19:29 -0700 Message-Id: <20180612221939.19545-11-hjl.tools@gmail.com> In-Reply-To: <20180612221939.19545-1-hjl.tools@gmail.com> References: <20180612221939.19545-1-hjl.tools@gmail.com> Don't use IFUNC memcmp in init_cpu_features libcpu-rt-c since IFUNC must be set up by init_cpu_features. * sysdeps/x86/cpu-tunables.c (DEFAULT_MEMCMP): Don't use IFUNC memcmp in libcpu-rt-c. --- sysdeps/x86/cpu-tunables.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/sysdeps/x86/cpu-tunables.c b/sysdeps/x86/cpu-tunables.c index 3d1c26577f..901a5d3934 100644 --- a/sysdeps/x86/cpu-tunables.c +++ b/sysdeps/x86/cpu-tunables.c @@ -32,13 +32,17 @@ /* We can't use IFUNC memcmp nor strlen in init_cpu_features from libc.a since IFUNC must be set up by init_cpu_features. */ -# if defined USE_MULTIARCH && !defined SHARED +# if defined USE_MULTIARCH && (!defined SHARED || IS_IN (libcpu_rt_c)) # ifdef __x86_64__ # define DEFAULT_MEMCMP __memcmp_sse2 # else # define DEFAULT_MEMCMP __memcmp_ia32 # endif -extern __typeof (memcmp) DEFAULT_MEMCMP; +extern __typeof (memcmp) DEFAULT_MEMCMP +# if IS_IN (libcpu_rt_c) + __attribute__ ((visibility ("hidden"))); +# endif +; # else # define DEFAULT_MEMCMP memcmp # endif From patchwork Tue Jun 12 22:19:30 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 928519 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=sourceware.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=libc-alpha-return-93116-incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.b="Us9FCbIH"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41549Y2sxlz9s0W for ; Wed, 13 Jun 2018 08:21:37 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=T2Opo5HC/wVp5cnPccbjkQgGgOFbKZB RX8Z8cFY/S9yH5KxFtKZHa+3gTp6gUYqlLv1ei8zG0dQPeQgvDOf9hGEExc+MIBZ To0QobgmeV+IHfdvniCIjSf/+zUaaE9/CZ2ZF3FpRiEbOVwnKrvVkVK53SFLawA3 POR0bztF2qgY= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=ddzl4ljepconQzXx1RI4wzhZty8=; b=Us9FC bIHCOhxHJWG88E99jzsGaWjwP3Y9wEOsG8tAfi7FWnJoBAtNYVT4GLdiddlcRRF4 69VJJof50GeJRG7AmcUORua4ROu54aQBI/PNz3kZ0L3BjdJyNKO+FV/VHjf39/TJ 9xMnt9lpg8kN6Zs26asHi489B3oOBQ39BH8faw= Received: (qmail 92933 invoked by alias); 12 Jun 2018 22:19:57 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 92583 invoked by uid 89); 12 Jun 2018 22:19:55 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.2 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_SHORT, SPF_SOFTFAIL autolearn=ham version=3.3.2 spammy= X-HELO: mga01.intel.com X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 From: "H.J. Lu" To: libc-alpha@sourceware.org Subject: [PATCH 11/20] libcpu-rt-c/x86-64: Add strchr Date: Tue, 12 Jun 2018 15:19:30 -0700 Message-Id: <20180612221939.19545-12-hjl.tools@gmail.com> In-Reply-To: <20180612221939.19545-1-hjl.tools@gmail.com> References: <20180612221939.19545-1-hjl.tools@gmail.com> * sysdeps/x86_64/Makefile (cpu-rt-c-routines): Add strchr. * sysdeps/x86_64/multiarch/Makefile (libcpu-rt-c-sysdep_routines): Add strchr-sse2-no-bsf, strchr-sse2 and strchr-avx2. * sysdeps/x86_64/multiarch/strchr-avx2.S: Support libcpu-rt-c. * sysdeps/x86_64/multiarch/strchr-sse2-no-bsf.S: Likewise. * sysdeps/x86_64/multiarch/strchr-sse2.S: Likewise. * sysdeps/x86_64/multiarch/strchr.c: Likewise. --- sysdeps/x86_64/Makefile | 2 +- sysdeps/x86_64/multiarch/Makefile | 4 +++- sysdeps/x86_64/multiarch/strchr-avx2.S | 2 +- sysdeps/x86_64/multiarch/strchr-sse2-no-bsf.S | 2 +- sysdeps/x86_64/multiarch/strchr-sse2.S | 2 +- sysdeps/x86_64/multiarch/strchr.c | 4 ++-- 6 files changed, 9 insertions(+), 7 deletions(-) diff --git a/sysdeps/x86_64/Makefile b/sysdeps/x86_64/Makefile index d5e4912074..6c8adb898a 100644 --- a/sysdeps/x86_64/Makefile +++ b/sysdeps/x86_64/Makefile @@ -148,7 +148,7 @@ endif ifeq ($(subdir),cpu-rt-c) cpu-rt-c-routines += memchr memcmp memcpy memmove mempcpy memrchr \ - memset \ + memset strchr \ wmemset # For the CPU run-time tests. diff --git a/sysdeps/x86_64/multiarch/Makefile b/sysdeps/x86_64/multiarch/Makefile index 9262251b2c..b06c1555df 100644 --- a/sysdeps/x86_64/multiarch/Makefile +++ b/sysdeps/x86_64/multiarch/Makefile @@ -80,5 +80,7 @@ libcpu-rt-c-sysdep_routines += memchr-sse2 memchr-avx2 \ memset-sse2-unaligned-erms \ memset-avx2-unaligned-erms \ memset-avx512-unaligned-erms \ - memset-avx512-no-vzeroupper + memset-avx512-no-vzeroupper \ + strchr-sse2-no-bsf strchr-sse2 \ + strchr-avx2 endif diff --git a/sysdeps/x86_64/multiarch/strchr-avx2.S b/sysdeps/x86_64/multiarch/strchr-avx2.S index 47bc3c9949..fd5bd1a64a 100644 --- a/sysdeps/x86_64/multiarch/strchr-avx2.S +++ b/sysdeps/x86_64/multiarch/strchr-avx2.S @@ -16,7 +16,7 @@ License along with the GNU C Library; if not, see . */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # include diff --git a/sysdeps/x86_64/multiarch/strchr-sse2-no-bsf.S b/sysdeps/x86_64/multiarch/strchr-sse2-no-bsf.S index 93fb661da2..42be1a6c79 100644 --- a/sysdeps/x86_64/multiarch/strchr-sse2-no-bsf.S +++ b/sysdeps/x86_64/multiarch/strchr-sse2-no-bsf.S @@ -17,7 +17,7 @@ License along with the GNU C Library; if not, see . */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # include # include "asm-syntax.h" diff --git a/sysdeps/x86_64/multiarch/strchr-sse2.S b/sysdeps/x86_64/multiarch/strchr-sse2.S index 8a6e77195c..ac1f7fc494 100644 --- a/sysdeps/x86_64/multiarch/strchr-sse2.S +++ b/sysdeps/x86_64/multiarch/strchr-sse2.S @@ -16,7 +16,7 @@ License along with the GNU C Library; if not, see . */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define strchr __strchr_sse2 # undef weak_alias diff --git a/sysdeps/x86_64/multiarch/strchr.c b/sysdeps/x86_64/multiarch/strchr.c index 76d64fb378..ac748dc749 100644 --- a/sysdeps/x86_64/multiarch/strchr.c +++ b/sysdeps/x86_64/multiarch/strchr.c @@ -18,7 +18,7 @@ . */ /* Define multiple versions only for the definition in libc. */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define strchr __redirect_strchr # include # undef strchr @@ -48,7 +48,7 @@ IFUNC_SELECTOR (void) libc_ifunc_redirected (__redirect_strchr, strchr, IFUNC_SELECTOR ()); weak_alias (strchr, index) -# ifdef SHARED +# if defined SHARED && !IS_IN (libcpu_rt_c) __hidden_ver1 (strchr, __GI_strchr, __redirect_strchr) __attribute__((visibility ("hidden"))); # endif From patchwork Tue Jun 12 22:19:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 928521 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=sourceware.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=libc-alpha-return-93118-incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.b="B4ENik/A"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41549v2RsTz9s0W for ; Wed, 13 Jun 2018 08:21:55 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=GWjoY4Dwj3wd+tUqADoxsVefgZzovCX aVItITVOkL5GHB0Rv3IYgr3iCyBLMJIecORdqMJhcaoOINe4Z1At298HQhAZGXKN XXpdwQdWb14DzjDVh+prVCQhP92jPkv7zP7ao1FbkT/bQ9BlS5YsgOS+h27UY/JF MXdvwNsvNA4U= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=wMHx6O69wGpIFFdtuST12fRAnvg=; b=B4ENi k/At3vv5hItKx6SHccPfoHmxbmem3kQL53ZsKUH63W8MO3lWW5ZQpI7ewxEU2V+g E/r9k73G1OxGYjW+DYVsMM/sMK13PS5zYriUB0qDiAgvSTy2YO4WlxFQsZaU7brC 0iY6bQwEkTngxyxHi4wiLusVkW7hT9XSJ6pnF8= Received: (qmail 93370 invoked by alias); 12 Jun 2018 22:20:00 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 92686 invoked by uid 89); 12 Jun 2018 22:19:55 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.2 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_SHORT, SPF_SOFTFAIL autolearn=ham version=3.3.2 spammy= X-HELO: mga01.intel.com X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 From: "H.J. Lu" To: libc-alpha@sourceware.org Subject: [PATCH 12/20] libcpu-rt-c/x86-64: Add strcmp Date: Tue, 12 Jun 2018 15:19:31 -0700 Message-Id: <20180612221939.19545-13-hjl.tools@gmail.com> In-Reply-To: <20180612221939.19545-1-hjl.tools@gmail.com> References: <20180612221939.19545-1-hjl.tools@gmail.com> * sysdeps/x86_64/Makefile (cpu-rt-c-routines): Add strcmp. * sysdeps/x86_64/multiarch/Makefile (libcpu-rt-c-sysdep_routines): Add strcmp-sse2. strcmp-sse2-unaligned, strcmp-ssse3, strcmp-sse4_2 and strcmp-avx2. * sysdeps/x86_64/multiarch/strcmp-avx2.S: Support libcpu-rt-c. * sysdeps/x86_64/multiarch/strcmp-sse2-unaligned.S: Likewise. * sysdeps/x86_64/multiarch/strcmp-sse2.S: Likewise. * sysdeps/x86_64/multiarch/strcmp-ssse3.S: Likewise. * sysdeps/x86_64/multiarch/strcmp.c: Likewise. --- sysdeps/x86_64/Makefile | 2 +- sysdeps/x86_64/multiarch/Makefile | 4 +++- sysdeps/x86_64/multiarch/strcmp-avx2.S | 2 +- sysdeps/x86_64/multiarch/strcmp-sse2-unaligned.S | 2 +- sysdeps/x86_64/multiarch/strcmp-sse2.S | 2 +- sysdeps/x86_64/multiarch/strcmp-ssse3.S | 2 +- sysdeps/x86_64/multiarch/strcmp.c | 4 ++-- 7 files changed, 10 insertions(+), 8 deletions(-) diff --git a/sysdeps/x86_64/Makefile b/sysdeps/x86_64/Makefile index 6c8adb898a..dbd2d5e6df 100644 --- a/sysdeps/x86_64/Makefile +++ b/sysdeps/x86_64/Makefile @@ -148,7 +148,7 @@ endif ifeq ($(subdir),cpu-rt-c) cpu-rt-c-routines += memchr memcmp memcpy memmove mempcpy memrchr \ - memset strchr \ + memset strchr strcmp \ wmemset # For the CPU run-time tests. diff --git a/sysdeps/x86_64/multiarch/Makefile b/sysdeps/x86_64/multiarch/Makefile index b06c1555df..c1cf7d89fa 100644 --- a/sysdeps/x86_64/multiarch/Makefile +++ b/sysdeps/x86_64/multiarch/Makefile @@ -82,5 +82,7 @@ libcpu-rt-c-sysdep_routines += memchr-sse2 memchr-avx2 \ memset-avx512-unaligned-erms \ memset-avx512-no-vzeroupper \ strchr-sse2-no-bsf strchr-sse2 \ - strchr-avx2 + strchr-avx2 strcmp-sse2 \ + strcmp-sse2-unaligned strcmp-ssse3 \ + strcmp-sse4_2 strcmp-avx2 endif diff --git a/sysdeps/x86_64/multiarch/strcmp-avx2.S b/sysdeps/x86_64/multiarch/strcmp-avx2.S index e8397f3b05..29ccda4502 100644 --- a/sysdeps/x86_64/multiarch/strcmp-avx2.S +++ b/sysdeps/x86_64/multiarch/strcmp-avx2.S @@ -16,7 +16,7 @@ License along with the GNU C Library; if not, see . */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # include diff --git a/sysdeps/x86_64/multiarch/strcmp-sse2-unaligned.S b/sysdeps/x86_64/multiarch/strcmp-sse2-unaligned.S index a9b6267d15..acf8e0caf9 100644 --- a/sysdeps/x86_64/multiarch/strcmp-sse2-unaligned.S +++ b/sysdeps/x86_64/multiarch/strcmp-sse2-unaligned.S @@ -16,7 +16,7 @@ License along with the GNU C Library; if not, see . */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) #include "sysdep.h" diff --git a/sysdeps/x86_64/multiarch/strcmp-sse2.S b/sysdeps/x86_64/multiarch/strcmp-sse2.S index d173ded8c0..f1a62b207f 100644 --- a/sysdeps/x86_64/multiarch/strcmp-sse2.S +++ b/sysdeps/x86_64/multiarch/strcmp-sse2.S @@ -16,7 +16,7 @@ License along with the GNU C Library; if not, see . */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # include # define STRCMP __strcmp_sse2 diff --git a/sysdeps/x86_64/multiarch/strcmp-ssse3.S b/sysdeps/x86_64/multiarch/strcmp-ssse3.S index 1b7fa33c91..1d697a4bd4 100644 --- a/sysdeps/x86_64/multiarch/strcmp-ssse3.S +++ b/sysdeps/x86_64/multiarch/strcmp-ssse3.S @@ -1,4 +1,4 @@ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define USE_SSSE3 1 # define STRCMP __strcmp_ssse3 # include "../strcmp.S" diff --git a/sysdeps/x86_64/multiarch/strcmp.c b/sysdeps/x86_64/multiarch/strcmp.c index b903e418df..13370d2ca0 100644 --- a/sysdeps/x86_64/multiarch/strcmp.c +++ b/sysdeps/x86_64/multiarch/strcmp.c @@ -18,7 +18,7 @@ . */ /* Define multiple versions only for the definition in libc. */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define strcmp __redirect_strcmp # include # undef strcmp @@ -52,7 +52,7 @@ IFUNC_SELECTOR (void) libc_ifunc_redirected (__redirect_strcmp, strcmp, IFUNC_SELECTOR ()); -# ifdef SHARED +# if defined SHARED && !IS_IN (libcpu_rt_c) __hidden_ver1 (strcmp, __GI_strcmp, __redirect_strcmp) __attribute__ ((visibility ("hidden"))); # endif From patchwork Tue Jun 12 22:19:32 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 928520 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=sourceware.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=libc-alpha-return-93117-incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.b="J5AAZBBM"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41549k2hWjz9s0W for ; Wed, 13 Jun 2018 08:21:46 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=l7YONb5hukU1YEh4MtBl9W5pUL617HS fD2bCeQ37GTFxLFqrrL7WcZ4zty0Misa89wnHzdcRHaKu3g7+S+KG4IU1oQNPxMA oiqmUZeHGt5Wvq+xJKUrqAYUH1HsP96pQOuuv8rFm7Ck8WGtJ+anInKqo7LDYFOP 9hGtdVH5+uMU= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=TiOdG0nvL4PchXRX79gjVlizXl8=; b=J5AAZ BBMFt5o+FlzcDN45JgZuvVJJdYK2060NWIDlbc4v9rqAIqUudUQ94S74GaBawQZg hZ4LN68FCy31orIHZdNirBq3YH6AWj8hLFvkyZ8KzCE3nOmrb5uyVVhikuoSkhvd PIgAFe8kVYv8HmJjN8qkMi5JWgMFxaBqFJyQMk= Received: (qmail 93293 invoked by alias); 12 Jun 2018 22:20:00 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 92747 invoked by uid 89); 12 Jun 2018 22:19:56 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.3 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_SHORT, SPF_SOFTFAIL autolearn=ham version=3.3.2 spammy= X-HELO: mga01.intel.com X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 From: "H.J. Lu" To: libc-alpha@sourceware.org Subject: [PATCH 13/20] libcpu-rt-c/x86-64: Add strcpy Date: Tue, 12 Jun 2018 15:19:32 -0700 Message-Id: <20180612221939.19545-14-hjl.tools@gmail.com> In-Reply-To: <20180612221939.19545-1-hjl.tools@gmail.com> References: <20180612221939.19545-1-hjl.tools@gmail.com> * sysdeps/x86_64/Makefile (cpu-rt-c-routines): Add strcpy. * sysdeps/x86_64/multiarch/Makefile (libcpu-rt-c-sysdep_routines): Add strcpy-sse2, strcpy-sse2-unaligned and strcpy-ssse3. * sysdeps/x86_64/multiarch/strcpy-sse2-unaligned.S: Support libcpu-rt-c. * sysdeps/x86_64/multiarch/strcpy-sse2.S: Likewise. * sysdeps/x86_64/multiarch/strcpy-ssse3.S: Likewise. * sysdeps/x86_64/multiarch/strcpy.c: Likewise. --- sysdeps/x86_64/Makefile | 2 +- sysdeps/x86_64/multiarch/Makefile | 3 ++- sysdeps/x86_64/multiarch/strcpy-sse2-unaligned.S | 2 +- sysdeps/x86_64/multiarch/strcpy-sse2.S | 2 +- sysdeps/x86_64/multiarch/strcpy-ssse3.S | 2 +- sysdeps/x86_64/multiarch/strcpy.c | 4 ++-- 6 files changed, 8 insertions(+), 7 deletions(-) diff --git a/sysdeps/x86_64/Makefile b/sysdeps/x86_64/Makefile index dbd2d5e6df..b793d067f2 100644 --- a/sysdeps/x86_64/Makefile +++ b/sysdeps/x86_64/Makefile @@ -148,7 +148,7 @@ endif ifeq ($(subdir),cpu-rt-c) cpu-rt-c-routines += memchr memcmp memcpy memmove mempcpy memrchr \ - memset strchr strcmp \ + memset strchr strcmp strcpy \ wmemset # For the CPU run-time tests. diff --git a/sysdeps/x86_64/multiarch/Makefile b/sysdeps/x86_64/multiarch/Makefile index c1cf7d89fa..c6040a0170 100644 --- a/sysdeps/x86_64/multiarch/Makefile +++ b/sysdeps/x86_64/multiarch/Makefile @@ -84,5 +84,6 @@ libcpu-rt-c-sysdep_routines += memchr-sse2 memchr-avx2 \ strchr-sse2-no-bsf strchr-sse2 \ strchr-avx2 strcmp-sse2 \ strcmp-sse2-unaligned strcmp-ssse3 \ - strcmp-sse4_2 strcmp-avx2 + strcmp-sse4_2 strcmp-avx2 strcpy-sse2 \ + strcpy-sse2-unaligned strcpy-ssse3 endif diff --git a/sysdeps/x86_64/multiarch/strcpy-sse2-unaligned.S b/sysdeps/x86_64/multiarch/strcpy-sse2-unaligned.S index 56b748eb2c..8ae7bd3cc3 100644 --- a/sysdeps/x86_64/multiarch/strcpy-sse2-unaligned.S +++ b/sysdeps/x86_64/multiarch/strcpy-sse2-unaligned.S @@ -17,7 +17,7 @@ License along with the GNU C Library; if not, see . */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # ifndef USE_AS_STRCAT # include diff --git a/sysdeps/x86_64/multiarch/strcpy-sse2.S b/sysdeps/x86_64/multiarch/strcpy-sse2.S index 70136017fa..c6cd2434ef 100644 --- a/sysdeps/x86_64/multiarch/strcpy-sse2.S +++ b/sysdeps/x86_64/multiarch/strcpy-sse2.S @@ -16,7 +16,7 @@ License along with the GNU C Library; if not, see . */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # include # define strcpy __strcpy_sse2 diff --git a/sysdeps/x86_64/multiarch/strcpy-ssse3.S b/sysdeps/x86_64/multiarch/strcpy-ssse3.S index 9858d0c4d5..d000fc2494 100644 --- a/sysdeps/x86_64/multiarch/strcpy-ssse3.S +++ b/sysdeps/x86_64/multiarch/strcpy-ssse3.S @@ -17,7 +17,7 @@ License along with the GNU C Library; if not, see . */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # ifndef USE_AS_STRCAT # include diff --git a/sysdeps/x86_64/multiarch/strcpy.c b/sysdeps/x86_64/multiarch/strcpy.c index 12e0e3ffe2..ccfa151085 100644 --- a/sysdeps/x86_64/multiarch/strcpy.c +++ b/sysdeps/x86_64/multiarch/strcpy.c @@ -18,7 +18,7 @@ . */ /* Define multiple versions only for the definition in libc. */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define strcpy __redirect_strcpy # include # undef strcpy @@ -28,7 +28,7 @@ libc_ifunc_redirected (__redirect_strcpy, strcpy, IFUNC_SELECTOR ()); -# ifdef SHARED +# if defined SHARED && !IS_IN (libcpu_rt_c) __hidden_ver1 (strcpy, __GI_strcpy, __redirect_strcpy) __attribute__ ((visibility ("hidden"))); # endif From patchwork Tue Jun 12 22:19:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 928523 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=sourceware.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=libc-alpha-return-93120-incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.b="cKeD7SqD"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4154BD62kJz9s0W for ; Wed, 13 Jun 2018 08:22:12 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=Da2XXZXGcAzcHyvP5r8RgcvBHDC1dRD 3wb3TjCpG2p9NiBofDAgby7h+PgrgVGvhGDTKTYsU1Yj1gajyjr9ob2EkYViK6CB 8t6O/MrNSMREwI32lzW2+poatCE3hcExSUP0wHDS80Xm8RMAUk0MpKm3h+cK/O9N 6ts0pb6CGgXs= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=dp64o1ajRB2c80bR55oEzTTXQpA=; b=cKeD7 SqDImaeAtI4QDIPTjowO7iT3nP9gxybTb/R45tSaIFavRMGRQivTaysXFnvoelyT arR8KZ7FBJjdP9QxLgy6CfqDjCEm2nGW8A4PLHvywfAYgoslqiIN9JyoS+Ret9K4 ZV3stMaESfa91sXOOSNsCrG5KNXbK8pwJoCfIw= Received: (qmail 94082 invoked by alias); 12 Jun 2018 22:20:04 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 93006 invoked by uid 89); 12 Jun 2018 22:19:57 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.3 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_SHORT, SPF_SOFTFAIL autolearn=ham version=3.3.2 spammy= X-HELO: mga01.intel.com X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 From: "H.J. Lu" To: libc-alpha@sourceware.org Subject: [PATCH 14/20] libcpu-rt-c/x86-64: Add strlen Date: Tue, 12 Jun 2018 15:19:33 -0700 Message-Id: <20180612221939.19545-15-hjl.tools@gmail.com> In-Reply-To: <20180612221939.19545-1-hjl.tools@gmail.com> References: <20180612221939.19545-1-hjl.tools@gmail.com> * sysdeps/x86_64/Makefile (cpu-rt-c-routines): Add strlen. * sysdeps/x86_64/multiarch/Makefile (libcpu-rt-c-sysdep_routines): Add strlen-sse2 and strlen-avx2. * sysdeps/x86_64/multiarch/strlen-avx2.S: Support libcpu-rt-c. * sysdeps/x86_64/multiarch/strlen-sse2.S: Likewise. * sysdeps/x86_64/multiarch/strlen.c: Likewise. --- sysdeps/x86_64/Makefile | 2 +- sysdeps/x86_64/multiarch/Makefile | 3 ++- sysdeps/x86_64/multiarch/strlen-avx2.S | 2 +- sysdeps/x86_64/multiarch/strlen-sse2.S | 2 +- sysdeps/x86_64/multiarch/strlen.c | 4 ++-- 5 files changed, 7 insertions(+), 6 deletions(-) diff --git a/sysdeps/x86_64/Makefile b/sysdeps/x86_64/Makefile index b793d067f2..947cb48086 100644 --- a/sysdeps/x86_64/Makefile +++ b/sysdeps/x86_64/Makefile @@ -148,7 +148,7 @@ endif ifeq ($(subdir),cpu-rt-c) cpu-rt-c-routines += memchr memcmp memcpy memmove mempcpy memrchr \ - memset strchr strcmp strcpy \ + memset strchr strcmp strcpy strlen \ wmemset # For the CPU run-time tests. diff --git a/sysdeps/x86_64/multiarch/Makefile b/sysdeps/x86_64/multiarch/Makefile index c6040a0170..b2f0e9f8da 100644 --- a/sysdeps/x86_64/multiarch/Makefile +++ b/sysdeps/x86_64/multiarch/Makefile @@ -85,5 +85,6 @@ libcpu-rt-c-sysdep_routines += memchr-sse2 memchr-avx2 \ strchr-avx2 strcmp-sse2 \ strcmp-sse2-unaligned strcmp-ssse3 \ strcmp-sse4_2 strcmp-avx2 strcpy-sse2 \ - strcpy-sse2-unaligned strcpy-ssse3 + strcpy-sse2-unaligned strcpy-ssse3 \ + strlen-sse2 strlen-avx2 endif diff --git a/sysdeps/x86_64/multiarch/strlen-avx2.S b/sysdeps/x86_64/multiarch/strlen-avx2.S index fb2418cddc..6e390e1ddf 100644 --- a/sysdeps/x86_64/multiarch/strlen-avx2.S +++ b/sysdeps/x86_64/multiarch/strlen-avx2.S @@ -16,7 +16,7 @@ License along with the GNU C Library; if not, see . */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # include diff --git a/sysdeps/x86_64/multiarch/strlen-sse2.S b/sysdeps/x86_64/multiarch/strlen-sse2.S index 7bc57b8d0f..c0d80a3779 100644 --- a/sysdeps/x86_64/multiarch/strlen-sse2.S +++ b/sysdeps/x86_64/multiarch/strlen-sse2.S @@ -16,7 +16,7 @@ License along with the GNU C Library; if not, see . */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define strlen __strlen_sse2 #endif diff --git a/sysdeps/x86_64/multiarch/strlen.c b/sysdeps/x86_64/multiarch/strlen.c index 1758d22b8f..04d4c04b15 100644 --- a/sysdeps/x86_64/multiarch/strlen.c +++ b/sysdeps/x86_64/multiarch/strlen.c @@ -18,7 +18,7 @@ . */ /* Define multiple versions only for the definition in libc. */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define strlen __redirect_strlen # include # undef strlen @@ -27,7 +27,7 @@ # include "ifunc-avx2.h" libc_ifunc_redirected (__redirect_strlen, strlen, IFUNC_SELECTOR ()); -# ifdef SHARED +# if defined SHARED && !IS_IN (libcpu_rt_c) __hidden_ver1 (strlen, __GI_strlen, __redirect_strlen) __attribute__((visibility ("hidden"))); # endif From patchwork Tue Jun 12 22:19:34 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 928522 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=sourceware.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=libc-alpha-return-93119-incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.b="xHFX/Ma3"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4154B366myz9s0W for ; Wed, 13 Jun 2018 08:22:03 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=eO7tXkUYLu5BWGekTH+HI35zw59XgaW 0GHUlStaiStj+SSf+aAtWb7J5HdVLmbQvJzuWVBP3PP13VL+W9wN+GsEDP1l5VKa 8IWJ6u6aHJyqsXlWHqpsJkro7AgAs8+KuwGgpOSY2BeFnbKgapFqS5fYx4L2aRjN qVaIdAohPJqU= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=VJSbQwnIJVnhsYk+wF5ezvEwAjY=; b=xHFX/ Ma3M53cQfUBL5jivXY5QzteKAc49JNmb1oUB25XinZXHTiC0qCYuj1luXaINyH24 s/IafnPE9oOKnGzLyr6eeUdialsdkgrFsOQ0PQV5AMwJgE2FbmFRLLx8rmkG5S5A N/W8aDCdZN6aagmaZLt4uYmO6BhxWFPZ/2Xnuo= Received: (qmail 93958 invoked by alias); 12 Jun 2018 22:20:03 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 92943 invoked by uid 89); 12 Jun 2018 22:19:57 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.3 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_SHORT, SPF_SOFTFAIL autolearn=ham version=3.3.2 spammy= X-HELO: mga01.intel.com X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 From: "H.J. Lu" To: libc-alpha@sourceware.org Subject: [PATCH 15/20] libcpu-rt-c/x86-64: Add strcat Date: Tue, 12 Jun 2018 15:19:34 -0700 Message-Id: <20180612221939.19545-16-hjl.tools@gmail.com> In-Reply-To: <20180612221939.19545-1-hjl.tools@gmail.com> References: <20180612221939.19545-1-hjl.tools@gmail.com> * sysdeps/x86_64/Makefile (cpu-rt-c-routines): Add strcat. * sysdeps/x86_64/multiarch/Makefile (libcpu-rt-c-sysdep_routines): Add strcat-sse2, strcat-sse2-unaligned and strcat-ssse3. * sysdeps/x86_64/strcat.S: Support libcpu-rt-c. * sysdeps/x86_64/multiarch/strcat-sse2-unaligned.S: Likewise. * sysdeps/x86_64/multiarch/strcat-sse2.S: Likewise. * sysdeps/x86_64/multiarch/strcat-ssse3.S: Likewise. * sysdeps/x86_64/multiarch/strcat.c: Likewise. --- sysdeps/x86_64/Makefile | 2 +- sysdeps/x86_64/multiarch/Makefile | 2 ++ sysdeps/x86_64/multiarch/strcat-sse2-unaligned.S | 2 +- sysdeps/x86_64/multiarch/strcat-sse2.S | 2 +- sysdeps/x86_64/multiarch/strcat-ssse3.S | 2 +- sysdeps/x86_64/multiarch/strcat.c | 4 ++-- sysdeps/x86_64/strcat.S | 2 ++ 7 files changed, 10 insertions(+), 6 deletions(-) diff --git a/sysdeps/x86_64/Makefile b/sysdeps/x86_64/Makefile index 947cb48086..ea0d7a31dc 100644 --- a/sysdeps/x86_64/Makefile +++ b/sysdeps/x86_64/Makefile @@ -148,7 +148,7 @@ endif ifeq ($(subdir),cpu-rt-c) cpu-rt-c-routines += memchr memcmp memcpy memmove mempcpy memrchr \ - memset strchr strcmp strcpy strlen \ + memset strcat strchr strcmp strcpy strlen \ wmemset # For the CPU run-time tests. diff --git a/sysdeps/x86_64/multiarch/Makefile b/sysdeps/x86_64/multiarch/Makefile index b2f0e9f8da..10de1f3af3 100644 --- a/sysdeps/x86_64/multiarch/Makefile +++ b/sysdeps/x86_64/multiarch/Makefile @@ -81,6 +81,8 @@ libcpu-rt-c-sysdep_routines += memchr-sse2 memchr-avx2 \ memset-avx2-unaligned-erms \ memset-avx512-unaligned-erms \ memset-avx512-no-vzeroupper \ + strcat-sse2 strcat-sse2-unaligned \ + strcat-ssse3 \ strchr-sse2-no-bsf strchr-sse2 \ strchr-avx2 strcmp-sse2 \ strcmp-sse2-unaligned strcmp-ssse3 \ diff --git a/sysdeps/x86_64/multiarch/strcat-sse2-unaligned.S b/sysdeps/x86_64/multiarch/strcat-sse2-unaligned.S index 852f179bf4..d144651b33 100644 --- a/sysdeps/x86_64/multiarch/strcat-sse2-unaligned.S +++ b/sysdeps/x86_64/multiarch/strcat-sse2-unaligned.S @@ -17,7 +17,7 @@ License along with the GNU C Library; if not, see . */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # include diff --git a/sysdeps/x86_64/multiarch/strcat-sse2.S b/sysdeps/x86_64/multiarch/strcat-sse2.S index 8eb64e104c..f4939ac409 100644 --- a/sysdeps/x86_64/multiarch/strcat-sse2.S +++ b/sysdeps/x86_64/multiarch/strcat-sse2.S @@ -16,7 +16,7 @@ License along with the GNU C Library; if not, see . */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # include # define strcat __strcat_sse2 diff --git a/sysdeps/x86_64/multiarch/strcat-ssse3.S b/sysdeps/x86_64/multiarch/strcat-ssse3.S index 2d4fd78f99..65e8b8e6a4 100644 --- a/sysdeps/x86_64/multiarch/strcat-ssse3.S +++ b/sysdeps/x86_64/multiarch/strcat-ssse3.S @@ -17,7 +17,7 @@ License along with the GNU C Library; if not, see . */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # include diff --git a/sysdeps/x86_64/multiarch/strcat.c b/sysdeps/x86_64/multiarch/strcat.c index 1f7f6263f3..8637e249ec 100644 --- a/sysdeps/x86_64/multiarch/strcat.c +++ b/sysdeps/x86_64/multiarch/strcat.c @@ -18,7 +18,7 @@ . */ /* Define multiple versions only for the definition in libc. */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define strcat __redirect_strcat # include # undef strcat @@ -28,7 +28,7 @@ libc_ifunc_redirected (__redirect_strcat, strcat, IFUNC_SELECTOR ()); -# ifdef SHARED +# if defined SHARED && !IS_IN (libcpu_rt_c) __hidden_ver1 (strcat, __GI_strcat, __redirect_strcat) __attribute__ ((visibility ("hidden"))); # endif diff --git a/sysdeps/x86_64/strcat.S b/sysdeps/x86_64/strcat.S index 9a4a4e6feb..db2a6e881a 100644 --- a/sysdeps/x86_64/strcat.S +++ b/sysdeps/x86_64/strcat.S @@ -255,4 +255,6 @@ ENTRY (strcat) movq %rdi, %rax /* Source is return value. */ retq END (strcat) +#if !IS_IN (libcpu_rt_c) libc_hidden_builtin_def (strcat) +#endif From patchwork Tue Jun 12 22:19:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 928524 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=sourceware.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=libc-alpha-return-93121-incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.b="D2rAIl3y"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4154BP1Hsgz9s0W for ; Wed, 13 Jun 2018 08:22:20 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=k2A/yLaXjUr/eqsjOku7IjCeaEBVEBH 6ATKohHJPFBHhOga7rDG0gzvVaoF3f50vmtYaBJVtu9+LW4s08esuYKg2XPWEyRk 0wGanvdMRqo9x8zl3UB4gZUWS9gu5ozSu5W2kzEPuRQWEfP7YetscAG8q6nvSWjG 5JMiGVFeSN8U= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=GAxoxezsIm1GuZhFyDBgJnQzBMI=; b=D2rAI l3y3/Aqa56qw5Qsopbrg3FQ1SZvm0l3z5Wm3zO1MQ1jow9XQC+aF3jYbywOYtKB+ kpUAtOzS8H2PTCwRu9NHfADq6uI1cAJAYB8jK8uEb7vgwOERI7zQf3pxpy4AvCgU 96mQGMtnqGrzOuSbaA6LPbjemaj9rGAsPkSFoI= Received: (qmail 94158 invoked by alias); 12 Jun 2018 22:20:05 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 93049 invoked by uid 89); 12 Jun 2018 22:19:58 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-23.9 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_SHORT, KAM_STOCKGEN, SPF_SOFTFAIL autolearn=ham version=3.3.2 spammy= X-HELO: mga01.intel.com X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 From: "H.J. Lu" To: libc-alpha@sourceware.org Subject: [PATCH 16/20] libcpu-rt-c/x86-64: Add strnlen Date: Tue, 12 Jun 2018 15:19:35 -0700 Message-Id: <20180612221939.19545-17-hjl.tools@gmail.com> In-Reply-To: <20180612221939.19545-1-hjl.tools@gmail.com> References: <20180612221939.19545-1-hjl.tools@gmail.com> * sysdeps/x86_64/Makefile (cpu-rt-c-routines): Add strnlen. * sysdeps/x86_64/multiarch/Makefile (libcpu-rt-c-sysdep_routines): Add strnlen-sse2 and strnlen-avx2. * sysdeps/x86_64/multiarch/strnlen-sse2.S: Support libcpu-rt-c. * sysdeps/x86_64/multiarch/strnlen.c: Likewise. --- sysdeps/x86_64/Makefile | 2 +- sysdeps/x86_64/multiarch/Makefile | 3 ++- sysdeps/x86_64/multiarch/strnlen-sse2.S | 2 +- sysdeps/x86_64/multiarch/strnlen.c | 20 ++++++++++++++++++-- 4 files changed, 22 insertions(+), 5 deletions(-) diff --git a/sysdeps/x86_64/Makefile b/sysdeps/x86_64/Makefile index ea0d7a31dc..1a5720bbac 100644 --- a/sysdeps/x86_64/Makefile +++ b/sysdeps/x86_64/Makefile @@ -148,7 +148,7 @@ endif ifeq ($(subdir),cpu-rt-c) cpu-rt-c-routines += memchr memcmp memcpy memmove mempcpy memrchr \ - memset strcat strchr strcmp strcpy strlen \ + memset strcat strchr strcmp strcpy strlen strnlen \ wmemset # For the CPU run-time tests. diff --git a/sysdeps/x86_64/multiarch/Makefile b/sysdeps/x86_64/multiarch/Makefile index 10de1f3af3..1c902eec4e 100644 --- a/sysdeps/x86_64/multiarch/Makefile +++ b/sysdeps/x86_64/multiarch/Makefile @@ -88,5 +88,6 @@ libcpu-rt-c-sysdep_routines += memchr-sse2 memchr-avx2 \ strcmp-sse2-unaligned strcmp-ssse3 \ strcmp-sse4_2 strcmp-avx2 strcpy-sse2 \ strcpy-sse2-unaligned strcpy-ssse3 \ - strlen-sse2 strlen-avx2 + strlen-sse2 strlen-avx2 \ + strnlen-sse2 strnlen-avx2 endif diff --git a/sysdeps/x86_64/multiarch/strnlen-sse2.S b/sysdeps/x86_64/multiarch/strnlen-sse2.S index 41f33f6f6f..a5cba9a698 100644 --- a/sysdeps/x86_64/multiarch/strnlen-sse2.S +++ b/sysdeps/x86_64/multiarch/strnlen-sse2.S @@ -16,7 +16,7 @@ License along with the GNU C Library; if not, see . */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define __strnlen __strnlen_sse2 # undef weak_alias diff --git a/sysdeps/x86_64/multiarch/strnlen.c b/sysdeps/x86_64/multiarch/strnlen.c index 3ab94ce230..5752764d2b 100644 --- a/sysdeps/x86_64/multiarch/strnlen.c +++ b/sysdeps/x86_64/multiarch/strnlen.c @@ -18,7 +18,7 @@ . */ /* Define multiple versions only for the definition in libc. */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define strnlen __redirect_strnlen # define __strnlen __redirect___strnlen # include @@ -28,12 +28,28 @@ # define SYMBOL_NAME strnlen # include "ifunc-avx2.h" +#if IS_IN (libcpu_rt_c) +# define __strnlen strnlen +#endif + libc_ifunc_redirected (__redirect_strnlen, __strnlen, IFUNC_SELECTOR ()); + +# if IS_IN (libcpu_rt_c) +# ifdef SHARED +__hidden_ver1 (strnlen, __strnlen, __redirect___strnlen) + __attribute__((visibility ("hidden"))); +# else +# undef __strnlen +/* Needed by strncpy-c.o. */ +strong_alias (strnlen, __strnlen); +# endif +# else +# ifdef SHARED weak_alias (__strnlen, strnlen); -# ifdef SHARED __hidden_ver1 (__strnlen, __GI___strnlen, __redirect___strnlen) __attribute__((visibility ("hidden"))); __hidden_ver1 (strnlen, __GI_strnlen, __redirect_strnlen) __attribute__((weak, visibility ("hidden"))); +# endif # endif #endif From patchwork Tue Jun 12 22:19:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 928526 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=sourceware.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=libc-alpha-return-93122-incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.b="OFReOext"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4154Bk22Stz9s0W for ; Wed, 13 Jun 2018 08:22:38 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=koXl/SgZHh3mFdDg6pIkpxJr49bpNPb yUCjAVfcqoE8kIpgYfVkx4Cvh8SOgSuq6yKDB5lMet+CzF224S9Nf6BPGEK5Fjib 61meBpuuXzqYgSzrSWBSdfrJac/XCYN50YGzkDVR2IDca+BEWZ17HYn/65Iba+to WJF4xJHhgEOg= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=MwIHu1LlECu9bNzsS96flmGI38c=; b=OFReO extiOZirg+ZqpTRYCwOfNkEXw9SIj7Iy+O/6iW1pN7U9pAfdK30w5M0Xpy/TjjFP FDYFcESYHhDv8RJKKodKSjwNRlcv5a7aBcqWdfP2D/L5ITd989qci7WN56b3ctjw zJuNu9yF0Y0h5leICfrwKaJ7xMQq/rPNOF304k= Received: (qmail 94268 invoked by alias); 12 Jun 2018 22:20:05 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 93241 invoked by uid 89); 12 Jun 2018 22:19:59 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.3 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_SHORT, SPF_SOFTFAIL autolearn=ham version=3.3.2 spammy= X-HELO: mga01.intel.com X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 From: "H.J. Lu" To: libc-alpha@sourceware.org Subject: [PATCH 17/20] libcpu-rt-c/x86-64: Add strncat Date: Tue, 12 Jun 2018 15:19:36 -0700 Message-Id: <20180612221939.19545-18-hjl.tools@gmail.com> In-Reply-To: <20180612221939.19545-1-hjl.tools@gmail.com> References: <20180612221939.19545-1-hjl.tools@gmail.com> * sysdeps/x86_64/Makefile (cpu-rt-c-routines): Add strncat. * sysdeps/x86_64/multiarch/Makefile (libcpu-rt-c-sysdep_routines): Add strncat-sse2-unaligned, strncat-ssse3, strnlen-sse2 and strnlen-avx2, * sysdeps/x86_64/strncat.c: New file. * sysdeps/x86_64/multiarch/strncat-c.c: Support libcpu-rt-c. * sysdeps/x86_64/multiarch/strncat.c: Likewise. --- sysdeps/x86_64/Makefile | 3 ++- sysdeps/x86_64/multiarch/Makefile | 3 ++- sysdeps/x86_64/multiarch/strncat-c.c | 2 +- sysdeps/x86_64/multiarch/strncat.c | 6 ++++-- sysdeps/x86_64/strncat.c | 9 +++++++++ 5 files changed, 18 insertions(+), 5 deletions(-) create mode 100644 sysdeps/x86_64/strncat.c diff --git a/sysdeps/x86_64/Makefile b/sysdeps/x86_64/Makefile index 1a5720bbac..3c9ea605c6 100644 --- a/sysdeps/x86_64/Makefile +++ b/sysdeps/x86_64/Makefile @@ -148,7 +148,8 @@ endif ifeq ($(subdir),cpu-rt-c) cpu-rt-c-routines += memchr memcmp memcpy memmove mempcpy memrchr \ - memset strcat strchr strcmp strcpy strlen strnlen \ + memset strcat strchr strcmp strcpy strlen strncat \ + strnlen \ wmemset # For the CPU run-time tests. diff --git a/sysdeps/x86_64/multiarch/Makefile b/sysdeps/x86_64/multiarch/Makefile index 1c902eec4e..c9ae280f43 100644 --- a/sysdeps/x86_64/multiarch/Makefile +++ b/sysdeps/x86_64/multiarch/Makefile @@ -88,6 +88,7 @@ libcpu-rt-c-sysdep_routines += memchr-sse2 memchr-avx2 \ strcmp-sse2-unaligned strcmp-ssse3 \ strcmp-sse4_2 strcmp-avx2 strcpy-sse2 \ strcpy-sse2-unaligned strcpy-ssse3 \ - strlen-sse2 strlen-avx2 \ + strlen-sse2 strlen-avx2 strncat-c \ + strncat-sse2-unaligned strncat-ssse3 \ strnlen-sse2 strnlen-avx2 endif diff --git a/sysdeps/x86_64/multiarch/strncat-c.c b/sysdeps/x86_64/multiarch/strncat-c.c index 93a7fab7ea..eb08e80d2e 100644 --- a/sysdeps/x86_64/multiarch/strncat-c.c +++ b/sysdeps/x86_64/multiarch/strncat-c.c @@ -1,2 +1,2 @@ #define STRNCAT __strncat_sse2 -#include +#include diff --git a/sysdeps/x86_64/multiarch/strncat.c b/sysdeps/x86_64/multiarch/strncat.c index 841c165565..8bfc54a472 100644 --- a/sysdeps/x86_64/multiarch/strncat.c +++ b/sysdeps/x86_64/multiarch/strncat.c @@ -18,7 +18,7 @@ . */ /* Define multiple versions only for the definition in libc. */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define strncat __redirect_strncat # include # undef strncat @@ -27,9 +27,11 @@ # include "ifunc-unaligned-ssse3.h" libc_ifunc_redirected (__redirect_strncat, strncat, IFUNC_SELECTOR ()); +# if !IS_IN (libcpu_rt_c) strong_alias (strncat, __strncat); -# ifdef SHARED +# ifdef SHARED __hidden_ver1 (strncat, __GI___strncat, __redirect_strncat) __attribute__((visibility ("hidden"))); +# endif # endif #endif diff --git a/sysdeps/x86_64/strncat.c b/sysdeps/x86_64/strncat.c new file mode 100644 index 0000000000..ad6885514a --- /dev/null +++ b/sysdeps/x86_64/strncat.c @@ -0,0 +1,9 @@ +#if IS_IN (libcpu_rt_c) +# include +extern __typeof (strnlen) __strnlen attribute_hidden; +# ifndef STRNCAT +# define STRNCAT strncat +# endif +#endif + +#include From patchwork Tue Jun 12 22:19:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 928525 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=sourceware.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=libc-alpha-return-93123-incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.b="WZIagxwu"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4154BY2wtGz9s0W for ; Wed, 13 Jun 2018 08:22:29 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=gpyxNls0NNB3eBZJrj5gBte2pKfqFQ5 nN6kAkrl62w6IlKC45lYglSBdIxqchxLrTj2cfYTSU2NMCZf5717s0qGi7dvvO6p qa9ZW7ZYZzmLPNWvUNXqY0FT/I+3syZ5GpM+oK5Bf7Ec0/VjKnGTnOdvUsVFhbTZ yZtCMYOCEyb8= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=v9jbkXN/FQxEc4BjXcIz8uSsNx4=; b=WZIag xwuHcr04CaawqUlqydboei8RKGd1qNjhUzl3Byk7m/ZJBRg9+QcUiP51lZkwrLEG QYOtH9TXmTZfqhXaVQviMYBkoxAt5zQPlqzM6BUZqf3Q0BYRpHiPs7e+kTV0Tiqm YKDXZdqIGqU6ZoTIzFoji6yywkHAyz0YbLiBus= Received: (qmail 94307 invoked by alias); 12 Jun 2018 22:20:06 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 93286 invoked by uid 89); 12 Jun 2018 22:20:00 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.3 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_SHORT, SPF_SOFTFAIL autolearn=ham version=3.3.2 spammy= X-HELO: mga01.intel.com X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 From: "H.J. Lu" To: libc-alpha@sourceware.org Subject: [PATCH 18/20] libcpu-rt-c/x86-64: Add strncmp Date: Tue, 12 Jun 2018 15:19:37 -0700 Message-Id: <20180612221939.19545-19-hjl.tools@gmail.com> In-Reply-To: <20180612221939.19545-1-hjl.tools@gmail.com> References: <20180612221939.19545-1-hjl.tools@gmail.com> * sysdeps/x86_64/Makefile (cpu-rt-c-routines): Add strncmp. * sysdeps/x86_64/multiarch/Makefile (libcpu-rt-c-sysdep_routines): Add strncmp-sse2, strncmp-ssse3, strncmp-sse4_2 and strncmp-avx2. * sysdeps/x86_64/multiarch/strncmp-sse2.S: Also rename STRCMP to __strncmp_sse2 for libcpu-rt-c. * sysdeps/x86_64/multiarch/strncmp.c: Support libcpu-rt-c. --- sysdeps/x86_64/Makefile | 2 +- sysdeps/x86_64/multiarch/Makefile | 3 ++- sysdeps/x86_64/multiarch/strncmp-sse2.S | 2 +- sysdeps/x86_64/multiarch/strncmp.c | 4 ++-- 4 files changed, 6 insertions(+), 5 deletions(-) diff --git a/sysdeps/x86_64/Makefile b/sysdeps/x86_64/Makefile index 3c9ea605c6..4e872b1220 100644 --- a/sysdeps/x86_64/Makefile +++ b/sysdeps/x86_64/Makefile @@ -149,7 +149,7 @@ endif ifeq ($(subdir),cpu-rt-c) cpu-rt-c-routines += memchr memcmp memcpy memmove mempcpy memrchr \ memset strcat strchr strcmp strcpy strlen strncat \ - strnlen \ + strnlen strncmp \ wmemset # For the CPU run-time tests. diff --git a/sysdeps/x86_64/multiarch/Makefile b/sysdeps/x86_64/multiarch/Makefile index c9ae280f43..e3c197ba84 100644 --- a/sysdeps/x86_64/multiarch/Makefile +++ b/sysdeps/x86_64/multiarch/Makefile @@ -90,5 +90,6 @@ libcpu-rt-c-sysdep_routines += memchr-sse2 memchr-avx2 \ strcpy-sse2-unaligned strcpy-ssse3 \ strlen-sse2 strlen-avx2 strncat-c \ strncat-sse2-unaligned strncat-ssse3 \ - strnlen-sse2 strnlen-avx2 + strnlen-sse2 strnlen-avx2 strncmp-sse2 \ + strncmp-ssse3 strncmp-sse4_2 strncmp-avx2 endif diff --git a/sysdeps/x86_64/multiarch/strncmp-sse2.S b/sysdeps/x86_64/multiarch/strncmp-sse2.S index a5ecb82b13..5ef1d31ac3 100644 --- a/sysdeps/x86_64/multiarch/strncmp-sse2.S +++ b/sysdeps/x86_64/multiarch/strncmp-sse2.S @@ -18,7 +18,7 @@ #include -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define STRCMP __strncmp_sse2 # undef libc_hidden_builtin_def # define libc_hidden_builtin_def(strcmp) diff --git a/sysdeps/x86_64/multiarch/strncmp.c b/sysdeps/x86_64/multiarch/strncmp.c index 02b6d0b6f5..427763ff05 100644 --- a/sysdeps/x86_64/multiarch/strncmp.c +++ b/sysdeps/x86_64/multiarch/strncmp.c @@ -18,7 +18,7 @@ . */ /* Define multiple versions only for the definition in libc. */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define strncmp __redirect_strncmp # include # undef strncmp @@ -53,7 +53,7 @@ IFUNC_SELECTOR (void) libc_ifunc_redirected (__redirect_strncmp, strncmp, IFUNC_SELECTOR ()); -# ifdef SHARED +# if defined SHARED && !IS_IN (libcpu_rt_c) __hidden_ver1 (strncmp, __GI_strncmp, __redirect_strncmp) __attribute__ ((visibility ("hidden"))); # endif From patchwork Tue Jun 12 22:19:38 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 928527 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=sourceware.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=libc-alpha-return-93124-incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.b="y5b/l01A"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4154Bv26pRz9s0W for ; Wed, 13 Jun 2018 08:22:47 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=oprP8zPlbLfoVaqkjJoU1KFZq2vNh91 hTIebCoIEF/H7AsVa/hKeIY3YMQ8ZKW0tKhj4emD2aLoikTekoSUWJvmHccdBSLo 9Kpyxg934bunlc0TN2af+QJKfXedXja8SewgeXGBWPwuKpRfqz7xgfAvt05OP1/w IiEqHZVbuvA8= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=c0hZx/RVtBakRTYmBnONjctuWHg=; b=y5b/l 01AwKzagiA3VpcvBnfP7VvRvUTzf/kUtEvIswtcu7AaMzC4X+/aXMpysfLX+1sqU NgtF+jDjxorKcMJsy1zJZOxMgf1zXEOTUJLfu4Vtd/dmdcpO34+EDY7MsG4FagLK yyltRJ5brwZBzTiAFQNakZ1feTijiWqSsPbLEk= Received: (qmail 94467 invoked by alias); 12 Jun 2018 22:20:06 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 93302 invoked by uid 89); 12 Jun 2018 22:20:00 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.3 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_SHORT, SPF_SOFTFAIL autolearn=ham version=3.3.2 spammy=sk:strncpy X-HELO: mga01.intel.com X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 From: "H.J. Lu" To: libc-alpha@sourceware.org Subject: [PATCH 19/20] libcpu-rt-c/x86-64: Add strncpy Date: Tue, 12 Jun 2018 15:19:38 -0700 Message-Id: <20180612221939.19545-20-hjl.tools@gmail.com> In-Reply-To: <20180612221939.19545-1-hjl.tools@gmail.com> References: <20180612221939.19545-1-hjl.tools@gmail.com> * sysdeps/x86_64/Makefile (cpu-rt-c-routines): Add strncpy. * sysdeps/x86_64/multiarch/Makefile (libcpu-rt-c-sysdep_routines): Add strncpy-c, strncpy-sse2-unaligned and strncpy-ssse3. * sysdeps/x86_64/multiarch/strncpy.c: Support libcpu-rt-c. --- sysdeps/x86_64/Makefile | 2 +- sysdeps/x86_64/multiarch/Makefile | 4 +++- sysdeps/x86_64/multiarch/strncpy.c | 4 ++-- 3 files changed, 6 insertions(+), 4 deletions(-) diff --git a/sysdeps/x86_64/Makefile b/sysdeps/x86_64/Makefile index 4e872b1220..17d3a07894 100644 --- a/sysdeps/x86_64/Makefile +++ b/sysdeps/x86_64/Makefile @@ -149,7 +149,7 @@ endif ifeq ($(subdir),cpu-rt-c) cpu-rt-c-routines += memchr memcmp memcpy memmove mempcpy memrchr \ memset strcat strchr strcmp strcpy strlen strncat \ - strnlen strncmp \ + strnlen strncmp strncpy \ wmemset # For the CPU run-time tests. diff --git a/sysdeps/x86_64/multiarch/Makefile b/sysdeps/x86_64/multiarch/Makefile index e3c197ba84..de4938b3eb 100644 --- a/sysdeps/x86_64/multiarch/Makefile +++ b/sysdeps/x86_64/multiarch/Makefile @@ -91,5 +91,7 @@ libcpu-rt-c-sysdep_routines += memchr-sse2 memchr-avx2 \ strlen-sse2 strlen-avx2 strncat-c \ strncat-sse2-unaligned strncat-ssse3 \ strnlen-sse2 strnlen-avx2 strncmp-sse2 \ - strncmp-ssse3 strncmp-sse4_2 strncmp-avx2 + strncmp-ssse3 strncmp-sse4_2 strncmp-avx2 \ + strncpy-c strncpy-sse2-unaligned \ + strncpy-ssse3 endif diff --git a/sysdeps/x86_64/multiarch/strncpy.c b/sysdeps/x86_64/multiarch/strncpy.c index 3c3de8b18e..30bd615f99 100644 --- a/sysdeps/x86_64/multiarch/strncpy.c +++ b/sysdeps/x86_64/multiarch/strncpy.c @@ -18,7 +18,7 @@ . */ /* Define multiple versions only for the definition in libc. */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define strncpy __redirect_strncpy # include # undef strncpy @@ -28,7 +28,7 @@ libc_ifunc_redirected (__redirect_strncpy, strncpy, IFUNC_SELECTOR ()); -# ifdef SHARED +# if defined SHARED && !IS_IN (libcpu_rt_c) __hidden_ver1 (strncpy, __GI_strncpy, __redirect_strncpy) __attribute__ ((visibility ("hidden"))); # endif From patchwork Tue Jun 12 22:19:39 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 928528 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=sourceware.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=libc-alpha-return-93125-incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.b="hn/Cb0W3"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4154C422m6z9s31 for ; Wed, 13 Jun 2018 08:22:56 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=ujmBlDiKV94ioQG5UyyuymaUqU11Zb4 Gepnyz3PcTWEkf5OIYqitUm2wH5QWmdshJoN8OKVY3yYBb75SxFYNztKybcgl/Ci 3csUgxFM423oWCwK/0LVmlKyZEEtmxXPPGnRq5Bn7oJLnMPo3HSCrwMiSsTDsCWU kmundJMbqoXo= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=1dlZXh4qh1QfnuT9KrE92UpqBT4=; b=hn/Cb 0W3LL7o9OqpcN4Kp6dP7x4zo8MLYchDGnQ92SRejjOJbxrPfap+EjuAM7V0TpMV/ hFemnbHfSWD/UBqTFDk/jY++cPCvS2A1qKiEuMbms+lvMs6vpkPStJBPdSPyEOV7 6n31tEffrrZqntD5E9/bF9qNRXhGGs6iD9k/q8= Received: (qmail 94687 invoked by alias); 12 Jun 2018 22:20:08 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 93906 invoked by uid 89); 12 Jun 2018 22:20:03 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.3 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_SHORT, SPF_SOFTFAIL autolearn=ham version=3.3.2 spammy= X-HELO: mga01.intel.com X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 From: "H.J. Lu" To: libc-alpha@sourceware.org Subject: [PATCH 20/20] libcpu-rt-c/x86-64: Add strrchr Date: Tue, 12 Jun 2018 15:19:39 -0700 Message-Id: <20180612221939.19545-21-hjl.tools@gmail.com> In-Reply-To: <20180612221939.19545-1-hjl.tools@gmail.com> References: <20180612221939.19545-1-hjl.tools@gmail.com> * sysdeps/x86_64/Makefile (cpu-rt-c-routines): Add strrchr. * sysdeps/x86_64/multiarch/Makefile (libcpu-rt-c-sysdep_routines): strrchr-sse2 and strrchr-avx2. * sysdeps/x86_64/multiarch/strrchr-avx2.S: Support libcpu-rt-c. * sysdeps/x86_64/multiarch/strrchr-sse2.S: Likewise. * sysdeps/x86_64/multiarch/strrchr.c: Likewise. --- sysdeps/x86_64/Makefile | 2 +- sysdeps/x86_64/multiarch/Makefile | 2 +- sysdeps/x86_64/multiarch/strrchr-avx2.S | 2 +- sysdeps/x86_64/multiarch/strrchr-sse2.S | 2 +- sysdeps/x86_64/multiarch/strrchr.c | 4 ++-- 5 files changed, 6 insertions(+), 6 deletions(-) diff --git a/sysdeps/x86_64/Makefile b/sysdeps/x86_64/Makefile index 17d3a07894..267ce17e42 100644 --- a/sysdeps/x86_64/Makefile +++ b/sysdeps/x86_64/Makefile @@ -149,7 +149,7 @@ endif ifeq ($(subdir),cpu-rt-c) cpu-rt-c-routines += memchr memcmp memcpy memmove mempcpy memrchr \ memset strcat strchr strcmp strcpy strlen strncat \ - strnlen strncmp strncpy \ + strnlen strncmp strncpy strrchr \ wmemset # For the CPU run-time tests. diff --git a/sysdeps/x86_64/multiarch/Makefile b/sysdeps/x86_64/multiarch/Makefile index de4938b3eb..08a578e1a3 100644 --- a/sysdeps/x86_64/multiarch/Makefile +++ b/sysdeps/x86_64/multiarch/Makefile @@ -93,5 +93,5 @@ libcpu-rt-c-sysdep_routines += memchr-sse2 memchr-avx2 \ strnlen-sse2 strnlen-avx2 strncmp-sse2 \ strncmp-ssse3 strncmp-sse4_2 strncmp-avx2 \ strncpy-c strncpy-sse2-unaligned \ - strncpy-ssse3 + strncpy-ssse3 strrchr-sse2 strrchr-avx2 endif diff --git a/sysdeps/x86_64/multiarch/strrchr-avx2.S b/sysdeps/x86_64/multiarch/strrchr-avx2.S index 4381e6ab3e..78347b6bf7 100644 --- a/sysdeps/x86_64/multiarch/strrchr-avx2.S +++ b/sysdeps/x86_64/multiarch/strrchr-avx2.S @@ -16,7 +16,7 @@ License along with the GNU C Library; if not, see . */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # include diff --git a/sysdeps/x86_64/multiarch/strrchr-sse2.S b/sysdeps/x86_64/multiarch/strrchr-sse2.S index 0ec76fe9cc..0f6678f642 100644 --- a/sysdeps/x86_64/multiarch/strrchr-sse2.S +++ b/sysdeps/x86_64/multiarch/strrchr-sse2.S @@ -16,7 +16,7 @@ License along with the GNU C Library; if not, see . */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define strrchr __strrchr_sse2 # undef weak_alias diff --git a/sysdeps/x86_64/multiarch/strrchr.c b/sysdeps/x86_64/multiarch/strrchr.c index a719edde10..6c44acb42d 100644 --- a/sysdeps/x86_64/multiarch/strrchr.c +++ b/sysdeps/x86_64/multiarch/strrchr.c @@ -17,7 +17,7 @@ . */ /* Define multiple versions only for the definition in libc. */ -#if IS_IN (libc) +#if IS_IN (libc) || IS_IN (libcpu_rt_c) # define strrchr __redirect_strrchr # include # undef strrchr @@ -27,7 +27,7 @@ libc_ifunc_redirected (__redirect_strrchr, strrchr, IFUNC_SELECTOR ()); weak_alias (strrchr, rindex); -# ifdef SHARED +# if defined SHARED && !IS_IN (libcpu_rt_c) __hidden_ver1 (strrchr, __GI_strrchr, __redirect_strrchr) __attribute__((visibility ("hidden"))); # endif