From patchwork Mon Jun 11 15:48:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?C=C3=A9dric_Le_Goater?= X-Patchwork-Id: 927970 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 414VWM693yz9ryk for ; Tue, 12 Jun 2018 10:05:03 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=kaod.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 414VWM4xQFzF3r7 for ; Tue, 12 Jun 2018 10:05:03 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=kaod.org X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=kaod.org (client-ip=46.105.47.167; helo=11.mo5.mail-out.ovh.net; envelope-from=clg@kaod.org; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=kaod.org X-Greylist: delayed 16798 seconds by postgrey-1.36 at bilbo; Tue, 12 Jun 2018 10:04:57 AEST Received: from 11.mo5.mail-out.ovh.net (11.mo5.mail-out.ovh.net [46.105.47.167]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 414VWF2MCKzF3r3 for ; Tue, 12 Jun 2018 10:04:55 +1000 (AEST) Received: from player688.ha.ovh.net (unknown [10.109.122.80]) by mo5.mail-out.ovh.net (Postfix) with ESMTP id A93FE1BF7DF for ; Mon, 11 Jun 2018 17:48:40 +0200 (CEST) Received: from zorba.kaod.org.com (LFbn-TOU-1-49-10.w86-201.abo.wanadoo.fr [86.201.141.10]) (Authenticated sender: clg@kaod.org) by player688.ha.ovh.net (Postfix) with ESMTPSA id 6398A200A9; Mon, 11 Jun 2018 17:48:32 +0200 (CEST) From: =?utf-8?q?C=C3=A9dric_Le_Goater?= To: skiboot@lists.ozlabs.org Date: Mon, 11 Jun 2018 17:48:22 +0200 Message-Id: <20180611154822.3168-1-clg@kaod.org> X-Mailer: git-send-email 2.13.6 MIME-Version: 1.0 X-Ovh-Tracer-Id: 11085329010025860057 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgedthedrkeehgdelfecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd Subject: [Skiboot] [PATCH] plat/qemu: add PNOR support X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Stewart Smith , Andrew Jeffery Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" To access the PNOR, OPAL/skiboot drives the BMC SPI controller using the iLPC2AHB device of the BMC SuperIO controller and accesses the flash contents using the LPC FW address space on which the PNOR is remapped. The QEMU PowerNV machine now integrates such models (SuperIO controller, iLPC2AHB device) and also a pseudo Aspeed SoC AHB memory space populated with the SPI controller registers (same model as for ARM). The AHB window giving access to the contents of the BMC SPI controller flash modules is mapped on the LPC FW address space. The change should be compatible for machine without PNOR support. Signed-off-by: Cédric Le Goater --- The resulting machine is quite hybrid as it is mixing ARM and PPC models but it is a good way to validate their exactitude and completeness. We still need to work on model for the LPC bus. platforms/qemu/qemu.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/platforms/qemu/qemu.c b/platforms/qemu/qemu.c index 85ca213c29af..a564644291f9 100644 --- a/platforms/qemu/qemu.c +++ b/platforms/qemu/qemu.c @@ -24,6 +24,8 @@ #include #include #include +#include +#include /* BT config */ #define BT_IO_BASE 0xe4 @@ -78,6 +80,9 @@ static void qemu_ipmi_setenables(void) static void qemu_init(void) { + /* Initialize PNOR/NVRAM */ + pnor_init(); + /* Setup UART console for use by Linux via OPAL API */ set_opal_console(&uart_opal_con); @@ -241,6 +246,9 @@ static bool qemu_probe(void) psi_set_external_irq_policy(EXTERNAL_IRQ_POLICY_SKIBOOT); + /* Initialize AHB accesses via AST2400 */ + ast_io_init(); + /* Setup UART and use it as console */ uart_init();