From patchwork Wed Jun 6 23:45:03 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Carl Love X-Patchwork-Id: 926072 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-479233-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=us.ibm.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="L83aPvZK"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 411QKX2pmJz9s01 for ; Thu, 7 Jun 2018 09:45:52 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :subject:from:to:cc:date:mime-version:message-id:content-type :content-transfer-encoding; q=dns; s=default; b=cMgO9MTKzPIQ4NvA ruJNF58ogso0uoifcwgRB4fmKQbRdkuvUwFYe2RN5u/90EKB8QGtxoF/wyb2PjFF 2o6qeLTCEM8oPHPYOTl288CcALw+Rhv96FqpeOgTOA/pExr0xBNaTEUO0x74th2W 11WvV9QG+sCT1s6P8I1A+I6HbVM= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :subject:from:to:cc:date:mime-version:message-id:content-type :content-transfer-encoding; s=default; bh=K+UutPBWXzwF+0MJ1E7GWv Cuc8I=; b=L83aPvZKLwS4hFrjDZ1RtG0HFOezt8s7WQ+kt6C0ION99qE/MMyO4R oCFqkppigl9GgXmYgWv8eKO3jjOZ77r/IgI1LjOCGGh/NLKmXWyY74WkvgdTWDxL lIc6rNeDNNo+N2ZTCfDAqhB3fIyRIGVmHY8nQR9VQCQ7B00VsaZE8= Received: (qmail 109837 invoked by alias); 6 Jun 2018 23:45:43 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 109486 invoked by uid 89); 6 Jun 2018 23:45:27 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-27.0 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mx0a-001b2d01.pphosted.com Received: from mx0a-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com) (148.163.156.1) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 06 Jun 2018 23:45:24 +0000 Received: from pps.filterd (m0098399.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w56NiMIE066444 for ; Wed, 6 Jun 2018 19:45:10 -0400 Received: from e16.ny.us.ibm.com (e16.ny.us.ibm.com [129.33.205.206]) by mx0a-001b2d01.pphosted.com with ESMTP id 2jeq345qvx-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Wed, 06 Jun 2018 19:45:09 -0400 Received: from localhost by e16.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Wed, 6 Jun 2018 19:45:08 -0400 Received: from b01cxnp22035.gho.pok.ibm.com (9.57.198.25) by e16.ny.us.ibm.com (146.89.104.203) with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Wed, 6 Jun 2018 19:45:05 -0400 Received: from b01ledav004.gho.pok.ibm.com (b01ledav004.gho.pok.ibm.com [9.57.199.109]) by b01cxnp22035.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w56Nj4cJ10420854 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 6 Jun 2018 23:45:04 GMT Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 82172112065; Wed, 6 Jun 2018 19:45:04 -0400 (EDT) Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D0E2A112062; Wed, 6 Jun 2018 19:45:03 -0400 (EDT) Received: from oc3304648336.ibm.com (unknown [9.70.82.186]) by b01ledav004.gho.pok.ibm.com (Postfix) with ESMTP; Wed, 6 Jun 2018 19:45:03 -0400 (EDT) Subject: [PATCH, rs6000] Add missing test cases, fix arguments to match specifications. From: Carl Love To: Segher Boessenkool , gcc-patches@gcc.gnu.org, David Edelsohn Cc: Bill Schmidt , cel@us.ibm.com, seurer@linux.vnet.ibm.com Date: Wed, 06 Jun 2018 16:45:03 -0700 Mime-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 18060623-0072-0000-0000-0000036973E2 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00009139; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000265; SDB=6.01043027; UDB=6.00534142; IPR=6.00822157; MB=3.00021491; MTD=3.00000008; XFM=3.00000015; UTC=2018-06-06 23:45:07 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18060623-0073-0000-0000-000048453EA6 Message-Id: <1528328703.4981.26.camel@us.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-06-06_10:, , signatures=0 X-IsSubscribed: yes GCC Maintainers: This patch adds various missing test cases for a few builtins. It also fixes the arguments to match the builtin specifications in the ABI. The patch was retested on:     powerpc64le-unknown-linux-gnu (Power 8 LE)        powerpc64le-unknown-linux-gnu (Power 9 LE)     powerpc64-unknown-linux-gnu (Power 8 BE) With no regressions. Please let me know if the patch looks OK for GCC mainline.                          Carl Love --------------------------------------------------------------------- gcc/testsuite/ChangeLog: 2018-06-06 Carl Love * gcc.target/powerpc/p8vector-builtin-3.c: Add vec_pack test. Update vpkudum counts. * gcc.target/powerpc/p9-extract-1.c: Make second argument of vec_extract a signed int. Add vec_extract tests. * gcc.target/powerpc/p9-extract-3.c: Make second argument of vec_extract a signed int. * gcc.target/powerpc/vec-cmp.c: Add vec_cmple, vec_cmpge tests. Update, vcmpgtsb, vcmpgtub, vcmpgtsh, vcmpgtuh, vcmpgtsw, vcmpgtsw, vcmpgtuw, vcmpgtsd, vcmpgtud. * gcc.target/powerpc/vsx-extract-4.c: Make second argument of vec_extract a signed int. * gcc.target/powerpc/vsx-extract-5.c: Make second argument of vec_extract a signed int. * gcc.target/powerpc/vsx-vector-7.c (foo): Add tests for vec_sel and vec_xor builtins. Update xxsel, xxlxor counts. --- .../gcc.target/powerpc/p8vector-builtin-3.c | 9 +- gcc/testsuite/gcc.target/powerpc/p9-extract-1.c | 77 ++++++++-- gcc/testsuite/gcc.target/powerpc/p9-extract-3.c | 36 +++-- gcc/testsuite/gcc.target/powerpc/vec-cmp.c | 159 +++++++++++++++++++-- gcc/testsuite/gcc.target/powerpc/vsx-extract-4.c | 24 ++-- gcc/testsuite/gcc.target/powerpc/vsx-extract-5.c | 24 ++-- gcc/testsuite/gcc.target/powerpc/vsx-vector-7.c | 72 ++++++++-- 7 files changed, 340 insertions(+), 61 deletions(-) diff --git a/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-3.c b/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-3.c index ff50a9a..56ba6c7 100644 --- a/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-3.c +++ b/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-3.c @@ -33,7 +33,12 @@ vi_sign vi_pack_2 (vll_sign a, vll_sign b) return vec_pack (a, b); } -vi_sign vi_pack_3 (vll_sign a, vll_sign b) +vi_uns vi_pack_3 (vll_uns a, vll_uns b) +{ + return vec_pack (a, b); +} + +vi_sign vi_pack_4 (vll_sign a, vll_sign b) { return vec_vpkudum (a, b); } @@ -98,7 +103,7 @@ vll_sign vll_unpack_lo_3 (vi_sign a) return vec_vupklsw (a); } -/* { dg-final { scan-assembler-times "vpkudum" 3 } } */ +/* { dg-final { scan-assembler-times "vpkudum" 4 } } */ /* { dg-final { scan-assembler-times "vpkuwum" 3 } } */ /* { dg-final { scan-assembler-times "vpkuhum" 3 } } */ /* { dg-final { scan-assembler-times "vupklsw" 3 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-extract-1.c b/gcc/testsuite/gcc.target/powerpc/p9-extract-1.c index ecbe0ed..c708993 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-extract-1.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-extract-1.c @@ -13,84 +13,136 @@ int extract_int_0 (vector int a) { - int b = vec_extract (a, 0); + int c = 0; + int b = vec_extract (a, c); return b; } int extract_int_3 (vector int a) { - int b = vec_extract (a, 3); + int c = 3; + int b = vec_extract (a, c); return b; } unsigned int extract_uint_0 (vector unsigned int a) { - unsigned int b = vec_extract (a, 0); + int c = 0; + unsigned int b = vec_extract (a, c); return b; } unsigned int extract_uint_3 (vector unsigned int a) { - unsigned int b = vec_extract (a, 3); + int c = 3; + unsigned int b = vec_extract (a, c); return b; } short extract_short_0 (vector short a) { - short b = vec_extract (a, 0); + int c = 0; + short b = vec_extract (a, c); return b; } short extract_short_7 (vector short a) { - short b = vec_extract (a, 7); + int c = 7; + short b = vec_extract (a, c); return b; } unsigned short extract_ushort_0 (vector unsigned short a) { - unsigned short b = vec_extract (a, 0); + int c = 0; + unsigned short b = vec_extract (a, c); return b; } unsigned short extract_ushort_7 (vector unsigned short a) { - unsigned short b = vec_extract (a, 7); + int c = 7; + unsigned short b = vec_extract (a, c); return b; } signed char extract_schar_0 (vector signed char a) { - signed char b = vec_extract (a, 0); + int c = 0; + signed char b = vec_extract (a, c); return b; } signed char extract_schar_15 (vector signed char a) { - signed char b = vec_extract (a, 15); + int c = 15; + signed char b = vec_extract (a, c); return b; } unsigned char extract_uchar_0 (vector unsigned char a) { - unsigned char b = vec_extract (a, 0); + int c = 0; + unsigned char b = vec_extract (a, c); return b; } unsigned char extract_uchar_15 (vector unsigned char a) { - signed char b = vec_extract (a, 15); + int c = 15; + signed char b = vec_extract (a, c); + return b; +} + +unsigned char +extract_bool_char_0 (vector bool char a) +{ + int c = 0; + unsigned char b = vec_extract (a, c); + return b; +} + +unsigned int +extract_bool_int_0 (vector bool int a) +{ + int c = 0; + unsigned int b = vec_extract (a, c); + return b; +} + +unsigned long long +extract_bool_long_long_0 (vector bool long long a) +{ + int c = 0; + unsigned long long b = vec_extract (a, c); + return b; +} + +unsigned long long int +extract_long_long_0 (vector unsigned long long int a) +{ + int c = 0; + unsigned long long int b = vec_extract (a, c); + return b; +} + +unsigned short int +extract_bool_short_0 (vector bool short a) +{ + int c = 0; + unsigned short int b = vec_extract (a, c); return b; } @@ -100,7 +152,6 @@ extract_uchar_15 (vector unsigned char a) /* { dg-final { scan-assembler "extsb " } } */ /* { dg-final { scan-assembler "extsh " } } */ /* { dg-final { scan-assembler "extsw " } } */ -/* { dg-final { scan-assembler-not "m\[ft\]vsr" } } */ /* { dg-final { scan-assembler-not "stxvd2x " } } */ /* { dg-final { scan-assembler-not "stxv " } } */ /* { dg-final { scan-assembler-not "lwa " } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-extract-3.c b/gcc/testsuite/gcc.target/powerpc/p9-extract-3.c index 90b3eae..68a0cda 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-extract-3.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-extract-3.c @@ -14,84 +14,96 @@ double fpcvt_int_0 (vector int a) { - int b = vec_extract (a, 0); + int c = 0; + int b = vec_extract (a, c); return (double)b; } double fpcvt_int_3 (vector int a) { - int b = vec_extract (a, 3); + int c = 3; + int b = vec_extract (a, c); return (double)b; } double fpcvt_uint_0 (vector unsigned int a) { - unsigned int b = vec_extract (a, 0); + int c = 0; + unsigned int b = vec_extract (a, c); return (double)b; } double fpcvt_uint_3 (vector unsigned int a) { - unsigned int b = vec_extract (a, 3); + int c = 3; + unsigned int b = vec_extract (a, c); return (double)b; } double fpcvt_short_0 (vector short a) { - short b = vec_extract (a, 0); + int c = 0; + short b = vec_extract (a, c); return (double)b; } double fpcvt_short_7 (vector short a) { - short b = vec_extract (a, 7); + int c = 7; + short b = vec_extract (a, c); return (double)b; } double fpcvt_ushort_0 (vector unsigned short a) { - unsigned short b = vec_extract (a, 0); + int c = 0; + unsigned short b = vec_extract (a, c); return (double)b; } double fpcvt_ushort_7 (vector unsigned short a) { - unsigned short b = vec_extract (a, 7); + int c = 7; + unsigned short b = vec_extract (a, c); return (double)b; } double fpcvt_schar_0 (vector signed char a) { - signed char b = vec_extract (a, 0); + int c = 0; + signed char b = vec_extract (a, c); return (double)b; } double fpcvt_schar_15 (vector signed char a) { - signed char b = vec_extract (a, 15); + int c = 15; + signed char b = vec_extract (a, c); return (double)b; } double fpcvt_uchar_0 (vector unsigned char a) { - unsigned char b = vec_extract (a, 0); + int c = 0; + unsigned char b = vec_extract (a, c); return (double)b; } double fpcvt_uchar_15 (vector unsigned char a) { - signed char b = vec_extract (a, 15); + int c = 15; + signed char b = vec_extract (a, c); return (double)b; } diff --git a/gcc/testsuite/gcc.target/powerpc/vec-cmp.c b/gcc/testsuite/gcc.target/powerpc/vec-cmp.c index aee659d..50b00a1 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-cmp.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-cmp.c @@ -3,14 +3,14 @@ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc64*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-O2 -mcpu=power8" } */ -/* { dg-final { scan-assembler-times "vcmpgtsb" 2 } } */ -/* { dg-final { scan-assembler-times "vcmpgtub" 2 } } */ -/* { dg-final { scan-assembler-times "vcmpgtsh" 2 } } */ -/* { dg-final { scan-assembler-times "vcmpgtuh" 2 } } */ -/* { dg-final { scan-assembler-times "vcmpgtsw" 2 } } */ -/* { dg-final { scan-assembler-times "vcmpgtuw" 2 } } */ -/* { dg-final { scan-assembler-times "vcmpgtsd" 2 } } */ -/* { dg-final { scan-assembler-times "vcmpgtud" 2 } } */ +/* { dg-final { scan-assembler-times "vcmpgtsb" 4 } } */ +/* { dg-final { scan-assembler-times "vcmpgtub" 4 } } */ +/* { dg-final { scan-assembler-times "vcmpgtsh" 4 } } */ +/* { dg-final { scan-assembler-times "vcmpgtuh" 4 } } */ +/* { dg-final { scan-assembler-times "vcmpgtsw" 4 } } */ +/* { dg-final { scan-assembler-times "vcmpgtuw" 4 } } */ +/* { dg-final { scan-assembler-times "vcmpgtsd" 4 } } */ +/* { dg-final { scan-assembler-times "vcmpgtud" 4 } } */ /* { dg-final { scan-assembler-times "xxlnor" 16 } } */ #include @@ -63,6 +63,18 @@ cmple_ul (vector unsigned long long x, vector unsigned long long y) return vec_cmple (x, y); } +vector bool int +cmple_f (vector float x, vector float y) +{ + return vec_cmple (x, y); +} + +vector bool long long int +cmple_d (vector double x, vector double y) +{ + return vec_cmple (x, y); +} + vector bool char cmpge_sc (vector signed char x, vector signed char y) { @@ -111,3 +123,134 @@ cmpge_ul (vector unsigned long long x, vector unsigned long long y) return vec_cmpge (x, y); } +vector bool int +cmpge_f (vector float x, vector float y) +{ + return vec_cmpge (x, y); +} + +vector bool long long int +cmpge_d (vector double x, vector double y) +{ + return vec_cmpge (x, y); +} + +vector bool int +cmpgt_ui (vector unsigned int x, vector unsigned int y) +{ + return vec_cmpgt (x, y); +} + +vector bool int +cmpgt_f (vector float x, vector float y) +{ + return vec_cmpgt (x, y); +} + +vector bool long long int +cmpgt_d (vector double x, vector double y) +{ + return vec_cmpgt (x, y); +} + +vector bool long long +cmpgt_sl (vector signed long long x, vector signed long long y) +{ + return vec_cmpgt (x, y); +} + +vector bool long long +cmpgt_ul (vector unsigned long long x, vector unsigned long long y) +{ + return vec_cmpgt (x, y); +} + +vector bool char +cmpgt_sc (vector signed char x, vector signed char y) +{ + return vec_cmpgt (x, y); +} + +vector bool char +cmpgt_uc (vector unsigned char x, vector unsigned char y) +{ + return vec_cmpgt (x, y); +} + +vector bool short +cmpgt_ss (vector signed short x, vector signed short y) +{ + return vec_cmpgt (x, y); +} + +vector bool short +cmpgt_us (vector unsigned short x, vector unsigned short y) +{ + return vec_cmpgt (x, y); +} + +vector bool int +cmpgt_si (vector signed int x, vector signed int y) +{ + return vec_cmpgt (x, y); +} + +vector bool int +cmplt_ui (vector unsigned int x, vector unsigned int y) +{ + return vec_cmplt (x, y); +} + +vector bool int +cmplt_f (vector float x, vector float y) +{ + return vec_cmplt (x, y); +} + +vector bool long long int +cmplt_d (vector double x, vector double y) +{ + return vec_cmplt (x, y); +} + +vector bool long long +cmplt_sl (vector signed long long x, vector signed long long y) +{ + return vec_cmplt (x, y); +} + +vector bool long long +cmplt_ul (vector unsigned long long x, vector unsigned long long y) +{ + return vec_cmplt (x, y); +} + +vector bool char +cmplt_sc (vector signed char x, vector signed char y) +{ + return vec_cmplt (x, y); +} + +vector bool char +cmplt_uc (vector unsigned char x, vector unsigned char y) +{ + return vec_cmplt (x, y); +} + +vector bool short +cmplt_ss (vector signed short x, vector signed short y) +{ + return vec_cmplt (x, y); +} + +vector bool short +cmplt_us (vector unsigned short x, vector unsigned short y) +{ + return vec_cmplt (x, y); +} + +vector bool int +cmplt_si (vector signed int x, vector signed int y) +{ + return vec_cmplt (x, y); +} diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-extract-4.c b/gcc/testsuite/gcc.target/powerpc/vsx-extract-4.c index 2e14581..bf315dc 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-extract-4.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-extract-4.c @@ -22,55 +22,63 @@ TYPE foo_0s (vector int v) { - int i = vec_extract (v, 0); + int c = 0; + int i = vec_extract (v, c); return (TYPE) i; } TYPE foo_1s (vector int v) { - int i = vec_extract (v, 1); + int c = 1; + int i = vec_extract (v, c); return (TYPE) i; } TYPE foo_2s (vector int v) { - int i = vec_extract (v, 2); + int c = 2; + int i = vec_extract (v, c); return (TYPE) i; } TYPE foo_3s (vector int v) { - int i = vec_extract (v, 3); + int c = 3; + int i = vec_extract (v, c); return (TYPE) i; } TYPE foo_0u (vector unsigned int v) { - unsigned int u = vec_extract (v, 0); + int c = 0; + unsigned int u = vec_extract (v, c); return (TYPE) u; } TYPE foo_1u (vector unsigned int v) { - unsigned int u = vec_extract (v, 1); + int c = 1; + unsigned int u = vec_extract (v, c); return (TYPE) u; } TYPE foo_2u (vector unsigned int v) { - unsigned int u = vec_extract (v, 2); + int c = 2; + unsigned int u = vec_extract (v, c); return (TYPE) u; } TYPE foo_3u (vector unsigned int v) { - unsigned int u = vec_extract (v, 3); + int c = 3; + unsigned int u = vec_extract (v, c); return (TYPE) u; } diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-extract-5.c b/gcc/testsuite/gcc.target/powerpc/vsx-extract-5.c index 7b0d809..5f844be 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-extract-5.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-extract-5.c @@ -23,55 +23,63 @@ TYPE foo_0s (vector int v) { - int i = vec_extract (v, 0); + int c = 0; + int i = vec_extract (v, c); return (TYPE) i; } TYPE foo_1s (vector int v) { - int i = vec_extract (v, 1); + int c = 1; + int i = vec_extract (v, c); return (TYPE) i; } TYPE foo_2s (vector int v) { - int i = vec_extract (v, 2); + int c = 2; + int i = vec_extract (v, c); return (TYPE) i; } TYPE foo_3s (vector int v) { - int i = vec_extract (v, 3); + int c = 3; + int i = vec_extract (v, c); return (TYPE) i; } TYPE foo_0u (vector unsigned int v) { - unsigned int u = vec_extract (v, 0); + int c = 0; + unsigned int u = vec_extract (v, c); return (TYPE) u; } TYPE foo_1u (vector unsigned int v) { - unsigned int u = vec_extract (v, 1); + int c = 1; + unsigned int u = vec_extract (v, c); return (TYPE) u; } TYPE foo_2u (vector unsigned int v) { - unsigned int u = vec_extract (v, 2); + int c = 2; + unsigned int u = vec_extract (v, c); return (TYPE) u; } TYPE foo_3u (vector unsigned int v) { - unsigned int u = vec_extract (v, 3); + int c = 3; + unsigned int u = vec_extract (v, c); return (TYPE) u; } diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vector-7.c b/gcc/testsuite/gcc.target/powerpc/vsx-vector-7.c index 7de4172..6032be4 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-vector-7.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-vector-7.c @@ -7,28 +7,80 @@ /* Test VSX built-ins added for version 1.1 of ELFv2 ABI. */ vector bool long long vbla, vblb, vblc; -vector signed long long vsla; -vector unsigned long long vula, vulb, vulc; +vector bool char vbca, vbcb, vbcc; +vector bool int vbia, vbib, vbic; +vector signed char vsca, vscb, vscc; +vector unsigned char vuca, vucb, vucc; +vector signed int vsia, vsib, vsic; +vector unsigned int vuia, vuib, vuic; + +vector unsigned long long vulla, vullb, vullc; +vector signed long long vslla, vsllb, vsllc; +vector bool long long vblla, vbllb, vbllc; +vector bool short int vbsia, vbsib, vbsic; +vector signed short int vssia, vssib, vssic; +vector unsigned short int vusia, vusib, vusic; vector double vda, vdb; vector float vfa, vfb; void foo (vector bool long long *vblr, - vector double *vdr, vector unsigned long long *vulz, vector double *vdz) + vector double *vdr, vector unsigned long long *vullz, + vector double *vdz, vector bool char *vbcz, + vector signed char *vscz, vector unsigned char *vucz, + vector bool int *vbiz, vector int *viz, + vector unsigned int *vuiz, vector signed long long int *vslliz, + vector bool short int *vbsiz, vector signed short int *vssiz, + vector unsigned short int *vusiz, vector float *vfz) { *vblr++ = vec_andc (vbla, vblb); - *vdr++ = vec_double (vsla); - *vdr++ = vec_double (vula); + *vdr++ = vec_double (vslla); + *vdr++ = vec_double (vulla); + *vblr++ = vec_mergeh (vbla, vblb); *vblr++ = vec_mergel (vbla, vblb); *vblr++ = vec_nor (vbla, vblb); *vblr++ = vec_or (vbla, vblb); *vblr++ = vec_sel (vbla, vblb, vblc); - *vblr++ = vec_sel (vbla, vblb, vulc); + *vblr++ = vec_sel (vbla, vblb, vullc); *vblr++ = vec_xor (vbla, vblb); - *vulz++ = vec_sel (vula, vulb, vblc); + *vullz++ = vec_sel (vulla, vullb, vbllc); + *vullz++ = vec_sel (vulla, vullb, vullc); + + *vdz++ = vec_sel(vda, vdb, vullc); + + *vbcz++ = vec_sel (vbca, vbcb, vbcc); + *vbcz++ = vec_sel (vbca, vbcb, vucc); + *vbcz++ = vec_xor (vbca, vbcb); + *vscz++ = vec_sel (vsca, vscb, vbcc); + *vscz++ = vec_sel (vsca, vscb, vucc); + *vucz++ = vec_sel (vuca, vucb, vbcc); + *vucz++ = vec_sel (vuca, vucb, vucc); + + *vbiz++ = vec_sel (vbia, vbib, vbic); + *vbiz++ = vec_sel (vbia, vbib, vuic); + *vbiz++ = vec_xor (vbia, vbib); + *viz++ = vec_sel (vsia, vsib, vbic); + *viz++ = vec_sel (vsia, vsib, vuic); + *vuiz++ = vec_sel (vuia, vuib, vbic); + *vuiz++ = vec_sel (vuia, vuib, vuic); + + *vslliz++ = vec_sel(vslla, vsllb, vbllc); + *vslliz++ = vec_sel(vslla, vsllb, vullc); + + *vssiz++ = vec_sel(vssia, vssib, vbsic); + *vssiz++ = vec_sel(vssia, vssib, vusic); + *vusiz++ = vec_sel(vusia, vusib, vbsic); + *vusiz++ = vec_sel(vusia, vusib, vusic); + + *vbsiz++ = vec_sel (vbsia, vbsib, vbsic); + *vbsiz++ = vec_sel (vbsia, vbsib, vusic); + *vbsiz++ = vec_xor (vbsia, vbsib); - *vdz++ = vec_sel(vda, vdb, vulc); + *vdz++ = vec_sel (vda, vdb, vbllc); + *vfz++ = vec_sel (vfa, vfb, vbic); + *vfz++ = vec_sel (vfa, vfb, vuic); + *vfz++ = vec_xor (vfa, vfb); } /* { dg-final { scan-assembler-times "xxlandc" 1 } } */ @@ -38,5 +90,5 @@ void foo (vector bool long long *vblr, /* { dg-final { scan-assembler-times "xxpermdi .*,.*,.*,0" 1 } } */ /* { dg-final { scan-assembler-times "xxlnor" 1 } } */ /* { dg-final { scan-assembler-times "xxlor" 1 } } */ -/* { dg-final { scan-assembler-times "xxsel" 4 } } */ -/* { dg-final { scan-assembler-times "xxlxor" 1 } } */ +/* { dg-final { scan-assembler-times "xxsel" 28 } } */ +/* { dg-final { scan-assembler-times "xxlxor" 5 } } */