From patchwork Tue Jun 5 09:42:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Kyrill Tkachov X-Patchwork-Id: 925371 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-479083-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=foss.arm.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="wWlTfSb4"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 410RgC4BQ5z9s1B for ; Tue, 5 Jun 2018 19:42:47 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:subject:content-type; q= dns; s=default; b=cK34p37fOEOR87VNGzkPMTDEKMjOkh308xm4bsEqEHQzEJ pK+LEfyx8wKkPkAXyhX3NtVvkbl8uwdyT5WdmBI2ED4CmByky06Pi4WKRzkhgNjR 7ikYCr93Y1i7QMmwPO3S81xZd0dn/2Fb2BVwR3ZAPWJv0EnkXS7TPbJWZcw14= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:subject:content-type; s= default; bh=PO/QHXZD61zNqrSIh0+fuf997/I=; b=wWlTfSb4wHVEK/B9imxO yDS8F5PLXTrv2i2ILZv2X4t+eB0Fluaa4Tt8TRQhD6ZFWLrBppBquV38BNblT/WD sdRqO7/Gd78o+2aP34WAPRr5boqfTs/3fobvbkDpIs3xPKeOXTf6aOmg8pxwZQbN Nm8xbL7YtmPhZ0J/DOEdYAM= Received: (qmail 82123 invoked by alias); 5 Jun 2018 09:42:40 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 82070 invoked by uid 89); 5 Jun 2018 09:42:39 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.6 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_LAZY_DOMAIN_SECURITY, KAM_LOTSOFHASH, KAM_SHORT autolearn=ham version=3.3.2 spammy=slide, *c, complains X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 05 Jun 2018 09:42:37 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C1B111435 for ; Tue, 5 Jun 2018 02:42:35 -0700 (PDT) Received: from [10.2.207.77] (e100706-lin.cambridge.arm.com [10.2.207.77]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 449DE3F557 for ; Tue, 5 Jun 2018 02:42:35 -0700 (PDT) Message-ID: <5B165B09.8070201@foss.arm.com> Date: Tue, 05 Jun 2018 10:42:33 +0100 From: Kyrill Tkachov User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 MIME-Version: 1.0 To: "gcc-patches@gcc.gnu.org" Subject: [PATCH][arm] PR target/81497: Fix arm_acle.h for C++ Hi all, When trying to compile something with arm_acle.h using G++ we get a number of nasty errors: arm_acle.h:48:49: error: invalid conversion from ‘const void*’ to ‘const int*’ [-fpermissive] return __builtin_arm_ldc (__coproc, __CRd, __p); This is because the intrinsics that are supposed to be void return the "result" of their builtin, which is void. C lets that slide but C++ complains. After fixing that we run into further errors: arm_acle.h:48:46: error: invalid conversion from 'const void*' to 'const int*' [-fpermissive] return __builtin_arm_ldc (__coproc, __CRd, __p); ^~~ Because the pointer arguments in these intrinsics are void pointers but the builtin expects int pointers. So this patch introduces new qualifiers for void pointers and their const-qualified versions and uses that in the specification of these intrinsics. This gives us the opportunity of creating an arm subdirectory in g++.dg and inaugurates it with the first arm-specific C++ tests (in that directory). Bootstrapped and tested on arm-none-linux-gnueabihf. Committing to trunk. Will backport to the branches later. Thanks, Kyrill 2018-06-05 Kyrylo Tkachov PR target/81497 * config/arm/arm-builtins.c (arm_type_qualifiers): Add qualifier_void_pointer and qualifier_const_void_pointer. (arm_ldc_qualifiers, arm_stc_qualifiers): Use the above. (arm_init_builtins): Handle the above. * config/arm/arm_acle.h (__arm_cdp, __arm_ldc, __arm_ldcl, __arm_stc, __arm_stcl, __arm_mcr, __arm_cdp2, __arm_ldc2, __arm_ldcl2, __arm_stc2, __arm_stcl2,__arm_mcr2, __arm_mcrr, __arm_mcrr2): Remove return for void intrinsics. 2018-06-05 Kyrylo Tkachov PR target/81497 * g++.target/arm/arm.exp: New file. * g++.target/arm/pr81497.C: Likewise. diff --git a/gcc/config/arm/arm-builtins.c b/gcc/config/arm/arm-builtins.c index 7fde7a046726e50af61ee0823e8a2c42bed02f72..183a7b907f6cd960b9c72972da57c9e1537e7abc 100644 --- a/gcc/config/arm/arm-builtins.c +++ b/gcc/config/arm/arm-builtins.c @@ -78,7 +78,11 @@ enum arm_type_qualifiers /* Lane indices - must be within range of previous argument = a vector. */ qualifier_lane_index = 0x200, /* Lane indices for single lane structure loads and stores. */ - qualifier_struct_load_store_lane_index = 0x400 + qualifier_struct_load_store_lane_index = 0x400, + /* A void pointer. */ + qualifier_void_pointer = 0x800, + /* A const void pointer. */ + qualifier_const_void_pointer = 0x802 }; /* The qualifier_internal allows generation of a unary builtin from @@ -202,7 +206,7 @@ arm_cdp_qualifiers[SIMD_MAX_BUILTIN_ARGS] static enum arm_type_qualifiers arm_ldc_qualifiers[SIMD_MAX_BUILTIN_ARGS] = { qualifier_void, qualifier_unsigned_immediate, - qualifier_unsigned_immediate, qualifier_const_pointer }; + qualifier_unsigned_immediate, qualifier_const_void_pointer }; #define LDC_QUALIFIERS \ (arm_ldc_qualifiers) @@ -210,7 +214,7 @@ arm_ldc_qualifiers[SIMD_MAX_BUILTIN_ARGS] static enum arm_type_qualifiers arm_stc_qualifiers[SIMD_MAX_BUILTIN_ARGS] = { qualifier_void, qualifier_unsigned_immediate, - qualifier_unsigned_immediate, qualifier_pointer }; + qualifier_unsigned_immediate, qualifier_void_pointer }; #define STC_QUALIFIERS \ (arm_stc_qualifiers) @@ -1095,19 +1099,25 @@ arm_init_builtin (unsigned int fcode, arm_builtin_datum *d, if (qualifiers & qualifier_pointer && VECTOR_MODE_P (op_mode)) op_mode = GET_MODE_INNER (op_mode); - eltype = arm_simd_builtin_type - (op_mode, - (qualifiers & qualifier_unsigned) != 0, - (qualifiers & qualifier_poly) != 0); - gcc_assert (eltype != NULL); - - /* Add qualifiers. */ - if (qualifiers & qualifier_const) - eltype = build_qualified_type (eltype, TYPE_QUAL_CONST); - - if (qualifiers & qualifier_pointer) - eltype = build_pointer_type (eltype); - + /* For void pointers we already have nodes constructed by the midend. */ + if (qualifiers & qualifier_void_pointer) + eltype = qualifiers & qualifier_const + ? const_ptr_type_node : ptr_type_node; + else + { + eltype + = arm_simd_builtin_type (op_mode, + (qualifiers & qualifier_unsigned) != 0, + (qualifiers & qualifier_poly) != 0); + gcc_assert (eltype != NULL); + + /* Add qualifiers. */ + if (qualifiers & qualifier_const) + eltype = build_qualified_type (eltype, TYPE_QUAL_CONST); + + if (qualifiers & qualifier_pointer) + eltype = build_pointer_type (eltype); + } /* If we have reached arg_num == 0, we are at a non-void return type. Otherwise, we are still processing arguments. */ diff --git a/gcc/config/arm/arm_acle.h b/gcc/config/arm/arm_acle.h index 9a2f0ba30dca2c00445d97e91a0ca2967fd10ee1..c0f6ea2d1567bbbe25045c02191a11427f250ec3 100644 --- a/gcc/config/arm/arm_acle.h +++ b/gcc/config/arm/arm_acle.h @@ -38,35 +38,35 @@ __arm_cdp (const unsigned int __coproc, const unsigned int __opc1, const unsigned int __CRd, const unsigned int __CRn, const unsigned int __CRm, const unsigned int __opc2) { - return __builtin_arm_cdp (__coproc, __opc1, __CRd, __CRn, __CRm, __opc2); + __builtin_arm_cdp (__coproc, __opc1, __CRd, __CRn, __CRm, __opc2); } __extension__ static __inline void __attribute__ ((__always_inline__)) __arm_ldc (const unsigned int __coproc, const unsigned int __CRd, const void * __p) { - return __builtin_arm_ldc (__coproc, __CRd, __p); + __builtin_arm_ldc (__coproc, __CRd, __p); } __extension__ static __inline void __attribute__ ((__always_inline__)) __arm_ldcl (const unsigned int __coproc, const unsigned int __CRd, const void * __p) { - return __builtin_arm_ldcl (__coproc, __CRd, __p); + __builtin_arm_ldcl (__coproc, __CRd, __p); } __extension__ static __inline void __attribute__ ((__always_inline__)) __arm_stc (const unsigned int __coproc, const unsigned int __CRd, void * __p) { - return __builtin_arm_stc (__coproc, __CRd, __p); + __builtin_arm_stc (__coproc, __CRd, __p); } __extension__ static __inline void __attribute__ ((__always_inline__)) __arm_stcl (const unsigned int __coproc, const unsigned int __CRd, void * __p) { - return __builtin_arm_stcl (__coproc, __CRd, __p); + __builtin_arm_stcl (__coproc, __CRd, __p); } __extension__ static __inline void __attribute__ ((__always_inline__)) @@ -74,7 +74,7 @@ __arm_mcr (const unsigned int __coproc, const unsigned int __opc1, uint32_t __value, const unsigned int __CRn, const unsigned int __CRm, const unsigned int __opc2) { - return __builtin_arm_mcr (__coproc, __opc1, __value, __CRn, __CRm, __opc2); + __builtin_arm_mcr (__coproc, __opc1, __value, __CRn, __CRm, __opc2); } __extension__ static __inline uint32_t __attribute__ ((__always_inline__)) @@ -90,35 +90,35 @@ __arm_cdp2 (const unsigned int __coproc, const unsigned int __opc1, const unsigned int __CRd, const unsigned int __CRn, const unsigned int __CRm, const unsigned int __opc2) { - return __builtin_arm_cdp2 (__coproc, __opc1, __CRd, __CRn, __CRm, __opc2); + __builtin_arm_cdp2 (__coproc, __opc1, __CRd, __CRn, __CRm, __opc2); } __extension__ static __inline void __attribute__ ((__always_inline__)) __arm_ldc2 (const unsigned int __coproc, const unsigned int __CRd, const void * __p) { - return __builtin_arm_ldc2 (__coproc, __CRd, __p); + __builtin_arm_ldc2 (__coproc, __CRd, __p); } __extension__ static __inline void __attribute__ ((__always_inline__)) __arm_ldc2l (const unsigned int __coproc, const unsigned int __CRd, const void * __p) { - return __builtin_arm_ldc2l (__coproc, __CRd, __p); + __builtin_arm_ldc2l (__coproc, __CRd, __p); } __extension__ static __inline void __attribute__ ((__always_inline__)) __arm_stc2 (const unsigned int __coproc, const unsigned int __CRd, void * __p) { - return __builtin_arm_stc2 (__coproc, __CRd, __p); + __builtin_arm_stc2 (__coproc, __CRd, __p); } __extension__ static __inline void __attribute__ ((__always_inline__)) __arm_stc2l (const unsigned int __coproc, const unsigned int __CRd, void * __p) { - return __builtin_arm_stc2l (__coproc, __CRd, __p); + __builtin_arm_stc2l (__coproc, __CRd, __p); } __extension__ static __inline void __attribute__ ((__always_inline__)) @@ -126,7 +126,7 @@ __arm_mcr2 (const unsigned int __coproc, const unsigned int __opc1, uint32_t __value, const unsigned int __CRn, const unsigned int __CRm, const unsigned int __opc2) { - return __builtin_arm_mcr2 (__coproc, __opc1, __value, __CRn, __CRm, __opc2); + __builtin_arm_mcr2 (__coproc, __opc1, __value, __CRn, __CRm, __opc2); } __extension__ static __inline uint32_t __attribute__ ((__always_inline__)) @@ -143,7 +143,7 @@ __extension__ static __inline void __attribute__ ((__always_inline__)) __arm_mcrr (const unsigned int __coproc, const unsigned int __opc1, uint64_t __value, const unsigned int __CRm) { - return __builtin_arm_mcrr (__coproc, __opc1, __value, __CRm); + __builtin_arm_mcrr (__coproc, __opc1, __value, __CRm); } __extension__ static __inline uint64_t __attribute__ ((__always_inline__)) @@ -159,7 +159,7 @@ __extension__ static __inline void __attribute__ ((__always_inline__)) __arm_mcrr2 (const unsigned int __coproc, const unsigned int __opc1, uint64_t __value, const unsigned int __CRm) { - return __builtin_arm_mcrr2 (__coproc, __opc1, __value, __CRm); + __builtin_arm_mcrr2 (__coproc, __opc1, __value, __CRm); } __extension__ static __inline uint64_t __attribute__ ((__always_inline__)) diff --git a/gcc/testsuite/g++.target/arm/arm.exp b/gcc/testsuite/g++.target/arm/arm.exp new file mode 100644 index 0000000000000000000000000000000000000000..1a169d2f22021126d0f0057395b2474c4085cb5a --- /dev/null +++ b/gcc/testsuite/g++.target/arm/arm.exp @@ -0,0 +1,50 @@ +# Specific regression driver for arm. +# Copyright (C) 2009-2018 Free Software Foundation, Inc. +# +# This file is part of GCC. +# +# GCC is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3, or (at your option) +# any later version. +# +# GCC is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GCC; see the file COPYING3. If not see +# . */ + +# GCC testsuite that uses the `dg.exp' driver. + +# Exit immediately if this isn't an arm target. +if {![istarget arm*-*-*] } then { + return +} + +# Load support procs. +load_lib g++-dg.exp + +global DEFAULT_CXXFLAGS +if ![info exists DEFAULT_CXXFLAGS] then { + set DEFAULT_CXXFLAGS " -pedantic-errors" +} + + +global dg_runtest_extra_prunes +set dg_runtest_extra_prunes "" +lappend dg_runtest_extra_prunes "warning: switch -m(cpu|arch)=.* conflicts with -m(cpu|arch)=.* switch" + +# Initialize `dg'. +dg-init + +# Main loop. +dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.C]] \ + "" $DEFAULT_CXXFLAGS + +# All done. +set dg_runtest_extra_prunes "" +dg-finish + diff --git a/gcc/testsuite/g++.target/arm/pr81497.C b/gcc/testsuite/g++.target/arm/pr81497.C new file mode 100644 index 0000000000000000000000000000000000000000..0519a3a30452b87f38e1687783b09ea810bf0b85 --- /dev/null +++ b/gcc/testsuite/g++.target/arm/pr81497.C @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_thumb2_ok } */ + +#include + +int main () +{ + return 0; +}