From patchwork Wed May 30 08:14:34 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Packham X-Patchwork-Id: 922609 X-Patchwork-Delegate: sr@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="GSYIwIjw"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 40wk0c3ZK3z9s1d for ; Wed, 30 May 2018 18:14:56 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 1FB5CC21DAF; Wed, 30 May 2018 08:14:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_DNSWL_BLOCKED, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 981E4C21C27; Wed, 30 May 2018 08:14:49 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id D889AC21C27; Wed, 30 May 2018 08:14:48 +0000 (UTC) Received: from mail-pl0-f65.google.com (mail-pl0-f65.google.com [209.85.160.65]) by lists.denx.de (Postfix) with ESMTPS id 08983C21BE5 for ; Wed, 30 May 2018 08:14:48 +0000 (UTC) Received: by mail-pl0-f65.google.com with SMTP id bi12-v6so10613316plb.12 for ; Wed, 30 May 2018 01:14:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=BhYVvIGiD0upIfSw7k4UN1nkdzbqAUM9w9hmxo9vPRo=; b=GSYIwIjwE4kdxgjrugfxmrtj6uHTp2GW/prdvE5rrpz2pObFszmh42RaEMgKoyyZpr 9KfCgfSp0dSQZvpzl4xlK6bx1zx6zi1zaXpXlEHwxUrkYVGApcwZ9Cijk2QMtzfZ8udq Jy7HFMSCiCcbrwUpFe90KeYuyJvUQGbSlBTDW7aeGSoQWbZ4hnb///ka1cdvltTXZDo0 J35qL7bXmPQYFuvdcrmIbIpDKwQSAlo2F/ynXxomvIiqHWxwwLNxosXY/TnKGy5d4TkS fvt5sbciIveSP7qVLQJx3HcTmQaHWoOlzOJakyfqdPk1ObV6d94huyv+TNTNSCyof0z+ 4Uig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=BhYVvIGiD0upIfSw7k4UN1nkdzbqAUM9w9hmxo9vPRo=; b=sdoNc7ntuYt1h2fgeXFrScblfojv3vKjtr20G6eIAK3jncoGk/My7PRH0QATQsqz5q Xi1ttY+xJNRE3a9IMUD0Z00Xa5ZCukrRetkZe8bJgAEt1p17OeoVK4RuqvM08a2M0Foc ZvnQtLdXA/V6XPQ/Y/kBYWkmNuyItyCndaFvZ44BndpBeLT32OufYB2oivkg3OjHLEYv vKE7i5XrK+EonE9vvr9tVl1u+RDT6ALnMMIutKIioaXKeKe5YiLPERNXXfukpGMNXs2a bcjldm3x5hLk9dUdjhWPDwIZzaMF7iSVPVnr2nJBXz8gHsaoOsxlRB0370U9aQ34Tbyh /XwQ== X-Gm-Message-State: ALKqPwdDmZHRuTrSLhdZfVB8E98lWI8httzmpMKlqjO2J0kbQu/FdrRZ CrzRGvo3TDsCQALI2NqVnEeuWn9x X-Google-Smtp-Source: ADUXVKIUvsMrqAgxpZZk/fS5PbtIWprJC1EII++8jFdKO6MFQvYpAqnrjy0syRLoMqCC4JG1Kvu7hw== X-Received: by 2002:a17:902:780a:: with SMTP id p10-v6mr1871779pll.281.1527668086258; Wed, 30 May 2018 01:14:46 -0700 (PDT) Received: from chrisp-dl.ws.atlnz.lc ([2001:df5:b000:22:3a2c:4aff:fe70:2b02]) by smtp.gmail.com with ESMTPSA id b81-v6sm61161915pfj.56.2018.05.30.01.14.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 30 May 2018 01:14:45 -0700 (PDT) From: Chris Packham To: u-boot@lists.denx.de Date: Wed, 30 May 2018 20:14:34 +1200 Message-Id: <20180530081436.25793-1-judge.packham@gmail.com> X-Mailer: git-send-email 2.17.0 Cc: Tom Rini , Prafulla Wadaskar , Luka Perkov , Stefan Roese , Chris Packham Subject: [U-Boot] [PATCH v2 1/2] ARM: kirkwood: remove automatic I2C config if DM_I2C is enabled X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The mach/config.h file would helpfully define CONFIG_SYS_I2C and CONFIG_SYS_I2C_MVTWSI if CONFIG_CMD_I2C was defined by the board. This conflicts with the way DM_I2C works. As a transitional measure don't automatically define these if CONFIG_DM_I2C is defined. It should be possible to remove this once all kirkwood boards are migrated to DM. Signed-off-by: Chris Packham Reviewed-by: Stefan Roese --- Changes in v2: None arch/arm/mach-kirkwood/include/mach/config.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-kirkwood/include/mach/config.h b/arch/arm/mach-kirkwood/include/mach/config.h index 98639114dbdd..3482944c11de 100644 --- a/arch/arm/mach-kirkwood/include/mach/config.h +++ b/arch/arm/mach-kirkwood/include/mach/config.h @@ -116,7 +116,7 @@ /* * I2C related stuff */ -#ifdef CONFIG_CMD_I2C +#if defined(CONFIG_CMD_I2C) && !defined(CONFIG_DM_I2C) #ifndef CONFIG_SYS_I2C_SOFT #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MVTWSI From patchwork Wed May 30 08:14:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Packham X-Patchwork-Id: 922610 X-Patchwork-Delegate: sr@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="KtrABzu2"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 40wk1F30bRz9s1d for ; Wed, 30 May 2018 18:15:29 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id ECCB2C21E13; Wed, 30 May 2018 08:15:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_DNSWL_BLOCKED, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 6F4F0C21D65; Wed, 30 May 2018 08:15:09 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 2B059C21DF3; Wed, 30 May 2018 08:14:58 +0000 (UTC) Received: from mail-pg0-f66.google.com (mail-pg0-f66.google.com [74.125.83.66]) by lists.denx.de (Postfix) with ESMTPS id 99865C21DD4 for ; Wed, 30 May 2018 08:14:52 +0000 (UTC) Received: by mail-pg0-f66.google.com with SMTP id z1-v6so868471pgv.12 for ; Wed, 30 May 2018 01:14:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=scDzoU30PjJMkCxS3ONNCWNf/7RzjX0Oe1ma4Ql/kbY=; b=KtrABzu2eRWtO4jKbtlBE03WqVB7tDLRa5bocfPHks6E9HoMtzjne5T2I4sSaAk2dE /hXnjAJX04OAGqBdvFRW7TvAwa7XathmDJWtCv1KFymVR65vCAUWMqxrSqWqFU6fzQkr zdEvZ/RqUL0LAHGCDCP28h6kwii5zc+KFNTFUmRFKvQOEPOTirQY6U4obKJuRFj/8PYX mdKskHqgtnlQ4ZTni4wcD5pGqnF6kg75uAOpGoRJc0bkVLiXN5dzWu2pq2ZT0uDI3lM6 A3CHGOs0+IDcgn72IFaiD9YmuI4CUmpfKumA2HSr8ZzPkZMk66Usi9aaVVC7jNTjEWej uyEw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=scDzoU30PjJMkCxS3ONNCWNf/7RzjX0Oe1ma4Ql/kbY=; b=suNa1HZs3s6l0iW5OOxGceci6m6ZVg/8T65pREF9N/F88va8RakjPxJQsCvk+0NBxP /M2IRC6RHkOmX0/L81w+eB8ttabXhYkgbewWNWjMzbD6lmVr5r9thN3O7hqHTwwkdLyN q77isAtnHBcBuHsywdrdjVwuzzetcDvirXP2VDam/Lg7Q6UvtYR/8DvGHAbfLFud524Q S4gwrSoraW4HtOe7wJwMBaxTY45AN2mMpVDnBRv+PNvLazBI+h8uJVKZJ3x5u1gmbZ4P bW3yNn5FlczpjSu6/XAB8zqUOiJL5cOVz0xBZEK2MdBlv3YyVjAgBrAXuSglbTP/6FAU a00g== X-Gm-Message-State: ALKqPwcFjGp4cmOs9fldPMjE9/cVb7yBZnJjc0C2eUHwPYWx0960DEZG NO0MxBzQZE+MwibYMjVObfW/Q6Xy X-Google-Smtp-Source: ADUXVKLVSo49HkuGFFfIFYxnSWHMkLaqkHU4KHE/RRntYJHB0fyLdrUgReROve0oduGooUpt0Jh2RQ== X-Received: by 2002:a63:6f4c:: with SMTP id k73-v6mr1405375pgc.303.1527668090751; Wed, 30 May 2018 01:14:50 -0700 (PDT) Received: from chrisp-dl.ws.atlnz.lc ([2001:df5:b000:22:3a2c:4aff:fe70:2b02]) by smtp.gmail.com with ESMTPSA id b81-v6sm61161915pfj.56.2018.05.30.01.14.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 30 May 2018 01:14:50 -0700 (PDT) From: Chris Packham To: u-boot@lists.denx.de Date: Wed, 30 May 2018 20:14:35 +1200 Message-Id: <20180530081436.25793-2-judge.packham@gmail.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180530081436.25793-1-judge.packham@gmail.com> References: <20180530081436.25793-1-judge.packham@gmail.com> Cc: Tom Rini , Prafulla Wadaskar , Luka Perkov , Chris Packham , Stefan Roese , Chris Packham Subject: [U-Boot] [PATCH v2 2/2] ARM: add SBx81LIFKW board X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This is a series of line cards for Allied Telesis's SBx8100 chassis switch. The CPU block is common to the SBx81GS24a, SBx81XS6, SBx81XS16 and SBx81GT40 cards collectively referred to as SBx81LIFKW in u-boot. Reviewed-by: Stefan Roese Signed-off-by: Chris Packham --- This is the board I've been using for testing the device tree support for kirkwood. The Ethernet arrangement is a bit complicated and doesn't currently work on u-boot#master but I can test SPI and I2C. Changes in v2: - remove unnecessary platform.S arch/arm/dts/kirkwood-atl-sbx81lifkw.dts | 133 ++++++++++++++ arch/arm/mach-kirkwood/Kconfig | 4 + board/alliedtelesis/SBx81LIFKW/Kconfig | 12 ++ board/alliedtelesis/SBx81LIFKW/MAINTAINERS | 7 + board/alliedtelesis/SBx81LIFKW/Makefile | 7 + board/alliedtelesis/SBx81LIFKW/kwbimage.cfg | 47 +++++ board/alliedtelesis/SBx81LIFKW/sbx81lifkw.c | 187 ++++++++++++++++++++ configs/SBx81LIFKW_defconfig | 33 ++++ include/configs/SBx81LIFKW.h | 124 +++++++++++++ 9 files changed, 554 insertions(+) create mode 100644 arch/arm/dts/kirkwood-atl-sbx81lifkw.dts create mode 100644 board/alliedtelesis/SBx81LIFKW/Kconfig create mode 100644 board/alliedtelesis/SBx81LIFKW/MAINTAINERS create mode 100644 board/alliedtelesis/SBx81LIFKW/Makefile create mode 100644 board/alliedtelesis/SBx81LIFKW/kwbimage.cfg create mode 100644 board/alliedtelesis/SBx81LIFKW/sbx81lifkw.c create mode 100644 configs/SBx81LIFKW_defconfig create mode 100644 include/configs/SBx81LIFKW.h diff --git a/arch/arm/dts/kirkwood-atl-sbx81lifkw.dts b/arch/arm/dts/kirkwood-atl-sbx81lifkw.dts new file mode 100644 index 000000000000..e5b1efa1415a --- /dev/null +++ b/arch/arm/dts/kirkwood-atl-sbx81lifkw.dts @@ -0,0 +1,133 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "kirkwood.dtsi" +#include "kirkwood-6281.dtsi" + +/ { + model = "Allied Telesis SBx81LIFKW Board"; + compatible = "atl,SBx81LIFKW", "marvell,kirkwood-88f6281", + "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x08000000>; /* 128 MB */ + }; + + chosen { + bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; + }; + + aliases { + ethernet0 = ð0; + i2c0 = &i2c0; + spi0 = &spi0; + }; + + dsa { + compatible = "marvell,dsa"; + #address-cells = <2>; + #size-cells = <0>; + dsa,ethernet = <ð0>; + dsa,mii-bus = <&mdio>; + status = "okay"; + + switch@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1 0>; + + port@0 { + reg = <0>; + label = "internal0"; + }; + port@1 { + reg = <1>; + label = "internal1"; + }; + port@8 { + reg = <8>; + label = "internal8"; + phy-mode = "rgmii-id"; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + port@9 { + reg = <9>; + label = "internal9"; + phy-mode = "rgmii-id"; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + port@10 { + reg = <10>; + label = "cpu"; + }; + }; + }; +}; + +&spi0 { + status = "okay"; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,m25p128", "jedec,spi-nor", "spi-flash"; + reg = <0>; + spi-max-frequency = <50000000>; + mode = <0>; + + partition@u-boot { + reg = <0x00000000 0x00c00000>; + label = "u-boot"; + }; + partition@u-boot-env { + reg = <0x00c00000 0x00040000>; + label = "u-boot-env"; + }; + partition@unused { + reg = <0x00100000 0x00f00000>; + label = "unused"; + }; + }; +}; + +&i2c0 { + status = "okay"; + + eeprom@52 { + compatible = "atmel,24c04"; + reg = <0x52>; + }; +}; + +&uart0 { + status = "okay"; +}; + +&mdio { + status = "okay"; +}; + +ð0 { + status = "okay"; + + ethernet0-port@0 { + speed = <1000>; + duplex = <1>; + }; +}; + +&pciec { + status = "okay"; +}; + +&pcie0 { + status = "okay"; +}; diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig index 2dd107a8b3bf..5a5a63cea719 100644 --- a/arch/arm/mach-kirkwood/Kconfig +++ b/arch/arm/mach-kirkwood/Kconfig @@ -59,6 +59,9 @@ config TARGET_NAS220 config TARGET_NSA310S bool "Zyxel NSA310S" +config TARGET_SBx81LIFKW + bool "Allied Telesis SBx81GS24/SBx81GT40/SBx81XS6/SBx81XS16" + endchoice config SYS_SOC @@ -81,5 +84,6 @@ source "board/Seagate/dockstar/Kconfig" source "board/Seagate/goflexhome/Kconfig" source "board/Seagate/nas220/Kconfig" source "board/zyxel/nsa310s/Kconfig" +source "board/alliedtelesis/SBx81LIFKW/Kconfig" endif diff --git a/board/alliedtelesis/SBx81LIFKW/Kconfig b/board/alliedtelesis/SBx81LIFKW/Kconfig new file mode 100644 index 000000000000..5c2609b7f464 --- /dev/null +++ b/board/alliedtelesis/SBx81LIFKW/Kconfig @@ -0,0 +1,12 @@ +if TARGET_SBx81LIFKW + +config SYS_BOARD + default "SBx81LIFKW" + +config SYS_VENDOR + default "alliedtelesis" + +config SYS_CONFIG_NAME + default "SBx81LIFKW" + +endif diff --git a/board/alliedtelesis/SBx81LIFKW/MAINTAINERS b/board/alliedtelesis/SBx81LIFKW/MAINTAINERS new file mode 100644 index 000000000000..31ccec0e9b7e --- /dev/null +++ b/board/alliedtelesis/SBx81LIFKW/MAINTAINERS @@ -0,0 +1,7 @@ +SBx81LIFKW BOARD +M: Chris Packham +S: Maintained +F: board/alliedtelesis/SBx81LIFKW/ +F: include/configs/SBx81LIFKW +F: configs/SBx81LIFKW_defconfig +F: arch/arm/dts/kirkwood-atl-sbx81lifkw.dts diff --git a/board/alliedtelesis/SBx81LIFKW/Makefile b/board/alliedtelesis/SBx81LIFKW/Makefile new file mode 100644 index 000000000000..806020ed854c --- /dev/null +++ b/board/alliedtelesis/SBx81LIFKW/Makefile @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2010, 2018 +# Allied Telesis +# + +obj-y += sbx81lifkw.o diff --git a/board/alliedtelesis/SBx81LIFKW/kwbimage.cfg b/board/alliedtelesis/SBx81LIFKW/kwbimage.cfg new file mode 100644 index 000000000000..9726f15e28b0 --- /dev/null +++ b/board/alliedtelesis/SBx81LIFKW/kwbimage.cfg @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2018 Allied Telesis +# +# Refer docs/README.kwimage for more details about how-to configure +# and create kirkwood boot image +# + +# Boot Media configurations +BOOT_FROM spi # Boot from SPI flash + +# SOC registers configuration using bootrom header extension +# Maximum KWBIMAGE_MAX_CONFIG configurations allowed +DATA 0xffd100e0 0x1b1b1b1b +DATA 0xffd20134 0xffffffff +DATA 0xffd20138 0x009fffff +DATA 0xffd20154 0x00000000 +DATA 0xffd2014c 0x00000000 +DATA 0xffd20148 0x00000001 + +# Dram initalization for 1 x x16 +# DDR II Micron part number MT47H64M16HR-3 +# MClk 333MHz, Size 128MB, ECC disable +# +DATA 0xffd01400 0x43000618 +DATA 0xffd01404 0x35143000 +DATA 0xffd01408 0x11012227 +DATA 0xffd0140c 0x00000819 +DATA 0xffd01410 0x0000000d +DATA 0xffd01414 0x00000000 +DATA 0xffd01418 0x00000000 +DATA 0xffd0141c 0x00000632 +DATA 0xffd01420 0x00000040 +DATA 0xffd01424 0x0000f07f +DATA 0xffd01500 0x00000000 # SDRAM CS[0] Base address at 0x00000000 +DATA 0xffd01504 0x07FFFFF1 # SDRAM CS[0] Size 128MiB +DATA 0xffd01508 0x10000000 +DATA 0xffd0150c 0x00FFFFF4 # SDRAM CS[1] Size, window disabled +DATA 0xffd01514 0x00FFFFF8 # SDRAM CS[2] Size, window disabled +DATA 0xffd0151c 0x00FFFFFC # SDRAM CS[3] Size, window disabled +DATA 0xffd01494 0x00030000 +DATA 0xffd01498 0x00000000 +DATA 0xffd0149c 0x0000e803 +DATA 0xffd01480 0x00000001 + +# End of Header extension +DATA 0x0 0x0 diff --git a/board/alliedtelesis/SBx81LIFKW/sbx81lifkw.c b/board/alliedtelesis/SBx81LIFKW/sbx81lifkw.c new file mode 100644 index 000000000000..3cacdc837234 --- /dev/null +++ b/board/alliedtelesis/SBx81LIFKW/sbx81lifkw.c @@ -0,0 +1,187 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2010, 2018 + * Allied Telesis + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +/* Note: GPIO differences between specific boards + * + * We're trying to avoid having multiple build targets for all the Kirkwood + * based boards one area where things tend to differ is GPIO usage. For the + * most part the GPIOs driven by the bootloader are similar enough in function + * that there is no harm in driving them. + * + * XZ4 XS6 XS16 GS24A GT40 GP24A GT24A + * GPIO39 - INT(<) NC MUX_RST_N(>) NC POE_DIS_N(>) NC + */ + +#define SBX81LIFKW_OE_LOW ~(BIT(31) | BIT(30) | BIT(28) | BIT(27) | \ + BIT(18) | BIT(17) | BIT(13) | BIT(12) | \ + BIT(10)) +#define SBX81LIFKW_OE_HIGH ~(BIT(0) | BIT(1) | BIT(7)) +#define SBX81LIFKW_OE_VAL_LOW (BIT(31) | BIT(30) | BIT(28) | BIT(27)) +#define SBX81LIFKW_OE_VAL_HIGH (BIT(0) | BIT(1)) + +#define MV88E6097_RESET 27 + +DECLARE_GLOBAL_DATA_PTR; + +struct led { + u32 reg; + u32 value; + u32 mask; +}; + +struct led amber_solid = { + MVEBU_GPIO0_BASE, + BIT(10), + BIT(18) | BIT(10) +}; + +struct led green_solid = { + MVEBU_GPIO0_BASE, + BIT(18) | BIT(10), + BIT(18) | BIT(10) +}; + +struct led amber_flash = { + MVEBU_GPIO0_BASE, + 0, + BIT(18) | BIT(10) +}; + +struct led green_flash = { + MVEBU_GPIO0_BASE, + BIT(18), + BIT(18) | BIT(10) +}; + +static void status_led_set(struct led *led) +{ + clrsetbits_le32(led->reg, led->mask, led->value); +} + +int board_early_init_f(void) +{ + /* + * default gpio configuration + * There are maximum 64 gpios controlled through 2 sets of registers + * the below configuration configures mainly initial LED status + */ + mvebu_config_gpio(SBX81LIFKW_OE_VAL_LOW, + SBX81LIFKW_OE_VAL_HIGH, + SBX81LIFKW_OE_LOW, SBX81LIFKW_OE_HIGH); + + /* Multi-Purpose Pins Functionality configuration */ + static const u32 kwmpp_config[] = { + MPP0_SPI_SCn, + MPP1_SPI_MOSI, + MPP2_SPI_SCK, + MPP3_SPI_MISO, + MPP4_UART0_RXD, + MPP5_UART0_TXD, + MPP6_SYSRST_OUTn, + MPP7_PEX_RST_OUTn, + MPP8_TW_SDA, + MPP9_TW_SCK, + MPP10_GPO, + MPP11_GPIO, + MPP12_GPO, + MPP13_GPIO, + MPP14_GPIO, + MPP15_UART0_RTS, + MPP16_UART0_CTS, + MPP17_GPIO, + MPP18_GPO, + MPP19_GPO, + MPP20_GPIO, + MPP21_GPIO, + MPP22_GPIO, + MPP23_GPIO, + MPP24_GPIO, + MPP25_GPIO, + MPP26_GPIO, + MPP27_GPIO, + MPP28_GPIO, + MPP29_GPIO, + MPP30_GPIO, + MPP31_GPIO, + MPP32_GPIO, + MPP33_GPIO, + MPP34_GPIO, + MPP35_GPIO, + MPP36_GPIO, + MPP37_GPIO, + MPP38_GPIO, + MPP39_GPIO, + MPP40_GPIO, + MPP41_GPIO, + MPP42_GPIO, + MPP43_GPIO, + MPP44_GPIO, + MPP45_GPIO, + MPP46_GPIO, + MPP47_GPIO, + MPP48_GPIO, + MPP49_GPIO, + 0 + }; + + kirkwood_mpp_conf(kwmpp_config, NULL); + return 0; +} + +int board_init(void) +{ + /* Power-down unused subsystems. The required + * subsystems are: + * + * GE0 b0 + * PEX0 PHY b1 + * PEX0.0 b2 + * TSU b5 + * SDRAM b6 + * RUNIT b7 + */ + writel((BIT(0) | BIT(1) | BIT(2) | + BIT(5) | BIT(6) | BIT(7)), + KW_CPU_REG_BASE + 0x1c); + + /* address of boot parameters */ + gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; + + status_led_set(&amber_solid); + + return 0; +} + +#ifdef CONFIG_MV88E61XX_SWITCH +/* Configure and enable Switch and PHY */ +void reset_phy(void) +{ + /* Ensure the 88e6097 gets at least 10ms Reset + */ + kw_gpio_set_value(MV88E6097_RESET, 0); + mdelay(20); + kw_gpio_set_value(MV88E6097_RESET, 1); + mdelay(20); +} +#endif + +#ifdef CONFIG_MISC_INIT_R +int misc_init_r(void) +{ + status_led_set(&green_flash); + + return 0; +} +#endif diff --git a/configs/SBx81LIFKW_defconfig b/configs/SBx81LIFKW_defconfig new file mode 100644 index 000000000000..ec9df1ac691c --- /dev/null +++ b/configs/SBx81LIFKW_defconfig @@ -0,0 +1,33 @@ +CONFIG_ARM=y +CONFIG_KIRKWOOD=y +CONFIG_SYS_TEXT_BASE=0x00600000 +CONFIG_TARGET_SBx81LIFKW=y +CONFIG_IDENT_STRING="\nSBx81LIFKW" +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-atl-sbx81lifkw" +# CONFIG_SYS_MALLOC_F is not set +CONFIG_BOOTDELAY=3 +CONFIG_SILENT_CONSOLE=y +CONFIG_SILENT_U_BOOT_ONLY=y +CONFIG_HUSH_PARSER=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_I2C=y +CONFIG_CMD_SF=y +CONFIG_CMD_DHCP=y +CONFIG_BOOTP_NTPSERVER=y +CONFIG_CMD_PING=y +CONFIG_CMD_SNTP=y +CONFIG_OF_CONTROL=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_DM=y +CONFIG_DM_GPIO=y +CONFIG_DM_PCA953X=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MVTWSI=y +CONFIG_I2C_MUX=y +CONFIG_I2C_MUX_PCA954x=y +# CONFIG_MMC is not set +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_SPI=y +CONFIG_KIRKWOOD_SPI=y diff --git a/include/configs/SBx81LIFKW.h b/include/configs/SBx81LIFKW.h new file mode 100644 index 000000000000..756eaa47fa92 --- /dev/null +++ b/include/configs/SBx81LIFKW.h @@ -0,0 +1,124 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2016 Allied Telesis + */ + +#ifndef _CONFIG_SBX81LIFKW_H +#define _CONFIG_SBX81LIFKW_H + +/* + * High Level Configuration Options (easy to change) + */ +#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ +#define CONFIG_KW88F6281 1 /* SOC Name */ +#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ +#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg +#define CONFIG_BUILD_TARGET "u-boot.kwb" + +/* additions for new ARM relocation support */ +#define CONFIG_SYS_SDRAM_BASE 0x00000000 + +#define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */ +#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */ +#define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 */ +#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */ +#define CONFIG_KIRKWOOD_GPIO 1 + +#define CONFIG_MISC_INIT_R /* call misc_init_r */ + +/* + * NS16550 Configuration + */ +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK +#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE + +/* + * Serial Port configuration + * The following definitions let you select what serial you want to use + * for your console driver. + */ + +#define CONFIG_CONS_INDEX 1 /*Console on UART0 */ + +/* + * For booting Linux, the board info and command line data + * have to be in the first 8 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */ +#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */ + +#define MTDPARTS_DEFAULT "mtdparts=spi0.0:768K(boot)ro,256K(boot-env),14M(user),1M(errlog)" +#define MTDPARTS_MTDOOPS "errlog" +#define CONFIG_DOS_PARTITION + +/* + * Environment variables configurations + */ +#define CONFIG_ENV_SPI_BUS 0 +#define CONFIG_ENV_SPI_CS 0 +#define CONFIG_ENV_SPI_MAX_HZ 20000000 /* 20Mhz */ +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SECT_SIZE 0x40000 /* 256K */ +#define CONFIG_ENV_SIZE 0x02000 +#define CONFIG_ENV_OFFSET 0xc0000 /* env starts here - 768K */ + +/* + * U-Boot bootcode configuration + */ + +#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for monitor */ +#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* Reserve 4.0 MB for malloc */ + +/* + * For booting Linux, the board info and command line data + * have to be in the first 8 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Mem map for Linux*/ + +/* size in bytes reserved for initial data */ + +#include +/* There is no PHY directly connected so don't ask it for link status */ +#undef CONFIG_SYS_FAULT_ECHO_LINK_DOWN + +/* + * Other required minimal configurations + */ +#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ +#define CONFIG_NR_DRAM_BANKS 4 +#define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */ +#define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */ +#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ + +/* + * Ethernet Driver configuration + */ +#ifdef CONFIG_CMD_NET +#define CONFIG_NETCONSOLE /* include NetConsole support */ +#define CONFIG_NET_MULTI /* specify more that one ports available */ +#define CONFIG_MII /* expose smi over miiphy interface */ +#define CONFIG_PHYLIB +#define CONFIG_MVGBE /* Enable kirkwood Gbe Controller Driver */ +#define CONFIG_MVGBE_PORTS {1, 0} /* enable a single port */ +#define CONFIG_PHY_BASE_ADR 0x01 +#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ +#define CONFIG_RESET_PHY_R /* use reset_phy() to init switch */ +#define CONFIG_MV88E61XX_SWITCH /* Enable MV88E61XX switch driver */ +#define CONFIG_MV88E61XX_PHY_PORTS 0x303 /* Pt0,1,8,9 */ +#define CONFIG_MV88E61XX_CPU_PORT 10 /* 10(CPU) */ +#endif /* CONFIG_CMD_NET */ + +/* + * Time settings + */ +#define CONFIG_RTC_MV + +#define CONFIG_SYS_LOAD_ADDR 0x1000000 /* default location for tftp and bootm */ + +#endif /* _CONFIG_SBX81LIFKW_H */