From patchwork Tue Aug 29 20:35:15 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 807294 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="jEwOcPtK"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3xhgXK37hJz9s9Y for ; Wed, 30 Aug 2017 06:41:21 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751600AbdH2UlT (ORCPT ); Tue, 29 Aug 2017 16:41:19 -0400 Received: from mail-qk0-f196.google.com ([209.85.220.196]:37593 "EHLO mail-qk0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751249AbdH2UlQ (ORCPT ); Tue, 29 Aug 2017 16:41:16 -0400 Received: by mail-qk0-f196.google.com with SMTP id m4so3847437qke.4 for ; Tue, 29 Aug 2017 13:41:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=frGKJXgovrrI1aoA6wak8X8woz3TTGrDaLqeNPaYwwQ=; b=jEwOcPtKMkJlMJx+ry+zR8JDjUl6hfF1S475Lwh37+Ps5cmh1HayhkhHN5Bg/PN1Or jhwGoAMKphgIuNXu4MqBX8exSFLy7fjVepq/oPwATTU57SXlmf3+xvQ7TUcXIQkMYIp1 UE0XktvBhxTrhvECbAL93U/oo9AFjkxiGM1c7O6TxddiZNrhTfdtThBqnTU6WpZ7DM7G jBhNhnHOqnnIaZClAt9j1MUnlWLltWtpl13IctqktrUdo1W4qhU3SyTQjExorc1mAy6F xFlFADoE+AdhGa/naCaKGZcVyl7k7JFRBhdtua22AKsrwlFNTanyB0t0LVq5C1IPZLZ/ T32Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=frGKJXgovrrI1aoA6wak8X8woz3TTGrDaLqeNPaYwwQ=; b=OG8zD11abULDK8/zTHk6r5moTi9D9iZrVPLJ1ROBv/owyR7H3NwKBawsgzCIvH2VMY tMRoGSc/vDtZUo1yGmkTxBglwxGZsu9sbntUUScp+rhRt/ZXyS9g8GFNFtW6xK1qHvIW IK2CfIdu7ineZJYyEBz0Me+mM9GYWhTvPle2XwPHUGy1FhTdl7P7HKykTUhgQygvMju+ d88e5r/18AkpawgoW+452cdxT3sASYhmGge2iA8T+u6fcNadeDa422DcT/YZ5rtYx8jp 7pKRfXsXuZYPPKZNThmipIVpK+qfTWW5RnLRt1PJ5zkU0f6dJnx9SyzofuI1z7uimpmc RSDQ== X-Gm-Message-State: AHYfb5g/189n8K3UOoJosIHOwdoT4xPpVdWS6W0gTEUp1WYSzEH88yzX r8rfWlPDaTZbUo3TGqk= X-Received: by 10.233.235.69 with SMTP id b66mr7877220qkg.200.1504039275184; Tue, 29 Aug 2017 13:41:15 -0700 (PDT) Received: from stb-bld-04.irv.broadcom.com ([192.19.255.250]) by smtp.gmail.com with ESMTPSA id u17sm2645446qtc.43.2017.08.29.13.41.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 29 Aug 2017 13:41:14 -0700 (PDT) From: Florian Fainelli To: netdev@vger.kernel.org Cc: davem@davemloft.net, opendmb@gmail.com, andrew@lunn.ch, vivien.didelot@savoirfairelinux.com, Florian Fainelli Subject: [PATCH net-next v2 1/4] net: systemport: Use correct I/O accessors Date: Tue, 29 Aug 2017 13:35:15 -0700 Message-Id: <1504038918-49254-2-git-send-email-f.fainelli@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1504038918-49254-1-git-send-email-f.fainelli@gmail.com> References: <1504038918-49254-1-git-send-email-f.fainelli@gmail.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The SYSTEMPORT driver currently uses __raw_{read,write}l which means native I/O endian. This works correctly for an ARM LE kernel (default) but fails miserably on an ARM BE (BE8) kernel where registers are kept little endian, so replace uses with {read,write}l_relaxed here which is what we want because this is all performance sensitive code. Signed-off-by: Florian Fainelli --- drivers/net/ethernet/broadcom/bcmsysport.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/net/ethernet/broadcom/bcmsysport.c b/drivers/net/ethernet/broadcom/bcmsysport.c index b3a21418f511..a7e84292af50 100644 --- a/drivers/net/ethernet/broadcom/bcmsysport.c +++ b/drivers/net/ethernet/broadcom/bcmsysport.c @@ -32,13 +32,13 @@ #define BCM_SYSPORT_IO_MACRO(name, offset) \ static inline u32 name##_readl(struct bcm_sysport_priv *priv, u32 off) \ { \ - u32 reg = __raw_readl(priv->base + offset + off); \ + u32 reg = readl_relaxed(priv->base + offset + off); \ return reg; \ } \ static inline void name##_writel(struct bcm_sysport_priv *priv, \ u32 val, u32 off) \ { \ - __raw_writel(val, priv->base + offset + off); \ + writel_relaxed(val, priv->base + offset + off); \ } \ BCM_SYSPORT_IO_MACRO(intrl2_0, SYS_PORT_INTRL2_0_OFFSET); @@ -59,14 +59,14 @@ static inline u32 rdma_readl(struct bcm_sysport_priv *priv, u32 off) { if (priv->is_lite && off >= RDMA_STATUS) off += 4; - return __raw_readl(priv->base + SYS_PORT_RDMA_OFFSET + off); + return readl_relaxed(priv->base + SYS_PORT_RDMA_OFFSET + off); } static inline void rdma_writel(struct bcm_sysport_priv *priv, u32 val, u32 off) { if (priv->is_lite && off >= RDMA_STATUS) off += 4; - __raw_writel(val, priv->base + SYS_PORT_RDMA_OFFSET + off); + writel_relaxed(val, priv->base + SYS_PORT_RDMA_OFFSET + off); } static inline u32 tdma_control_bit(struct bcm_sysport_priv *priv, u32 bit) @@ -110,10 +110,10 @@ static inline void dma_desc_set_addr(struct bcm_sysport_priv *priv, dma_addr_t addr) { #ifdef CONFIG_PHYS_ADDR_T_64BIT - __raw_writel(upper_32_bits(addr) & DESC_ADDR_HI_MASK, + writel_relaxed(upper_32_bits(addr) & DESC_ADDR_HI_MASK, d + DESC_ADDR_HI_STATUS_LEN); #endif - __raw_writel(lower_32_bits(addr), d + DESC_ADDR_LO); + writel_relaxed(lower_32_bits(addr), d + DESC_ADDR_LO); } static inline void tdma_port_write_desc_addr(struct bcm_sysport_priv *priv, From patchwork Tue Aug 29 20:35:16 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 807295 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="uT2AllI+"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3xhgXN3CmHz9s9Y for ; Wed, 30 Aug 2017 06:41:24 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751660AbdH2UlV (ORCPT ); Tue, 29 Aug 2017 16:41:21 -0400 Received: from mail-qt0-f195.google.com ([209.85.216.195]:38868 "EHLO mail-qt0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751558AbdH2UlS (ORCPT ); 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Tue, 29 Aug 2017 13:41:17 -0700 (PDT) Received: from stb-bld-04.irv.broadcom.com ([192.19.255.250]) by smtp.gmail.com with ESMTPSA id u17sm2645446qtc.43.2017.08.29.13.41.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 29 Aug 2017 13:41:16 -0700 (PDT) From: Florian Fainelli To: netdev@vger.kernel.org Cc: davem@davemloft.net, opendmb@gmail.com, andrew@lunn.ch, vivien.didelot@savoirfairelinux.com, Florian Fainelli Subject: [PATCH net-next v2 2/4] net: dsa: bcm_sf2: Use correct I/O accessors Date: Tue, 29 Aug 2017 13:35:16 -0700 Message-Id: <1504038918-49254-3-git-send-email-f.fainelli@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1504038918-49254-1-git-send-email-f.fainelli@gmail.com> References: <1504038918-49254-1-git-send-email-f.fainelli@gmail.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The Starfigther 2 driver currently uses __raw_{read,write}l which means native I/O endian. This works correctly for an ARM LE kernel (default) but fails miserably on an ARM BE (BE8) kernel where registers are kept little endian, so replace uses with {read,write}l_relaxed here which is what we want because this is all performance sensitive code. Signed-off-by: Florian Fainelli --- drivers/net/dsa/bcm_sf2.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/net/dsa/bcm_sf2.h b/drivers/net/dsa/bcm_sf2.h index 7d3030e04f11..d9c96b281fc0 100644 --- a/drivers/net/dsa/bcm_sf2.h +++ b/drivers/net/dsa/bcm_sf2.h @@ -130,12 +130,12 @@ static inline u32 bcm_sf2_mangle_addr(struct bcm_sf2_priv *priv, u32 off) #define SF2_IO_MACRO(name) \ static inline u32 name##_readl(struct bcm_sf2_priv *priv, u32 off) \ { \ - return __raw_readl(priv->name + off); \ + return readl_relaxed(priv->name + off); \ } \ static inline void name##_writel(struct bcm_sf2_priv *priv, \ u32 val, u32 off) \ { \ - __raw_writel(val, priv->name + off); \ + writel_relaxed(val, priv->name + off); \ } \ /* Accesses to 64-bits register requires us to latch the hi/lo pairs @@ -179,23 +179,23 @@ static inline u32 bcm_sf2_mangle_addr(struct bcm_sf2_priv *priv, u32 off) static inline u32 core_readl(struct bcm_sf2_priv *priv, u32 off) { u32 tmp = bcm_sf2_mangle_addr(priv, off); - return __raw_readl(priv->core + tmp); + return readl_relaxed(priv->core + tmp); } static inline void core_writel(struct bcm_sf2_priv *priv, u32 val, u32 off) { u32 tmp = bcm_sf2_mangle_addr(priv, off); - __raw_writel(val, priv->core + tmp); + writel_relaxed(val, priv->core + tmp); } static inline u32 reg_readl(struct bcm_sf2_priv *priv, u16 off) { - return __raw_readl(priv->reg + priv->reg_offsets[off]); + return readl_relaxed(priv->reg + priv->reg_offsets[off]); } static inline void reg_writel(struct bcm_sf2_priv *priv, u32 val, u16 off) { - __raw_writel(val, priv->reg + priv->reg_offsets[off]); + writel_relaxed(val, priv->reg + priv->reg_offsets[off]); } SF2_IO64_MACRO(core); From patchwork Tue Aug 29 20:35:17 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 807296 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Authentication-Results: ozlabs.org; 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Tue, 29 Aug 2017 13:41:21 -0700 (PDT) Received: from stb-bld-04.irv.broadcom.com ([192.19.255.250]) by smtp.gmail.com with ESMTPSA id u17sm2645446qtc.43.2017.08.29.13.41.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 29 Aug 2017 13:41:20 -0700 (PDT) From: Florian Fainelli To: netdev@vger.kernel.org Cc: davem@davemloft.net, opendmb@gmail.com, andrew@lunn.ch, vivien.didelot@savoirfairelinux.com, Florian Fainelli Subject: [PATCH net-next v2 3/4] net: systemport: Set correct RSB endian bits based on host Date: Tue, 29 Aug 2017 13:35:17 -0700 Message-Id: <1504038918-49254-4-git-send-email-f.fainelli@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1504038918-49254-1-git-send-email-f.fainelli@gmail.com> References: <1504038918-49254-1-git-send-email-f.fainelli@gmail.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org RSB_SWAP0 needs to match the host CPU endian, and it needs to be set for LE and clear for BE. RSB_SWAP1 must always be cleared for SYSTEMPORT Lite. With these settings, we have the Receive Status Block always match the host endian and we do not need to perform any conversion. Since there is not necessarily a CONFIG_CPU_LITTLE_ENDIAN option defined, we test for !CONFIG_CPU_BIG_ENDIAN which is guaranteed to be set. Signed-off-by: Florian Fainelli --- drivers/net/ethernet/broadcom/bcmsysport.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/broadcom/bcmsysport.c b/drivers/net/ethernet/broadcom/bcmsysport.c index a7e84292af50..931751e4f369 100644 --- a/drivers/net/ethernet/broadcom/bcmsysport.c +++ b/drivers/net/ethernet/broadcom/bcmsysport.c @@ -1762,10 +1762,14 @@ static void rbuf_init(struct bcm_sysport_priv *priv) reg = rbuf_readl(priv, RBUF_CONTROL); reg |= RBUF_4B_ALGN | RBUF_RSB_EN; /* Set a correct RSB format on SYSTEMPORT Lite */ - if (priv->is_lite) { + if (priv->is_lite) reg &= ~RBUF_RSB_SWAP1; + + /* Set a correct RSB format based on host endian */ + if (!IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) reg |= RBUF_RSB_SWAP0; - } + else + reg &= ~RBUF_RSB_SWAP0; rbuf_writel(priv, reg, RBUF_CONTROL); } From patchwork Tue Aug 29 20:35:18 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 807297 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="mTdrYsvR"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3xhgXT1pL6z9s9Y for ; Wed, 30 Aug 2017 06:41:29 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751725AbdH2Ul1 (ORCPT ); Tue, 29 Aug 2017 16:41:27 -0400 Received: from mail-qk0-f195.google.com ([209.85.220.195]:32893 "EHLO mail-qk0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751607AbdH2UlZ (ORCPT ); Tue, 29 Aug 2017 16:41:25 -0400 Received: by mail-qk0-f195.google.com with SMTP id k126so486410qkb.0 for ; Tue, 29 Aug 2017 13:41:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=dT/wcd5dWnD6KRKqbd3Tyheq+dF05CxxysuYmldySFk=; b=mTdrYsvRPmMKNDnvgQlNLIEKIubJDxA4XOxFXYICvvy8ogJSohA7y50WPHjcAukL1O L5HhEXG9XLPQZC42j0iwZb/b5LTYOq1NjyDsZFCBi5bQaMMbYEf14ov+bzFLHYfzoGGH bfxPcAU5qTm3E/mRkEZP3XgMbce0NKsWazg2vaIXslZABfOMiUZTR3LvWwO4gz9LkKUx ruaADc0zetdvAfE4n4uONc98PH0nzqVPPaIh0wMmnNrgCBrDZON0+DUVaUYjuC/JvMKJ P/JgSQE+H9tavtr4UWZwh5bXrn2M/XOVo31E2btPpsmreai2WdaIxlMsu/nIiRYpL2mj geAw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=dT/wcd5dWnD6KRKqbd3Tyheq+dF05CxxysuYmldySFk=; b=p9wpblLsP+NGuOcaGDVqwKIxOiQil1oYVEX7npKCKpJQsuzKZ/BT6AkgdmTV543yfZ yVqCel9udnimfxbSUr61bGsKt6vysS7vnAu5U+Pb3BYH2uGjhf9255bIUW0RO5a65/Mr DrOz9TaGaDV6FIM9Umd4FiS+ZwQje23UlI1vw0Ngwgx6hAX/MwxnPEvGVaxf1hfePIQB HOjlRGSkIr1nu6f6k2EG4qUFqOs9LU/qG6O7wDxqqAgPnWprIBXbBfkm3OQp0PF7Mh8V j0mTk/f019YQKax8OKkCHoVt72FV9j6NSljBQUuAUQPBs0l/o9/VXY87uRc9y3hADttD Tt5Q== X-Gm-Message-State: AHYfb5hTQH/o+VVEo5ucwGtqTRKCtET8lgm/+khrnXLaGTiPre3+CTY+ SCLL8ocJxaUUKy5W8+g= X-Received: by 10.55.159.134 with SMTP id i128mr7385466qke.80.1504039284309; Tue, 29 Aug 2017 13:41:24 -0700 (PDT) Received: from stb-bld-04.irv.broadcom.com ([192.19.255.250]) by smtp.gmail.com with ESMTPSA id u17sm2645446qtc.43.2017.08.29.13.41.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 29 Aug 2017 13:41:23 -0700 (PDT) From: Florian Fainelli To: netdev@vger.kernel.org Cc: davem@davemloft.net, opendmb@gmail.com, andrew@lunn.ch, vivien.didelot@savoirfairelinux.com, Florian Fainelli Subject: [PATCH net-next v2 4/4] net: phy: mdio-bcm-unimac: Use correct I/O accessors Date: Tue, 29 Aug 2017 13:35:18 -0700 Message-Id: <1504038918-49254-5-git-send-email-f.fainelli@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1504038918-49254-1-git-send-email-f.fainelli@gmail.com> References: <1504038918-49254-1-git-send-email-f.fainelli@gmail.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The driver currently uses __raw_{read,write}l which works for all platforms supported: Broadcom MIPS LE/BE (native endian), ARM LE (native endian) but not ARM BE (registers are still LE). Switch to using the proper accessors for all platforms and explain why Broadcom MIPS BE is special here, in doing so, we introduce a couple of helper functions to abstract these differences. Signed-off-by: Florian Fainelli --- drivers/net/phy/mdio-bcm-unimac.c | 32 ++++++++++++++++++++++++++------ 1 file changed, 26 insertions(+), 6 deletions(-) diff --git a/drivers/net/phy/mdio-bcm-unimac.c b/drivers/net/phy/mdio-bcm-unimac.c index 73c5267a11fd..08e0647b85e2 100644 --- a/drivers/net/phy/mdio-bcm-unimac.c +++ b/drivers/net/phy/mdio-bcm-unimac.c @@ -47,18 +47,38 @@ struct unimac_mdio_priv { void *wait_func_data; }; +static inline u32 unimac_mdio_readl(struct unimac_mdio_priv *priv, u32 offset) +{ + /* MIPS chips strapped for BE will automagically configure the + * peripheral registers for CPU-native byte order. + */ + if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) + return __raw_readl(priv->base + offset); + else + return readl_relaxed(priv->base + offset); +} + +static inline void unimac_mdio_writel(struct unimac_mdio_priv *priv, u32 val, + u32 offset) +{ + if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) + __raw_writel(val, priv->base + offset); + else + writel_relaxed(val, priv->base + offset); +} + static inline void unimac_mdio_start(struct unimac_mdio_priv *priv) { u32 reg; - reg = __raw_readl(priv->base + MDIO_CMD); + reg = unimac_mdio_readl(priv, MDIO_CMD); reg |= MDIO_START_BUSY; - __raw_writel(reg, priv->base + MDIO_CMD); + unimac_mdio_writel(priv, reg, MDIO_CMD); } static inline unsigned int unimac_mdio_busy(struct unimac_mdio_priv *priv) { - return __raw_readl(priv->base + MDIO_CMD) & MDIO_START_BUSY; + return unimac_mdio_readl(priv, MDIO_CMD) & MDIO_START_BUSY; } static int unimac_mdio_poll(void *wait_func_data) @@ -87,7 +107,7 @@ static int unimac_mdio_read(struct mii_bus *bus, int phy_id, int reg) /* Prepare the read operation */ cmd = MDIO_RD | (phy_id << MDIO_PMD_SHIFT) | (reg << MDIO_REG_SHIFT); - __raw_writel(cmd, priv->base + MDIO_CMD); + unimac_mdio_writel(priv, cmd, MDIO_CMD); /* Start MDIO transaction */ unimac_mdio_start(priv); @@ -96,7 +116,7 @@ static int unimac_mdio_read(struct mii_bus *bus, int phy_id, int reg) if (ret) return ret; - cmd = __raw_readl(priv->base + MDIO_CMD); + cmd = unimac_mdio_readl(priv, MDIO_CMD); /* Some broken devices are known not to release the line during * turn-around, e.g: Broadcom BCM53125 external switches, so check for @@ -118,7 +138,7 @@ static int unimac_mdio_write(struct mii_bus *bus, int phy_id, /* Prepare the write operation */ cmd = MDIO_WR | (phy_id << MDIO_PMD_SHIFT) | (reg << MDIO_REG_SHIFT) | (0xffff & val); - __raw_writel(cmd, priv->base + MDIO_CMD); + unimac_mdio_writel(priv, cmd, MDIO_CMD); unimac_mdio_start(priv);