From patchwork Fri Sep 22 05:58:23 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 817326 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=nifty.com header.i=@nifty.com header.b="gCHb4X0i"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3xz2sN4CyNz9sNr for ; Fri, 22 Sep 2017 16:00:56 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751886AbdIVGAz (ORCPT ); Fri, 22 Sep 2017 02:00:55 -0400 Received: from conuserg-07.nifty.com ([210.131.2.74]:60680 "EHLO conuserg-07.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751838AbdIVGAx (ORCPT ); Fri, 22 Sep 2017 02:00:53 -0400 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-07.nifty.com with ESMTP id v8M5wUuZ007666; Fri, 22 Sep 2017 14:58:30 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-07.nifty.com v8M5wUuZ007666 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1506059911; bh=ApVTk3pz+PM98nNQ9jlgxlnPRPQAN7f6osnjs8x08YQ=; h=From:To:Cc:Subject:Date:From; b=gCHb4X0ibbd3K6AS/DiryVSbBaiezmYsJLHWa5V7yaCbpibVv2OQnjAMH4GvrO+qe /sTL3X+dIPLw6FFWhCLYs61b2U239x3J9u6Lk9erNrMls7+ozXDUrMKtVpidqyWmEO FoloWg4YW+9bRi3OpbpG/8YZM4fk4q1rRw3MzWBGLDuKIaudG+yRpbc2LRSHLepEhp wkqZFoJSL37qVh9+rgTiOvtfvs52w5GxnB5lnUD2OCZ4/dR6YfxGFoRs8JGS08RZf+ sJpqpbAqEBcDkQxXfTIZOZn6KtuVJPw8GAcOrC7xp0sdtmlhrzQepmWWV738BfLiZj ppkb1Yhr2Tztw== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: linux-mtd@lists.infradead.org Cc: Oleksij Rempel , Dinh Nguyen , Masahiro Yamada , Cyrille Pitchen , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Boris Brezillon , Marek Vasut , Brian Norris , Richard Weinberger , David Woodhouse , Rob Herring , Mark Rutland Subject: [PATCH v2] dt-bindings: nand: denali: reduce the register space in the example Date: Fri, 22 Sep 2017 14:58:23 +0900 Message-Id: <1506059903-15552-1-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This example allocates much more than needed for address regions. As for "denali_reg", as you see in drivers/mtd/nand/denali.h, all registers fit in 0x1000. As for "nand_data", this IP is generally configured to use Indexed Addressing mode, where there are only two registers in the address translation module (CTRL: 0x00, DATA: 0x10). Altera SOCFPGA is also this case. So, 0x20 is enough. Signed-off-by: Masahiro Yamada Acked-by: Rob Herring --- Changes in v2: - Add a little more explanation for rationale of this patch Documentation/devicetree/bindings/mtd/denali-nand.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mtd/denali-nand.txt b/Documentation/devicetree/bindings/mtd/denali-nand.txt index 504291d..0ee8edb 100644 --- a/Documentation/devicetree/bindings/mtd/denali-nand.txt +++ b/Documentation/devicetree/bindings/mtd/denali-nand.txt @@ -29,7 +29,7 @@ nand: nand@ff900000 { #address-cells = <1>; #size-cells = <1>; compatible = "altr,socfpga-denali-nand"; - reg = <0xff900000 0x100000>, <0xffb80000 0x10000>; + reg = <0xff900000 0x20>, <0xffb80000 0x1000>; reg-names = "nand_data", "denali_reg"; interrupts = <0 144 4>; };