From patchwork Fri May 18 01:27:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ken Ma X-Patchwork-Id: 915921 X-Patchwork-Delegate: sr@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=marvell.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 40n9lj5xChz9s1w for ; Fri, 18 May 2018 11:37:37 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id A10AFC21EEB; Fri, 18 May 2018 01:36:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id B9FDAC21EDE; Fri, 18 May 2018 01:35:59 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 71D64C21EAE; Fri, 18 May 2018 01:35:39 +0000 (UTC) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by lists.denx.de (Postfix) with ESMTPS id 0A395C21EC3 for ; Fri, 18 May 2018 01:35:35 +0000 (UTC) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w4I1ZCQB005423; Thu, 17 May 2018 18:35:28 -0700 Received: from sc-exch04.marvell.com ([199.233.58.184]) by mx0a-0016f401.pphosted.com with ESMTP id 2j0djpy0nn-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Thu, 17 May 2018 18:35:28 -0700 Received: from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH04.marvell.com (10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Thu, 17 May 2018 18:35:27 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Thu, 17 May 2018 18:35:26 -0700 Received: from mshsrv05.marvell.com (unknown [10.38.120.46]) by maili.marvell.com (Postfix) with ESMTP id 0C4333F7041; Thu, 17 May 2018 18:35:25 -0700 (PDT) From: To: Date: Fri, 18 May 2018 09:27:31 +0800 Message-ID: <1526606854-23725-2-git-send-email-make@marvell.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1526606854-23725-1-git-send-email-make@marvell.com> References: <1526606854-23725-1-git-send-email-make@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-05-17_13:, , signatures=0 X-Proofpoint-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1011 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1711220000 definitions=main-1805180014 Cc: Ken Ma , Stefan Roese Subject: [U-Boot] [PATCH 1/4] ata: mvebu: move mvebu sata driver to drivers/ata directory X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Ken Ma Currently mvebu sata driver is in arch/arm/mach_mvebu directory, this patch moves it to drivers/ata directory with renaming "sata.c" to "ahci_mvebu.c" which is aligned to Linux. New ahci driver's kconfig option is added as AHCI_MVEBU which selects DM_SCSI. Signed-off-by: Ken Ma Cc: Simon Glass Cc: Stefan Roese --- arch/arm/mach-mvebu/Makefile | 1 - arch/arm/mach-mvebu/sata.c | 54 -------------------------------------------- drivers/ata/Kconfig | 9 ++++++++ drivers/ata/Makefile | 1 + drivers/ata/ahci_mvebu.c | 54 ++++++++++++++++++++++++++++++++++++++++++++ 5 files changed, 64 insertions(+), 55 deletions(-) delete mode 100644 arch/arm/mach-mvebu/sata.c create mode 100644 drivers/ata/ahci_mvebu.c diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile index d4210af..7f0d692 100644 --- a/arch/arm/mach-mvebu/Makefile +++ b/arch/arm/mach-mvebu/Makefile @@ -9,7 +9,6 @@ ifdef CONFIG_ARM64 obj-$(CONFIG_ARMADA_3700) += armada3700/ obj-$(CONFIG_ARMADA_8K) += armada8k/ obj-y += arm64-common.o -obj-y += sata.o else # CONFIG_ARM64 diff --git a/arch/arm/mach-mvebu/sata.c b/arch/arm/mach-mvebu/sata.c deleted file mode 100644 index 5d8032b..0000000 --- a/arch/arm/mach-mvebu/sata.c +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Copyright (C) 2016 Stefan Roese - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -/* - * Dummy implementation that can be overwritten by a board - * specific function - */ -__weak int board_ahci_enable(void) -{ - return 0; -} - -#ifdef CONFIG_ARMADA_8K -/* CP110 has different AHCI port addresses */ -void __iomem *ahci_port_base(void __iomem *base, u32 port) -{ - return base + 0x10000 + (port * 0x10000); -} -#endif - -static int mvebu_ahci_probe(struct udevice *dev) -{ - /* - * Board specific SATA / AHCI enable code, e.g. enable the - * AHCI power or deassert reset - */ - board_ahci_enable(); - - ahci_init(devfdt_get_addr_ptr(dev)); - - return 0; -} - -static const struct udevice_id mvebu_ahci_ids[] = { - { .compatible = "marvell,armada-3700-ahci" }, - { .compatible = "marvell,armada-8k-ahci" }, - { } -}; - -U_BOOT_DRIVER(ahci_mvebu_drv) = { - .name = "ahci_mvebu", - .id = UCLASS_AHCI, - .of_match = mvebu_ahci_ids, - .probe = mvebu_ahci_probe, -}; diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig index 86ec628..9ef4589 100644 --- a/drivers/ata/Kconfig +++ b/drivers/ata/Kconfig @@ -99,4 +99,13 @@ config SATA_SIL3114 help Enable this driver to support the SIL3114 SATA controllers. +config AHCI_MVEBU + bool "Marvell EBU AHCI SATA support" + depends on ARCH_MVEBU + select DM_SCSI + help + This option enables support for the Marvell EBU SoC's + onboard AHCI SATA. + + If unsure, say N. endmenu diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile index a94c804..0254640 100644 --- a/drivers/ata/Makefile +++ b/drivers/ata/Makefile @@ -19,3 +19,4 @@ obj-$(CONFIG_SATA_MV) += sata_mv.o obj-$(CONFIG_SATA_SIL3114) += sata_sil3114.o obj-$(CONFIG_SATA_SIL) += sata_sil.o obj-$(CONFIG_SANDBOX) += sata_sandbox.o +obj-$(CONFIG_AHCI_MVEBU) += ahci_mvebu.o diff --git a/drivers/ata/ahci_mvebu.c b/drivers/ata/ahci_mvebu.c new file mode 100644 index 0000000..5c1b293 --- /dev/null +++ b/drivers/ata/ahci_mvebu.c @@ -0,0 +1,54 @@ +/* + * Copyright (C) 2018 Marvell International Ltd. + * Copyright (C) 2016 Stefan Roese + * + * SPDX-License-Identifier: GPL-2.0+ + * https://spdx.org/licenses + */ + +#include +#include +#include + +/* + * Dummy implementation that can be overwritten by a board + * specific function + */ +__weak int board_ahci_enable(void) +{ + return 0; +} + +#ifdef CONFIG_ARMADA_8K +/* CP110 has different AHCI port addresses */ +void __iomem *ahci_port_base(void __iomem *base, u32 port) +{ + return base + 0x10000 + (port * 0x10000); +} +#endif + +static int mvebu_ahci_probe(struct udevice *dev) +{ + /* + * Board specific SATA / AHCI enable code, e.g. enable the + * AHCI power or deassert reset + */ + board_ahci_enable(); + + ahci_init(devfdt_get_addr_ptr(dev)); + + return 0; +} + +static const struct udevice_id mvebu_ahci_ids[] = { + { .compatible = "marvell,armada-3700-ahci" }, + { .compatible = "marvell,armada-8k-ahci" }, + { } +}; + +U_BOOT_DRIVER(ahci_mvebu_drv) = { + .name = "ahci_mvebu", + .id = UCLASS_AHCI, + .of_match = mvebu_ahci_ids, + .probe = mvebu_ahci_probe, +}; From patchwork Fri May 18 01:27:32 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ken Ma X-Patchwork-Id: 915916 X-Patchwork-Delegate: sr@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=marvell.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 40n9k44fQqz9s1w for ; Fri, 18 May 2018 11:36:12 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 73728C21E02; Fri, 18 May 2018 01:35:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 8D31EC21E7F; Fri, 18 May 2018 01:35:56 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 70884C21E08; Fri, 18 May 2018 01:35:39 +0000 (UTC) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by lists.denx.de (Postfix) with ESMTPS id 27A9DC21EE8 for ; Fri, 18 May 2018 01:35:35 +0000 (UTC) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w4I1ZTXL005471; Thu, 17 May 2018 18:35:29 -0700 Received: from sc-exch04.marvell.com ([199.233.58.184]) by mx0a-0016f401.pphosted.com with ESMTP id 2j0djpy0nq-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Thu, 17 May 2018 18:35:29 -0700 Received: from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH04.marvell.com (10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Thu, 17 May 2018 18:35:28 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Thu, 17 May 2018 18:35:28 -0700 Received: from mshsrv05.marvell.com (unknown [10.38.120.46]) by maili.marvell.com (Postfix) with ESMTP id 659673F7040; Thu, 17 May 2018 18:35:27 -0700 (PDT) From: To: Date: Fri, 18 May 2018 09:27:32 +0800 Message-ID: <1526606854-23725-3-git-send-email-make@marvell.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1526606854-23725-1-git-send-email-make@marvell.com> References: <1526606854-23725-1-git-send-email-make@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-05-17_13:, , signatures=0 X-Proofpoint-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1711220000 definitions=main-1805180014 Cc: David Sniatkiwicz , Ken Ma , Stefan Roese Subject: [U-Boot] [PATCH 2/4] ata: ahci_mvebu: a8040 a0: remove bad port register offsets workarounds X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: David Sniatkiwicz This workaround was added for A8040/7040 A0. A8040/7040 A0 is no longer supported so this workaround can be removed. Signed-off-by: David Sniatkiwicz Signed-off-by: Ken Ma Cc: Simon Glass Cc: Stefan Roese Reviewed-by: Simon Glass --- drivers/ata/ahci_mvebu.c | 8 -------- 1 file changed, 8 deletions(-) diff --git a/drivers/ata/ahci_mvebu.c b/drivers/ata/ahci_mvebu.c index 5c1b293..97a04d9 100644 --- a/drivers/ata/ahci_mvebu.c +++ b/drivers/ata/ahci_mvebu.c @@ -19,14 +19,6 @@ __weak int board_ahci_enable(void) return 0; } -#ifdef CONFIG_ARMADA_8K -/* CP110 has different AHCI port addresses */ -void __iomem *ahci_port_base(void __iomem *base, u32 port) -{ - return base + 0x10000 + (port * 0x10000); -} -#endif - static int mvebu_ahci_probe(struct udevice *dev) { /* From patchwork Fri May 18 01:27:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ken Ma X-Patchwork-Id: 915917 X-Patchwork-Delegate: sr@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=marvell.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 40n9kh0dw7z9s1w for ; Fri, 18 May 2018 11:36:44 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id CA933C21EBA; Fri, 18 May 2018 01:36:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id DF287C21ECE; Fri, 18 May 2018 01:35:57 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 85136C21F00; Fri, 18 May 2018 01:35:40 +0000 (UTC) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by lists.denx.de (Postfix) with ESMTPS id 0F66BC21ECF for ; Fri, 18 May 2018 01:35:36 +0000 (UTC) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w4I1ZCQC005423; Thu, 17 May 2018 18:35:31 -0700 Received: from sc-exch01.marvell.com ([199.233.58.181]) by mx0a-0016f401.pphosted.com with ESMTP id 2j0djpy0nr-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Thu, 17 May 2018 18:35:30 -0700 Received: from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Thu, 17 May 2018 18:35:29 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Thu, 17 May 2018 18:35:29 -0700 Received: from mshsrv05.marvell.com (unknown [10.38.120.46]) by maili.marvell.com (Postfix) with ESMTP id 02CF53F703F; Thu, 17 May 2018 18:35:28 -0700 (PDT) From: To: Date: Fri, 18 May 2018 09:27:33 +0800 Message-ID: <1526606854-23725-4-git-send-email-make@marvell.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1526606854-23725-1-git-send-email-make@marvell.com> References: <1526606854-23725-1-git-send-email-make@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-05-17_13:, , signatures=0 X-Proofpoint-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=792 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1711220000 definitions=main-1805180014 Cc: Ken Ma , Stefan Roese Subject: [U-Boot] [PATCH 3/4] ata: ahci_mvebu: add scsi support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Ken Ma Mvebu AHCI is AHCI driver which uses SCSI under the hood. This patch adjusts AHCI setup to support SCSI by creating a SCSI device as a child. Signed-off-by: Ken Ma Cc: Simon Glass Cc: Stefan Roese Reviewed-by: Simon Glass --- drivers/ata/ahci_mvebu.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/drivers/ata/ahci_mvebu.c b/drivers/ata/ahci_mvebu.c index 97a04d9..9041a72 100644 --- a/drivers/ata/ahci_mvebu.c +++ b/drivers/ata/ahci_mvebu.c @@ -19,6 +19,20 @@ __weak int board_ahci_enable(void) return 0; } +static int mvebu_ahci_bind(struct udevice *dev) +{ + struct udevice *scsi_dev; + int ret; + + ret = ahci_bind_scsi(dev, &scsi_dev); + if (ret) { + debug("%s: Failed to bind (err=%d\n)", __func__, ret); + return ret; + } + + return 0; +} + static int mvebu_ahci_probe(struct udevice *dev) { /* @@ -27,7 +41,7 @@ static int mvebu_ahci_probe(struct udevice *dev) */ board_ahci_enable(); - ahci_init(devfdt_get_addr_ptr(dev)); + ahci_probe_scsi(dev, (ulong)devfdt_get_addr_ptr(dev)); return 0; } @@ -42,5 +56,6 @@ U_BOOT_DRIVER(ahci_mvebu_drv) = { .name = "ahci_mvebu", .id = UCLASS_AHCI, .of_match = mvebu_ahci_ids, + .bind = mvebu_ahci_bind, .probe = mvebu_ahci_probe, }; From patchwork Fri May 18 01:27:34 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ken Ma X-Patchwork-Id: 915920 X-Patchwork-Delegate: sr@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=marvell.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 40n9lg6ppMz9s1w for ; Fri, 18 May 2018 11:37:35 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id A55B5C21EC9; Fri, 18 May 2018 01:36:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id BFDD3C21F02; Fri, 18 May 2018 01:36:00 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 63184C21EFC; Fri, 18 May 2018 01:35:40 +0000 (UTC) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by lists.denx.de (Postfix) with ESMTPS id EF4E4C21E7F for ; Fri, 18 May 2018 01:35:36 +0000 (UTC) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w4I1ZCCA019357; Thu, 17 May 2018 18:35:32 -0700 Received: from sc-exch02.marvell.com ([199.233.58.182]) by mx0b-0016f401.pphosted.com with ESMTP id 2j0fs2en6x-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Thu, 17 May 2018 18:35:32 -0700 Received: from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH02.marvell.com (10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Thu, 17 May 2018 18:35:31 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Thu, 17 May 2018 18:35:31 -0700 Received: from mshsrv05.marvell.com (unknown [10.38.120.46]) by maili.marvell.com (Postfix) with ESMTP id 5CDC23F7040; Thu, 17 May 2018 18:35:30 -0700 (PDT) From: To: Date: Fri, 18 May 2018 09:27:34 +0800 Message-ID: <1526606854-23725-5-git-send-email-make@marvell.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1526606854-23725-1-git-send-email-make@marvell.com> References: <1526606854-23725-1-git-send-email-make@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-05-17_13:, , signatures=0 X-Proofpoint-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=568 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1711220000 definitions=main-1805180014 Cc: Ken Ma , Stefan Roese Subject: [U-Boot] [PATCH 4/4] arm64: mvebu: defconfig: enable CONFIG_AHCI_MVEBU X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Ken Ma This patch enables the new ahci mvebu driver for marvell arm64 platform SOCs(A3k and A8k). Signed-off-by: Ken Ma Cc: Simon Glass Cc: Stefan Roese Reviewed-by: Simon Glass --- configs/mvebu_db-88f3720_defconfig | 1 + configs/mvebu_db_armada8k_defconfig | 1 + configs/mvebu_espressobin-88f3720_defconfig | 1 + configs/mvebu_mcbin-88f8040_defconfig | 1 + 4 files changed, 4 insertions(+) diff --git a/configs/mvebu_db-88f3720_defconfig b/configs/mvebu_db-88f3720_defconfig index 1d6233a..d40dd42 100644 --- a/configs/mvebu_db-88f3720_defconfig +++ b/configs/mvebu_db-88f3720_defconfig @@ -29,6 +29,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_MAC_PARTITION=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SCSI_AHCI=y +CONFIG_AHCI_MVEBU=y CONFIG_BLOCK_CACHE=y CONFIG_DM_GPIO=y # CONFIG_MVEBU_GPIO is not set diff --git a/configs/mvebu_db_armada8k_defconfig b/configs/mvebu_db_armada8k_defconfig index da67aad..72c86f3 100644 --- a/configs/mvebu_db_armada8k_defconfig +++ b/configs/mvebu_db_armada8k_defconfig @@ -30,6 +30,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_MAC_PARTITION=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SCSI_AHCI=y +CONFIG_AHCI_MVEBU=y CONFIG_BLOCK_CACHE=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/mvebu_espressobin-88f3720_defconfig b/configs/mvebu_espressobin-88f3720_defconfig index 314d405..cc41711 100644 --- a/configs/mvebu_espressobin-88f3720_defconfig +++ b/configs/mvebu_espressobin-88f3720_defconfig @@ -28,6 +28,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_MAC_PARTITION=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SCSI_AHCI=y +CONFIG_AHCI_MVEBU=y CONFIG_BLOCK_CACHE=y CONFIG_DM_I2C=y CONFIG_MISC=y diff --git a/configs/mvebu_mcbin-88f8040_defconfig b/configs/mvebu_mcbin-88f8040_defconfig index e16a56e..dea0cd0 100644 --- a/configs/mvebu_mcbin-88f8040_defconfig +++ b/configs/mvebu_mcbin-88f8040_defconfig @@ -32,6 +32,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_MAC_PARTITION=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SCSI_AHCI=y +CONFIG_AHCI_MVEBU=y CONFIG_BLOCK_CACHE=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y