From patchwork Thu May 17 04:59:47 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H. Nikolaus Schaller" X-Patchwork-Id: 915073 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=goldelico.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=goldelico.com header.i=@goldelico.com header.b="Bm/zyvGm"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40mfJL2Pfmz9s1d for ; Thu, 17 May 2018 15:00:34 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751481AbeEQFAH (ORCPT ); Thu, 17 May 2018 01:00:07 -0400 Received: from mo4-p02-ob.smtp.rzone.de ([85.215.255.81]:33152 "EHLO mo4-p02-ob.smtp.rzone.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751468AbeEQFAE (ORCPT ); Thu, 17 May 2018 01:00:04 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; t=1526533202; s=strato-dkim-0002; d=goldelico.com; h=References:In-Reply-To:References:In-Reply-To:Message-Id:Date: Subject:Cc:To:From:X-RZG-CLASS-ID:X-RZG-AUTH:From:Subject:Sender; bh=1fSZWzOPqYGvhUftqAYCg1xXNdGHukhBqIx2jb1StI8=; b=Bm/zyvGm90ztdRw4yfsv9yYrx4m5pl85HRIqYMV52Tq3vgz6Qa7DTFUxd+G79PLvMX labWIfTazl675fnku9n7fvvvWot2+sFNuJJEkQyrS+43MrbQ45wsjA2SARzjjCD2oB07 mhmExUW4sS9i+N6In8hLTB+AW9WJzY1n04q35WFryIae/j6nU+bc2RvNIodtGVs4TYGd tCfi6RxUNJF2DrQ4A/In3VyA8uPuSZTDzM8b/m+l9XPIUvqP8xqR3do4KzHTdaJZiLrM wArmmNE3AVjoQcVdSJ3WYe9M4QSrPFz1GaJ8oYT5+OwbPFwTqssbjFEFnBTpBo+lCbpB 2o+Q== X-RZG-AUTH: ":JGIXVUS7cutRB/49FwqZ7WcJeFKiMhflhwDubTJ9o12DNO4Ij0Nfyq4rHQ==" X-RZG-CLASS-ID: mo00 Received: from iMac.fritz.box by smtp.strato.de (RZmta 43.8 DYNA|AUTH) with ESMTPSA id D0a232u4H4xqkl3 (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (curve secp521r1 with 521 ECDH bits, eq. 15360 bits RSA)) (Client did not present a certificate); Thu, 17 May 2018 06:59:52 +0200 (CEST) From: "H. Nikolaus Schaller" To: galak@codeaurora.org, andy.shevchenko@gmail.com, Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Linus Walleij , Alexandre Courbot Cc: devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, letux-kernel@openphoenux.org, kernel@pyra-handheld.com, "H. Nikolaus Schaller" Subject: [PATCH v7 1/3] gpio: pca953x: set the PCA_PCAL flag also when matching by DT Date: Thu, 17 May 2018 06:59:47 +0200 Message-Id: <7c9ab1d702eb62755993321865d260fa54b90358.1526533188.git.hns@goldelico.com> X-Mailer: git-send-email 2.12.2 In-Reply-To: References: In-Reply-To: References: Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The of_device_table is missing the PCA_PCAL flag so the pcal6524 would be operated in tca6424 compatibility mode which does not handle the new interrupt mask registers. Suggested-by: Andy Shevchenko Signed-off-by: H. Nikolaus Schaller --- drivers/gpio/gpio-pca953x.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 7d37692d672e..2b667166e855 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -58,6 +58,7 @@ #define PCA_GPIO_MASK 0x00FF #define PCA_INT 0x0100 #define PCA_PCAL 0x0200 +#define PCA_LATCH_INT (PCA_PCAL | PCA_INT) #define PCA953X_TYPE 0x1000 #define PCA957X_TYPE 0x2000 #define PCA_TYPE_MASK 0xF000 @@ -946,8 +947,8 @@ static const struct of_device_id pca953x_dt_ids[] = { { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), }, { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), }, - { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_INT), }, - { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_INT), }, + { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), }, + { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_LATCH_INT), }, { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), }, { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), }, From patchwork Thu May 17 04:59:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H. Nikolaus Schaller" X-Patchwork-Id: 915074 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=goldelico.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=goldelico.com header.i=@goldelico.com header.b="CITxJkyV"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40mfJt46Qrz9s3G for ; Thu, 17 May 2018 15:01:02 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751916AbeEQFAd (ORCPT ); Thu, 17 May 2018 01:00:33 -0400 Received: from mo4-p02-ob.smtp.rzone.de ([85.215.255.81]:20786 "EHLO mo4-p02-ob.smtp.rzone.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751438AbeEQFAH (ORCPT ); Thu, 17 May 2018 01:00:07 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; t=1526533205; s=strato-dkim-0002; d=goldelico.com; h=References:In-Reply-To:References:In-Reply-To:Message-Id:Date: Subject:Cc:To:From:X-RZG-CLASS-ID:X-RZG-AUTH:From:Subject:Sender; bh=WkxHVH6qWIFo5nrh1I7JsSAR7V1dbZRUkGwhncuabFg=; b=CITxJkyVGU4gd+FKKViqnhSd5ykpVHQ5/Ad16yFOuR2KGraDlfUoX2fgsw9sloCYk7 nk9Y16BKHcGpusAf49c4McfOsEL4NXsMFD4Hg/z/Tw+EanC/ILhglDWhXbJQdsykMJ6D 9GoyTo7PJBdVgiGY+r4j8veZKn02kxO+5hVAxUzA5dAC70SeNQVPvNuqD6/mec63nYER sOp8Icvjct+6qs12ehOON2U5u9t4e+WfnRI8vGOE56LsfGLiMBJDHG6KnzJ269AYiQOX 53WSeAitfFcCKx/tqwMeg5E6vm3pC5g8A651m5opBr8L4equFQOgsxD4L0gGTnQZoBH+ c1SA== X-RZG-AUTH: ":JGIXVUS7cutRB/49FwqZ7WcJeFKiMhflhwDubTJ9o12DNO4Ij0Nfyq4rHQ==" X-RZG-CLASS-ID: mo00 Received: from iMac.fritz.box by smtp.strato.de (RZmta 43.8 DYNA|AUTH) with ESMTPSA id D0a232u4H4xqkl4 (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (curve secp521r1 with 521 ECDH bits, eq. 15360 bits RSA)) (Client did not present a certificate); Thu, 17 May 2018 06:59:52 +0200 (CEST) From: "H. Nikolaus Schaller" To: galak@codeaurora.org, andy.shevchenko@gmail.com, Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Linus Walleij , Alexandre Courbot Cc: devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, letux-kernel@openphoenux.org, kernel@pyra-handheld.com, "H. Nikolaus Schaller" Subject: [PATCH v7 2/3] gpio: pca953x: define masks for addressing common and extended registers Date: Thu, 17 May 2018 06:59:48 +0200 Message-Id: <2fe132b534a4b1ca717932e78cc3cdae5aacba0d.1526533188.git.hns@goldelico.com> X-Mailer: git-send-email 2.12.2 In-Reply-To: References: In-Reply-To: References: Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org These mask bits are to be used to map the extended register addreseses (which are defined for an unsupported 8-bit pcal chip) to 16 and 24 bit chips (pcal6524). Reviewed-by: Andy Shevchenko Signed-off-by: H. Nikolaus Schaller --- drivers/gpio/gpio-pca953x.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 2b667166e855..c682921d7019 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -56,6 +56,10 @@ #define PCAL6524_DEBOUNCE 0x2d #define PCA_GPIO_MASK 0x00FF + +#define PCAL_GPIO_MASK 0x1f +#define PCAL_PINCTRL_MASK 0xe0 + #define PCA_INT 0x0100 #define PCA_PCAL 0x0200 #define PCA_LATCH_INT (PCA_PCAL | PCA_INT) From patchwork Thu May 17 04:59:49 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "H. Nikolaus Schaller" X-Patchwork-Id: 915072 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=goldelico.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=goldelico.com header.i=@goldelico.com header.b="k0y/E50f"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40mfJ775Trz9s3B for ; Thu, 17 May 2018 15:00:23 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751665AbeEQFAI (ORCPT ); Thu, 17 May 2018 01:00:08 -0400 Received: from mo4-p02-ob.smtp.rzone.de ([85.215.255.82]:32461 "EHLO mo4-p02-ob.smtp.rzone.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751457AbeEQFAD (ORCPT ); Thu, 17 May 2018 01:00:03 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; t=1526533201; s=strato-dkim-0002; d=goldelico.com; h=References:In-Reply-To:References:In-Reply-To:Message-Id:Date: Subject:Cc:To:From:X-RZG-CLASS-ID:X-RZG-AUTH:From:Subject:Sender; bh=NW2x8CzeTscHaAqdYuRQiMUHo9OHqEA8QD3Z6Lr1HS8=; b=k0y/E50fLg7AFxD/v/AUe+Qxsy+fGcDVvboK6IYkU/ITsA2HGMDEP6tsP/CMxEVdlt MFwoCKZTRUsoiIVIdQNldnkCD9rwjlzYV4NtKvC8taSztLBX25ZS/qF/phH6/R8QFdZM VAPyWDpjEqEO1jCZl3po9AkKHKUQ5h0F+52J1Wkkn6ZUhloKRHa1sNSQIwTdDhqKwGcj 7xFZwpTuWD9qCvYE1T2mBZ6EnZlUW5bi2j0ZZldIcqAvpdZvAkQl8e+uvjkoIhBrU3yc JaM2sebzcPMiAaci3OdnQ4UO5KL/5NsHcAeSnl/RlXJLbtXvpHPlf3Tv1BXRSGXJh5fW +odA== X-RZG-AUTH: ":JGIXVUS7cutRB/49FwqZ7WcJeFKiMhflhwDubTJ9o12DNO4Ij0Nfyq4rHQ==" X-RZG-CLASS-ID: mo00 Received: from iMac.fritz.box by smtp.strato.de (RZmta 43.8 DYNA|AUTH) with ESMTPSA id D0a232u4H4xqkl5 (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (curve secp521r1 with 521 ECDH bits, eq. 15360 bits RSA)) (Client did not present a certificate); Thu, 17 May 2018 06:59:52 +0200 (CEST) From: "H. Nikolaus Schaller" To: galak@codeaurora.org, andy.shevchenko@gmail.com, Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Linus Walleij , Alexandre Courbot Cc: devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, letux-kernel@openphoenux.org, kernel@pyra-handheld.com, "H. Nikolaus Schaller" Subject: [PATCH v7 3/3] gpio: pca953x: fix address calculation for pcal6524 Date: Thu, 17 May 2018 06:59:49 +0200 Message-Id: X-Mailer: git-send-email 2.12.2 In-Reply-To: References: In-Reply-To: References: MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The register constants are so far defined in a way that they fit for the pcal9555a when shifted by the number of banks, i.e. are multiplied by 2 in the accessor function. Now, the pcal6524 has 3 banks which means the relative offset is multiplied by 4 for the standard registers. Simply applying the bit shift to the extended registers gives a wrong result, since the base offset is already included in the offset. Therefore, we have to add code to the 24 bit accessor functions that adjusts the register number for these exended registers. The formula finally used was developed and proposed by Andy Shevchenko . Suggested-by: Andy Shevchenko Signed-off-by: H. Nikolaus Schaller --- drivers/gpio/gpio-pca953x.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index c682921d7019..4ad553f4e41f 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -222,9 +222,11 @@ static int pca957x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val) static int pca953x_write_regs_24(struct pca953x_chip *chip, int reg, u8 *val) { int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); + int addr = (reg & PCAL_GPIO_MASK) << bank_shift; + int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; return i2c_smbus_write_i2c_block_data(chip->client, - (reg << bank_shift) | REG_ADDR_AI, + pinctrl | addr | REG_ADDR_AI, NBANK(chip), val); } @@ -264,9 +266,11 @@ static int pca953x_read_regs_16(struct pca953x_chip *chip, int reg, u8 *val) static int pca953x_read_regs_24(struct pca953x_chip *chip, int reg, u8 *val) { int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); + int addr = (reg & PCAL_GPIO_MASK) << bank_shift; + int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; return i2c_smbus_read_i2c_block_data(chip->client, - (reg << bank_shift) | REG_ADDR_AI, + pinctrl | addr | REG_ADDR_AI, NBANK(chip), val); }