From patchwork Mon May 14 16:20:02 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oleksandr Shamray X-Patchwork-Id: 913084 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=mellanox.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40l5Xm15c6z9rxs for ; Tue, 15 May 2018 02:20:56 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754887AbeENQUN (ORCPT ); Mon, 14 May 2018 12:20:13 -0400 Received: from mail-il-dmz.mellanox.com ([193.47.165.129]:39829 "EHLO mellanox.co.il" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1754878AbeENQUL (ORCPT ); Mon, 14 May 2018 12:20:11 -0400 Received: from Internal Mail-Server by MTLPINE1 (envelope-from oleksandrs@mellanox.com) with ESMTPS (AES256-SHA encrypted); 14 May 2018 19:21:56 +0300 Received: from r-vnc16.mtr.labs.mlnx (r-vnc16.mtr.labs.mlnx [10.208.0.16]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id w4EGK3AV020510; Mon, 14 May 2018 19:20:07 +0300 From: Oleksandr Shamray To: gregkh@linuxfoundation.org, arnd@arndb.de Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, openbmc@lists.ozlabs.org, joel@jms.id.au, jiri@resnulli.us, tklauser@distanz.ch, linux-serial@vger.kernel.org, vadimp@mellanox.com, system-sw-low-level@mellanox.com, robh+dt@kernel.org, openocd-devel-owner@lists.sourceforge.net, linux-api@vger.kernel.org, davem@davemloft.net, mchehab@kernel.org, Oleksandr Shamray , Jiri Pirko Subject: [patch v20 3/4] Documentation: jtag: Add bindings for Aspeed SoC 24xx and 25xx families JTAG master driver Date: Mon, 14 May 2018 19:20:02 +0300 Message-Id: <1526314803-3532-4-git-send-email-oleksandrs@mellanox.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1526314803-3532-1-git-send-email-oleksandrs@mellanox.com> References: <1526314803-3532-1-git-send-email-oleksandrs@mellanox.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org It has been tested on Mellanox system with BMC equipped with Aspeed 2520 SoC for programming CPLD devices. Signed-off-by: Oleksandr Shamray Signed-off-by: Jiri Pirko Acked-by: Rob Herring --- v19->v20 v18->v19 v17->v18 v16->v17 v15->v16 Comments pointed by Joel Stanley - change clocks = <&clk_apb> to proper clocks = <&syscon ASPEED_CLK_APB> - add reset descriptions in bndings file v14->v15 v13->v14 v12->v13 v11->v12 v10->v11 v9->v10 v8->v9 v7->v8 Comments pointed by pointed by Joel Stanley - Change compatible string to ast2400 and ast2000 V6->v7 Comments pointed by Tobias Klauser - Fix spell "Doccumentation" -> "Documentation" v5->v6 Comments pointed by Tobias Klauser - Small nit: s/documentation/Documentation/ v4->v5 V3->v4 Comments pointed by Rob Herring - delete unnecessary "status" and "reg-shift" descriptions in bndings file v2->v3 Comments pointed by Rob Herring - split Aspeed jtag driver and binding to sepatrate patches - delete unnecessary "status" and "reg-shift" descriptions in bndings file --- .../devicetree/bindings/jtag/aspeed-jtag.txt | 22 ++++++++++++++++++++ 1 files changed, 22 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/jtag/aspeed-jtag.txt diff --git a/Documentation/devicetree/bindings/jtag/aspeed-jtag.txt b/Documentation/devicetree/bindings/jtag/aspeed-jtag.txt new file mode 100644 index 0000000..7c36eb6 --- /dev/null +++ b/Documentation/devicetree/bindings/jtag/aspeed-jtag.txt @@ -0,0 +1,22 @@ +Aspeed JTAG driver for ast2400 and ast2500 SoC + +Required properties: +- compatible: Should be one of + - "aspeed,ast2400-jtag" + - "aspeed,ast2500-jtag" +- reg contains the offset and length of the JTAG memory + region +- clocks root clock of bus, should reference the APB + clock in the second cell +- resets phandle to reset controller with the reset number in + the second cell +- interrupts should contain JTAG controller interrupt + +Example: +jtag: jtag@1e6e4000 { + compatible = "aspeed,ast2500-jtag"; + reg = <0x1e6e4000 0x1c>; + clocks = <&syscon ASPEED_CLK_APB>; + resets = <&syscon ASPEED_RESET_JTAG_MASTER>; + interrupts = <43>; +};