From patchwork Mon May 14 08:22:18 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marco Felsch X-Patchwork-Id: 912741 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40ktwh5lH9z9s0q for ; Mon, 14 May 2018 18:22:28 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751894AbeENIW0 (ORCPT ); Mon, 14 May 2018 04:22:26 -0400 Received: from metis.ext.pengutronix.de ([85.220.165.71]:49153 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752138AbeENIWY (ORCPT ); Mon, 14 May 2018 04:22:24 -0400 Received: from dude.hi.pengutronix.de ([2001:67c:670:100:1d::7]) by metis.ext.pengutronix.de with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1fI8kO-0003ya-9b; Mon, 14 May 2018 10:22:20 +0200 Received: from mfe by dude.hi.pengutronix.de with local (Exim 4.90_1) (envelope-from ) id 1fI8kM-0007iS-3c; Mon, 14 May 2018 10:22:18 +0200 From: Marco Felsch To: robh+dt@kernel.org, mark.rutland@arm.com, andrew@lunn.ch, f.fainelli@gmail.com Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, kernel@pengutronix.de, Markus Niebel Subject: [PATCH] net: phy: micrel: workaround for errata #2 for KSZ9031 Date: Mon, 14 May 2018 10:22:18 +0200 Message-Id: <20180514082218.29158-1-m.felsch@pengutronix.de> X-Mailer: git-send-email 2.17.0 X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::7 X-SA-Exim-Mail-From: mfe@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: devicetree@vger.kernel.org Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Markus Niebel handle errata #2 for KSZ9031: force 1000Base-T master Attention: enabling the workaround will cause no link to other GIGE master. Signed-off-by: Markus Niebel [m.felsch@pengutronix.de: move dt binding to the KSZ9031 entry] Signed-off-by: Marco Felsch --- .../devicetree/bindings/net/micrel-ksz90x1.txt | 3 +++ drivers/net/phy/micrel.c | 18 ++++++++++++++++++ 2 files changed, 21 insertions(+) diff --git a/Documentation/devicetree/bindings/net/micrel-ksz90x1.txt b/Documentation/devicetree/bindings/net/micrel-ksz90x1.txt index 42a248301615..e2465fbbbcef 100644 --- a/Documentation/devicetree/bindings/net/micrel-ksz90x1.txt +++ b/Documentation/devicetree/bindings/net/micrel-ksz90x1.txt @@ -57,6 +57,9 @@ KSZ9031: - txd2-skew-ps : Skew control of TX data 2 pad - txd3-skew-ps : Skew control of TX data 3 pad + - force-master: Boolean, force phy to master mode. This is a + workaround at least for KSZ9031 errata #2. + Examples: mdio { diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c index f41b224a9cdb..3e4243e4f7a7 100644 --- a/drivers/net/phy/micrel.c +++ b/drivers/net/phy/micrel.c @@ -528,6 +528,8 @@ static int ksz9031_enable_edpd(struct phy_device *phydev) static int ksz9031_config_init(struct phy_device *phydev) { + int rc; + u16 val; const struct device *dev = &phydev->mdio.dev; const struct device_node *of_node = dev->of_node; static const char *clk_skews[2] = {"rxc-skew-ps", "txc-skew-ps"}; @@ -573,6 +575,22 @@ static int ksz9031_config_init(struct phy_device *phydev) ksz9031_of_load_skew_values(phydev, of_node, MII_KSZ9031RN_TX_DATA_PAD_SKEW, 4, tx_data_skews, 4); + + /* force master mode -> errata #2 + * attention: Master <-> Master will not work + */ + if (of_property_read_bool(of_node, "force-master")) { + rc = phy_read(phydev, MII_CTRL1000); + if (rc >= 0) { + val = (u16)rc; + /* enable master mode, config & + * prefer master + */ + val |= (CTL1000_ENABLE_MASTER | + CTL1000_AS_MASTER); + phy_write(phydev, MII_CTRL1000, val); + } + } } return ksz9031_center_flp_timing(phydev);