From patchwork Fri May 11 09:15:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yao Chen X-Patchwork-Id: 911866 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=huawei.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40j4GV2lhbz9s15 for ; Fri, 11 May 2018 19:16:34 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752791AbeEKJQD (ORCPT ); Fri, 11 May 2018 05:16:03 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:56457 "EHLO huawei.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1752165AbeEKJQC (ORCPT ); Fri, 11 May 2018 05:16:02 -0400 Received: from DGGEMS405-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 94D94698BDA12; Fri, 11 May 2018 17:15:58 +0800 (CST) Received: from vm10-143-148-75.huawei.com (10.143.148.75) by DGGEMS405-HUB.china.huawei.com (10.3.19.205) with Microsoft SMTP Server id 14.3.361.1; Fri, 11 May 2018 17:15:51 +0800 From: Yao Chen To: , , , , , , , , , , , , CC: , , , , Subject: [PATCH v3 1/2] PCI: kirin: Add MSI support Date: Fri, 11 May 2018 17:15:48 +0800 Message-ID: <1526030149-23985-2-git-send-email-chenyao11@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1526030149-23985-1-git-send-email-chenyao11@huawei.com> References: <1526030149-23985-1-git-send-email-chenyao11@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.143.148.75] X-CFilter-Loop: Reflected Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add support for MSI. Signed-off-by: Yao Chen --- drivers/pci/dwc/pcie-kirin.c | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/drivers/pci/dwc/pcie-kirin.c b/drivers/pci/dwc/pcie-kirin.c index d2970a0..8daab1f 100644 --- a/drivers/pci/dwc/pcie-kirin.c +++ b/drivers/pci/dwc/pcie-kirin.c @@ -426,9 +426,28 @@ static int kirin_pcie_establish_link(struct pcie_port *pp) return 0; } +static irqreturn_t kirin_pcie_msi_irq_handler(int irq, void *arg) +{ + struct pcie_port *pp = arg; + + return dw_handle_msi_irq(pp); +} + +static void kirin_pcie_msi_init(struct pcie_port *pp) +{ + dw_pcie_msi_init(pp); +} + +static void kirin_pcie_enable_interrupts(struct pcie_port *pp) +{ + if (IS_ENABLED(CONFIG_PCI_MSI)) + kirin_pcie_msi_init(pp); +} + static int kirin_pcie_host_init(struct pcie_port *pp) { kirin_pcie_establish_link(pp); + kirin_pcie_enable_interrupts(pp); return 0; } @@ -448,6 +467,26 @@ static int kirin_pcie_host_init(struct pcie_port *pp) static int __init kirin_add_pcie_port(struct dw_pcie *pci, struct platform_device *pdev) { + int ret; + + if (IS_ENABLED(CONFIG_PCI_MSI)) { + pci->pp.msi_irq = platform_get_irq(pdev, 0); + if (pci->pp.msi_irq < 0) { + dev_err(&pdev->dev, "failed to get MSI IRQ (%d)\n", + pci->pp.msi_irq); + return -ENODEV; + } + ret = devm_request_irq(&pdev->dev, pci->pp.msi_irq, + kirin_pcie_msi_irq_handler, + IRQF_SHARED | IRQF_NO_THREAD, + "kirin_pcie_msi", &pci->pp); + if (ret) { + dev_err(&pdev->dev, "failed to request MSI IRQ %d\n", + pci->pp.msi_irq); + return ret; + } + } + pci->pp.ops = &kirin_pcie_host_ops; return dw_pcie_host_init(&pci->pp); From patchwork Fri May 11 09:15:49 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yao Chen X-Patchwork-Id: 911865 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=huawei.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40j4GR0dMGz9s16 for ; Fri, 11 May 2018 19:16:31 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752828AbeEKJQE (ORCPT ); Fri, 11 May 2018 05:16:04 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:56462 "EHLO huawei.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1752232AbeEKJQC (ORCPT ); Fri, 11 May 2018 05:16:02 -0400 Received: from DGGEMS405-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id A7385CE1340B; Fri, 11 May 2018 17:15:58 +0800 (CST) Received: from vm10-143-148-75.huawei.com (10.143.148.75) by DGGEMS405-HUB.china.huawei.com (10.3.19.205) with Microsoft SMTP Server id 14.3.361.1; Fri, 11 May 2018 17:15:52 +0800 From: Yao Chen To: , , , , , , , , , , , , CC: , , , , Subject: [PATCH v3 2/2] arm64: dts: hi3660: Add pcie msi interrupt attribute Date: Fri, 11 May 2018 17:15:49 +0800 Message-ID: <1526030149-23985-3-git-send-email-chenyao11@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1526030149-23985-1-git-send-email-chenyao11@huawei.com> References: <1526030149-23985-1-git-send-email-chenyao11@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.143.148.75] X-CFilter-Loop: Reflected Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add pcie msi interrupt attribute for hi3660 SOC. Signed-off-by: Yao Chen --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index ec3eb8e..2cef8f4 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -872,6 +872,8 @@ 0x0 0x02000000>; num-lanes = <1>; #interrupt-cells = <1>; + interrupts = <0 283 4>; + interrupt-names = "msi"; interrupt-map-mask = <0xf800 0 0 7>; interrupt-map = <0x0 0 0 1 &gic GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,