From patchwork Sun May 6 01:42:59 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudarsana Reddy Kalluru X-Patchwork-Id: 909235 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=cavium.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=CAVIUMNETWORKS.onmicrosoft.com header.i=@CAVIUMNETWORKS.onmicrosoft.com header.b="a+ZbmVOh"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40dpSG3Lvdz9rxs for ; Sun, 6 May 2018 11:43:42 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751864AbeEFBnW (ORCPT ); Sat, 5 May 2018 21:43:22 -0400 Received: from mail-cys01nam02on0067.outbound.protection.outlook.com ([104.47.37.67]:15264 "EHLO NAM02-CY1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751775AbeEFBnT (ORCPT ); Sat, 5 May 2018 21:43:19 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=CAVIUMNETWORKS.onmicrosoft.com; s=selector1-cavium-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=oc4UepWsqeTzl6yPnGanRWf0yrjnBcbF1qqX4vLjuXY=; b=a+ZbmVOhQSdAOClgXWF9CbdGzVpSSxALArXWVw7C+hssqy2v5YdBOizKhZU92aJsZSDqN7wybEQetLcgvIQGrKvIXbAakiTkQ4RO2Jn2HnUDW6vohOV5KqhOEbVUK0Rf8eNLRvrI4LZtF28KyRSZZ872VYnDcKwGd8HnJwfrlx8= Received: from SN4PR0701CA0006.namprd07.prod.outlook.com (2603:10b6:803:28::16) by MWHPR07MB3182.namprd07.prod.outlook.com (2603:10b6:300:e1::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.735.17; Sun, 6 May 2018 01:43:16 +0000 Received: from BN1BFFO11OLC004.protection.gbl (2a01:111:f400:7c10::1:131) by SN4PR0701CA0006.outlook.office365.com (2603:10b6:803:28::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.735.16 via Frontend Transport; Sun, 6 May 2018 01:43:16 +0000 Authentication-Results: spf=pass (sender IP is 50.232.66.26) smtp.mailfrom=cavium.com; vger.kernel.org; dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=bestguesspass action=none header.from=cavium.com; Received-SPF: Pass (protection.outlook.com: domain of cavium.com designates 50.232.66.26 as permitted sender) receiver=protection.outlook.com; client-ip=50.232.66.26; helo=CAEXCH02.caveonetworks.com; Received: from CAEXCH02.caveonetworks.com (50.232.66.26) by BN1BFFO11OLC004.mail.protection.outlook.com (10.58.145.15) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA_P384) id 15.20.696.11 via Frontend Transport; Sun, 6 May 2018 01:43:16 +0000 Received: from dut1171.mv.qlogic.com (172.29.51.171) by CAEXCH02.caveonetworks.com (10.17.4.29) with Microsoft SMTP Server id 14.2.347.0; Sat, 5 May 2018 18:43:10 -0700 Received: from dut1171.mv.qlogic.com (localhost [127.0.0.1]) by dut1171.mv.qlogic.com (8.14.7/8.14.7) with ESMTP id w461hDIO029151; Sat, 5 May 2018 18:43:13 -0700 Received: (from root@localhost) by dut1171.mv.qlogic.com (8.14.7/8.14.7/Submit) id w461hDN7029150; Sat, 5 May 2018 18:43:13 -0700 From: Sudarsana Reddy Kalluru To: CC: , Subject: [PATCH net-next 1/4] qed*: Refactor mf_mode to consist of bits. Date: Sat, 5 May 2018 18:42:59 -0700 Message-ID: <20180506014302.29110-2-sudarsana.kalluru@cavium.com> X-Mailer: git-send-email 2.12.0 In-Reply-To: <20180506014302.29110-1-sudarsana.kalluru@cavium.com> References: <20180506014302.29110-1-sudarsana.kalluru@cavium.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:50.232.66.26; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(396003)(39850400004)(376002)(346002)(39380400002)(2980300002)(438002)(199004)(189003)(48376002)(2351001)(2906002)(4326008)(69596002)(336012)(186003)(26005)(80596001)(76176011)(50466002)(86362001)(575784001)(305945005)(5660300001)(1076002)(51416003)(126002)(16586007)(478600001)(446003)(47776003)(59450400001)(8936002)(316002)(42186006)(50226002)(87636003)(106466001)(11346002)(2616005)(356003)(36756003)(476003)(107886003)(81156014)(81166006)(6916009)(8676002)(72206003)(106002)(486006)(6666003)(54906003); DIR:OUT; SFP:1101; SCL:1; SRVR:MWHPR07MB3182; H:CAEXCH02.caveonetworks.com; FPR:; SPF:Pass; LANG:en; PTR:50-232-66-26-static.hfc.comcastbusiness.net; A:1; MX:1; X-Microsoft-Exchange-Diagnostics: 1; BN1BFFO11OLC004; 1:T3D61eVADaRsZhdIPtz0+Nle751SIOqIrvNF/iw7SJm/+BN42LmQNFhjME3kJXae1vS9lLsv0FdiNsJ2F7mLVKMbmlEsPMV22MhMatMes92bCKABEESB2hx62mzdesPN X-MS-PublicTrafficType: Email X-Microsoft-Antispam: UriScan:; BCL:0; PCL:0; RULEID:(7020095)(4652020)(5600026)(4608076)(4534165)(4627221)(201703031133081)(201702281549075)(2017052603328)(7153060); SRVR:MWHPR07MB3182; X-Microsoft-Exchange-Diagnostics: 1; MWHPR07MB3182; 3:fJTJtYAH57PzpIDZtKlle/XyaVXC1YCv2a3IoCHmOZJKpX/fpTI+H8VYPuY5xtS72hJ+DV0e6Ab5TvGrTvwQv6tWklv7zAB+LI1ZjQnk5GDueRqLEbGN/qYPIrms5AiIcpS+cMeYC3dAvtxiZYXGSURrH9Ldh7Kq0mjYNF5ncphvmD10+wQicBB+8qWCj0/KnVtENpJ+7LPMXhE/rF7R3h+YRvlUpOjiZnbJ0avy7uO4NlM7nKfHwruqwztaTSRNU88XvT1n3tkoGFuow5YQ3fjp9kuTN3WjS2ru9yV/5l2OleRNBXSQX692+dg6z07m6I0w2vIxjr9hZIcVaYcrdBseyGjDdsEwCC1SUeTviyc=; 25:R0zJc71dkK4ihYL+8U/yiRrrrC2tNVzoP/7EOlmw5HzksyvBB5QzjsO7htkOC9SKAc0QOJp21yhXyEX/SbKFZzLZtfbkARDbztGL2IMxBq90+ntOKtugZljdYb/zHdYaeGb/NtOOx2YpITqexZ/FMD7vbLBqekOffiu/L7up4KH3OlubV/zjPWw9Ql+VoFtaVBss0LsNADS4XIS6ZM+uRnXw1SCQxQ4ommaIzRcQQ0zxZqf1GQdilx8oQIRzBcl6iwbwRkoOfGUNRC0y4kHtHCHZltYe3p1kKb2l44WBzXN0q+aeB+Ds7ZXbJ1vqxrR3G4lN9MFFHx9ltOVEJGMPwg== X-MS-TrafficTypeDiagnostic: MWHPR07MB3182: X-Microsoft-Exchange-Diagnostics: 1; MWHPR07MB3182; 31:u9OYUTT9KBClcoBMmrOhNLVUyCj22Q5j98aXKlFoMTrSTfhROC26UsWtpN8PnJoU3WM8UuWPO8n+pgD+csHryam7v4JNrwPKSh7vE6nra0Lxfz/b6/6o1RGC0GRr3VuNfUNkv16IZG7AHHRgm7oxwLnBfn32lX+5JnXN318ej1HIM7lcRXRfxc5bJby3vlLM9Mx1olZBZjHYXsfQ1py6A5W6bEOsEsDPnEmq/rRjYgI=; 20:JBMtLMC7Bc/0WWFH0Mb0YmHtz9YwgSxIhYZUVuWvK1BzPNUdTYlhoHtpQ/VjELmBY8HRkb/W6aFcs0GFChaeOssjTNusgtu6jHVj0R/IdZnCaYcCpcYYHpYQ5ZajNMe8FYIL3E92L6DShpMDQjqKN1BkAIR3g389yE+x3xH6oWfRMWPJIJYr28Lu0IlsGgHRIBvw66JbIOQbh71LCLv+qkAa0jJ4x/prU6WBAXCB9fIJRyokJl6nymE+jiYLYluR0nPSvwaQx/ZHHTU7C9GA/cjPmzFDvkYyoeCxqoO+6QyeuNwlWlUp1+J1mGCqbDVWsjHh6IIrzLR6jAI+r5qp3U/SK7tE7RQ5S7f0Re+0u0DmFjB/dEAXU0T/UK+V0MYaiVuu9wXKA+6x+GNQ4G7pYRxfvw1ZR1HuFuWc7QzEro12g/YVQCfpLmaYjlOSGQbL5Bp1ecKKuwghSFVCiQtF20ryoyDlOqTMbnDcbh48HE61XYuLEJj0hsZku7ZtIXmy X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(8211001083)(6040522)(2401047)(5005006)(8121501046)(3231254)(944501410)(52105095)(3002001)(10201501046)(93006095)(93004095)(6041310)(20161123560045)(20161123564045)(20161123562045)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(20161123558120)(6072148)(201708071742011); SRVR:MWHPR07MB3182; BCL:0; PCL:0; RULEID:; SRVR:MWHPR07MB3182; X-Microsoft-Exchange-Diagnostics: 1; MWHPR07MB3182; 4:WVd/s9bWn8nBj2VkFIUVHiNGln9kJvC6MkpjJaW2BawhF68sKwa4DPPgiedQsjgdULTRSsKtxaXuEYu6L/CjyMzkDYNdY05p+R2IGbVyUaM4HhV1/UZd/vsgpOExnUgj8QgKSyv77wNf3Q+erewjzw/aj29l3MKpkp6gCm0dkiulxuyKijeXeKsPfF1gvBZS5BK8fM/gbOy4JA7AjmSO4EY2dDWmnU8gNiB8EALcf7Df+vuFZu+rbGh6ozP9JQK6kEwAYNJS0kNl+kfgemHF3g== X-Forefront-PRVS: 06640999CA X-Microsoft-Exchange-Diagnostics: 1; MWHPR07MB3182; 23:XuxTNfD5UEMG0gyo1sGQ/2MLf5G5TvgJ4GbdWGJ6BbKYsIobqHSI+92+EzBTu0vxlOQ7Q+09YUqBNvu2VJPQsYzfBzfOufeXcKuwFX4vkq0A38S5GCDNgrpxYXL66GORWG8bvTFFnwrMPIdEEq8f6BYzD0vGglwRP4nSWimkHJspvufcFZjvkFnXcOi3HVa8886dd1aNbPiXML1w2NuB//1+ZePaUL8diOK0vnHnLSerd8vknc+lBhvz+fcfqU573ae0QbyE6B9n+mQfCACpyZBhPWnMriXxyo2o2l5mWsUTzWGTdsxdtZrkufDxWDjhqS+IqHYKMMvT3isWwEo9ieCpAKpwMp/sbYo/PgcnNA5Dso48r/6qS44nfJv/xKCow1xPGQUoP6EVu4W0q9zHQKqmp2TUuJ5hUS8B+Q71qdwFiAx7gMTfvVjluT1OvM0T6/j0ru3NObITbvVeCV5TcQJ86dyyTAhLqCckIlL7lebl8WVYM2p57BjT/AVGP9eaUdzRzQ19aesYq+hIkY5DJH3K9POYCAJi/xfRNt1iQeW78QKu+3UnyHOitkkhY2NBN0pCcDNQb04pe/zGql+t3u47vFSSaFugMFRaW4nEMyUsnu3yp6Yr/mXYqrFHfdVhkmhOzECHdU6tyrf296QBi9hccx0UIWzz7xAEumC7Sk/l+ZRS8janSACQCtQfLjj6Njnx15xKTKX05INFP50Ri0vvABE8Q2koxHXBfj7yp+HUqYutS5fs6SGtAg/EWIgxqJlj6EcrTrc//MY3gFFBUTIuR5F3yHKYiZRPwCIXO/8NPQAV6HPLO7pQMb5wtTn/j/DAN12uvLioQ0SywcOzcLuKnecJFHHtAZWWCygs9EKbKf0p6muovlXQe+9j7S3E4iOLhfg57IF8vMs35y9ExovCLSAA5Fr7PNkwftc/ZlAz8P6it0VmrGOD6whZDlMoAr+fPaKbeZr0fsZjtJC20O/6pvE+CU2BKJvlji0pvPLES/1E0+AGqdveTYK9BjUEf3VFv76l0se+hCfQZ6JWYTBzzHCRtykkwilYnNyN1KRvvR00ntqYWK3mm1DI/RyF8YCHf7X4UYxuOirtQzWi/QPxCScjlFgq3uSvB7Sjo4bCZKLEpXokCg66hMuUxTWxqvRDe9UfEf9tHPz7GSTXpmeELCTKUaUbH1dtEe3T00k= X-Microsoft-Antispam-Message-Info: /ao7danvjoW3YjBTRQ8Z4o7PgHwViNSh+gUOsTSxQbSoQJeRdl0Qr3RU9qpr+bAL/ScBnXg+gmESClBbD6Oz3hLfI2WCNllLtlSDImmnwsVNKHRoam6JpXjZ7i9jZowDOiCqXDdobSeegw3riICsmLP3p24DGVPGZwe5mqv03Mg9L5G/J+hDvdyY6vqUIlmJ X-Microsoft-Exchange-Diagnostics: 1; MWHPR07MB3182; 6:rlDhgNCb5sFRHGjtcBobJxFj0245DsFTEoqo2wPZSsgxlYToaVNKGmgP+TWiozmGCkEIwjbhoouZfX56fnlackoW7ICh+h7ZRpE5eaoOs9dMLLbuOupVnArG9pcU5YfNn239SiMGB+wW2L81+ImW01lNBDZhd7UWsPeGMbQU3yESprm3O2/BzxZroRqFBIRc1qVUBidFcaAGEO9wJPs/nYJnVyNtARdEwiU7Zbu3KAgPIrI5Abz/OK96ntPHGIP7VD7B333qNn828KDR3iN+nvll1BGZMTj58Yf8aPZAeDwMDdk02eR4nwRxIiL8s7kecCx7jp0/kHp92asn7plHVEsNzbZF441JubIty8gvJxJNOeu9vPf4uoockKXY35X5s4jyouq18Jlnd9wCrwOSEgoaXqWap0K7iPJ4y3gyvtbrkNCexFecfXPdXyS8x2f0LkIDRywQmL79vjhwtjbEVw==; 5:nZUXEe+Z7swi1BB4FQNV1ztjykztnfHDPWF7mtQkMTv79fhXM1g83vyczT0241fOVKI0Z3e2tLdIq9vAhJsWhPVyIEtrFqkFZkQDOCNERKpeaitmLoF6SnBB+SM4+4GlxbdbTfM6sQEiBICjv2pS211HzX/EsnLKtpw4QrTM0QQ=; 24:pgGzBuHhTUUa3OBX06J1tMRK7qzSkaImsF6dcPH/3tL+VNBPhR2dTBetmYPOMYqECgnC0VqNyEFEYilM5BngXtvaVsR4v48A8+ldjXWLYoE= SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-Microsoft-Exchange-Diagnostics: 1; MWHPR07MB3182; 7:xMj4AuuekEIZOwVTmB32T8T88bHsLCxpTdYLAbYA3zrWjQ80kKkp8v3wnWdRm4RyHBO6Qj0IciT1BYw+lhZEZS40YZCb0E8xx74ek7e5u1wNyThiDI9znyN7aH06pYzQFaDRjJ0abBxz4CKB0apYGVuREMA+tdoxd/2OacQi1b72wvSKTU+ZDip+Wqe0tyLdm5y8HfywvUwnD5qtV53NpILeVZ3Io/F7N4NdFsNKIZojvdb1fkH3sbCXLrp0nCOF X-MS-Office365-Filtering-Correlation-Id: 4483915c-9b0c-40b5-4862-08d5b2f2bd11 X-OriginatorOrg: cavium.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 May 2018 01:43:16.3217 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4483915c-9b0c-40b5-4862-08d5b2f2bd11 X-MS-Exchange-CrossTenant-Id: 711e4ccf-2e9b-4bcf-a551-4094005b6194 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=711e4ccf-2e9b-4bcf-a551-4094005b6194; Ip=[50.232.66.26]; Helo=[CAEXCH02.caveonetworks.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR07MB3182 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org `mf_mode' field indicates the multi-partitioning mode the device is configured to. This method doesn't scale very well, adding a new MF mode requires going over all the existing conditions, and deciding whether those are needed for the new mode or not. The patch defines a set of bit-fields for modes which are derived according to the mode info shared by the MFW and all the configuration would be made according to those. To add a new mode, there would be a single place where we'll need to go and choose which bits apply and which don't. Signed-off-by: Sudarsana Reddy Kalluru Signed-off-by: Ariel Elior --- drivers/net/ethernet/qlogic/qed/qed.h | 41 ++++++++++++++++++++--- drivers/net/ethernet/qlogic/qed/qed_dev.c | 39 +++++++++++---------- drivers/net/ethernet/qlogic/qed/qed_ll2.c | 6 ++-- drivers/net/ethernet/qlogic/qed/qed_main.c | 6 ++-- drivers/net/ethernet/qlogic/qed/qed_sp.h | 3 +- drivers/net/ethernet/qlogic/qed/qed_sp_commands.c | 16 +++------ drivers/net/ethernet/qlogic/qede/qede_main.c | 4 +-- include/linux/qed/qed_if.h | 2 +- 8 files changed, 71 insertions(+), 46 deletions(-) diff --git a/drivers/net/ethernet/qlogic/qed/qed.h b/drivers/net/ethernet/qlogic/qed/qed.h index e07460a..c8f3507 100644 --- a/drivers/net/ethernet/qlogic/qed/qed.h +++ b/drivers/net/ethernet/qlogic/qed/qed.h @@ -439,6 +439,41 @@ struct qed_fw_data { u32 init_ops_size; }; +enum qed_mf_mode_bit { + /* Supports PF-classification based on tag */ + QED_MF_OVLAN_CLSS, + + /* Supports PF-classification based on MAC */ + QED_MF_LLH_MAC_CLSS, + + /* Supports PF-classification based on protocol type */ + QED_MF_LLH_PROTO_CLSS, + + /* Requires a default PF to be set */ + QED_MF_NEED_DEF_PF, + + /* Allow LL2 to multicast/broadcast */ + QED_MF_LL2_NON_UNICAST, + + /* Allow Cross-PF [& child VFs] Tx-switching */ + QED_MF_INTER_PF_SWITCH, + + /* Unified Fabtic Port support enabled */ + QED_MF_UFP_SPECIFIC, + + /* Disable Accelerated Receive Flow Steering (aRFS) */ + QED_MF_DISABLE_ARFS, + + /* Use vlan for steering */ + QED_MF_8021Q_TAGGING, + + /* Use stag for steering */ + QED_MF_8021AD_TAGGING, + + /* Allow DSCP to TC mapping */ + QED_MF_DSCP_TO_TC_MAP, +}; + enum BAR_ID { BAR_ID_0, /* used for GRC */ BAR_ID_1 /* Used for doorbells */ @@ -669,10 +704,8 @@ struct qed_dev { u8 num_funcs_in_port; u8 path_id; - enum qed_mf_mode mf_mode; -#define IS_MF_DEFAULT(_p_hwfn) (((_p_hwfn)->cdev)->mf_mode == QED_MF_DEFAULT) -#define IS_MF_SI(_p_hwfn) (((_p_hwfn)->cdev)->mf_mode == QED_MF_NPAR) -#define IS_MF_SD(_p_hwfn) (((_p_hwfn)->cdev)->mf_mode == QED_MF_OVLAN) + + unsigned long mf_bits; int pcie_width; int pcie_speed; diff --git a/drivers/net/ethernet/qlogic/qed/qed_dev.c b/drivers/net/ethernet/qlogic/qed/qed_dev.c index d2ad5e9..9b07d7f 100644 --- a/drivers/net/ethernet/qlogic/qed/qed_dev.c +++ b/drivers/net/ethernet/qlogic/qed/qed_dev.c @@ -1149,18 +1149,10 @@ static int qed_calc_hw_mode(struct qed_hwfn *p_hwfn) return -EINVAL; } - switch (p_hwfn->cdev->mf_mode) { - case QED_MF_DEFAULT: - case QED_MF_NPAR: - hw_mode |= 1 << MODE_MF_SI; - break; - case QED_MF_OVLAN: + if (test_bit(QED_MF_OVLAN_CLSS, &p_hwfn->cdev->mf_bits)) hw_mode |= 1 << MODE_MF_SD; - break; - default: - DP_NOTICE(p_hwfn, "Unsupported MF mode, init as DEFAULT\n"); + else hw_mode |= 1 << MODE_MF_SI; - } hw_mode |= 1 << MODE_ASIC; @@ -1557,7 +1549,6 @@ static int qed_hw_init_pf(struct qed_hwfn *p_hwfn, /* send function start command */ rc = qed_sp_pf_start(p_hwfn, p_ptt, p_tunn, - p_hwfn->cdev->mf_mode, allow_npar_tx_switch); if (rc) { DP_NOTICE(p_hwfn, "Function start ramrod failed\n"); @@ -2651,17 +2642,25 @@ static int qed_hw_get_nvm_info(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) switch (mf_mode) { case NVM_CFG1_GLOB_MF_MODE_MF_ALLOWED: - p_hwfn->cdev->mf_mode = QED_MF_OVLAN; + p_hwfn->cdev->mf_bits = BIT(QED_MF_OVLAN_CLSS); break; case NVM_CFG1_GLOB_MF_MODE_NPAR1_0: - p_hwfn->cdev->mf_mode = QED_MF_NPAR; + p_hwfn->cdev->mf_bits = BIT(QED_MF_LLH_MAC_CLSS) | + BIT(QED_MF_LLH_PROTO_CLSS) | + BIT(QED_MF_LL2_NON_UNICAST) | + BIT(QED_MF_INTER_PF_SWITCH); break; case NVM_CFG1_GLOB_MF_MODE_DEFAULT: - p_hwfn->cdev->mf_mode = QED_MF_DEFAULT; + p_hwfn->cdev->mf_bits = BIT(QED_MF_LLH_MAC_CLSS) | + BIT(QED_MF_LLH_PROTO_CLSS) | + BIT(QED_MF_LL2_NON_UNICAST); + if (QED_IS_BB(p_hwfn->cdev)) + p_hwfn->cdev->mf_bits |= BIT(QED_MF_NEED_DEF_PF); break; } - DP_INFO(p_hwfn, "Multi function mode is %08x\n", - p_hwfn->cdev->mf_mode); + + DP_INFO(p_hwfn, "Multi function mode is 0x%lx\n", + p_hwfn->cdev->mf_bits); /* Read Multi-function information from shmem */ addr = MCP_REG_SCRATCH + nvm_cfg1_offset + @@ -3462,7 +3461,7 @@ int qed_llh_add_mac_filter(struct qed_hwfn *p_hwfn, u32 high = 0, low = 0, en; int i; - if (!(IS_MF_SI(p_hwfn) || IS_MF_DEFAULT(p_hwfn))) + if (!test_bit(QED_MF_LLH_MAC_CLSS, &p_hwfn->cdev->mf_bits)) return 0; qed_llh_mac_to_filter(&high, &low, p_filter); @@ -3507,7 +3506,7 @@ void qed_llh_remove_mac_filter(struct qed_hwfn *p_hwfn, u32 high = 0, low = 0; int i; - if (!(IS_MF_SI(p_hwfn) || IS_MF_DEFAULT(p_hwfn))) + if (!test_bit(QED_MF_LLH_MAC_CLSS, &p_hwfn->cdev->mf_bits)) return; qed_llh_mac_to_filter(&high, &low, p_filter); @@ -3549,7 +3548,7 @@ void qed_llh_remove_mac_filter(struct qed_hwfn *p_hwfn, u32 high = 0, low = 0, en; int i; - if (!(IS_MF_SI(p_hwfn) || IS_MF_DEFAULT(p_hwfn))) + if (!test_bit(QED_MF_LLH_PROTO_CLSS, &p_hwfn->cdev->mf_bits)) return 0; switch (type) { @@ -3647,7 +3646,7 @@ void qed_llh_remove_mac_filter(struct qed_hwfn *p_hwfn, u32 high = 0, low = 0; int i; - if (!(IS_MF_SI(p_hwfn) || IS_MF_DEFAULT(p_hwfn))) + if (!test_bit(QED_MF_LLH_PROTO_CLSS, &p_hwfn->cdev->mf_bits)) return; switch (type) { diff --git a/drivers/net/ethernet/qlogic/qed/qed_ll2.c b/drivers/net/ethernet/qlogic/qed/qed_ll2.c index 74fc626..3ac0ede 100644 --- a/drivers/net/ethernet/qlogic/qed/qed_ll2.c +++ b/drivers/net/ethernet/qlogic/qed/qed_ll2.c @@ -922,9 +922,9 @@ static int qed_sp_ll2_rx_queue_start(struct qed_hwfn *p_hwfn, p_ramrod->queue_id = p_ll2_conn->queue_id; p_ramrod->main_func_queue = p_ll2_conn->main_func_queue ? 1 : 0; - if ((IS_MF_DEFAULT(p_hwfn) || IS_MF_SI(p_hwfn)) && - p_ramrod->main_func_queue && (conn_type != QED_LL2_TYPE_ROCE) && - (conn_type != QED_LL2_TYPE_IWARP)) { + if (test_bit(QED_MF_LL2_NON_UNICAST, &p_hwfn->cdev->mf_bits) && + p_ramrod->main_func_queue && conn_type != QED_LL2_TYPE_ROCE && + conn_type != QED_LL2_TYPE_IWARP) { p_ramrod->mf_si_bcast_accept_all = 1; p_ramrod->mf_si_mcast_accept_all = 1; } else { diff --git a/drivers/net/ethernet/qlogic/qed/qed_main.c b/drivers/net/ethernet/qlogic/qed/qed_main.c index d1d3787..307fe33 100644 --- a/drivers/net/ethernet/qlogic/qed/qed_main.c +++ b/drivers/net/ethernet/qlogic/qed/qed_main.c @@ -264,7 +264,8 @@ int qed_fill_dev_info(struct qed_dev *cdev, dev_info->pci_mem_end = cdev->pci_params.mem_end; dev_info->pci_irq = cdev->pci_params.irq; dev_info->rdma_supported = QED_IS_RDMA_PERSONALITY(p_hwfn); - dev_info->is_mf_default = IS_MF_DEFAULT(&cdev->hwfns[0]); + dev_info->is_mf_default = !test_bit(QED_MF_LLH_MAC_CLSS, + &cdev->mf_bits); dev_info->dev_type = cdev->type; ether_addr_copy(dev_info->hw_mac, hw_info->hw_mac_addr); @@ -273,7 +274,8 @@ int qed_fill_dev_info(struct qed_dev *cdev, dev_info->fw_minor = FW_MINOR_VERSION; dev_info->fw_rev = FW_REVISION_VERSION; dev_info->fw_eng = FW_ENGINEERING_VERSION; - dev_info->mf_mode = cdev->mf_mode; + dev_info->b_inter_pf_switch = test_bit(QED_MF_INTER_PF_SWITCH, + &cdev->mf_bits); dev_info->tx_switching = true; if (hw_info->b_wol_support == QED_WOL_SUPPORT_PME) diff --git a/drivers/net/ethernet/qlogic/qed/qed_sp.h b/drivers/net/ethernet/qlogic/qed/qed_sp.h index ab4ad8a..7680222 100644 --- a/drivers/net/ethernet/qlogic/qed/qed_sp.h +++ b/drivers/net/ethernet/qlogic/qed/qed_sp.h @@ -416,7 +416,6 @@ int qed_sp_init_request(struct qed_hwfn *p_hwfn, * @param p_hwfn * @param p_ptt * @param p_tunn - * @param mode * @param allow_npar_tx_switch * * @return int @@ -425,7 +424,7 @@ int qed_sp_init_request(struct qed_hwfn *p_hwfn, int qed_sp_pf_start(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, struct qed_tunnel_info *p_tunn, - enum qed_mf_mode mode, bool allow_npar_tx_switch); + bool allow_npar_tx_switch); /** * @brief qed_sp_pf_update - PF Function Update Ramrod diff --git a/drivers/net/ethernet/qlogic/qed/qed_sp_commands.c b/drivers/net/ethernet/qlogic/qed/qed_sp_commands.c index 5e927b6..fbb3172 100644 --- a/drivers/net/ethernet/qlogic/qed/qed_sp_commands.c +++ b/drivers/net/ethernet/qlogic/qed/qed_sp_commands.c @@ -306,7 +306,7 @@ static void qed_set_hw_tunn_mode_port(struct qed_hwfn *p_hwfn, int qed_sp_pf_start(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, struct qed_tunnel_info *p_tunn, - enum qed_mf_mode mode, bool allow_npar_tx_switch) + bool allow_npar_tx_switch) { struct pf_start_ramrod_data *p_ramrod = NULL; u16 sb = qed_int_get_sp_sb_id(p_hwfn); @@ -339,18 +339,10 @@ int qed_sp_pf_start(struct qed_hwfn *p_hwfn, p_ramrod->dont_log_ramrods = 0; p_ramrod->log_type_mask = cpu_to_le16(0xf); - switch (mode) { - case QED_MF_DEFAULT: - case QED_MF_NPAR: - p_ramrod->mf_mode = MF_NPAR; - break; - case QED_MF_OVLAN: + if (test_bit(QED_MF_OVLAN_CLSS, &p_hwfn->cdev->mf_bits)) p_ramrod->mf_mode = MF_OVLAN; - break; - default: - DP_NOTICE(p_hwfn, "Unsupported MF mode, init as DEFAULT\n"); + else p_ramrod->mf_mode = MF_NPAR; - } p_ramrod->outer_tag_config.outer_tag.tci = cpu_to_le16(p_hwfn->hw_info.ovlan); @@ -365,7 +357,7 @@ int qed_sp_pf_start(struct qed_hwfn *p_hwfn, qed_tunn_set_pf_start_params(p_hwfn, p_tunn, &p_ramrod->tunnel_config); - if (IS_MF_SI(p_hwfn)) + if (test_bit(QED_MF_INTER_PF_SWITCH, &p_hwfn->cdev->mf_bits)) p_ramrod->allow_npar_tx_switching = allow_npar_tx_switch; switch (p_hwfn->hw_info.personality) { diff --git a/drivers/net/ethernet/qlogic/qede/qede_main.c b/drivers/net/ethernet/qlogic/qede/qede_main.c index a01e7d6..89c581c 100644 --- a/drivers/net/ethernet/qlogic/qede/qede_main.c +++ b/drivers/net/ethernet/qlogic/qede/qede_main.c @@ -199,7 +199,7 @@ static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param) /* Enable/Disable Tx switching for PF */ if ((rc == num_vfs_param) && netif_running(edev->ndev) && - qed_info->mf_mode != QED_MF_NPAR && qed_info->tx_switching) { + !qed_info->b_inter_pf_switch && qed_info->tx_switching) { vport_params->vport_id = 0; vport_params->update_tx_switching_flg = 1; vport_params->tx_switching_flg = num_vfs_param ? 1 : 0; @@ -1928,7 +1928,7 @@ static int qede_start_queues(struct qede_dev *edev, bool clear_stats) vport_update_params->update_vport_active_flg = 1; vport_update_params->vport_active_flg = 1; - if ((qed_info->mf_mode == QED_MF_NPAR || pci_num_vf(edev->pdev)) && + if ((qed_info->b_inter_pf_switch || pci_num_vf(edev->pdev)) && qed_info->tx_switching) { vport_update_params->update_tx_switching_flg = 1; vport_update_params->tx_switching_flg = 1; diff --git a/include/linux/qed/qed_if.h b/include/linux/qed/qed_if.h index e53f9c7..5dac561 100644 --- a/include/linux/qed/qed_if.h +++ b/include/linux/qed/qed_if.h @@ -359,7 +359,7 @@ struct qed_dev_info { #define QED_MFW_VERSION_3_OFFSET 24 u32 flash_size; - u8 mf_mode; + bool b_inter_pf_switch; bool tx_switching; bool rdma_supported; u16 mtu; From patchwork Sun May 6 01:43:00 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudarsana Reddy Kalluru X-Patchwork-Id: 909237 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=cavium.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=CAVIUMNETWORKS.onmicrosoft.com header.i=@CAVIUMNETWORKS.onmicrosoft.com header.b="TKw4h6oj"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40dpSL3vF0z9s2k for ; Sun, 6 May 2018 11:43:46 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751924AbeEFBnd (ORCPT ); Sat, 5 May 2018 21:43:33 -0400 Received: from mail-bn3nam01on0051.outbound.protection.outlook.com ([104.47.33.51]:54489 "EHLO NAM01-BN3-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751881AbeEFBnY (ORCPT ); Sat, 5 May 2018 21:43:24 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=CAVIUMNETWORKS.onmicrosoft.com; s=selector1-cavium-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=C6WhoeOduu5jsbmZSQs/6v1xabmE/ssKelsYy97MSww=; b=TKw4h6oj31XIUWZ27eDOwpy8meYYgia5Rk5T+5BfTuI4L5IKgYAEuco1+xgOVS4EDXfgbqdeYhJWEP8ANgKCJ4RJFKyT1KLAp3yIiNFEqB7QoBGGCb2GIJxI1Oqmfrx6JIvbH8e62+hgQslzdJJkx/ZLR7DzFXPSzqY1dwEyq0w= Received: from SN4PR0701CA0006.namprd07.prod.outlook.com (2603:10b6:803:28::16) by DM5PR07MB2826.namprd07.prod.outlook.com (2603:10b6:3:7::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.735.18; Sun, 6 May 2018 01:43:22 +0000 Received: from BN1BFFO11OLC004.protection.gbl (2a01:111:f400:7c10::1:131) by SN4PR0701CA0006.outlook.office365.com (2603:10b6:803:28::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.735.16 via Frontend Transport; Sun, 6 May 2018 01:43:21 +0000 Authentication-Results: spf=pass (sender IP is 50.232.66.26) smtp.mailfrom=cavium.com; vger.kernel.org; dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=bestguesspass action=none header.from=cavium.com; Received-SPF: Pass (protection.outlook.com: domain of cavium.com designates 50.232.66.26 as permitted sender) receiver=protection.outlook.com; client-ip=50.232.66.26; helo=CAEXCH02.caveonetworks.com; Received: from CAEXCH02.caveonetworks.com (50.232.66.26) by BN1BFFO11OLC004.mail.protection.outlook.com (10.58.145.15) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA_P384) id 15.20.696.11 via Frontend Transport; Sun, 6 May 2018 01:43:21 +0000 Received: from dut1171.mv.qlogic.com (172.29.51.171) by CAEXCH02.caveonetworks.com (10.17.4.29) with Microsoft SMTP Server id 14.2.347.0; Sat, 5 May 2018 18:43:10 -0700 Received: from dut1171.mv.qlogic.com (localhost [127.0.0.1]) by dut1171.mv.qlogic.com (8.14.7/8.14.7) with ESMTP id w461hDht029155; Sat, 5 May 2018 18:43:13 -0700 Received: (from root@localhost) by dut1171.mv.qlogic.com (8.14.7/8.14.7/Submit) id w461hDIU029154; Sat, 5 May 2018 18:43:13 -0700 From: Sudarsana Reddy Kalluru To: CC: , Subject: [PATCH net-next 2/4] qed: Remove unused data member 'is_mf_default'. Date: Sat, 5 May 2018 18:43:00 -0700 Message-ID: <20180506014302.29110-3-sudarsana.kalluru@cavium.com> X-Mailer: git-send-email 2.12.0 In-Reply-To: <20180506014302.29110-1-sudarsana.kalluru@cavium.com> References: <20180506014302.29110-1-sudarsana.kalluru@cavium.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:50.232.66.26; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(39850400004)(346002)(39380400002)(376002)(396003)(2980300002)(438002)(199004)(189003)(72206003)(87636003)(50226002)(26005)(16586007)(107886003)(42186006)(6916009)(478600001)(106002)(4326008)(2906002)(47776003)(6666003)(2616005)(11346002)(446003)(5660300001)(476003)(36756003)(8936002)(336012)(51416003)(1076002)(81156014)(81166006)(76176011)(69596002)(316002)(486006)(8676002)(186003)(305945005)(86362001)(106466001)(126002)(2351001)(356003)(50466002)(80596001)(54906003)(48376002); DIR:OUT; SFP:1101; SCL:1; SRVR:DM5PR07MB2826; H:CAEXCH02.caveonetworks.com; FPR:; SPF:Pass; LANG:en; PTR:50-232-66-26-static.hfc.comcastbusiness.net; A:1; MX:1; X-Microsoft-Exchange-Diagnostics: 1; BN1BFFO11OLC004; 1:SJ8pj/zIujD73T8mHTVIS6xln086pgWblsfINw1g6m2DdINKtK0EnnHXr32lvPNSF4gBx121RPiNm4ht0XimNO2J6EBpjGhn4H+ZrWdBB0GHgCvL26R1RqjcK5Tpy0Do X-MS-PublicTrafficType: Email X-Microsoft-Antispam: UriScan:; BCL:0; PCL:0; RULEID:(7020095)(4652020)(5600026)(4608076)(4534165)(4627221)(201703031133081)(201702281549075)(2017052603328)(7153060); SRVR:DM5PR07MB2826; X-Microsoft-Exchange-Diagnostics: 1; DM5PR07MB2826; 3:+VrqVW/U/pzmQmYq8x2Eeg4f9yEA03TKGTs058m4EFFy1OGMaX3pjftWNWTP7rYHcVLIZSaenwdn4hNWHvcsVvkPDWxi70D92urDUVCbLrHg4OPSiYLkOjRgiImCjf19+G0iT5fAYh0hYEYRTmw9jZtDYLnhm3tXNu9g5oE4dxBqhoPR9TXPMoMncrMTX2t6zudH3+xHC4T3l2va7JoftH3FkccusMDc5slhPdLzMjA0mCo8cFGm78CibJYMBCIKLF0XN+CIzcqKiulh0i8TJ3zhOvNMZYlRwwEeJ73WIwCKISg1rCFqPbnxeSTCGBJdKQZ8gxptm2Td1Eiw8G9FaZIFMqi4vmM3W06bkM4I7u8=; 25:VYGpmqvQSGW6Z7YGs0VOwEvKDe6tS4tJWQMTlj+s5ASNcllTNy0Pbs2YnJ8lzPb8Tvzyph5F/V889QmBHrSeMCfG39ArNOy1oajivIUQpk2sZxbcvvoYhyW7c0sdWJxIhYzy7PaNyzYEOVrgjCMTsiiRooq6uf4sH3rP010qHeQfp3u75G+VAnGU71vcht2Ck0WnQYRBFCQ9TBnmJFxVmN//6XdXWVZCyZzvYHNcD+w0IYR7LGQe6yNv6IGFfnbC6PvwObW1/3yBgqL31kKq7dTVvoC7Jhmpz2pMLt3m5s9C5keV/PPRA4cnLOJbrISVLhGe/w7DyourTWsuVIqFwg== X-MS-TrafficTypeDiagnostic: DM5PR07MB2826: X-Microsoft-Exchange-Diagnostics: 1; DM5PR07MB2826; 31:dHMqUYfBeAc6RwfzECx9YVxLaNCDBcZu8+m1Uoo8Vd+dBPYDXE/ROARGRG7fDDPUc2HK2lJdbYBJM3JLTxnL+qgZNR+LSsfc3QVpWdloN45HqnhXRWX4n97aA1H6PxCUZ4xWop1hkodBXdFtgRrPGESKRlodjbQBWGAb9zE1lZ/+NsWEVwzOEdB/gxcoCkhv0sNnb79W/ZzM9SQ4TrjXUwMN09khKnDLavX/r2zpfoQ=; 20:uJ6oHQqlNZn10a59gSD1EU+c+SOn4zAHuSEbso3aZQzum3a41Rf2jySdwCX/wNxs3CnGzxz3jJLxzAOUm7XmSLJS+JViOFodl7rYp7pnAbknfMTDJM2Yj91j/1WyWkJQ0B3IlM/HFWSVSVEmrLXNjL13YAP76fskjUSy/2SZtlKP188YBCnE3yt8tD6EUhEOtMWRQhihLEDjA8aHwNtOU2RJUco1f2JQxaDzwhmawYrUf9Wle/84x1uuAMsWmMZeua+YdkuVlgQ2uAzNLLrFDEt01hWmcfyFYn7QUqmbl/TXoldG2iRBv0hPzYaUQJ1ZXujQPkEd0NqX+iEjEBjil2I7j3E67iVg1TKZzFsBK3LeAw2do2m5NveyTQvyQLAIbZV+Tle5WQyreIs/RkNdY+HQNYS3X16jZFPSXptfAtW8ddrN+PCW0tI0oAT29LtAb4coJBMkh0RdbTjahjHD7jvoU7LAfLIDcucrZ49C1mDRcspvZdGlVMv1Ka/PLxj9 X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(8211001083)(6040522)(2401047)(5005006)(8121501046)(3002001)(10201501046)(3231254)(944501410)(52105095)(93006095)(93004095)(6041310)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(20161123558120)(20161123562045)(20161123564045)(20161123560045)(6072148)(201708071742011); SRVR:DM5PR07MB2826; BCL:0; PCL:0; RULEID:; SRVR:DM5PR07MB2826; X-Microsoft-Exchange-Diagnostics: 1; DM5PR07MB2826; 4:HWI/HCv6LltGwyx9FHyvB7cGmcsLY68VyzrQ+08Ulpzy3lc1fFiq/NQhXFfCow3JT7H701BGC6zRlT1AoLsnetcx0tqep+juLw9JZFYYOfMBghjhkgZxJE80/GQW1f/7MiAlODK+iGerZEaWXJATiESjfYdvCW0l6gDx9Niu3j7dAeW9X1A2iFPZ1uRizi1Wv+HWTTu05tye+ZqIhYLXazuHeu4sU/WA/9sYAjvcaljXCXA4XDYp+D3j6W2NixLWWTULXYg1xOke6yd2Plru5w== X-Forefront-PRVS: 06640999CA X-Microsoft-Exchange-Diagnostics: 1; DM5PR07MB2826; 23:tCOKzIxkQrVkzTIQAVzyJ5NJsDxkDRhaGiBSpa1MdFyNAZtrKI9S36ImsCjXREashetejJ0U1hzJ9SPSGtG1juYcczGIxCC7vBNw9AilzLI3HKzYWhkvwxYjL328hKv5rkS8JKGajZShb5oBwxxmbwt1Xf9AAqAqMHgJaNRHP1iaObA02J5f8GPwnLmkS8Zt5T8eHannrlWMK55MpZAQ+LJBJBYgLTOpc2lQTzH2DFxtms5rL2wyRb0mSGM/0If6/0bSOdgXO4P2bA8gd04MIPg+YeMJ7o82L89TjEhUCJIz79IZVqTPeFbztyM/8bzJWxKnx+HaUIBql8TU+Hd8IZjZItL1qmOpuJk2VsnSFHTVcss5+I88b3461g2fhJtmv4VrsSVok8R0k4UXrAMoDvAzVSUzm+Rqx0J4d2MA5MbagX7ao/S19hYxjO5dHV144dnzVYj9g1nckG5LW71rrrxY99h6e0oomePhbAOLcIWWi7K+8OoBGHrU+QsG6qNhCprZpnkUOxX8BtBca6zElQtQFfP2V0I8vhdUZarJTIBQVwmdKt5c7o2+hiGnpCYlxP6QIu8pr0GUT1AQiAqI1rnD3CIn1iYn0XncFfESShrI3r1+EqQ7xJAsD9gXyPzIU4SGfHTGDOfVpXBeSfnmSo0cnI22+6EuTPZnn7Ec3OpPlypE7ieFB/bOCtCkzau90TZOuJ1uBjq0rI/I/SOSDFkXE13P6LSyy1j/hl1CdWD7lGnxQTSKPRIXmbSAYVG3iixwYvhx1R+kOKB7jKCibin5ivTU4HfDIn0qKdxlI4sb15sJHf2lo0pMXaf/SEitiuRcIxrYpforyl7VxR5cyQDql01d3fWsJOEyy41l6dnV3YydLkZhZaAaMbeZoQ0CPKmi/Qe5j7YKcHXGAI44fhfoOcvPuNdjC+msAHIA6seIdEROAlmDcQwm5tuVg9jtRq0xBfm/Qe6w3tzFmJCDCeZGHmsT2Kzr8/U7J9/agz+dVbQlUZcsVIhq6EtGZBTlUu/V/CoTy9QRAk1dISH6VYHh6K5WpildG5fy5zD59tgu6yF+xJUJn9rg4fZAaHWdfSUjoAVA6IqqwteN3/qT6qVphA4FKGSGJ06ShCfKhqgJAar2WK0GxfW9a0j67WWx X-Microsoft-Antispam-Message-Info: a6Jz0bykn4GDd8Qy7DujUS2ACD8RSFs2EmGgikYtb0vtpxMeCOSD9Cd32vKgm0qFuLNEb7ZVs70Jgi4BD9dVfXmLo2rCsE5g2uDh+lwsdZSbHWwVbgLuAdI4dD9aGyVsHzeO73r3O+oEXHiIWa0djxVDyNZw9/rDS3EyJXTCsi9t84czdiFQrQuba5PPtmW2 X-Microsoft-Exchange-Diagnostics: 1; DM5PR07MB2826; 6:v7yIvMNPhjVa1MQQ6lOhgOD24ZHzfDu9k6aHk7Mrb5QDuDviOso4kdE7G0fr1V8JEf1jnc+bHUKcsm3tdDMxlg8sKg3l7K7Jih60JllemMWuWQ1ZYa6nN+AlbDokOBv/7Q9ZSqpele4Mn+lcIazdQy8fiXLnlbxgfENtXjj6BLhgzdwb7axdgvzNdHS2bGwW0zT0N2MCv/sMdjwSUyutjWtMl2cTB6swTlVyOrXlte3wlZ00daJ4jdJCn4q5Nww19wBRvPkDFT8rhnvCFMsQ/JHxRr7oNECVgC+fcyM5DdQdWjg6VazcZGrbnoUVNEU4NA6/u+gz+7MCboUrpRVNtXde7omup1plxTWGAamfvO2EE6w4Zv66wLToQ/n1GLnkFZwpFBFS3Ta/D1dKzaesr2I3lMCxx8vppc1aaYUsTf97HDb6pB/CUQX7r//Eyry6JySBSx/x/i74WWP2+msb1g==; 5:7Vbv6ewOKY7wrlVuRpfuR1z1w5oxZ1qlS6dyM2Eda6TCGz62UHOc8CUd8t4YCwbJMfweqDLzWFypLBNAXNujKck23OqB7V1FOt2gjKQM0V46P24gC9IjWuWG7+b4bDzfxLG3x4+Fn3IXyaA04+BXnYj4mKxMWJ8kGt1k/HWHkkI=; 24:r7wiYfIWRFmKz3C+VNAd9p3TFVVTXpvFAQP9kzGHuvCpHwBpyDfNMlg7aUwB6OvI/e7etwur0z9oNOJT+rTVqA9NyHpchy3+2azCFTWXrzY= SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-Microsoft-Exchange-Diagnostics: 1; DM5PR07MB2826; 7:ynSCzg7ME4o8i1M5xM7CWmXU5z+vKCJ693oaq67Eyn4kU89b8JiwO160lNnIXJ7KCoJk5XKWvJ3EzQ+ijLan8JPlQgJ3EeZ8VLaZQY/KCJgRHp3xbXAaVOQo1vzkiHvclaoMRRAuRWleWQvYhlk5lagka0qyYhdsMXalTU12fDP7vgsOWpZbZY9qO1uTjc8XANdPqM9WuOjBj5PAZ+ycH5EGXpQiRPI1cgLx3c5Iyit4yTR03jJDQsPYSWdgQbee X-MS-Office365-Filtering-Correlation-Id: 37f26a25-0377-4c8b-4582-08d5b2f2c04b X-OriginatorOrg: cavium.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 May 2018 01:43:21.7349 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 37f26a25-0377-4c8b-4582-08d5b2f2c04b X-MS-Exchange-CrossTenant-Id: 711e4ccf-2e9b-4bcf-a551-4094005b6194 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=711e4ccf-2e9b-4bcf-a551-4094005b6194; Ip=[50.232.66.26]; Helo=[CAEXCH02.caveonetworks.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR07MB2826 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The data member 'is_mf_default' is not used by the qed/qede drivers, removing the same. Signed-off-by: Sudarsana Reddy Kalluru Signed-off-by: Ariel Elior --- drivers/net/ethernet/qlogic/qed/qed_main.c | 2 -- include/linux/qed/qed_if.h | 1 - 2 files changed, 3 deletions(-) diff --git a/drivers/net/ethernet/qlogic/qed/qed_main.c b/drivers/net/ethernet/qlogic/qed/qed_main.c index 307fe33..70bc563 100644 --- a/drivers/net/ethernet/qlogic/qed/qed_main.c +++ b/drivers/net/ethernet/qlogic/qed/qed_main.c @@ -264,8 +264,6 @@ int qed_fill_dev_info(struct qed_dev *cdev, dev_info->pci_mem_end = cdev->pci_params.mem_end; dev_info->pci_irq = cdev->pci_params.irq; dev_info->rdma_supported = QED_IS_RDMA_PERSONALITY(p_hwfn); - dev_info->is_mf_default = !test_bit(QED_MF_LLH_MAC_CLSS, - &cdev->mf_bits); dev_info->dev_type = cdev->type; ether_addr_copy(dev_info->hw_mac, hw_info->hw_mac_addr); diff --git a/include/linux/qed/qed_if.h b/include/linux/qed/qed_if.h index 5dac561..907976f 100644 --- a/include/linux/qed/qed_if.h +++ b/include/linux/qed/qed_if.h @@ -339,7 +339,6 @@ struct qed_dev_info { u8 num_hwfns; u8 hw_mac[ETH_ALEN]; - bool is_mf_default; /* FW version */ u16 fw_major; From patchwork Sun May 6 01:43:01 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudarsana Reddy Kalluru X-Patchwork-Id: 909238 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=cavium.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=CAVIUMNETWORKS.onmicrosoft.com header.i=@CAVIUMNETWORKS.onmicrosoft.com header.b="HK14Dxl2"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40dpSM1qcKz9rxs for ; Sun, 6 May 2018 11:43:47 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751936AbeEFBng (ORCPT ); Sat, 5 May 2018 21:43:36 -0400 Received: from mail-co1nam03on0046.outbound.protection.outlook.com ([104.47.40.46]:23309 "EHLO NAM03-CO1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751890AbeEFBn0 (ORCPT ); Sat, 5 May 2018 21:43:26 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=CAVIUMNETWORKS.onmicrosoft.com; s=selector1-cavium-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=y5ASdsQ3f/xo6SZMVU/wvG/VVXdWB3cLgUzZ/L+YMM0=; b=HK14Dxl2N7M0veBS3vvCildiZE3TcdNXiH6hj82SDKmutVwTSupZQFOmh+Cu7COKl3JmPrhGjW2FjnCSHMdR7Yynof4XWZ4fj6Uqia4elQzKkbLlVtEASO7Cfk6tYft2BofQT4L0vmwPJLw8n1RquA7rQ5DEhZL7pwcyFhX8tsU= Received: from SN4PR0701CA0006.namprd07.prod.outlook.com (2603:10b6:803:28::16) by CY4PR07MB3175.namprd07.prod.outlook.com (2603:10b6:903:cf::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.735.16; Sun, 6 May 2018 01:43:24 +0000 Received: from BN1BFFO11OLC004.protection.gbl (2a01:111:f400:7c10::1:131) by SN4PR0701CA0006.outlook.office365.com (2603:10b6:803:28::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.735.16 via Frontend Transport; Sun, 6 May 2018 01:43:24 +0000 Authentication-Results: spf=pass (sender IP is 50.232.66.26) smtp.mailfrom=cavium.com; vger.kernel.org; dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=bestguesspass action=none header.from=cavium.com; Received-SPF: Pass (protection.outlook.com: domain of cavium.com designates 50.232.66.26 as permitted sender) receiver=protection.outlook.com; client-ip=50.232.66.26; helo=CAEXCH02.caveonetworks.com; Received: from CAEXCH02.caveonetworks.com (50.232.66.26) by BN1BFFO11OLC004.mail.protection.outlook.com (10.58.145.15) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA_P384) id 15.20.696.11 via Frontend Transport; Sun, 6 May 2018 01:43:24 +0000 Received: from dut1171.mv.qlogic.com (172.29.51.171) by CAEXCH02.caveonetworks.com (10.17.4.29) with Microsoft SMTP Server id 14.2.347.0; Sat, 5 May 2018 18:43:11 -0700 Received: from dut1171.mv.qlogic.com (localhost [127.0.0.1]) by dut1171.mv.qlogic.com (8.14.7/8.14.7) with ESMTP id w461hD5g029159; Sat, 5 May 2018 18:43:13 -0700 Received: (from root@localhost) by dut1171.mv.qlogic.com (8.14.7/8.14.7/Submit) id w461hDq5029158; Sat, 5 May 2018 18:43:13 -0700 From: Sudarsana Reddy Kalluru To: CC: , Subject: [PATCH net-next 3/4] qed: Add support for multi function mode with 802.1ad tagging. Date: Sat, 5 May 2018 18:43:01 -0700 Message-ID: <20180506014302.29110-4-sudarsana.kalluru@cavium.com> X-Mailer: git-send-email 2.12.0 In-Reply-To: <20180506014302.29110-1-sudarsana.kalluru@cavium.com> References: <20180506014302.29110-1-sudarsana.kalluru@cavium.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:50.232.66.26; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(979002)(39380400002)(396003)(39850400004)(376002)(346002)(2980300002)(438002)(189003)(199004)(107886003)(6916009)(16586007)(305945005)(316002)(11346002)(69596002)(72206003)(336012)(446003)(42186006)(106002)(36756003)(486006)(186003)(2616005)(26005)(4326008)(6666003)(476003)(87636003)(54906003)(2906002)(76176011)(50466002)(1076002)(106466001)(8936002)(2351001)(86362001)(51416003)(478600001)(47776003)(126002)(48376002)(5660300001)(356003)(80596001)(8676002)(81156014)(81166006)(50226002)(969003)(989001)(999001)(1009001)(1019001); DIR:OUT; SFP:1101; SCL:1; SRVR:CY4PR07MB3175; H:CAEXCH02.caveonetworks.com; FPR:; SPF:Pass; LANG:en; PTR:50-232-66-26-static.hfc.comcastbusiness.net; MX:1; A:1; X-Microsoft-Exchange-Diagnostics: 1; BN1BFFO11OLC004; 1:DM2x+etOPBQERGOAt9LhtDQTNzjH4anqazTES7nN1CsutZGLQJn5X0CGFfRVUYMWVcuqfLHcYkpW6SZuGOXmy50ZLj13xuMvHarfh3LXiyNwsZcCgpf6RdMSPRpVCanK X-MS-PublicTrafficType: Email X-Microsoft-Antispam: UriScan:; BCL:0; PCL:0; RULEID:(7020095)(4652020)(5600026)(4608076)(4534165)(4627221)(201703031133081)(201702281549075)(2017052603328)(7153060); SRVR:CY4PR07MB3175; X-Microsoft-Exchange-Diagnostics: 1; CY4PR07MB3175; 3:odH9phpBbeJJJw2n3PgRy3JkLwMmKVqYnIToEI7SHV6luqOngCgddkW7fi+datSEBnkBXr4Q1o+i8+I16FAJm293euUV7MP3tvoAkf9l0QMRJxxzh+AFVvhl0i+7tMLgo8JmiNx806QyDqq8La2zPc4YFRH3CN5oIjXNwh+/KtSBa/HrywqRgw3+AhBKTMGrsD0VqWPDjKjGT0jIabq3kYEZIfverx/EZEy+i+iz5d3enQdIIpqhmEvgMzYPSWVLTwkmd5SnAMpDNHZxcNA22qh7gNObpQMcirCk1Zxhzfb/fx4T/CcE5soUN1izvtySBrLfdSZgz5yuTbnBcVAD/3NQHMf+SQOz+Ng20v273EY=; 25:K5uaeX4Cdh2jue1DV57ldq3ZW4rHOfh2Q8yo+p3U0uBED941M3XhsyHrw+uqR2nPCovB2kj7haCWRLnAJ28kEqFMQNahqTqNpXIOB+VxJ5scPhA5qsGhBiUGuLoVTJ+GKlMIApzEvVs2ZdAtlo+IxHAgGkuGKV3rGrfQzZJ60/lYrB5TeVQorxbAkUWUbKwRWcfV6npsVPyCK8IeSecl2KT3BmP1JYoFztp4RqshV6udGVRHOTZ6rm6XhE2cmQbH31iWf1crvlg4C/mSMAPb/+laUdFLZGgDNRb1ZjqksHxE9mBk9LCZX365s6kJuZXgslO1xiVe3ZiGCpRWSoQnYg== X-MS-TrafficTypeDiagnostic: CY4PR07MB3175: X-Microsoft-Exchange-Diagnostics: 1; CY4PR07MB3175; 31:xjTUDqCBrK+PUISUHRLsEsNR3JjT848o1Nv/v/UFBlK+BabLwB7PpJO/uIntSOYi4JuJTMFeHpqY9+z4bVs/X7h/BDEGrRgALNjKPNEfz1FQZLOuOwu5gO3iELegXf0fgvuKToaIITh5xdEJgY/d6mDTGM747qVU6IC2IWb/EXZ+44jaLfABZfeTVCj8Cfx4Zat3EmQpnreFcxwb0DYqS2q1+/a2TVMg8IZd1FsbSEM=; 20:TUYhATps/DVWYalV04UwgBCQRz56YdOIuKeKn4QXZ1uVIno/DzJdkzFcPA8nNHQEVyVA7LHxEjN6Xk3BW1uit6ojM5v0KmBR1bt3qao9wEZys5DdKyqoQX2XQdL99FqxvgVd0alLYKruZz/GtNWh8h1R0L8ObgQ1e8ySYumjcoqt1rZOTbXAIE8pwktwV4OksbiyVNI9yXGqqwQFMugXD2x7OU2kAeT3+6he2x8cMLfxTw3r4wJLVDdPaE/dSrY11tEDGLqyQabM2WJct3dn+GdUTgu008PkGWPx0i3zpdbhqpckq44Qq2HDYdt9wxAiK0YPmXoPDjDZFAVQC05IFRjcd0SF6zSdJ3BYWgS8sdLKFFQttq5/bfrywKTsF/eqRHrYuV2jEFs6wMhhbDo67h71/DAq+Z7/BHzZwsiwRYeAAzHLt71eR3gtCEL3622AIf1YlkQaax3FdMMkyDWEQaw06SYI/k38JJF62LI5GTdriHhL2+x48W+LL/RyspSs X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(8211001083)(6040522)(2401047)(8121501046)(5005006)(93006095)(93004095)(10201501046)(3231254)(944501410)(52105095)(3002001)(6041310)(20161123560045)(20161123564045)(20161123562045)(20161123558120)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(6072148)(201708071742011); SRVR:CY4PR07MB3175; BCL:0; PCL:0; RULEID:; SRVR:CY4PR07MB3175; X-Microsoft-Exchange-Diagnostics: 1; CY4PR07MB3175; 4:XusshLgs/07dDqPLq4A7VWsZf9FqY8m121hUbDYV+C3vb0kr/ckDsVpw/A1BfReWxjd6NugN7/snrzzW1o6xHkyMPY4S1hGsjdB8lM6p7G54cALDqIItWbqLVTF5dFPASCTGZV+hP8qiEgVK1r1DlDoJml7NTsot6rcf7rGo3rYP2gl0u3hcdHsfJcdyE0FvgdGpVUHmr20LbEfJDIvfM6wiyNaGE1GOLELnLwyTz7329vs1arvJx9jnTG3HWlH8Uiomf7KfqIYMZKqzX7XWcg== X-Forefront-PRVS: 06640999CA X-Microsoft-Exchange-Diagnostics: 1; CY4PR07MB3175; 23:YRDo+KMlQJpoPd/usZ+Ls+EJEbH726rV/k3bvs2ydxE0XkVNrYIajScYm1NOYxceU/nSDhvT5MSXp2JQ1jIUXZ5IcEUkqDRs+1NNNBDU9HIL2aaJ39Gig24ZH5xNEdgGjM+vppGhPOUc5epeNk266gkAcjMmamV5pjIcAzySx8GmuUBpW88Me4nDXbtHiQyLTDKl2lyCfkTpnI4b1Bg2JE444CBZ6iePxlv5xYmga46Wb+U260XLlEodtdK6huNGBGqFc6g0FXWfwRiGYbvXNa+BX5k7CrC2RGKKbUk6R8Zixszr/XyxN9JDM9SLA5pwXWPspUNNT+GW8ZA/osfrLzstXJJxgoESIBTKP9Y1xIioEr9jQshHLhPzls4A8o55jnOj9HNeXPh9cLa3HHpwFxap5upvdvVh232Te6fjqva37nhepxKAS6S/sCrEy5WPrrQCn5a7EEZ6OAIcB6zGhQPfMrmFU2xGZnu8RMCwh9EjF7ZYQvHKg+QFi/bVC6bb9BwlZ/4SfuvkElFuitZsuLQxdrVPspSGGV+y3msX35GtIocRt4DWuPtkHXlvEJVKdj3D4XXem4QMROSpG64BqqbN4fbC03r/aUtPwqHQmgFNgyjY3XKs0yUy2gs7OjCYddnLND1OtfzrXY2wf9q9EBqhSzXliUwol10Qn58w02ui8Q11si9JyWCdqvyDsz47P1O96xqNX64BY/vga7AZNKKXmaMsZ2rlIcBIkcvihmGtXU+DOHWLo2MP5XqNcPjwPyGAJF1TyI35bZg8QiWod0t4qghCNFy513IUJBOA7M8r59MqFdiCC5VwCjRHCmsdKpzCKIeY1kyZnPCQuAR6YwQAg9tUUxIaEWit5BdAKr3TXJcV8QElDA6W9r+K+2qHQEVnxGX3+N7M4yrTyj6FfNxZ1gcNCBCQqnV5sUaa9ryGWHFHC+RA0Yf228BkBvq8R/KDf61s8/LD3duXryMxvDsrgML4adWNj+ms+bvCOJDkbSq8OL4tOAzCScMKxWekN0VCzdFoI9WuSLncUjBWBRsH3VtH8rXvtgkx1zjlolz2KGfRcgChA4xPxUn0XF4Rq6M2Otljwe7uqmMOxR+yWcK/PYPkSseRirtBIcwz3W3Fl+6quJmmLuwwwAC9hRT9JxKw5GSpMvVfNc8HD6Dsj0+3DPn9JCU9+THSelCh77b6qd1j2bGeqUxHVUCflgu83zQv63k9v17u1gqAMK5efA== X-Microsoft-Antispam-Message-Info: 5le/PWbdJmZyNJvQus+Xfx/EOooDyWWRnHTnS5AN/CgxDH/+9nRf3NeRumic7N7qkRdmmiM3A4VE7lGzwlMn7gxHglLTV/XGyDZ6YoWfQB12EZ1woxZnyN2U/Wc9DYHvjO/8QvoqLVN3IrTtWMg+dhdYKncqTPuDdbcCKMoQEF8Vsq9dlPJ/ecB5v86btDEP X-Microsoft-Exchange-Diagnostics: 1; CY4PR07MB3175; 6:jbirTmeyvecYlzjgaQ2wxbcTrDrZ7yToG3VdGZ9R0IqxeLKBOsy4XtqyWC/Dxzy7HZPuG1rnCjcW1GJQBEHL7eSBaOkSLBhRInlWtzZwIiACm8bjtiJ6lZHiIoScLIYv1vHkvS4DmEBUwV0aN3NXf3Ybcyw/HOAEFgtLFKny8cYfeUThZ5XjSpc0WcNgC2TdOnJVEqVTRtegSU4GkyvkHwTzz3PMEJvphj7sycF97R9VGRenhZorDrkBNNH7d+cxINuJ6nossNphd8hyStR5WZpJWPdA/RGbZeFkYQXKvogfYQnmJ6Azi+OQhNrjgWg8IzWrpm2nAi+j4C8t623ZnuzNb2LXvWMREQGDT1E65L5x5Uf2aaS1E/CeFZb9mdDQ3muJJfr/rMzJQpUJPViRxTtG/C6aYG6ykeCaRkLj84Y3XAPfD6TtLKHi8qc1+rs0Cb86PJHUIYhG5VodCceG8A==; 5:1qOIWwhk6ZiNnoTAjx1nMzD1YtN0toUN8TSDqcIv55QsbF8+Xwy902m6RulPkgDoj5tQWNL7Ne7oGqAxrU0JqqxX6rVjvS3KcixkIgfkhe2RCJ4ZDjSuPDy3XGELSyOS/96yWVPDCpIFQZxpswzsWtqQjvqLUr8fF3zHLuJKmTk=; 24:xICJ/gxColHLf4ldVtk2ApSXDECZ++PLTGL5g2DAd9quEOv6SG+gnFCjEbULlDa0nvsI21AvO1D52LpHxTmDDB6eyKPdos875EuZKveqKmA= SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-Microsoft-Exchange-Diagnostics: 1; CY4PR07MB3175; 7:aDWVfsWXGqJMuLAHojKdyydOuFTbTAcyYCu4t8cdymE1z09j9OzPtaNHSPY+wYhSt+rS8x0cec3G4t3mtcSflj+L9qZD2b807kE7OMcJrlcOWlWCLWXC3eOZCkn6wGwrbw59KTcQFZqCHaGYG0lEvyYkr59ll9nx4FzPd4f4QpKx2eH4gXc+2HJF5jZIaadtP6/a3Q52PXQsHzogbUHyMMmI1NePtqYd4UkSj5FuNwpEkA6DaNbDrO+PqTqFrNhN X-MS-Office365-Filtering-Correlation-Id: ebaa4d95-70ad-43ff-69c2-08d5b2f2c1d6 X-OriginatorOrg: cavium.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 May 2018 01:43:24.3245 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ebaa4d95-70ad-43ff-69c2-08d5b2f2c1d6 X-MS-Exchange-CrossTenant-Id: 711e4ccf-2e9b-4bcf-a551-4094005b6194 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=711e4ccf-2e9b-4bcf-a551-4094005b6194; Ip=[50.232.66.26]; Helo=[CAEXCH02.caveonetworks.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY4PR07MB3175 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The patch adds support for new Multi function mode wherein the traffic classification is done based on the 802.1ad tagging and the outer vlan tag provided by the management firmware. Signed-off-by: Sudarsana Reddy Kalluru Signed-off-by: Ariel Elior --- drivers/net/ethernet/qlogic/qed/qed_dev.c | 64 ++++++++++++++++------- drivers/net/ethernet/qlogic/qed/qed_sp_commands.c | 5 ++ 2 files changed, 49 insertions(+), 20 deletions(-) diff --git a/drivers/net/ethernet/qlogic/qed/qed_dev.c b/drivers/net/ethernet/qlogic/qed/qed_dev.c index 9b07d7f..95d00cb 100644 --- a/drivers/net/ethernet/qlogic/qed/qed_dev.c +++ b/drivers/net/ethernet/qlogic/qed/qed_dev.c @@ -1668,6 +1668,18 @@ int qed_hw_init(struct qed_dev *cdev, struct qed_hw_init_params *p_params) if (rc) return rc; + if (IS_PF(cdev) && test_bit(QED_MF_8021AD_TAGGING, + &cdev->mf_bits)) { + STORE_RT_REG(p_hwfn, PRS_REG_TAG_ETHERTYPE_0_RT_OFFSET, + ETH_P_8021AD); + STORE_RT_REG(p_hwfn, NIG_REG_TAG_ETHERTYPE_0_RT_OFFSET, + ETH_P_8021AD); + STORE_RT_REG(p_hwfn, PBF_REG_TAG_ETHERTYPE_0_RT_OFFSET, + ETH_P_8021AD); + STORE_RT_REG(p_hwfn, DORQ_REG_TAG1_ETHERTYPE_RT_OFFSET, + ETH_P_8021AD); + } + qed_fill_load_req_params(&load_req_params, p_params->p_drv_load_params); rc = qed_mcp_load_req(p_hwfn, p_hwfn->p_main_ptt, @@ -2630,39 +2642,51 @@ static int qed_hw_get_nvm_info(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) link->pause.autoneg, p_caps->default_eee, p_caps->eee_lpi_timer); - /* Read Multi-function information from shmem */ - addr = MCP_REG_SCRATCH + nvm_cfg1_offset + - offsetof(struct nvm_cfg1, glob) + - offsetof(struct nvm_cfg1_glob, generic_cont0); + if (IS_LEAD_HWFN(p_hwfn)) { + struct qed_dev *cdev = p_hwfn->cdev; - generic_cont0 = qed_rd(p_hwfn, p_ptt, addr); + /* Read Multi-function information from shmem */ + addr = MCP_REG_SCRATCH + nvm_cfg1_offset + + offsetof(struct nvm_cfg1, glob) + + offsetof(struct nvm_cfg1_glob, generic_cont0); - mf_mode = (generic_cont0 & NVM_CFG1_GLOB_MF_MODE_MASK) >> - NVM_CFG1_GLOB_MF_MODE_OFFSET; + generic_cont0 = qed_rd(p_hwfn, p_ptt, addr); - switch (mf_mode) { - case NVM_CFG1_GLOB_MF_MODE_MF_ALLOWED: - p_hwfn->cdev->mf_bits = BIT(QED_MF_OVLAN_CLSS); - break; - case NVM_CFG1_GLOB_MF_MODE_NPAR1_0: - p_hwfn->cdev->mf_bits = BIT(QED_MF_LLH_MAC_CLSS) | + mf_mode = (generic_cont0 & NVM_CFG1_GLOB_MF_MODE_MASK) >> + NVM_CFG1_GLOB_MF_MODE_OFFSET; + + switch (mf_mode) { + case NVM_CFG1_GLOB_MF_MODE_MF_ALLOWED: + cdev->mf_bits = BIT(QED_MF_OVLAN_CLSS); + break; + case NVM_CFG1_GLOB_MF_MODE_BD: + cdev->mf_bits = BIT(QED_MF_OVLAN_CLSS) | + BIT(QED_MF_LLH_PROTO_CLSS) | + BIT(QED_MF_8021AD_TAGGING); + break; + case NVM_CFG1_GLOB_MF_MODE_NPAR1_0: + cdev->mf_bits = BIT(QED_MF_LLH_MAC_CLSS) | BIT(QED_MF_LLH_PROTO_CLSS) | BIT(QED_MF_LL2_NON_UNICAST) | BIT(QED_MF_INTER_PF_SWITCH); - break; - case NVM_CFG1_GLOB_MF_MODE_DEFAULT: - p_hwfn->cdev->mf_bits = BIT(QED_MF_LLH_MAC_CLSS) | + break; + case NVM_CFG1_GLOB_MF_MODE_DEFAULT: + cdev->mf_bits = BIT(QED_MF_LLH_MAC_CLSS) | BIT(QED_MF_LLH_PROTO_CLSS) | BIT(QED_MF_LL2_NON_UNICAST); - if (QED_IS_BB(p_hwfn->cdev)) - p_hwfn->cdev->mf_bits |= BIT(QED_MF_NEED_DEF_PF); - break; + if (QED_IS_BB(p_hwfn->cdev)) + cdev->mf_bits |= BIT(QED_MF_NEED_DEF_PF); + break; + } + + DP_INFO(p_hwfn, "Multi function mode is 0x%lx\n", + cdev->mf_bits); } DP_INFO(p_hwfn, "Multi function mode is 0x%lx\n", p_hwfn->cdev->mf_bits); - /* Read Multi-function information from shmem */ + /* Read device capabilities information from shmem */ addr = MCP_REG_SCRATCH + nvm_cfg1_offset + offsetof(struct nvm_cfg1, glob) + offsetof(struct nvm_cfg1_glob, device_capabilities); diff --git a/drivers/net/ethernet/qlogic/qed/qed_sp_commands.c b/drivers/net/ethernet/qlogic/qed/qed_sp_commands.c index fbb3172..26bed26 100644 --- a/drivers/net/ethernet/qlogic/qed/qed_sp_commands.c +++ b/drivers/net/ethernet/qlogic/qed/qed_sp_commands.c @@ -346,6 +346,11 @@ int qed_sp_pf_start(struct qed_hwfn *p_hwfn, p_ramrod->outer_tag_config.outer_tag.tci = cpu_to_le16(p_hwfn->hw_info.ovlan); + if (test_bit(QED_MF_8021AD_TAGGING, &p_hwfn->cdev->mf_bits)) { + p_ramrod->outer_tag_config.outer_tag.tpid = ETH_P_8021AD; + p_ramrod->outer_tag_config.enable_stag_pri_change = 1; + } + /* Place EQ address in RAMROD */ DMA_REGPAIR_LE(p_ramrod->event_ring_pbl_addr, From patchwork Sun May 6 01:43:02 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudarsana Reddy Kalluru X-Patchwork-Id: 909239 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=cavium.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=CAVIUMNETWORKS.onmicrosoft.com header.i=@CAVIUMNETWORKS.onmicrosoft.com header.b="N/twpV4G"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40dpSM6dNsz9s2k for ; Sun, 6 May 2018 11:43:47 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751947AbeEFBnl (ORCPT ); Sat, 5 May 2018 21:43:41 -0400 Received: from mail-dm3nam03on0088.outbound.protection.outlook.com ([104.47.41.88]:14107 "EHLO NAM03-DM3-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751775AbeEFBna (ORCPT ); Sat, 5 May 2018 21:43:30 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=CAVIUMNETWORKS.onmicrosoft.com; s=selector1-cavium-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=VrZpM94IM2qTL/rBApT+8EXdE1uJbVd8NjYyVl5jioY=; b=N/twpV4Gic8mkidfBG/iU4keCvHDhAKFcWJyZSRCTAXDJNliOP4bvHEzEE7cVjTB4Y93d3ZjKQ7d3h+hFyS3prczWsoByVlqVrw3NftIv+c3DNj4sOoOncs0gDTbng/p58rdT0RCob11+3TxODTXxj967/ijk+r9FPLKs4Li73M= Received: from SN4PR0701CA0006.namprd07.prod.outlook.com (2603:10b6:803:28::16) by CY4PR07MB2821.namprd07.prod.outlook.com (2603:10b6:903:25::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.735.16; Sun, 6 May 2018 01:43:27 +0000 Received: from BN1BFFO11OLC004.protection.gbl (2a01:111:f400:7c10::1:131) by SN4PR0701CA0006.outlook.office365.com (2603:10b6:803:28::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.735.16 via Frontend Transport; Sun, 6 May 2018 01:43:27 +0000 Authentication-Results: spf=pass (sender IP is 50.232.66.26) smtp.mailfrom=cavium.com; vger.kernel.org; dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=bestguesspass action=none header.from=cavium.com; Received-SPF: Pass (protection.outlook.com: domain of cavium.com designates 50.232.66.26 as permitted sender) receiver=protection.outlook.com; client-ip=50.232.66.26; helo=CAEXCH02.caveonetworks.com; Received: from CAEXCH02.caveonetworks.com (50.232.66.26) by BN1BFFO11OLC004.mail.protection.outlook.com (10.58.145.15) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA_P384) id 15.20.696.11 via Frontend Transport; Sun, 6 May 2018 01:43:26 +0000 Received: from dut1171.mv.qlogic.com (172.29.51.171) by CAEXCH02.caveonetworks.com (10.17.4.29) with Microsoft SMTP Server id 14.2.347.0; Sat, 5 May 2018 18:43:11 -0700 Received: from dut1171.mv.qlogic.com (localhost [127.0.0.1]) by dut1171.mv.qlogic.com (8.14.7/8.14.7) with ESMTP id w461hEWJ029163; Sat, 5 May 2018 18:43:14 -0700 Received: (from root@localhost) by dut1171.mv.qlogic.com (8.14.7/8.14.7/Submit) id w461hEWm029162; Sat, 5 May 2018 18:43:14 -0700 From: Sudarsana Reddy Kalluru To: CC: , Subject: [PATCH net-next 4/4] qed: Add support for Unified Fabric Port. Date: Sat, 5 May 2018 18:43:02 -0700 Message-ID: <20180506014302.29110-5-sudarsana.kalluru@cavium.com> X-Mailer: git-send-email 2.12.0 In-Reply-To: <20180506014302.29110-1-sudarsana.kalluru@cavium.com> References: <20180506014302.29110-1-sudarsana.kalluru@cavium.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:50.232.66.26; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(376002)(39850400004)(396003)(39380400002)(346002)(2980300002)(438002)(199004)(189003)(2906002)(50466002)(476003)(54906003)(48376002)(316002)(4326008)(26005)(47776003)(36756003)(69596002)(107886003)(356003)(72206003)(1076002)(305945005)(16586007)(59450400001)(80596001)(126002)(336012)(8936002)(42186006)(486006)(6916009)(6666003)(478600001)(86362001)(11346002)(50226002)(446003)(76176011)(106002)(87636003)(2616005)(575784001)(81156014)(81166006)(106466001)(186003)(5660300001)(2351001)(8676002)(51416003); DIR:OUT; SFP:1101; SCL:1; SRVR:CY4PR07MB2821; H:CAEXCH02.caveonetworks.com; FPR:; SPF:Pass; LANG:en; PTR:50-232-66-26-static.hfc.comcastbusiness.net; A:1; MX:1; X-Microsoft-Exchange-Diagnostics: 1; BN1BFFO11OLC004; 1:3qeOfUYzEj8q/6hRo/Ggk0Blnzl/oD8XRSUZ7P+IHmTBecK9cCbwf/96mOzwYkixe479SASNr4zUyScYfjdMXiP9LdLvxqGYMzm9mOnOwqE+vLn7xaJPQ9a2zVjd+tWI X-MS-PublicTrafficType: Email X-Microsoft-Antispam: UriScan:; BCL:0; PCL:0; RULEID:(7020095)(4652020)(5600026)(4608076)(4534165)(4627221)(201703031133081)(201702281549075)(2017052603328)(7153060); SRVR:CY4PR07MB2821; X-Microsoft-Exchange-Diagnostics: 1; CY4PR07MB2821; 3:W2p/BgpRA3jPa4PSFD2aDkqBhU4yZgJNRprmhUUjV0FuF7l7N9CBB4zzVfDtDfp5P5Too3mipkeTK0rzseghs9KXdEv1npVuQf7pPuXjR9SI53WZx9hrRl6O39Mh3wgEO43nFlPhE6AVYudmcYczuq15GJkiCZC+refujQRtxFiSGKDV2y/N+dU/gX831IPBE3aYMPHvKCaEhUH5r4zmchpfSoSjNm3Xwv8lnLvKWpu7xd6G9B93ardc6kK3aA1Z47NjwLL5qMRrv0jZdon9NnQMz3Mt+MRdEz9Ug+q3GwNF3Mewgz2zARwRiMiack+STfK9Qxd9LIT547wQ263afaqnkn0fo+tAGBc1DGcC9ek=; 25:v6KrOCmmHO5Q5iVvV/Xx51+PZDrUAKEN8zskZIi5pilAjmoUIwWgWRye0qXKvzqocYzi6IxLzIQJgTwstDt7eWz4J1rVpSncodwiZhYQZn73ZE74UIayD6g32IiN0ty6PDeN7sVEHPZlbRLE6PUlRQ3vKphsc2MYJSVLeX9PWz1U5zdizbjcJfC4OJLWWV5JaG9d+ZtcVOAzpykxd9Ir/B19ZdoYXs5fxlKQKIGstStGZFb19uCY5c6yVkN1zNb4M8fzi8nhR3r3AXo7135rQzS50LwMtTxzC2VqPCjPX8tysFYtLTXdOhqtkGQ99zpARcA1bzuQREOv8x8aA70hTw== X-MS-TrafficTypeDiagnostic: CY4PR07MB2821: X-Microsoft-Exchange-Diagnostics: 1; CY4PR07MB2821; 31:ot9FvlhH50hSov8w94lEgtBwPoCiJjlseDubQZBL9T1gS13xmH+U6mGrB1Yc+08od0lLsrjJcvDfF0TPmGGpRtPer8H7bz/xG9gMSSqVcStvDZ2Y9MxSW8qUZ5UzFS9PG+IwW3i43y5L7l495aPCJyFEpiGksVt4W56R7TuS9fNrSxheHEtrh3TJ5nhH2IXo6dmhOFo8IiByaS+fNd8G4tq4GKcLl0RdifUFEqOqLmc=; 20:3J/ZbOG/iWztVKZc+VTRTWHT1MdH6kIVbHXqaHKdTuxq9Kv89RcgANYTGoERPkIM/raQriu+DCNz6m9gt7ycZYut5ZlUhfh/m4SXmCpBbGQL+eBPKTN+yIrsX+lLZg10hUrhdUpadX7xWVZXzKI/LGXjW2OPysRyTtjyqaxVgjhW2n7mIYCUeI0WJsI0K4v1MU5h3WMxQ6WxUn8RLiovTccl5QHo1g6Y/XXsH8obIjoO4Rcy5VMnQCcl2sO+ErZri/AeA9D3D5q4PX9qDdfygsMh3rNPPKu656IBa14yf5ivsJ5MsEJss6c/yEot0jX6dCoayHK+9xsAwcD+X7bFQco7FMx1TzhxmIaPdlRdVoG4FdXa+iOw8rsDDUjnldsFGC4U6nMLSdvfPEbfE3F9b+kg7ACP9cCxsLt5CyB43F6TwOY3CXJnuoe0rrccsqy81q9YYRn0pzVsXKooD67/tOYgtmmjGSmyDSn1+gBa3PNmt6Nnhv2VNVvyur0IknBG X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(8211001083)(6040522)(2401047)(8121501046)(5005006)(93006095)(93004095)(3002001)(3231254)(944501410)(52105095)(10201501046)(6041310)(20161123560045)(20161123564045)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(20161123562045)(20161123558120)(6072148)(201708071742011); SRVR:CY4PR07MB2821; BCL:0; PCL:0; RULEID:; SRVR:CY4PR07MB2821; X-Microsoft-Exchange-Diagnostics: 1; CY4PR07MB2821; 4:ywqEd8TrIAnzK8L8KcL+OlIjwcn9xWaHFmjGKbZF8/IcpizNSNtcyrwaP43SgB9ZYriTgHDknfsQENvVWg3SFEvdwFnQx58/rHJ4Xd6KZWpdEEN2shpYm1gJmuKUIH++tuP8BKS8gOg7u9tb4uLrv43H1JMTYwzCz6rdH0c7j0kGS0OoLqKkj8xE6xaXkzTVYgt4/y4CBKU0M+Jt69KWz8Elj2KnTSvCf7PNAs+aZkKdFWqjWrJvpxACsJKG2zKFdAi8LXx+1VPcnVtc4QZjEg== X-Forefront-PRVS: 06640999CA X-Microsoft-Exchange-Diagnostics: 1; CY4PR07MB2821; 23:5riqHGJ9G+0xFmy5q2Htc4m5/9oMjBX/NqBpEuaPgsDBEiMQ0JnD9NAS1uH3l5pdbj0eeietJ2d2SdjwUcWn6OU5dpPjjrS3Ag6uJ4f7k0pr2pi1HPT/uE0pE9gjQH9NR7p+YeAvpfS4PeeKmXV56Q3NBaimx01hQ8sWlNwZV/LlnU5Qhx/SNaAJtAa2Gl7Q1t41hy0N54hlBkYUIU67R6BAR5gPY5AF1J8urVIHinQZPeT0oKgz4IETBx/K3M78bb5E0dkgoafGZH4Yg7qicVLh1CvxyYy0Bt0uyyPGSEUiSpukFiHX7MCgemC9gpe30aw6hOAkahlpcLhktaAQMDak7jqs18UuzNyYN+vlBrfO0Ym38dXShmYlKBVcPV8E8FYc93jZ4yGpiN841cR8Dhi8a7I4zArUrfMt56TE2gv1oiFNOb/UdMu2EQKCVqMLkTefCu8EGo0GMnGDOcbJk+01465+29YpthgOPLRJaDkSkYA8+9npH5DMfq06fF3Pp9TLifgU77IlCZsk18nLcoEfg0sSs+lNt2ouBHf9i/NHef7s/0JN58O3ErTzUjF2Gx1BMS9/I1g+RKO47goqQBFc7tKNyjgVeGRRHDZV4p0iYNFTKEKw8b3M8a9gd6VFp1VpgTtvOD4GMhpOelj/Cp12FMdmUiVJiM2/QkxjX45jVfCbJTDgUT+wT9PbDFaRkbYzvDHZ858VMjLSHr3XNQ6mjM9koOmtfM+uqVe6gUSQ00GaSRMezooOyg7nCVDv8W6MEvBX+krEbNdjI78v2Qwx+4pmN3fELCkfRZNbbEmrh/yc2HJzMlbyetYL/khRqS+RZtdkeT0pXjYeCw0ZHGn8Uftm0hUY52gAeWXPiamqSsN7ofoBbdNWgNeYGUNRQPtKrnsndSXnMUXL4e50cCwufYdA9fNhitN3xPVBRP7zcKJXAnyar+aFGXfM4A8F4To076LZYNIyxQiPKEmrdZ22yTWo2mVPQEboLhXngdsCfs2o8CbpsmZ/HMyvNmRWxznEY32I7qV/9cDfM/bi8SRMPcaoKEexx/h8sjK8Rpos1WvE5Ba8AdTgiwFWMo/IgrXRQeZscVrjeAz0t3Ym4RHg7EycH2BeP0spmAG0j61HYAfhqlmRN/RHuCe8YOjr1lxFWuea+y+i26sXn6Svh471b5j6pdwQtwh5Uqj5OFw= X-Microsoft-Antispam-Message-Info: chUjL1ZExh0EzPdTNk6PnAZjSM99qtGAKa9IRh61CwHt8H/wtEdVQcvXvgXLlAI+7/bJgeUXU9NjdCu5Lln8E+N0DwPlspGn5uts2Q0qlrhF+8g6zbSMxwOhLHLFpU6jsCUbfdoJmiNUOmgnoFp3vpq/Jh9RXykztN+bZaGs0yHdyaLUEd/n/az5V/oyL+Oz X-Microsoft-Exchange-Diagnostics: 1; CY4PR07MB2821; 6:gwUEZAJ0d62LC6AKlJGOqJ212OGrTMA24e0WLWRGlAK4h0dM8g0UdZrM6EfdDIMEebXvK7d+AiX752JFlIM4If3VyqjMSZLrtOWkezKK13qjqHACdVbwgVBNeWKgmvkVXWDZDolDyiycRDOHrm6e7c8PG2YhAMUR+TKxdGv5PTMZ+CalpACZQAok5o+CB5/g6QSUQYHmdXKR+qXP7Tp3prDjHmfVaHvR8b4MkwXHaoZ1mFuQX67sDDSj2ao64ZDqdY3hmbDOu8mcQklP995sv00MXVgYsjeV+s9OVXURYdcsHZ/tl7rLc1uDiPgS8ssjJZz0+BuPtt5RLYwnbqd56uv36e+//9uiGYO8DcrH+alMCj1rQ6wPYwdT5932wS8tJr+0k+wHmaktszKkaXPEMMBo7VKoSNdm0rDvKQYdIaq+yFh+EqbwJ0+Okn9LX8HnKSc6pcj5XQdxtgONYEwSnw==; 5:Bwcq0lRA5K5Iy7gKNX7Cyjqi/8X9xNNPz/PeNjIrEqA+5iEwg7+D/kegj+3qedz/vnS3y0n7Rvj2rlK4A0GG/AEbWovzCYJo4EO3b79h5SSs7KlGRe/W0nzTvq8IrPMnYRIrt9TuTQABfE0iRFgbheWdMkcjoPpZ7ePbkuv1J+8=; 24:bz6PEEj3+yG9hLHHFsV5oUcVNG1av6shtnxdXYdnl5p29U7yBmAXKSpa7qdSKFJYYzABTl2gvyVRqsYaW1ObZHr9b7Z19zSK1rxf7E7LQZY= SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-Microsoft-Exchange-Diagnostics: 1; CY4PR07MB2821; 7:8MWb+1GBmwo9QkoX5xM7wb1QXBPeaMixgBtTzx7KPWDjNOnkPkogWIaAX5trrSxXLr+DsUPZw5hwYz0pfnFxgnikPyCxKUwZ/ylCOprfIsTJTxuzSe+laS1Bm1g/DOjWHiB6j2hsWAlJjcOUAQEp+TJE8W86OJV804fQj86+o/e5EMNx5EXomngLpRfBxDNX5aMu8pfGbWTM+oRy7qhqizEDm0VtY7CSVslaO5FyU7SujwbLMj0PbBN3KG/dbyy0 X-MS-Office365-Filtering-Correlation-Id: 32634e62-c50e-4eb2-a722-08d5b2f2c355 X-OriginatorOrg: cavium.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 May 2018 01:43:26.8205 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 32634e62-c50e-4eb2-a722-08d5b2f2c355 X-MS-Exchange-CrossTenant-Id: 711e4ccf-2e9b-4bcf-a551-4094005b6194 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=711e4ccf-2e9b-4bcf-a551-4094005b6194; Ip=[50.232.66.26]; Helo=[CAEXCH02.caveonetworks.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY4PR07MB2821 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org This patch adds driver changes for supporting the Unified Fabric Port (UFP). This is a new paritioning mode wherein MFW provides the set of parameters to be used by the device such as traffic class, outer-vlan tag value, priority type etc. Drivers receives this info via notifications from mfw and configures the hardware accordingly. Signed-off-by: Sudarsana Reddy Kalluru Signed-off-by: Ariel Elior --- drivers/net/ethernet/qlogic/qed/qed.h | 20 ++++++ drivers/net/ethernet/qlogic/qed/qed_dcbx.c | 14 +++- drivers/net/ethernet/qlogic/qed/qed_dev.c | 32 ++++++++-- drivers/net/ethernet/qlogic/qed/qed_fcoe.c | 3 + drivers/net/ethernet/qlogic/qed/qed_hsi.h | 28 ++++++++ drivers/net/ethernet/qlogic/qed/qed_ll2.c | 40 ++++++++---- drivers/net/ethernet/qlogic/qed/qed_mcp.c | 78 +++++++++++++++++++++++ drivers/net/ethernet/qlogic/qed/qed_mcp.h | 8 +++ drivers/net/ethernet/qlogic/qed/qed_sp.h | 9 +++ drivers/net/ethernet/qlogic/qed/qed_sp_commands.c | 57 ++++++++++++++++- drivers/scsi/qedf/qedf_fip.c | 7 +- drivers/scsi/qedf/qedf_main.c | 2 +- drivers/scsi/qedi/qedi_iscsi.c | 2 +- include/linux/qed/qed_ll2_if.h | 10 ++- 14 files changed, 283 insertions(+), 27 deletions(-) diff --git a/drivers/net/ethernet/qlogic/qed/qed.h b/drivers/net/ethernet/qlogic/qed/qed.h index c8f3507..adcff49 100644 --- a/drivers/net/ethernet/qlogic/qed/qed.h +++ b/drivers/net/ethernet/qlogic/qed/qed.h @@ -474,6 +474,24 @@ enum qed_mf_mode_bit { QED_MF_DSCP_TO_TC_MAP, }; +enum qed_ufp_mode { + QED_UFP_MODE_ETS, + QED_UFP_MODE_VNIC_BW, + QED_UFP_MODE_UNKNOWN +}; + +enum qed_ufp_pri_type { + QED_UFP_PRI_OS, + QED_UFP_PRI_VNIC, + QED_UFP_PRI_UNKNOWN +}; + +struct qed_ufp_info { + enum qed_ufp_pri_type pri_type; + enum qed_ufp_mode mode; + u8 tc; +}; + enum BAR_ID { BAR_ID_0, /* used for GRC */ BAR_ID_1 /* Used for doorbells */ @@ -582,6 +600,8 @@ struct qed_hwfn { struct qed_dcbx_info *p_dcbx_info; + struct qed_ufp_info ufp_info; + struct qed_dmae_info dmae_info; /* QM init */ diff --git a/drivers/net/ethernet/qlogic/qed/qed_dcbx.c b/drivers/net/ethernet/qlogic/qed/qed_dcbx.c index 449777f..8f31406 100644 --- a/drivers/net/ethernet/qlogic/qed/qed_dcbx.c +++ b/drivers/net/ethernet/qlogic/qed/qed_dcbx.c @@ -274,8 +274,8 @@ static bool qed_dcbx_roce_v2_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) u32 pri_tc_tbl, int count, u8 dcbx_version) { enum dcbx_protocol_type type; + bool enable, ieee, eth_tlv; u8 tc, priority_map; - bool enable, ieee; u16 protocol_id; int priority; int i; @@ -283,6 +283,7 @@ static bool qed_dcbx_roce_v2_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Num APP entries = %d\n", count); ieee = (dcbx_version == DCBX_CONFIG_VERSION_IEEE); + eth_tlv = false; /* Parse APP TLV */ for (i = 0; i < count; i++) { protocol_id = QED_MFW_GET_FIELD(p_tbl[i].entry, @@ -304,13 +305,22 @@ static bool qed_dcbx_roce_v2_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) * indication, but we only got here if there was an * app tlv for the protocol, so dcbx must be enabled. */ - enable = !(type == DCBX_PROTOCOL_ETH); + if (type == DCBX_PROTOCOL_ETH) { + enable = false; + eth_tlv = true; + } else { + enable = true; + } qed_dcbx_update_app_info(p_data, p_hwfn, enable, priority, tc, type); } } + /* If Eth TLV is not detected, use UFP TC as default TC */ + if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) && !eth_tlv) + p_data->arr[DCBX_PROTOCOL_ETH].tc = p_hwfn->ufp_info.tc; + /* Update ramrod protocol data and hw_info fields * with default info when corresponding APP TLV's are not detected. * The enabled field has a different logic for ethernet as only for diff --git a/drivers/net/ethernet/qlogic/qed/qed_dev.c b/drivers/net/ethernet/qlogic/qed/qed_dev.c index 95d00cb..5605289 100644 --- a/drivers/net/ethernet/qlogic/qed/qed_dev.c +++ b/drivers/net/ethernet/qlogic/qed/qed_dev.c @@ -1499,6 +1499,11 @@ static int qed_hw_init_pf(struct qed_hwfn *p_hwfn, STORE_RT_REG(p_hwfn, NIG_REG_LLH_FUNC_TAG_EN_RT_OFFSET, 1); STORE_RT_REG(p_hwfn, NIG_REG_LLH_FUNC_TAG_VALUE_RT_OFFSET, p_hwfn->hw_info.ovlan); + + DP_VERBOSE(p_hwfn, NETIF_MSG_HW, + "Configuring LLH_FUNC_FILTER_HDR_SEL\n"); + STORE_RT_REG(p_hwfn, NIG_REG_LLH_FUNC_FILTER_HDR_SEL_RT_OFFSET, + 1); } /* Enable classification by MAC if needed */ @@ -1635,6 +1640,7 @@ int qed_hw_init(struct qed_dev *cdev, struct qed_hw_init_params *p_params) bool b_default_mtu = true; struct qed_hwfn *p_hwfn; int rc = 0, mfw_rc, i; + u16 ether_type; if ((p_params->int_mode == QED_INT_MODE_MSI) && (cdev->num_hwfns > 1)) { DP_NOTICE(cdev, "MSI mode is not supported for CMT devices\n"); @@ -1668,16 +1674,22 @@ int qed_hw_init(struct qed_dev *cdev, struct qed_hw_init_params *p_params) if (rc) return rc; - if (IS_PF(cdev) && test_bit(QED_MF_8021AD_TAGGING, - &cdev->mf_bits)) { + if (IS_PF(cdev) && (test_bit(QED_MF_8021Q_TAGGING, + &cdev->mf_bits) || + test_bit(QED_MF_8021AD_TAGGING, + &cdev->mf_bits))) { + if (test_bit(QED_MF_8021Q_TAGGING, &cdev->mf_bits)) + ether_type = ETH_P_8021Q; + else + ether_type = ETH_P_8021AD; STORE_RT_REG(p_hwfn, PRS_REG_TAG_ETHERTYPE_0_RT_OFFSET, - ETH_P_8021AD); + ether_type); STORE_RT_REG(p_hwfn, NIG_REG_TAG_ETHERTYPE_0_RT_OFFSET, - ETH_P_8021AD); + ether_type); STORE_RT_REG(p_hwfn, PBF_REG_TAG_ETHERTYPE_0_RT_OFFSET, - ETH_P_8021AD); + ether_type); STORE_RT_REG(p_hwfn, DORQ_REG_TAG1_ETHERTYPE_RT_OFFSET, - ETH_P_8021AD); + ether_type); } qed_fill_load_req_params(&load_req_params, @@ -2659,6 +2671,12 @@ static int qed_hw_get_nvm_info(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) case NVM_CFG1_GLOB_MF_MODE_MF_ALLOWED: cdev->mf_bits = BIT(QED_MF_OVLAN_CLSS); break; + case NVM_CFG1_GLOB_MF_MODE_UFP: + cdev->mf_bits = BIT(QED_MF_OVLAN_CLSS) | + BIT(QED_MF_LLH_PROTO_CLSS) | + BIT(QED_MF_UFP_SPECIFIC) | + BIT(QED_MF_8021Q_TAGGING); + break; case NVM_CFG1_GLOB_MF_MODE_BD: cdev->mf_bits = BIT(QED_MF_OVLAN_CLSS) | BIT(QED_MF_LLH_PROTO_CLSS) | @@ -2879,6 +2897,8 @@ static void qed_get_eee_caps(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) qed_mcp_cmd_port_init(p_hwfn, p_ptt); qed_get_eee_caps(p_hwfn, p_ptt); + + qed_mcp_read_ufp_config(p_hwfn, p_ptt); } if (qed_mcp_is_init(p_hwfn)) { diff --git a/drivers/net/ethernet/qlogic/qed/qed_fcoe.c b/drivers/net/ethernet/qlogic/qed/qed_fcoe.c index 2dc9b31..cc1b373 100644 --- a/drivers/net/ethernet/qlogic/qed/qed_fcoe.c +++ b/drivers/net/ethernet/qlogic/qed/qed_fcoe.c @@ -313,6 +313,9 @@ struct qed_fcoe_conn { p_data->d_id.addr_mid = p_conn->d_id.addr_mid; p_data->d_id.addr_lo = p_conn->d_id.addr_lo; p_data->flags = p_conn->flags; + if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits)) + SET_FIELD(p_data->flags, + FCOE_CONN_OFFLOAD_RAMROD_DATA_B_SINGLE_VLAN, 1); p_data->def_q_idx = p_conn->def_q_idx; return qed_spq_post(p_hwfn, p_ent, NULL); diff --git a/drivers/net/ethernet/qlogic/qed/qed_hsi.h b/drivers/net/ethernet/qlogic/qed/qed_hsi.h index 7f5ec42..b5f70ef 100644 --- a/drivers/net/ethernet/qlogic/qed/qed_hsi.h +++ b/drivers/net/ethernet/qlogic/qed/qed_hsi.h @@ -11993,6 +11993,16 @@ struct public_port { #define EEE_REMOTE_TW_TX_OFFSET 0 #define EEE_REMOTE_TW_RX_MASK 0xffff0000 #define EEE_REMOTE_TW_RX_OFFSET 16 + + u32 oem_cfg_port; +#define OEM_CFG_CHANNEL_TYPE_MASK 0x00000003 +#define OEM_CFG_CHANNEL_TYPE_OFFSET 0 +#define OEM_CFG_CHANNEL_TYPE_VLAN_PARTITION 0x1 +#define OEM_CFG_CHANNEL_TYPE_STAGGED 0x2 +#define OEM_CFG_SCHED_TYPE_MASK 0x0000000C +#define OEM_CFG_SCHED_TYPE_OFFSET 2 +#define OEM_CFG_SCHED_TYPE_ETS 0x1 +#define OEM_CFG_SCHED_TYPE_VNIC_BW 0x2 }; struct public_func { @@ -12069,6 +12079,23 @@ struct public_func { #define DRV_ID_DRV_INIT_HW_MASK 0x80000000 #define DRV_ID_DRV_INIT_HW_SHIFT 31 #define DRV_ID_DRV_INIT_HW_FLAG (1 << DRV_ID_DRV_INIT_HW_SHIFT) + + u32 oem_cfg_func; +#define OEM_CFG_FUNC_TC_MASK 0x0000000F +#define OEM_CFG_FUNC_TC_OFFSET 0 +#define OEM_CFG_FUNC_TC_0 0x0 +#define OEM_CFG_FUNC_TC_1 0x1 +#define OEM_CFG_FUNC_TC_2 0x2 +#define OEM_CFG_FUNC_TC_3 0x3 +#define OEM_CFG_FUNC_TC_4 0x4 +#define OEM_CFG_FUNC_TC_5 0x5 +#define OEM_CFG_FUNC_TC_6 0x6 +#define OEM_CFG_FUNC_TC_7 0x7 + +#define OEM_CFG_FUNC_HOST_PRI_CTRL_MASK 0x00000030 +#define OEM_CFG_FUNC_HOST_PRI_CTRL_OFFSET 4 +#define OEM_CFG_FUNC_HOST_PRI_CTRL_VNIC 0x1 +#define OEM_CFG_FUNC_HOST_PRI_CTRL_OS 0x2 }; struct mcp_mac { @@ -12495,6 +12522,7 @@ enum MFW_DRV_MSG_TYPE { MFW_DRV_MSG_BW_UPDATE10, MFW_DRV_MSG_TRANSCEIVER_STATE_CHANGE, MFW_DRV_MSG_BW_UPDATE11, + MFW_DRV_MSG_OEM_CFG_UPDATE, MFW_DRV_MSG_MAX }; diff --git a/drivers/net/ethernet/qlogic/qed/qed_ll2.c b/drivers/net/ethernet/qlogic/qed/qed_ll2.c index 3ac0ede..9f4f2cc 100644 --- a/drivers/net/ethernet/qlogic/qed/qed_ll2.c +++ b/drivers/net/ethernet/qlogic/qed/qed_ll2.c @@ -919,6 +919,10 @@ static int qed_sp_ll2_rx_queue_start(struct qed_hwfn *p_hwfn, p_ramrod->drop_ttl0_flg = p_ll2_conn->input.rx_drop_ttl0_flg; p_ramrod->inner_vlan_stripping_en = p_ll2_conn->input.rx_vlan_removal_en; + + if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) && + p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) + p_ramrod->report_outer_vlan = 1; p_ramrod->queue_id = p_ll2_conn->queue_id; p_ramrod->main_func_queue = p_ll2_conn->main_func_queue ? 1 : 0; @@ -1493,11 +1497,12 @@ int qed_ll2_establish_connection(void *cxt, u8 connection_handle) qed_ll2_establish_connection_ooo(p_hwfn, p_ll2_conn); if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) { + if (!test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits)) + qed_llh_add_protocol_filter(p_hwfn, p_ptt, + ETH_P_FCOE, 0, + QED_LLH_FILTER_ETHERTYPE); qed_llh_add_protocol_filter(p_hwfn, p_ptt, - 0x8906, 0, - QED_LLH_FILTER_ETHERTYPE); - qed_llh_add_protocol_filter(p_hwfn, p_ptt, - 0x8914, 0, + ETH_P_FIP, 0, QED_LLH_FILTER_ETHERTYPE); } @@ -1653,11 +1658,16 @@ static void qed_ll2_prepare_tx_packet_set(struct qed_hwfn *p_hwfn, start_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain); if (QED_IS_IWARP_PERSONALITY(p_hwfn) && - p_ll2->input.conn_type == QED_LL2_TYPE_OOO) + p_ll2->input.conn_type == QED_LL2_TYPE_OOO) { start_bd->nw_vlan_or_lb_echo = cpu_to_le16(IWARP_LL2_IN_ORDER_TX_QUEUE); - else + } else { start_bd->nw_vlan_or_lb_echo = cpu_to_le16(pkt->vlan); + if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) && + p_ll2->input.conn_type == QED_LL2_TYPE_FCOE) + pkt->remove_stag = true; + } + SET_FIELD(start_bd->bitfield1, CORE_TX_BD_L4_HDR_OFFSET_W, cpu_to_le16(pkt->l4_hdr_offset_w)); SET_FIELD(start_bd->bitfield1, CORE_TX_BD_TX_DST, tx_dest); @@ -1668,6 +1678,9 @@ static void qed_ll2_prepare_tx_packet_set(struct qed_hwfn *p_hwfn, SET_FIELD(bd_data, CORE_TX_BD_DATA_IP_CSUM, !!(pkt->enable_ip_cksum)); SET_FIELD(bd_data, CORE_TX_BD_DATA_L4_CSUM, !!(pkt->enable_l4_cksum)); SET_FIELD(bd_data, CORE_TX_BD_DATA_IP_LEN, !!(pkt->calc_ip_len)); + SET_FIELD(bd_data, CORE_TX_BD_DATA_DISABLE_STAG_INSERTION, + !!(pkt->remove_stag)); + start_bd->bd_data.as_bitfield = cpu_to_le16(bd_data); DMA_REGPAIR_LE(start_bd->addr, pkt->first_frag); start_bd->nbytes = cpu_to_le16(pkt->first_frag_len); @@ -1884,11 +1897,12 @@ int qed_ll2_terminate_connection(void *cxt, u8 connection_handle) qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info); if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) { + if (!test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits)) + qed_llh_remove_protocol_filter(p_hwfn, p_ptt, + ETH_P_FCOE, 0, + QED_LLH_FILTER_ETHERTYPE); qed_llh_remove_protocol_filter(p_hwfn, p_ptt, - 0x8906, 0, - QED_LLH_FILTER_ETHERTYPE); - qed_llh_remove_protocol_filter(p_hwfn, p_ptt, - 0x8914, 0, + ETH_P_FIP, 0, QED_LLH_FILTER_ETHERTYPE); } @@ -2360,7 +2374,8 @@ static int qed_ll2_stop(struct qed_dev *cdev) return -EINVAL; } -static int qed_ll2_start_xmit(struct qed_dev *cdev, struct sk_buff *skb) +static int qed_ll2_start_xmit(struct qed_dev *cdev, struct sk_buff *skb, + unsigned long xmit_flags) { struct qed_ll2_tx_pkt_info pkt; const skb_frag_t *frag; @@ -2405,6 +2420,9 @@ static int qed_ll2_start_xmit(struct qed_dev *cdev, struct sk_buff *skb) pkt.first_frag = mapping; pkt.first_frag_len = skb->len; pkt.cookie = skb; + if (test_bit(QED_MF_UFP_SPECIFIC, &cdev->mf_bits) && + test_bit(QED_LL2_XMIT_FLAGS_FIP_DISCOVERY, &xmit_flags)) + pkt.remove_stag = true; rc = qed_ll2_prepare_tx_packet(&cdev->hwfns[0], cdev->ll2->handle, &pkt, 1); diff --git a/drivers/net/ethernet/qlogic/qed/qed_mcp.c b/drivers/net/ethernet/qlogic/qed/qed_mcp.c index 0550f0e..e80f5e7 100644 --- a/drivers/net/ethernet/qlogic/qed/qed_mcp.c +++ b/drivers/net/ethernet/qlogic/qed/qed_mcp.c @@ -40,6 +40,7 @@ #include #include #include "qed.h" +#include "qed_cxt.h" #include "qed_dcbx.h" #include "qed_hsi.h" #include "qed_hw.h" @@ -1486,6 +1487,80 @@ static void qed_mcp_update_stag(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) &resp, ¶m); } +void qed_mcp_read_ufp_config(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) +{ + struct public_func shmem_info; + u32 port_cfg, val; + + if (!test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits)) + return; + + memset(&p_hwfn->ufp_info, 0, sizeof(p_hwfn->ufp_info)); + port_cfg = qed_rd(p_hwfn, p_ptt, p_hwfn->mcp_info->port_addr + + offsetof(struct public_port, oem_cfg_port)); + val = (port_cfg & OEM_CFG_CHANNEL_TYPE_MASK) >> + OEM_CFG_CHANNEL_TYPE_OFFSET; + if (val != OEM_CFG_CHANNEL_TYPE_STAGGED) + DP_NOTICE(p_hwfn, "Incorrect UFP Channel type %d\n", val); + + val = (port_cfg & OEM_CFG_SCHED_TYPE_MASK) >> OEM_CFG_SCHED_TYPE_OFFSET; + if (val == OEM_CFG_SCHED_TYPE_ETS) { + p_hwfn->ufp_info.mode = QED_UFP_MODE_ETS; + } else if (val == OEM_CFG_SCHED_TYPE_VNIC_BW) { + p_hwfn->ufp_info.mode = QED_UFP_MODE_VNIC_BW; + } else { + p_hwfn->ufp_info.mode = QED_UFP_MODE_UNKNOWN; + DP_NOTICE(p_hwfn, "Unknown UFP scheduling mode %d\n", val); + } + + qed_mcp_get_shmem_func(p_hwfn, p_ptt, &shmem_info, MCP_PF_ID(p_hwfn)); + val = (port_cfg & OEM_CFG_FUNC_TC_MASK) >> OEM_CFG_FUNC_TC_OFFSET; + p_hwfn->ufp_info.tc = (u8)val; + val = (port_cfg & OEM_CFG_FUNC_HOST_PRI_CTRL_MASK) >> + OEM_CFG_FUNC_HOST_PRI_CTRL_OFFSET; + if (val == OEM_CFG_FUNC_HOST_PRI_CTRL_VNIC) { + p_hwfn->ufp_info.pri_type = QED_UFP_PRI_VNIC; + } else if (val == OEM_CFG_FUNC_HOST_PRI_CTRL_OS) { + p_hwfn->ufp_info.pri_type = QED_UFP_PRI_OS; + } else { + p_hwfn->ufp_info.pri_type = QED_UFP_PRI_UNKNOWN; + DP_NOTICE(p_hwfn, "Unknown Host priority control %d\n", val); + } + + DP_NOTICE(p_hwfn, + "UFP shmem config: mode = %d tc = %d pri_type = %d\n", + p_hwfn->ufp_info.mode, + p_hwfn->ufp_info.tc, p_hwfn->ufp_info.pri_type); +} + +static int +qed_mcp_handle_ufp_event(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) +{ + qed_mcp_read_ufp_config(p_hwfn, p_ptt); + + if (p_hwfn->ufp_info.mode == QED_UFP_MODE_VNIC_BW) { + p_hwfn->qm_info.ooo_tc = p_hwfn->ufp_info.tc; + p_hwfn->hw_info.offload_tc = p_hwfn->ufp_info.tc; + + qed_qm_reconf(p_hwfn, p_ptt); + } else if (p_hwfn->ufp_info.mode == QED_UFP_MODE_ETS) { + /* Merge UFP TC with the dcbx TC data */ + qed_dcbx_mib_update_event(p_hwfn, p_ptt, + QED_DCBX_OPERATIONAL_MIB); + } else { + DP_ERR(p_hwfn, "Invalid sched type, discard the UFP config\n"); + return -EINVAL; + } + + /* update storm FW with negotiation results */ + qed_sp_pf_update_ufp(p_hwfn); + + /* update stag pcp value */ + qed_sp_pf_update_stag(p_hwfn); + + return 0; +} + int qed_mcp_handle_events(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) { @@ -1529,6 +1604,9 @@ int qed_mcp_handle_events(struct qed_hwfn *p_hwfn, qed_dcbx_mib_update_event(p_hwfn, p_ptt, QED_DCBX_OPERATIONAL_MIB); break; + case MFW_DRV_MSG_OEM_CFG_UPDATE: + qed_mcp_handle_ufp_event(p_hwfn, p_ptt); + break; case MFW_DRV_MSG_TRANSCEIVER_STATE_CHANGE: qed_mcp_handle_transceiver_change(p_hwfn, p_ptt); break; diff --git a/drivers/net/ethernet/qlogic/qed/qed_mcp.h b/drivers/net/ethernet/qlogic/qed/qed_mcp.h index 3af3896..250579b 100644 --- a/drivers/net/ethernet/qlogic/qed/qed_mcp.h +++ b/drivers/net/ethernet/qlogic/qed/qed_mcp.h @@ -1005,6 +1005,14 @@ void qed_mcp_resc_lock_default_init(struct qed_resc_lock_params *p_lock, int qed_mcp_set_capabilities(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); /** + * @brief Read ufp config from the shared memory. + * + * @param p_hwfn + * @param p_ptt + */ +void qed_mcp_read_ufp_config(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); + +/** * @brief Populate the nvm info shadow in the given hardware function * * @param p_hwfn diff --git a/drivers/net/ethernet/qlogic/qed/qed_sp.h b/drivers/net/ethernet/qlogic/qed/qed_sp.h index 7680222..e95431f 100644 --- a/drivers/net/ethernet/qlogic/qed/qed_sp.h +++ b/drivers/net/ethernet/qlogic/qed/qed_sp.h @@ -462,6 +462,15 @@ int qed_sp_pf_start(struct qed_hwfn *p_hwfn, * @return int */ +/** + * @brief qed_sp_pf_update_ufp - PF ufp update Ramrod + * + * @param p_hwfn + * + * @return int + */ +int qed_sp_pf_update_ufp(struct qed_hwfn *p_hwfn); + int qed_sp_pf_stop(struct qed_hwfn *p_hwfn); int qed_sp_pf_update_tunn_cfg(struct qed_hwfn *p_hwfn, diff --git a/drivers/net/ethernet/qlogic/qed/qed_sp_commands.c b/drivers/net/ethernet/qlogic/qed/qed_sp_commands.c index 26bed26..8de644b4 100644 --- a/drivers/net/ethernet/qlogic/qed/qed_sp_commands.c +++ b/drivers/net/ethernet/qlogic/qed/qed_sp_commands.c @@ -314,7 +314,7 @@ int qed_sp_pf_start(struct qed_hwfn *p_hwfn, struct qed_spq_entry *p_ent = NULL; struct qed_sp_init_data init_data; int rc = -EINVAL; - u8 page_cnt; + u8 page_cnt, i; /* update initial eq producer */ qed_eq_prod_update(p_hwfn, @@ -345,12 +345,30 @@ int qed_sp_pf_start(struct qed_hwfn *p_hwfn, p_ramrod->mf_mode = MF_NPAR; p_ramrod->outer_tag_config.outer_tag.tci = - cpu_to_le16(p_hwfn->hw_info.ovlan); - if (test_bit(QED_MF_8021AD_TAGGING, &p_hwfn->cdev->mf_bits)) { + cpu_to_le16(p_hwfn->hw_info.ovlan); + if (test_bit(QED_MF_8021Q_TAGGING, &p_hwfn->cdev->mf_bits)) { + p_ramrod->outer_tag_config.outer_tag.tpid = ETH_P_8021Q; + } else if (test_bit(QED_MF_8021AD_TAGGING, &p_hwfn->cdev->mf_bits)) { p_ramrod->outer_tag_config.outer_tag.tpid = ETH_P_8021AD; p_ramrod->outer_tag_config.enable_stag_pri_change = 1; } + p_ramrod->outer_tag_config.pri_map_valid = 1; + for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) + p_ramrod->outer_tag_config.inner_to_outer_pri_map[i] = i; + + /* enable_stag_pri_change should be set if port is in BD mode or, + * UFP with Host Control mode. + */ + if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits)) { + if (p_hwfn->ufp_info.pri_type == QED_UFP_PRI_OS) + p_ramrod->outer_tag_config.enable_stag_pri_change = 1; + else + p_ramrod->outer_tag_config.enable_stag_pri_change = 0; + + p_ramrod->outer_tag_config.outer_tag.tci |= + cpu_to_le16(((u16)p_hwfn->ufp_info.tc << 13)); + } /* Place EQ address in RAMROD */ DMA_REGPAIR_LE(p_ramrod->event_ring_pbl_addr, @@ -431,6 +449,39 @@ int qed_sp_pf_update(struct qed_hwfn *p_hwfn) return qed_spq_post(p_hwfn, p_ent, NULL); } +int qed_sp_pf_update_ufp(struct qed_hwfn *p_hwfn) +{ + struct qed_spq_entry *p_ent = NULL; + struct qed_sp_init_data init_data; + int rc = -EOPNOTSUPP; + + if (p_hwfn->ufp_info.pri_type == QED_UFP_PRI_UNKNOWN) { + DP_INFO(p_hwfn, "Invalid priority type %d\n", + p_hwfn->ufp_info.pri_type); + return -EINVAL; + } + + /* Get SPQ entry */ + memset(&init_data, 0, sizeof(init_data)); + init_data.cid = qed_spq_get_cid(p_hwfn); + init_data.opaque_fid = p_hwfn->hw_info.opaque_fid; + init_data.comp_mode = QED_SPQ_MODE_CB; + + rc = qed_sp_init_request(p_hwfn, &p_ent, + COMMON_RAMROD_PF_UPDATE, PROTOCOLID_COMMON, + &init_data); + if (rc) + return rc; + + p_ent->ramrod.pf_update.update_enable_stag_pri_change = true; + if (p_hwfn->ufp_info.pri_type == QED_UFP_PRI_OS) + p_ent->ramrod.pf_update.enable_stag_pri_change = 1; + else + p_ent->ramrod.pf_update.enable_stag_pri_change = 0; + + return qed_spq_post(p_hwfn, p_ent, NULL); +} + /* Set pf update ramrod command params */ int qed_sp_pf_update_tunn_cfg(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, diff --git a/drivers/scsi/qedf/qedf_fip.c b/drivers/scsi/qedf/qedf_fip.c index 773558f..16d1a21 100644 --- a/drivers/scsi/qedf/qedf_fip.c +++ b/drivers/scsi/qedf/qedf_fip.c @@ -23,6 +23,7 @@ void qedf_fcoe_send_vlan_req(struct qedf_ctx *qedf) struct fip_vlan *vlan; #define MY_FIP_ALL_FCF_MACS ((__u8[6]) { 1, 0x10, 0x18, 1, 0, 2 }) static u8 my_fcoe_all_fcfs[ETH_ALEN] = MY_FIP_ALL_FCF_MACS; + unsigned long flags = 0; skb = dev_alloc_skb(sizeof(struct fip_vlan)); if (!skb) @@ -65,7 +66,9 @@ void qedf_fcoe_send_vlan_req(struct qedf_ctx *qedf) kfree_skb(skb); return; } - qed_ops->ll2->start_xmit(qedf->cdev, skb); + + set_bit(QED_LL2_XMIT_FLAGS_FIP_DISCOVERY, &flags); + qed_ops->ll2->start_xmit(qedf->cdev, skb, flags); } static void qedf_fcoe_process_vlan_resp(struct qedf_ctx *qedf, @@ -139,7 +142,7 @@ void qedf_fip_send(struct fcoe_ctlr *fip, struct sk_buff *skb) print_hex_dump(KERN_WARNING, "fip ", DUMP_PREFIX_OFFSET, 16, 1, skb->data, skb->len, false); - qed_ops->ll2->start_xmit(qedf->cdev, skb); + qed_ops->ll2->start_xmit(qedf->cdev, skb, 0); } /* Process incoming FIP frames. */ diff --git a/drivers/scsi/qedf/qedf_main.c b/drivers/scsi/qedf/qedf_main.c index 284ccb5..6c19015 100644 --- a/drivers/scsi/qedf/qedf_main.c +++ b/drivers/scsi/qedf/qedf_main.c @@ -994,7 +994,7 @@ static int qedf_xmit(struct fc_lport *lport, struct fc_frame *fp) if (qedf_dump_frames) print_hex_dump(KERN_WARNING, "fcoe: ", DUMP_PREFIX_OFFSET, 16, 1, skb->data, skb->len, false); - qed_ops->ll2->start_xmit(qedf->cdev, skb); + qed_ops->ll2->start_xmit(qedf->cdev, skb, 0); return 0; } diff --git a/drivers/scsi/qedi/qedi_iscsi.c b/drivers/scsi/qedi/qedi_iscsi.c index 7ec7f6e..ff21aa1 100644 --- a/drivers/scsi/qedi/qedi_iscsi.c +++ b/drivers/scsi/qedi/qedi_iscsi.c @@ -1150,7 +1150,7 @@ static int qedi_data_avail(struct qedi_ctx *qedi, u16 vlanid) if (vlanid) __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlanid); - rc = qedi_ops->ll2->start_xmit(cdev, skb); + rc = qedi_ops->ll2->start_xmit(cdev, skb, 0); if (rc) { QEDI_ERR(&qedi->dbg_ctx, "ll2 start_xmit returned %d\n", rc); diff --git a/include/linux/qed/qed_ll2_if.h b/include/linux/qed/qed_ll2_if.h index 266c1fb..5eb0229 100644 --- a/include/linux/qed/qed_ll2_if.h +++ b/include/linux/qed/qed_ll2_if.h @@ -202,6 +202,7 @@ struct qed_ll2_tx_pkt_info { bool enable_ip_cksum; bool enable_l4_cksum; bool calc_ip_len; + bool remove_stag; }; #define QED_LL2_UNUSED_HANDLE (0xff) @@ -220,6 +221,11 @@ struct qed_ll2_params { u8 ll2_mac_address[ETH_ALEN]; }; +enum qed_ll2_xmit_flags { + /* FIP discovery packet */ + QED_LL2_XMIT_FLAGS_FIP_DISCOVERY +}; + struct qed_ll2_ops { /** * @brief start - initializes ll2 @@ -245,10 +251,12 @@ struct qed_ll2_ops { * * @param cdev * @param skb + * @param xmit_flags - Transmit options defined by the enum qed_ll2_xmit_flags. * * @return 0 on success, otherwise error value. */ - int (*start_xmit)(struct qed_dev *cdev, struct sk_buff *skb); + int (*start_xmit)(struct qed_dev *cdev, struct sk_buff *skb, + unsigned long xmit_flags); /** * @brief register_cb_ops - protocol driver register the callback for Rx/Tx