From patchwork Thu Apr 26 15:13:09 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrice CHOTARD X-Patchwork-Id: 905144 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=st.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 40X10g5hSQz9ry1 for ; Fri, 27 Apr 2018 01:18:11 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 8634CC221B6; Thu, 26 Apr 2018 15:16:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 4D949C221A4; Thu, 26 Apr 2018 15:16:38 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 832D1C22196; Thu, 26 Apr 2018 15:14:42 +0000 (UTC) Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [62.209.51.94]) by lists.denx.de (Postfix) with ESMTPS id E71EBC2214E for ; Thu, 26 Apr 2018 15:14:34 +0000 (UTC) Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w3QF4xqE003071; Thu, 26 Apr 2018 17:13:43 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2hfu2ubsbn-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Thu, 26 Apr 2018 17:13:43 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 4D22F34; Thu, 26 Apr 2018 15:13:42 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag6node3.st.com [10.75.127.18]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 1BEEE4F9E; Thu, 26 Apr 2018 15:13:42 +0000 (GMT) Received: from localhost (10.75.127.47) by SFHDAG6NODE3.st.com (10.75.127.18) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Thu, 26 Apr 2018 17:13:41 +0200 From: Patrice Chotard To: Jaehoon Chung Date: Thu, 26 Apr 2018 17:13:09 +0200 Message-ID: <1524755592-2806-2-git-send-email-patrice.chotard@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1524755592-2806-1-git-send-email-patrice.chotard@st.com> References: <1524755592-2806-1-git-send-email-patrice.chotard@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.47] X-ClientProxiedBy: SFHDAG5NODE1.st.com (10.75.127.13) To SFHDAG6NODE3.st.com (10.75.127.18) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-04-26_06:, , signatures=0 Cc: u-boot@lists.denx.de, Jacob Chen Subject: [U-Boot] [RESEND][PATCH v1 1/4] power: regulator: stpmu1: Introduce stpmu1 driver X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Christophe Kerello Enable support for the regulator functions of the STPMU1X PMIC. The driver implements get/set api for the various BUCKS and LDOs supported by the PMIC device. This driver is controlled by a device tree node which includes voltage limits. Signed-off-by: Christophe Kerello Signed-off-by: Patrick Delaunay Signed-off-by: Patrice Chotard --- drivers/power/regulator/Kconfig | 9 + drivers/power/regulator/Makefile | 1 + drivers/power/regulator/stpmu1.c | 670 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 680 insertions(+) create mode 100644 drivers/power/regulator/stpmu1.c diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig index 5b4ac10462b4..822cff6608b8 100644 --- a/drivers/power/regulator/Kconfig +++ b/drivers/power/regulator/Kconfig @@ -204,3 +204,12 @@ config DM_REGULATOR_TPS65910 The TPS65910 PMIC provides 4 SMPSs and 8 LDOs. This driver supports all regulator types of the TPS65910 (BUCK, BOOST and LDO). It implements the get/set api for value and enable. + +config DM_REGULATOR_STPMU1 + bool "Enable driver for STPMU1 regulators" + depends on DM_REGULATOR && PMIC_STPMU1 + ---help--- + Enable support for the regulator functions of the STPMU1 PMIC. The + driver implements get/set api for the various BUCKS and LDOs supported + by the PMIC device. This driver is controlled by a device tree node + which includes voltage limits. diff --git a/drivers/power/regulator/Makefile b/drivers/power/regulator/Makefile index f7873ad27af1..d73a6e3577a9 100644 --- a/drivers/power/regulator/Makefile +++ b/drivers/power/regulator/Makefile @@ -23,3 +23,4 @@ obj-$(CONFIG_$(SPL_)DM_REGULATOR_PBIAS) += pbias_regulator.o obj-$(CONFIG_$(SPL_)DM_REGULATOR_LP873X) += lp873x_regulator.o obj-$(CONFIG_$(SPL_)DM_REGULATOR_LP87565) += lp87565_regulator.o obj-$(CONFIG_DM_REGULATOR_TPS65910) += tps65910_regulator.o +obj-$(CONFIG_$(SPL_)DM_REGULATOR_STPMU1) += stpmu1.o diff --git a/drivers/power/regulator/stpmu1.c b/drivers/power/regulator/stpmu1.c new file mode 100644 index 000000000000..377958387b86 --- /dev/null +++ b/drivers/power/regulator/stpmu1.c @@ -0,0 +1,670 @@ +/* + * Copyright (C) 2018, STMicroelectronics - All Rights Reserved + * Author: Christophe Kerello + * + * SPDX-License-Identifier: GPL-2.0+ BSD-3-Clause + */ + +#include +#include +#include +#include +#include +#include + +struct stpmu1_range { + int min_uv; + int min_sel; + int max_sel; + int step; +}; + +struct stpmu1_output_range { + const struct stpmu1_range *ranges; + int nbranges; +}; + +#define STPMU1_MODE(_id, _val, _name) { \ + .id = _id, \ + .register_value = _val, \ + .name = _name, \ +} + +#define STPMU1_RANGE(_min_uv, _min_sel, _max_sel, _step) { \ + .min_uv = _min_uv, \ + .min_sel = _min_sel, \ + .max_sel = _max_sel, \ + .step = _step, \ +} + +#define STPMU1_OUTPUT_RANGE(_ranges, _nbranges) { \ + .ranges = _ranges, \ + .nbranges = _nbranges, \ +} + +static int stpmu1_output_find_uv( + int sel, + const struct stpmu1_output_range *output_range) +{ + const struct stpmu1_range *range; + int i; + + for (i = 0, range = output_range->ranges; + i < output_range->nbranges; i++, range++) { + if (sel >= range->min_sel && sel <= range->max_sel) + return range->min_uv + + (sel - range->min_sel) * range->step; + } + + return -EINVAL; +} + +static int stpmu1_output_find_sel( + int uv, + const struct stpmu1_output_range *output_range) +{ + const struct stpmu1_range *range; + int i; + + for (i = 0, range = output_range->ranges; + i < output_range->nbranges; i++, range++) { + if (uv == range->min_uv && !range->step) + return range->min_sel; + + if (uv >= range->min_uv && + uv <= range->min_uv + + (range->max_sel - range->min_sel) * range->step) + return range->min_sel + + (uv - range->min_uv) / range->step; + } + + return -EINVAL; +} + +/* + * BUCK regulators + */ + +static const struct stpmu1_range buck1_ranges[] = { + STPMU1_RANGE(600000, 0, 30, 25000), + STPMU1_RANGE(1350000, 31, 63, 0), +}; + +static const struct stpmu1_range buck2_ranges[] = { + STPMU1_RANGE(1000000, 0, 17, 0), + STPMU1_RANGE(1050000, 18, 19, 0), + STPMU1_RANGE(1100000, 20, 21, 0), + STPMU1_RANGE(1150000, 22, 23, 0), + STPMU1_RANGE(1200000, 24, 25, 0), + STPMU1_RANGE(1250000, 26, 27, 0), + STPMU1_RANGE(1300000, 28, 29, 0), + STPMU1_RANGE(1350000, 30, 31, 0), + STPMU1_RANGE(1400000, 32, 33, 0), + STPMU1_RANGE(1450000, 34, 35, 0), + STPMU1_RANGE(1500000, 36, 63, 0), +}; + +static const struct stpmu1_range buck3_ranges[] = { + STPMU1_RANGE(1000000, 0, 19, 0), + STPMU1_RANGE(1100000, 20, 23, 0), + STPMU1_RANGE(1200000, 24, 27, 0), + STPMU1_RANGE(1300000, 28, 31, 0), + STPMU1_RANGE(1400000, 32, 35, 0), + STPMU1_RANGE(1500000, 36, 55, 100000), + STPMU1_RANGE(3400000, 56, 63, 0), +}; + +static const struct stpmu1_range buck4_ranges[] = { + STPMU1_RANGE(600000, 0, 27, 25000), + STPMU1_RANGE(1300000, 28, 29, 0), + STPMU1_RANGE(1350000, 30, 31, 0), + STPMU1_RANGE(1400000, 32, 33, 0), + STPMU1_RANGE(1450000, 34, 35, 0), + STPMU1_RANGE(1500000, 36, 60, 100000), + STPMU1_RANGE(3900000, 61, 63, 0), +}; + +/* BUCK: 1,2,3,4 - voltage ranges */ +static const struct stpmu1_output_range buck_voltage_range[] = { + STPMU1_OUTPUT_RANGE(buck1_ranges, ARRAY_SIZE(buck1_ranges)), + STPMU1_OUTPUT_RANGE(buck2_ranges, ARRAY_SIZE(buck2_ranges)), + STPMU1_OUTPUT_RANGE(buck3_ranges, ARRAY_SIZE(buck3_ranges)), + STPMU1_OUTPUT_RANGE(buck4_ranges, ARRAY_SIZE(buck4_ranges)), +}; + +/* BUCK modes */ +static const struct dm_regulator_mode buck_modes[] = { + STPMU1_MODE(STPMU1_BUCK_MODE_HP, STPMU1_BUCK_MODE_HP, "HP"), + STPMU1_MODE(STPMU1_BUCK_MODE_LP, STPMU1_BUCK_MODE_LP, "LP"), +}; + +static int stpmu1_buck_get_uv(struct udevice *dev, int buck) +{ + int sel; + + sel = pmic_reg_read(dev, STPMU1_BUCKX_CTRL_REG(buck)); + if (sel < 0) + return sel; + + sel &= STPMU1_BUCK_OUTPUT_MASK; + sel >>= STPMU1_BUCK_OUTPUT_SHIFT; + + return stpmu1_output_find_uv(sel, &buck_voltage_range[buck]); +} + +static int stpmu1_buck_get_value(struct udevice *dev) +{ + return stpmu1_buck_get_uv(dev->parent, dev->driver_data - 1); +} + +static int stpmu1_buck_set_value(struct udevice *dev, int uv) +{ + int sel, buck = dev->driver_data - 1; + + sel = stpmu1_output_find_sel(uv, &buck_voltage_range[buck]); + if (sel < 0) + return sel; + + return pmic_clrsetbits(dev->parent, + STPMU1_BUCKX_CTRL_REG(buck), + STPMU1_BUCK_OUTPUT_MASK, + sel << STPMU1_BUCK_OUTPUT_SHIFT); +} + +static int stpmu1_buck_get_enable(struct udevice *dev) +{ + int ret; + + ret = pmic_reg_read(dev->parent, + STPMU1_BUCKX_CTRL_REG(dev->driver_data - 1)); + if (ret < 0) + return false; + + return ret & STPMU1_BUCK_EN ? true : false; +} + +static int stpmu1_buck_set_enable(struct udevice *dev, bool enable) +{ + struct dm_regulator_uclass_platdata *uc_pdata; + int ret, uv; + + /* if regulator is already in the wanted state, nothing to do */ + if (stpmu1_buck_get_enable(dev) == enable) + return 0; + + if (enable) { + uc_pdata = dev_get_uclass_platdata(dev); + uv = stpmu1_buck_get_value(dev); + if ((uv < uc_pdata->min_uV) || (uv > uc_pdata->max_uV)) + stpmu1_buck_set_value(dev, uc_pdata->min_uV); + } + + ret = pmic_clrsetbits(dev->parent, + STPMU1_BUCKX_CTRL_REG(dev->driver_data - 1), + STPMU1_BUCK_EN, enable ? STPMU1_BUCK_EN : 0); + if (enable) + mdelay(STPMU1_DEFAULT_START_UP_DELAY_MS); + + return ret; +} + +static int stpmu1_buck_get_mode(struct udevice *dev) +{ + int ret; + + ret = pmic_reg_read(dev->parent, + STPMU1_BUCKX_CTRL_REG(dev->driver_data - 1)); + if (ret < 0) + return ret; + + return ret & STPMU1_BUCK_MODE ? STPMU1_BUCK_MODE_LP : + STPMU1_BUCK_MODE_HP; +} + +static int stpmu1_buck_set_mode(struct udevice *dev, int mode) +{ + return pmic_clrsetbits(dev->parent, + STPMU1_BUCKX_CTRL_REG(dev->driver_data - 1), + STPMU1_BUCK_MODE, + mode ? STPMU1_BUCK_MODE : 0); +} + +static int stpmu1_buck_probe(struct udevice *dev) +{ + struct dm_regulator_uclass_platdata *uc_pdata; + + if (!dev->driver_data || dev->driver_data > STPMU1_MAX_BUCK) + return -EINVAL; + + uc_pdata = dev_get_uclass_platdata(dev); + + uc_pdata->type = REGULATOR_TYPE_BUCK; + uc_pdata->mode = (struct dm_regulator_mode *)buck_modes; + uc_pdata->mode_count = ARRAY_SIZE(buck_modes); + + return 0; +} + +static const struct dm_regulator_ops stpmu1_buck_ops = { + .get_value = stpmu1_buck_get_value, + .set_value = stpmu1_buck_set_value, + .get_enable = stpmu1_buck_get_enable, + .set_enable = stpmu1_buck_set_enable, + .get_mode = stpmu1_buck_get_mode, + .set_mode = stpmu1_buck_set_mode, +}; + +U_BOOT_DRIVER(stpmu1_buck) = { + .name = "stpmu1_buck", + .id = UCLASS_REGULATOR, + .ops = &stpmu1_buck_ops, + .probe = stpmu1_buck_probe, +}; + +/* + * LDO regulators + */ + +static const struct stpmu1_range ldo12_ranges[] = { + STPMU1_RANGE(1700000, 0, 7, 0), + STPMU1_RANGE(1700000, 8, 24, 100000), + STPMU1_RANGE(3300000, 25, 31, 0), +}; + +static const struct stpmu1_range ldo3_ranges[] = { + STPMU1_RANGE(1700000, 0, 7, 0), + STPMU1_RANGE(1700000, 8, 24, 100000), + STPMU1_RANGE(3300000, 25, 30, 0), + /* Sel 31 is special case when LDO3 is in mode sync_source (BUCK2/2) */ +}; + +static const struct stpmu1_range ldo5_ranges[] = { + STPMU1_RANGE(1700000, 0, 7, 0), + STPMU1_RANGE(1700000, 8, 30, 100000), + STPMU1_RANGE(3900000, 31, 31, 0), +}; + +static const struct stpmu1_range ldo6_ranges[] = { + STPMU1_RANGE(900000, 0, 24, 100000), + STPMU1_RANGE(3300000, 25, 31, 0), +}; + +/* LDO: 1,2,3,4,5,6 - voltage ranges */ +static const struct stpmu1_output_range ldo_voltage_range[] = { + STPMU1_OUTPUT_RANGE(ldo12_ranges, ARRAY_SIZE(ldo12_ranges)), + STPMU1_OUTPUT_RANGE(ldo12_ranges, ARRAY_SIZE(ldo12_ranges)), + STPMU1_OUTPUT_RANGE(ldo3_ranges, ARRAY_SIZE(ldo3_ranges)), + STPMU1_OUTPUT_RANGE(NULL, 0), + STPMU1_OUTPUT_RANGE(ldo5_ranges, ARRAY_SIZE(ldo5_ranges)), + STPMU1_OUTPUT_RANGE(ldo6_ranges, ARRAY_SIZE(ldo6_ranges)), +}; + +/* LDO modes */ +static const struct dm_regulator_mode ldo_modes[] = { + STPMU1_MODE(STPMU1_LDO_MODE_NORMAL, + STPMU1_LDO_MODE_NORMAL, "NORMAL"), + STPMU1_MODE(STPMU1_LDO_MODE_BYPASS, + STPMU1_LDO_MODE_BYPASS, "BYPASS"), + STPMU1_MODE(STPMU1_LDO_MODE_SINK_SOURCE, + STPMU1_LDO_MODE_SINK_SOURCE, "SINK SOURCE"), +}; + +static int stpmu1_ldo_get_value(struct udevice *dev) +{ + int sel, ldo = dev->driver_data - 1; + + sel = pmic_reg_read(dev->parent, STPMU1_LDOX_CTRL_REG(ldo)); + if (sel < 0) + return sel; + + /* ldo4 => 3,3V */ + if (ldo == STPMU1_LDO4) + return STPMU1_LDO4_UV; + + sel &= STPMU1_LDO12356_OUTPUT_MASK; + sel >>= STPMU1_LDO12356_OUTPUT_SHIFT; + + /* ldo3, sel = 31 => BUCK2/2 */ + if (ldo == STPMU1_LDO3 && sel == STPMU1_LDO3_DDR_SEL) + return stpmu1_buck_get_uv(dev->parent, STPMU1_BUCK2) / 2; + + return stpmu1_output_find_uv(sel, &ldo_voltage_range[ldo]); +} + +static int stpmu1_ldo_set_value(struct udevice *dev, int uv) +{ + int sel, ldo = dev->driver_data - 1; + + /* ldo4 => not possible */ + if (ldo == STPMU1_LDO4) + return -EINVAL; + + sel = stpmu1_output_find_sel(uv, &ldo_voltage_range[ldo]); + if (sel < 0) + return sel; + + return pmic_clrsetbits(dev->parent, + STPMU1_LDOX_CTRL_REG(ldo), + STPMU1_LDO12356_OUTPUT_MASK, + sel << STPMU1_LDO12356_OUTPUT_SHIFT); +} + +static int stpmu1_ldo_get_enable(struct udevice *dev) +{ + int ret; + + ret = pmic_reg_read(dev->parent, + STPMU1_LDOX_CTRL_REG(dev->driver_data - 1)); + if (ret < 0) + return false; + + return ret & STPMU1_LDO_EN ? true : false; +} + +static int stpmu1_ldo_set_enable(struct udevice *dev, bool enable) +{ + struct dm_regulator_uclass_platdata *uc_pdata; + int ret, uv; + + /* if regulator is already in the wanted state, nothing to do */ + if (stpmu1_ldo_get_enable(dev) == enable) + return 0; + + if (enable) { + uc_pdata = dev_get_uclass_platdata(dev); + uv = stpmu1_ldo_get_value(dev); + if ((uv < uc_pdata->min_uV) || (uv > uc_pdata->max_uV)) + stpmu1_ldo_set_value(dev, uc_pdata->min_uV); + } + + ret = pmic_clrsetbits(dev->parent, + STPMU1_LDOX_CTRL_REG(dev->driver_data - 1), + STPMU1_LDO_EN, enable ? STPMU1_LDO_EN : 0); + if (enable) + mdelay(STPMU1_DEFAULT_START_UP_DELAY_MS); + + return ret; +} + +static int stpmu1_ldo_get_mode(struct udevice *dev) +{ + int ret, ldo = dev->driver_data - 1; + + if (ldo != STPMU1_LDO3) + return -EINVAL; + + ret = pmic_reg_read(dev->parent, STPMU1_LDOX_CTRL_REG(ldo)); + if (ret < 0) + return ret; + + if (ret & STPMU1_LDO3_MODE) + return STPMU1_LDO_MODE_BYPASS; + + ret &= STPMU1_LDO12356_OUTPUT_MASK; + ret >>= STPMU1_LDO12356_OUTPUT_SHIFT; + + return ret == STPMU1_LDO3_DDR_SEL ? STPMU1_LDO_MODE_SINK_SOURCE : + STPMU1_LDO_MODE_NORMAL; +} + +static int stpmu1_ldo_set_mode(struct udevice *dev, int mode) +{ + int ret, ldo = dev->driver_data - 1; + + if (ldo != STPMU1_LDO3) + return -EINVAL; + + ret = pmic_reg_read(dev->parent, STPMU1_LDOX_CTRL_REG(ldo)); + if (ret < 0) + return ret; + + switch (mode) { + case STPMU1_LDO_MODE_SINK_SOURCE: + ret &= ~STPMU1_LDO12356_OUTPUT_MASK; + ret |= STPMU1_LDO3_DDR_SEL << STPMU1_LDO12356_OUTPUT_SHIFT; + case STPMU1_LDO_MODE_NORMAL: + ret &= ~STPMU1_LDO3_MODE; + break; + case STPMU1_LDO_MODE_BYPASS: + ret |= STPMU1_LDO3_MODE; + break; + } + + return pmic_reg_write(dev->parent, STPMU1_LDOX_CTRL_REG(ldo), ret); +} + +static int stpmu1_ldo_probe(struct udevice *dev) +{ + struct dm_regulator_uclass_platdata *uc_pdata; + + if (!dev->driver_data || dev->driver_data > STPMU1_MAX_LDO) + return -EINVAL; + + uc_pdata = dev_get_uclass_platdata(dev); + + uc_pdata->type = REGULATOR_TYPE_LDO; + if (dev->driver_data - 1 == STPMU1_LDO3) { + uc_pdata->mode = (struct dm_regulator_mode *)ldo_modes; + uc_pdata->mode_count = ARRAY_SIZE(ldo_modes); + } else { + uc_pdata->mode_count = 0; + } + + return 0; +} + +static const struct dm_regulator_ops stpmu1_ldo_ops = { + .get_value = stpmu1_ldo_get_value, + .set_value = stpmu1_ldo_set_value, + .get_enable = stpmu1_ldo_get_enable, + .set_enable = stpmu1_ldo_set_enable, + .get_mode = stpmu1_ldo_get_mode, + .set_mode = stpmu1_ldo_set_mode, +}; + +U_BOOT_DRIVER(stpmu1_ldo) = { + .name = "stpmu1_ldo", + .id = UCLASS_REGULATOR, + .ops = &stpmu1_ldo_ops, + .probe = stpmu1_ldo_probe, +}; + +/* + * VREF DDR regulator + */ + +static int stpmu1_vref_ddr_get_value(struct udevice *dev) +{ + /* BUCK2/2 */ + return stpmu1_buck_get_uv(dev->parent, STPMU1_BUCK2) / 2; +} + +static int stpmu1_vref_ddr_get_enable(struct udevice *dev) +{ + int ret; + + ret = pmic_reg_read(dev->parent, STPMU1_VREF_CTRL_REG); + if (ret < 0) + return false; + + return ret & STPMU1_VREF_EN ? true : false; +} + +static int stpmu1_vref_ddr_set_enable(struct udevice *dev, bool enable) +{ + int ret; + + /* if regulator is already in the wanted state, nothing to do */ + if (stpmu1_vref_ddr_get_enable(dev) == enable) + return 0; + + ret = pmic_clrsetbits(dev->parent, STPMU1_VREF_CTRL_REG, + STPMU1_VREF_EN, enable ? STPMU1_VREF_EN : 0); + if (enable) + mdelay(STPMU1_DEFAULT_START_UP_DELAY_MS); + + return ret; +} + +static int stpmu1_vref_ddr_probe(struct udevice *dev) +{ + struct dm_regulator_uclass_platdata *uc_pdata; + + uc_pdata = dev_get_uclass_platdata(dev); + + uc_pdata->type = REGULATOR_TYPE_FIXED; + uc_pdata->mode_count = 0; + + return 0; +} + +static const struct dm_regulator_ops stpmu1_vref_ddr_ops = { + .get_value = stpmu1_vref_ddr_get_value, + .get_enable = stpmu1_vref_ddr_get_enable, + .set_enable = stpmu1_vref_ddr_set_enable, +}; + +U_BOOT_DRIVER(stpmu1_vref_ddr) = { + .name = "stpmu1_vref_ddr", + .id = UCLASS_REGULATOR, + .ops = &stpmu1_vref_ddr_ops, + .probe = stpmu1_vref_ddr_probe, +}; + +/* + * BOOST regulator + */ + +static int stpmu1_boost_get_enable(struct udevice *dev) +{ + int ret; + + ret = pmic_reg_read(dev->parent, STPMU1_USB_CTRL_REG); + if (ret < 0) + return false; + + return ret & STPMU1_USB_BOOST_EN ? true : false; +} + +static int stpmu1_boost_set_enable(struct udevice *dev, bool enable) +{ + int ret; + + ret = pmic_reg_read(dev->parent, STPMU1_USB_CTRL_REG); + if (ret < 0) + return ret; + + if (!enable && ret & STPMU1_USB_PWR_SW_EN) + return -EINVAL; + + /* if regulator is already in the wanted state, nothing to do */ + if (!!(ret & STPMU1_USB_BOOST_EN) == enable) + return 0; + + ret = pmic_clrsetbits(dev->parent, STPMU1_USB_CTRL_REG, + STPMU1_USB_BOOST_EN, + enable ? STPMU1_USB_BOOST_EN : 0); + if (enable) + mdelay(STPMU1_USB_BOOST_START_UP_DELAY_MS); + + return ret; +} + +static int stpmu1_boost_probe(struct udevice *dev) +{ + struct dm_regulator_uclass_platdata *uc_pdata; + + uc_pdata = dev_get_uclass_platdata(dev); + + uc_pdata->type = REGULATOR_TYPE_FIXED; + uc_pdata->mode_count = 0; + + return 0; +} + +static const struct dm_regulator_ops stpmu1_boost_ops = { + .get_enable = stpmu1_boost_get_enable, + .set_enable = stpmu1_boost_set_enable, +}; + +U_BOOT_DRIVER(stpmu1_boost) = { + .name = "stpmu1_boost", + .id = UCLASS_REGULATOR, + .ops = &stpmu1_boost_ops, + .probe = stpmu1_boost_probe, +}; + +/* + * USB power switch + */ + +static int stpmu1_pwr_sw_get_enable(struct udevice *dev) +{ + uint mask = 1 << dev->driver_data; + int ret; + + ret = pmic_reg_read(dev->parent, STPMU1_USB_CTRL_REG); + if (ret < 0) + return false; + + return ret & mask ? true : false; +} + +static int stpmu1_pwr_sw_set_enable(struct udevice *dev, bool enable) +{ + uint mask = 1 << dev->driver_data; + int ret; + + ret = pmic_reg_read(dev->parent, STPMU1_USB_CTRL_REG); + if (ret < 0) + return ret; + + /* if regulator is already in the wanted state, nothing to do */ + if (!!(ret & mask) == enable) + return 0; + + /* Boost management */ + if (enable && !(ret & STPMU1_USB_BOOST_EN)) { + pmic_clrsetbits(dev->parent, STPMU1_USB_CTRL_REG, + STPMU1_USB_BOOST_EN, STPMU1_USB_BOOST_EN); + mdelay(STPMU1_USB_BOOST_START_UP_DELAY_MS); + } else if (!enable && ret & STPMU1_USB_BOOST_EN && + (ret & STPMU1_USB_PWR_SW_EN) != STPMU1_USB_PWR_SW_EN) { + pmic_clrsetbits(dev->parent, STPMU1_USB_CTRL_REG, + STPMU1_USB_BOOST_EN, 0); + } + + ret = pmic_clrsetbits(dev->parent, STPMU1_USB_CTRL_REG, + mask, enable ? mask : 0); + if (enable) + mdelay(STPMU1_DEFAULT_START_UP_DELAY_MS); + + return ret; +} + +static int stpmu1_pwr_sw_probe(struct udevice *dev) +{ + struct dm_regulator_uclass_platdata *uc_pdata; + + if (!dev->driver_data || dev->driver_data > STPMU1_MAX_PWR_SW) + return -EINVAL; + + uc_pdata = dev_get_uclass_platdata(dev); + + uc_pdata->type = REGULATOR_TYPE_FIXED; + uc_pdata->mode_count = 0; + + return 0; +} + +static const struct dm_regulator_ops stpmu1_pwr_sw_ops = { + .get_enable = stpmu1_pwr_sw_get_enable, + .set_enable = stpmu1_pwr_sw_set_enable, +}; + +U_BOOT_DRIVER(stpmu1_pwr_sw) = { + .name = "stpmu1_pwr_sw", + .id = UCLASS_REGULATOR, + .ops = &stpmu1_pwr_sw_ops, + .probe = stpmu1_pwr_sw_probe, +}; From patchwork Thu Apr 26 15:13:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrice CHOTARD X-Patchwork-Id: 905140 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=st.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 40X0xB1Bn7z9ry1 for ; Fri, 27 Apr 2018 01:15:10 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id D934DC2217E; Thu, 26 Apr 2018 15:14:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id AC4F2C22190; Thu, 26 Apr 2018 15:13:59 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 847A2C22145; Thu, 26 Apr 2018 15:13:44 +0000 (UTC) Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [62.209.51.94]) by lists.denx.de (Postfix) with ESMTPS id 2351EC2217B for ; Thu, 26 Apr 2018 15:13:44 +0000 (UTC) Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w3QF4tXB003050; Thu, 26 Apr 2018 17:13:43 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2hfu2ubsbr-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Thu, 26 Apr 2018 17:13:43 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id E67D73D; Thu, 26 Apr 2018 15:13:42 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag6node3.st.com [10.75.127.18]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id D66F44F9B; Thu, 26 Apr 2018 15:13:42 +0000 (GMT) Received: from localhost (10.75.127.44) by SFHDAG6NODE3.st.com (10.75.127.18) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Thu, 26 Apr 2018 17:13:42 +0200 From: Patrice Chotard To: Jaehoon Chung Date: Thu, 26 Apr 2018 17:13:10 +0200 Message-ID: <1524755592-2806-3-git-send-email-patrice.chotard@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1524755592-2806-1-git-send-email-patrice.chotard@st.com> References: <1524755592-2806-1-git-send-email-patrice.chotard@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.44] X-ClientProxiedBy: SFHDAG1NODE1.st.com (10.75.127.1) To SFHDAG6NODE3.st.com (10.75.127.18) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-04-26_06:, , signatures=0 Cc: u-boot@lists.denx.de Subject: [U-Boot] [RESEND][PATCH v1 2/4] power: pmic: stpmu1: Add regulator bindings X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add regulator bindings to get access to regulator managed by drivers/power/regulator/stpmu1.c regulator driver. Signed-off-by: Christophe Kerello Signed-off-by: Patrick Delaunay Signed-off-by: Patrice Chotard --- drivers/power/pmic/stpmu1.c | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/drivers/power/pmic/stpmu1.c b/drivers/power/pmic/stpmu1.c index 4615365ea809..4a230ec163ae 100644 --- a/drivers/power/pmic/stpmu1.c +++ b/drivers/power/pmic/stpmu1.c @@ -13,6 +13,17 @@ #define STMPU1_NUM_OF_REGS 0x100 +#ifndef CONFIG_SPL_BUILD +static const struct pmic_child_info stpmu1_children_info[] = { + { .prefix = "ldo", .driver = "stpmu1_ldo" }, + { .prefix = "buck", .driver = "stpmu1_buck" }, + { .prefix = "vref_ddr", .driver = "stpmu1_vref_ddr" }, + { .prefix = "pwr_sw", .driver = "stpmu1_pwr_sw" }, + { .prefix = "boost", .driver = "stpmu1_boost" }, + { }, +}; +#endif /* CONFIG_SPL_BUILD */ + static int stpmu1_reg_count(struct udevice *dev) { return STMPU1_NUM_OF_REGS; @@ -43,6 +54,28 @@ static int stpmu1_read(struct udevice *dev, uint reg, uint8_t *buff, int len) return ret; } +static int stpmu1_bind(struct udevice *dev) +{ +#ifndef CONFIG_SPL_BUILD + ofnode regulators_node; + int children; + + regulators_node = dev_read_subnode(dev, "regulators"); + if (!ofnode_valid(regulators_node)) { + dev_dbg(dev, "regulators subnode not found!"); + return -ENXIO; + } + dev_dbg(dev, "found regulators subnode\n"); + + children = pmic_bind_children(dev, regulators_node, + stpmu1_children_info); + if (!children) + dev_dbg(dev, "no child found\n"); +#endif /* CONFIG_SPL_BUILD */ + + return 0; +} + static struct dm_pmic_ops stpmu1_ops = { .reg_count = stpmu1_reg_count, .read = stpmu1_read, @@ -58,5 +91,6 @@ U_BOOT_DRIVER(pmic_stpmu1) = { .name = "stpmu1_pmic", .id = UCLASS_PMIC, .of_match = stpmu1_ids, + .bind = stpmu1_bind, .ops = &stpmu1_ops, }; From patchwork Thu Apr 26 15:13:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrice CHOTARD X-Patchwork-Id: 905141 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=st.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 40X0xf4vVSz9ry1 for ; Fri, 27 Apr 2018 01:15:34 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 5347DC22183; Thu, 26 Apr 2018 15:14:21 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 3EEC8C221A4; Thu, 26 Apr 2018 15:14:03 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 01861C22183; Thu, 26 Apr 2018 15:13:45 +0000 (UTC) Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [62.209.51.94]) by lists.denx.de (Postfix) with ESMTPS id 28E76C2214E for ; Thu, 26 Apr 2018 15:13:45 +0000 (UTC) Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w3QF54Is017535; Thu, 26 Apr 2018 17:13:44 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2hj2m24260-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Thu, 26 Apr 2018 17:13:44 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id D17E931; Thu, 26 Apr 2018 15:13:43 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag6node3.st.com [10.75.127.18]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id B21B14F9B; Thu, 26 Apr 2018 15:13:43 +0000 (GMT) Received: from localhost (10.75.127.46) by SFHDAG6NODE3.st.com (10.75.127.18) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Thu, 26 Apr 2018 17:13:43 +0200 From: Patrice Chotard To: Jaehoon Chung Date: Thu, 26 Apr 2018 17:13:11 +0200 Message-ID: <1524755592-2806-4-git-send-email-patrice.chotard@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1524755592-2806-1-git-send-email-patrice.chotard@st.com> References: <1524755592-2806-1-git-send-email-patrice.chotard@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.46] X-ClientProxiedBy: SFHDAG7NODE3.st.com (10.75.127.21) To SFHDAG6NODE3.st.com (10.75.127.18) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-04-26_06:, , signatures=0 Cc: u-boot@lists.denx.de Subject: [U-Boot] [RESEND][PATCH v1 3/4] ARM: dts: stm32mp157c-ed1: Add regulator node X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add regulator nodes needed by stpmu1 regulator driver Add vmmc-supply and vqmmc-supply regulator property for sdmmc1 and sdmmc2. Signed-off-by: Christophe Kerello Signed-off-by: Patrice Chotard --- arch/arm/dts/stm32mp157c-ed1.dts | 272 ++++++++++++++++++++++++++++++++++++ include/dt-bindings/mfd/st,stpmu1.h | 60 ++++++++ 2 files changed, 332 insertions(+) create mode 100644 include/dt-bindings/mfd/st,stpmu1.h diff --git a/arch/arm/dts/stm32mp157c-ed1.dts b/arch/arm/dts/stm32mp157c-ed1.dts index 4b20fabb717a..76e384775252 100644 --- a/arch/arm/dts/stm32mp157c-ed1.dts +++ b/arch/arm/dts/stm32mp157c-ed1.dts @@ -10,6 +10,7 @@ #include #include #include +#include / { model = "STMicroelectronics STM32MP157C pmic eval daughter"; @@ -23,6 +24,19 @@ memory { reg = <0xC0000000 0x40000000>; }; + + sd_switch: regulator-sd_switch { + compatible = "regulator-gpio"; + regulator-name = "sd_switch"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2900000>; + regulator-type = "voltage"; + regulator-always-on; + + gpios = <&gpiof 14 GPIO_ACTIVE_HIGH>; + gpios-states = <0>; + states = <1800000 0x1 2900000 0x0>; + }; }; &gpioa { @@ -141,6 +155,262 @@ interrupt-controller; #interrupt-cells = <2>; status = "okay"; + + st,main_control_register = <0x04>; + st,vin_control_register = <0xc0>; + st,usb_control_register = <0x30>; + + regulators { + compatible = "st,stpmu1-regulators"; + + ldo1-supply = <&v3v3>; + ldo2-supply = <&v3v3>; + ldo3-supply = <&vdd_ddr>; + ldo5-supply = <&v3v3>; + ldo6-supply = <&v3v3>; + pwr_sw1-supply = <&bst_out>; + pwr_sw2-supply = <&bst_out>; + + vddcore: buck1 { + regulator-name = "vddcore"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-initial-mode = <2>; + regulator-over-current-protection; + + regulator-state-standby { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1200000>; + regulator-mode = <8>; + }; + regulator-state-mem { + regulator-off-in-suspend; + }; + regulator-state-disk { + regulator-off-in-suspend; + }; + }; + + vdd_ddr: buck2 { + regulator-name = "vdd_ddr"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-initial-mode = <2>; + regulator-over-current-protection; + + regulator-state-standby { + regulator-suspend-microvolt = <1350000>; + regulator-on-in-suspend; + regulator-mode = <8>; + }; + regulator-state-mem { + regulator-suspend-microvolt = <1350000>; + regulator-on-in-suspend; + regulator-mode = <8>; + }; + regulator-state-disk { + regulator-off-in-suspend; + }; + }; + + vdd: buck3 { + regulator-name = "vdd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + st,mask_reset; + regulator-initial-mode = <8>; + regulator-over-current-protection; + + regulator-state-standby { + regulator-suspend-microvolt = <3300000>; + regulator-on-in-suspend; + regulator-mode = <8>; + }; + regulator-state-mem { + regulator-suspend-microvolt = <3300000>; + regulator-on-in-suspend; + regulator-mode = <8>; + }; + regulator-state-disk { + regulator-suspend-microvolt = <3300000>; + regulator-on-in-suspend; + regulator-mode = <8>; + }; + }; + + v3v3: buck4 { + regulator-name = "v3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-over-current-protection; + regulator-initial-mode = <8>; + + regulator-state-standby { + regulator-suspend-microvolt = <3300000>; + regulator-unchanged-in-suspend; + regulator-mode = <8>; + }; + regulator-state-mem { + regulator-off-in-suspend; + }; + regulator-state-disk { + regulator-off-in-suspend; + }; + }; + + vdda: ldo1 { + regulator-name = "vdda"; + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <2900000>; + interrupts = ; + interrupt-parent = <&pmic>; + + regulator-state-standby { + regulator-suspend-microvolt = <2900000>; + regulator-unchanged-in-suspend; + }; + regulator-state-mem { + regulator-off-in-suspend; + }; + regulator-state-disk { + regulator-off-in-suspend; + }; + }; + + v2v8: ldo2 { + regulator-name = "v2v8"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + interrupts = ; + interrupt-parent = <&pmic>; + + regulator-state-standby { + regulator-suspend-microvolt = <2800000>; + regulator-unchanged-in-suspend; + }; + regulator-state-mem { + regulator-off-in-suspend; + }; + regulator-state-disk { + regulator-off-in-suspend; + }; + }; + + vtt_ddr: ldo3 { + regulator-name = "vtt_ddr"; + regulator-min-microvolt = <0000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-over-current-protection; + + regulator-state-standby { + regulator-off-in-suspend; + }; + regulator-state-mem { + regulator-off-in-suspend; + }; + regulator-state-disk { + regulator-off-in-suspend; + }; + }; + + vdd_usb: ldo4 { + regulator-name = "vdd_usb"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + interrupts = ; + interrupt-parent = <&pmic>; + + regulator-state-standby { + regulator-unchanged-in-suspend; + }; + regulator-state-mem { + regulator-off-in-suspend; + }; + regulator-state-disk { + regulator-off-in-suspend; + }; + }; + + vdd_sd: ldo5 { + regulator-name = "vdd_sd"; + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <2900000>; + interrupts = ; + interrupt-parent = <&pmic>; + regulator-boot-on; + + regulator-state-standby { + regulator-suspend-microvolt = <2900000>; + regulator-unchanged-in-suspend; + }; + regulator-state-mem { + regulator-off-in-suspend; + }; + regulator-state-disk { + regulator-off-in-suspend; + }; + }; + + v1v8: ldo6 { + regulator-name = "v1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + interrupts = ; + interrupt-parent = <&pmic>; + + regulator-state-standby { + regulator-suspend-microvolt = <1800000>; + regulator-unchanged-in-suspend; + }; + regulator-state-mem { + regulator-off-in-suspend; + }; + regulator-state-disk { + regulator-off-in-suspend; + }; + }; + + vref_ddr: vref_ddr { + regulator-name = "vref_ddr"; + regulator-always-on; + regulator-over-current-protection; + + regulator-state-standby { + regulator-on-in-suspend; + }; + regulator-state-mem { + regulator-on-in-suspend; + }; + regulator-state-disk { + regulator-off-in-suspend; + }; + }; + + bst_out: boost { + regulator-name = "bst_out"; + interrupts = ; + interrupt-parent = <&pmic>; + }; + + vbus_otg: pwr_sw1 { + regulator-name = "vbus_otg"; + interrupts = ; + interrupt-parent = <&pmic>; + regulator-active-discharge; + }; + + vbus_sw: pwr_sw2 { + regulator-name = "vbus_sw"; + interrupts = ; + interrupt-parent = <&pmic>; + regulator-active-discharge; + }; + }; }; }; @@ -152,6 +422,8 @@ st,negedge; st,pin-ckin; bus-width = <4>; + vmmc-supply = <&vdd_sd>; + vqmmc-supply = <&sd_switch>; sd-uhs-sdr12; sd-uhs-sdr25; sd-uhs-sdr50; diff --git a/include/dt-bindings/mfd/st,stpmu1.h b/include/dt-bindings/mfd/st,stpmu1.h new file mode 100644 index 000000000000..81982ebe2c25 --- /dev/null +++ b/include/dt-bindings/mfd/st,stpmu1.h @@ -0,0 +1,60 @@ +/* + * This file is part of stpmu1 pmic driver + * + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved + * Author: Pascal Paillet for STMicroelectronics. + * + * License type: GPLv2 + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + * or FITNESS FOR A PARTICULAR PURPOSE. + * See the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see . + */ + +#ifndef __DT_BINDINGS_STPMU1_H__ +#define __DT_BINDINGS_STPMU1_H__ + +/* IRQ definitions */ +#define IT_PONKEY_F 0 +#define IT_PONKEY_R 1 +#define IT_WAKEUP_F 2 +#define IT_WAKEUP_R 3 +#define IT_VBUS_OTG_F 4 +#define IT_VBUS_OTG_R 5 +#define IT_SWOUT_F 6 +#define IT_SWOUT_R 7 + +#define IT_CURLIM_BUCK1 8 +#define IT_CURLIM_BUCK2 9 +#define IT_CURLIM_BUCK3 10 +#define IT_CURLIM_BUCK4 11 +#define IT_OCP_OTG 12 +#define IT_OCP_SWOUT 13 +#define IT_OCP_BOOST 14 +#define IT_OVP_BOOST 15 + +#define IT_CURLIM_LDO1 16 +#define IT_CURLIM_LDO2 17 +#define IT_CURLIM_LDO3 18 +#define IT_CURLIM_LDO4 19 +#define IT_CURLIM_LDO5 20 +#define IT_CURLIM_LDO6 21 +#define IT_SHORT_SWOTG 22 +#define IT_SHORT_SWOUT 23 + +#define IT_TWARN_F 24 +#define IT_TWARN_R 25 +#define IT_VINLOW_F 26 +#define IT_VINLOW_R 27 +#define IT_SWIN_F 30 +#define IT_SWIN_R 31 + +#endif /* __DT_BINDINGS_STPMU1_H__ */ From patchwork Thu Apr 26 15:13:12 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrice CHOTARD X-Patchwork-Id: 905142 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=st.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 40X0yL1FCLz9ryr for ; Fri, 27 Apr 2018 01:16:09 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 4E304C2217C; Thu, 26 Apr 2018 15:14:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 4E97CC2217E; Thu, 26 Apr 2018 15:14:15 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 1BAD1C2216D; Thu, 26 Apr 2018 15:13:45 +0000 (UTC) Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [62.209.51.94]) by lists.denx.de (Postfix) with ESMTPS id 8E3D4C22127 for ; Thu, 26 Apr 2018 15:13:45 +0000 (UTC) Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w3QF4sm4003041; Thu, 26 Apr 2018 17:13:45 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2hfu2ubsbv-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Thu, 26 Apr 2018 17:13:45 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id A9A803F; Thu, 26 Apr 2018 15:13:44 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag6node3.st.com [10.75.127.18]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 997C84F9D; Thu, 26 Apr 2018 15:13:44 +0000 (GMT) Received: from localhost (10.75.127.44) by SFHDAG6NODE3.st.com (10.75.127.18) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Thu, 26 Apr 2018 17:13:44 +0200 From: Patrice Chotard To: Jaehoon Chung Date: Thu, 26 Apr 2018 17:13:12 +0200 Message-ID: <1524755592-2806-5-git-send-email-patrice.chotard@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1524755592-2806-1-git-send-email-patrice.chotard@st.com> References: <1524755592-2806-1-git-send-email-patrice.chotard@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.44] X-ClientProxiedBy: SFHDAG2NODE2.st.com (10.75.127.5) To SFHDAG6NODE3.st.com (10.75.127.18) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-04-26_06:, , signatures=0 Cc: u-boot@lists.denx.de Subject: [U-Boot] [RESEND][PATCH v1 4/4] configs: stm32mp15_basic: Set regulator relative flags X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Enable DM_REGULATOR_STPMU1 flag to activate regulator driver for STM32MP15 SoC and CMD_REGULATOR flag to be able to set/get regulator state int U-boot command line. Disable PMIC_CHILDREN as this flag is not needed in SPL for STM32MP1. Signed-off-by: Patrice Chotard --- configs/stm32mp15_basic_defconfig | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 4ab1d4c8b12c..b5a75563fc38 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -22,6 +22,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT4_WRITE=y # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_ISO_PARTITION is not set @@ -31,6 +32,10 @@ CONFIG_DM_MMC=y CONFIG_STM32_SDMMC2=y # CONFIG_SPL_PINCTRL_FULL is not set CONFIG_DM_PMIC=y +# CONFIG_SPL_PMIC_CHILDREN is not set CONFIG_PMIC_STPMU1=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_REGULATOR_STPMU1=y CONFIG_STM32_SERIAL=y # CONFIG_EFI_LOADER is not set