From patchwork Wed Apr 25 20:41:47 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andreas Tobler X-Patchwork-Id: 904748 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-476823-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=fgznet.ch Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="fSJ96Eiv"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 40WXDq5P5Nz9ryk for ; Thu, 26 Apr 2018 06:42:02 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to :from:subject:message-id:date:mime-version:content-type; q=dns; s=default; b=xyDKdaWBRzWEREygzLU/mVVzjuJmn/0nr12uy4dWM8vXcnJ1k7 0guNtHwovkcqxvQBAPtb2fn/gGgQJYD+HKh3WOiyB1mDAuhs1XQN2NG0WHbmxGrJ Mo/fMkoYzpjxM9R8hhjkMa2cio/AC93nxUtrlgdtZPI154/zjwsvmNHAs= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to :from:subject:message-id:date:mime-version:content-type; s= default; bh=siQCA4nlaCW+A9ApOIdVgwx2EzU=; b=fSJ96EivcbxBvp92WrBy 3LB278cTsEvk6Fjuwx+qs5Sn6hwuz7muNI0F9S3YHCcqnH97wlqXqQPSMpzkIv1/ 1a9EEUiCMkqqu86kvBmD3OGBpp6CTru+Dry+Eixdn1e3tLn/uuYU1wNEt+Se/Xf/ oFSNBZX+p2tDYFFxXnEUurQ= Received: (qmail 89391 invoked by alias); 25 Apr 2018 20:41:55 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 86520 invoked by uid 89); 25 Apr 2018 20:41:53 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-11.3 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_2, GIT_PATCH_3, KAM_NUMSUBJECT, SPF_PASS autolearn=ham version=3.3.2 spammy=H*F:D*ch, D*eu, tear X-HELO: smtp.fgznet.ch Received: from smtp.fgznet.ch (HELO smtp.fgznet.ch) (157.161.14.53) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 25 Apr 2018 20:41:50 +0000 Received: from [192.168.225.14] (dhclient-91-190-10-49.flashcable.ch [91.190.10.49]) (using TLSv1 with cipher ECDHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) by fgznet.ch (Postfix) with ESMTPSA id 5E3ACC1EE6 for ; Wed, 25 Apr 2018 22:41:47 +0200 (CEST) To: GCC Patches From: Andreas Tobler Subject: [PATCH][arm][FreeBSD] PR libgcc/84292 Message-ID: Date: Wed, 25 Apr 2018 22:41:47 +0200 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.13; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 X-IsSubscribed: yes Hi all, I'm going to commit this patch to all active branches as soon as the branch status permits. Built and tested on native armv5 FreeBSD12. Thanks, Andreas 2018-04-25 Andreas Tobler Maryse Levavasseur PR libgcc/84292 * config/arm/freebsd-atomic.c (SYNC_OP_AND_FETCH_N): Fix the op_and_fetch to return the right result. Index: config/arm/freebsd-atomic.c =================================================================== --- config/arm/freebsd-atomic.c (revision 259656) +++ config/arm/freebsd-atomic.c (working copy) @@ -171,9 +171,9 @@ #define SYNC_OP_AND_FETCH_N(N, TYPE, LDR, STR, NAME, OP) \ TYPE HIDDEN \ -__sync_##NAME##_and_fetch_##N (TYPE *mem, TYPE val) \ +__sync_##NAME##_and_fetch_##N (TYPE *mem, TYPE val) \ { \ - unsigned int old, temp, ras_start; \ + unsigned int old, temp, ras_start, res; \ \ ras_start = ARM_RAS_START; \ __asm volatile ( \ @@ -180,23 +180,23 @@ /* Set up Restartable Atomic Sequence. */ \ "1:" \ "\tadr %2, 1b\n" \ - "\tstr %2, [%5]\n" \ + "\tstr %2, [%6]\n" \ "\tadr %2, 2f\n" \ - "\tstr %2, [%5, #4]\n" \ + "\tstr %2, [%6, #4]\n" \ \ - "\t"LDR" %0, %4\n" /* Load old value. */ \ - "\t"OP" %2, %0, %3\n" /* Calculate new value. */ \ - "\t"STR" %2, %1\n" /* Store new value. */ \ + "\t"LDR" %0, %5\n" /* Load old value. */ \ + "\t"OP" %3, %0, %4\n" /* Calculate new value. */ \ + "\t"STR" %3, %1\n" /* Store new value. */ \ \ /* Tear down Restartable Atomic Sequence. */ \ "2:" \ "\tmov %2, #0x00000000\n" \ - "\tstr %2, [%5]\n" \ + "\tstr %2, [%6]\n" \ "\tmov %2, #0xffffffff\n" \ - "\tstr %2, [%5, #4]\n" \ - : "=&r" (old), "=m" (*mem), "=&r" (temp) \ + "\tstr %2, [%6, #4]\n" \ + : "=&r" (old), "=m" (*mem), "=&r" (temp), "=&r" (res) \ : "r" (val), "m" (*mem), "r" (ras_start)); \ - return (old); \ + return (res); \ } #define EMIT_ALL_OPS_N(N, TYPE, LDR, STR, STREQ) \