From patchwork Wed Sep 20 12:09:48 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Dave Martin X-Patchwork-Id: 816174 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.infradead.org (client-ip=65.50.211.133; helo=bombadil.infradead.org; envelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="NZCwLwlb"; dkim-atps=neutral Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3xxz8q0DDjz9t2Q for ; Wed, 20 Sep 2017 22:10:34 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=LTocRSNPcBtp+5wTUjTZ2dElV1K/Dl3HMn/wAQtaORs=; b=NZCwLwlbQDoLcz ORag/M1mCn1X6RE9hej19SR/A0oGnTclzuEKEq9wyad/AN+1zCHkbTIelCi6oeOU76NGr9NudItpN ZdO603XzUp8yDtCkot6FkHMvtcqJqXpNuibozGFYupOFQdqtSBP66mGL2AGwvlLM3KbCg7ID62N37 gCr0zdL0m5PYtHKvNSN3eCcyfCE48j5+vX9CDiuaSl4nbVcfhoaqezXtadp3clWqzcZZfBXp+8cSP fLC2Ed6esZZQjkjM997DrcDIJ6wqFnp4Mr+o8HYsh3jXI5t9WR2xdUh1yJx0dJwmQNzQF3uf4cYBy bJ7OdciFf4hiBIXu1t/w==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dudpk-0004H0-AJ; Wed, 20 Sep 2017 12:10:28 +0000 Received: from foss.arm.com ([217.140.101.70]) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dudpb-0002yC-U6 for linux-arm-kernel@lists.infradead.org; Wed, 20 Sep 2017 12:10:26 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5B8A280D; Wed, 20 Sep 2017 05:09:59 -0700 (PDT) Received: from e103592.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 8F6253F578; Wed, 20 Sep 2017 05:09:58 -0700 (PDT) From: Dave Martin To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2] bootwrapper: SVE: Enable SVE for EL2 and below Date: Wed, 20 Sep 2017 13:09:48 +0100 Message-Id: <1505909388-13513-1-git-send-email-Dave.Martin@arm.com> X-Mailer: git-send-email 2.1.4 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170920_051020_010088_36F8BB5E X-CRM114-Status: UNSURE ( 8.21 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -6.9 (------) X-Spam-Report: SpamAssassin version 3.4.1 on bombadil.infradead.org summary: Content analysis details: (-6.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [217.140.101.70 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , =?utf-8?q?Alex_Benn=C3=A9e?= Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org By default, SVE will trap to EL3. We also want to make sure that lower ELs have access to the full SVE vector length before dropping down. This patch programs CPTR_EL3 and ZCR_EL3 appropriately to enable SVE for lower exception levels and make sure that they can use the full vector length provided by the hardware. Signed-off-by: Dave Martin Cc: Mark Rutland Cc: Alex Bennée --- This is basically the same as v1 [1], but rebased to an up-to-date bootwrapper tree. (I was previously tracking Catalin's tree, which no longer exists...) [1] [PATCH] bootwrapper: SVE: Enable SVE for EL2 and below http://lists.infradead.org/pipermail/linux-arm-kernel/2017-August/527000.html arch/aarch64/boot.S | 13 +++++++++++++ arch/aarch64/include/asm/cpu.h | 5 +++++ 2 files changed, 18 insertions(+) diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S index ceeee76..f7d795a 100644 --- a/arch/aarch64/boot.S +++ b/arch/aarch64/boot.S @@ -45,6 +45,19 @@ _start: msr cptr_el3, xzr // Disable copro. traps to EL3 + mrs x0, id_aa64pfr0_el1 + ubfx x0, x0, #32, #4 // SVE present? + cbz x0, 1f // Skip SVE init if not + + mrs x0, cptr_el3 + orr x0, x0, #CPTR_EL3_EZ // enable SVE + msr cptr_el3, x0 + isb + + mov x0, #ZCR_EL3_LEN_MASK // SVE: Enable full vector len + msr ZCR_EL3, x0 // for EL2. + +1: ldr x0, =CNTFRQ msr cntfrq_el0, x0 diff --git a/arch/aarch64/include/asm/cpu.h b/arch/aarch64/include/asm/cpu.h index 66726ef..ccb5397 100644 --- a/arch/aarch64/include/asm/cpu.h +++ b/arch/aarch64/include/asm/cpu.h @@ -27,6 +27,11 @@ #define SPSR_EL2H (9 << 0) /* EL2 Handler mode */ #define SPSR_HYP (0x1a << 0) /* M[3:0] = hyp, M[4] = AArch32 */ +#define CPTR_EL3_EZ (1 << 8) + +#define ZCR_EL3 s3_6_c1_c2_0 +#define ZCR_EL3_LEN_MASK 0x1ff + #define SCTLR_EL1_CP15BEN (1 << 5) #define SCTLR_EL1_RES1 (3 << 28 | 3 << 22 | 1 << 11)