From patchwork Mon Apr 15 17:00:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 1923817 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com header.a=rsa-sha256 header.s=google header.b=BaHIYges; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=147.75.48.161; helo=sy.mirrors.kernel.org; envelope-from=linux-pci+bounces-6258-incoming=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org [147.75.48.161]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VJD3f5qbGz1yXv for ; Tue, 16 Apr 2024 03:01:50 +1000 (AEST) Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sy.mirrors.kernel.org (Postfix) with ESMTPS id 6405DB214C7 for ; Mon, 15 Apr 2024 17:01:50 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 4A0798062B; Mon, 15 Apr 2024 17:01:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="BaHIYges" X-Original-To: linux-pci@vger.kernel.org Received: from mail-pf1-f169.google.com (mail-pf1-f169.google.com [209.85.210.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BABD18286A for ; Mon, 15 Apr 2024 17:01:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.169 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200493; cv=none; b=rsNuyY6CtYeqko8H95APiRW+7n5ujCYirsfjxhOuFMO6cfdeAtKoXeqGxjz0Qy27oONUM9Sy65Gm7FO75TEaxqNCuFiFHsIiaER6adVoZfmG829tzb1G7x433MeTvcfNSG62MX1KZlFUNDLU9AYb9tqiI5M/jV7cVhfAxbXtksc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200493; c=relaxed/simple; bh=Kpg2Dak2Sn/bLhHCJoIkdyJgXdEy9G8+cj88d9DTE1A=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=GFoy/y7awfxyt3q+1N3wiv2JIrM1Xn7lL7cQO7zUyQ9ybC5ThfqTGGh20spCPKpXFk1QjSKa6BgbyafkgyrshUUt9sLzxBUt9Nv5oL22DX9Rv7JO70cNUnQU6ujunLV4HyV0MzcWaW8EZZQhh9VJ0iGzsrZCj2HAh0vmPziRjKI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com; spf=pass smtp.mailfrom=ventanamicro.com; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b=BaHIYges; arc=none smtp.client-ip=209.85.210.169 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Received: by mail-pf1-f169.google.com with SMTP id d2e1a72fcca58-6ed0e9ccca1so3149012b3a.0 for ; Mon, 15 Apr 2024 10:01:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1713200490; x=1713805290; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=TBFCNaiZG8SDhd9Avy2NjVgbIzDcy1byPrgimW8Jnrg=; b=BaHIYgesSL0mGOskrlAePv42PBDMPSOqw8pDfgNbCGwxvPqW6DPOaO15PUoX1D9uYR yB3MCQZJDUAmhE0nLTX1i1Bnbmqoc//egmck9RfB0k7Gw2rufWMzRpGmbm0T2/qn8ptO 6UiWYIeXpayu6qtgsc9nqf7IqXGBqmyyiv3c3F8PcVWj6dqMDQHdfYyHlL76w1Nd3og/ Xxgl6l49rgVbuC7rFIaocCl7DUG0TyVs8OLzXqRF3hBtdcneP7DJMKwS0QXbf0xvYMmP iIDWCX34PuBciNz5NDvd1KBHTNJDd6LeiHtkp+8GJGqTG1RFlYJBKWO2vmdim9/jQB78 1B9A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713200490; x=1713805290; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=TBFCNaiZG8SDhd9Avy2NjVgbIzDcy1byPrgimW8Jnrg=; b=r5KTUJX49nK74M0IG81FBlK/DeepFtl0TptnrO0hQgAyQ8fNzIah2E1oPv/GzdXX0k 9Q8vGjvZbFdMl3LtF+f9J6+8hjMJ+uK0do0U71XPkr2dDDPvJW5YIBfbk+cN0aEQFHo/ EN7fviBsPHUnE4AkibgUanCoclht00ggk8ZjQ5jMUERPmAvZWQ4X0r4dVshr8y7Xc4s/ b7feZWUQnFcJP/b+6ihYVOe7XE7jlpB0tcExKQXJtTOP2WFuWrNK7QAU9U808tR6YdD0 1Wh0BSh+IhdwSvClSecwkZlI9Y6A06JbqqmYMCN8tdqiEvq8L6NQSKx2sTp52Qf3Lo7e 9LbQ== X-Forwarded-Encrypted: i=1; AJvYcCWmmVUaIM1AMzeUzJ1bmeSUmc0POQMU+4MfHjdXzmCh7NSU5s2f0sgqRdqMjUNQOf6PM5m0gNtTVl8/FEmwxYi6BMtrsZMh21GN X-Gm-Message-State: AOJu0YzRJ2Fp/B/TWg4ebWtl7hFyWecHTjySMIdDgpU7k9x731bZCZ8i q4YR7kdcer0sWudEqQYfjzhwxk2IE3S1Gin7nDd8egseg5tk8mbfrl+0UTOujNk= X-Google-Smtp-Source: AGHT+IEzt8khZRTAtvH8V3F5ny5WPuVjUU5oxNy7bzJAesNzMJQ033mielfe1XpkBmNZ7d1UwBv2dw== X-Received: by 2002:a05:6a00:1798:b0:6ea:bdbc:6a4 with SMTP id s24-20020a056a00179800b006eabdbc06a4mr9926776pfg.13.1713200489901; Mon, 15 Apr 2024 10:01:29 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.230]) by smtp.gmail.com with ESMTPSA id 1-20020a056a00072100b006ed045e3a70sm7433158pfm.25.2024.04.15.10.01.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 10:01:29 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Cc: Catalin Marinas , Will Deacon , Paul Walmsley , Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Bjorn Helgaas , Anup Patel , Thomas Gleixner , Samuel Holland , Robert Moore , Haibo1 Xu , Conor Dooley , Andrew Jones , Atish Kumar Patra , Andrei Warkentin , Marc Zyngier , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Sunil V L Subject: [RFC PATCH v4 01/20] arm64: PCI: Migrate ACPI related functions to pci-acpi.c Date: Mon, 15 Apr 2024 22:30:54 +0530 Message-Id: <20240415170113.662318-2-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240415170113.662318-1-sunilvl@ventanamicro.com> References: <20240415170113.662318-1-sunilvl@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The functions defined in arm64 for ACPI support are required for RISC-V also. To avoid duplication, move these functions to common location. Signed-off-by: Sunil V L Acked-by: Bjorn Helgaas --- arch/arm64/kernel/pci.c | 191 ---------------------------------------- drivers/pci/pci-acpi.c | 182 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 182 insertions(+), 191 deletions(-) diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c index f872c57e9909..fd9a7bed83ce 100644 --- a/arch/arm64/kernel/pci.c +++ b/arch/arm64/kernel/pci.c @@ -6,28 +6,7 @@ * Copyright (C) 2014 ARM Ltd. */ -#include -#include -#include -#include -#include #include -#include -#include -#include - -#ifdef CONFIG_ACPI -/* - * Try to assign the IRQ number when probing a new device - */ -int pcibios_alloc_irq(struct pci_dev *dev) -{ - if (!acpi_disabled) - acpi_pci_irq_enable(dev); - - return 0; -} -#endif /* * raw_pci_read/write - Platform-specific PCI config space access. @@ -61,173 +40,3 @@ int pcibus_to_node(struct pci_bus *bus) EXPORT_SYMBOL(pcibus_to_node); #endif - -#ifdef CONFIG_ACPI - -struct acpi_pci_generic_root_info { - struct acpi_pci_root_info common; - struct pci_config_window *cfg; /* config space mapping */ -}; - -int acpi_pci_bus_find_domain_nr(struct pci_bus *bus) -{ - struct pci_config_window *cfg = bus->sysdata; - struct acpi_device *adev = to_acpi_device(cfg->parent); - struct acpi_pci_root *root = acpi_driver_data(adev); - - return root->segment; -} - -int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge) -{ - struct pci_config_window *cfg; - struct acpi_device *adev; - struct device *bus_dev; - - if (acpi_disabled) - return 0; - - cfg = bridge->bus->sysdata; - - /* - * On Hyper-V there is no corresponding ACPI device for a root bridge, - * therefore ->parent is set as NULL by the driver. And set 'adev' as - * NULL in this case because there is no proper ACPI device. - */ - if (!cfg->parent) - adev = NULL; - else - adev = to_acpi_device(cfg->parent); - - bus_dev = &bridge->bus->dev; - - ACPI_COMPANION_SET(&bridge->dev, adev); - set_dev_node(bus_dev, acpi_get_node(acpi_device_handle(adev))); - - return 0; -} - -static int pci_acpi_root_prepare_resources(struct acpi_pci_root_info *ci) -{ - struct resource_entry *entry, *tmp; - int status; - - status = acpi_pci_probe_root_resources(ci); - resource_list_for_each_entry_safe(entry, tmp, &ci->resources) { - if (!(entry->res->flags & IORESOURCE_WINDOW)) - resource_list_destroy_entry(entry); - } - return status; -} - -/* - * Lookup the bus range for the domain in MCFG, and set up config space - * mapping. - */ -static struct pci_config_window * -pci_acpi_setup_ecam_mapping(struct acpi_pci_root *root) -{ - struct device *dev = &root->device->dev; - struct resource *bus_res = &root->secondary; - u16 seg = root->segment; - const struct pci_ecam_ops *ecam_ops; - struct resource cfgres; - struct acpi_device *adev; - struct pci_config_window *cfg; - int ret; - - ret = pci_mcfg_lookup(root, &cfgres, &ecam_ops); - if (ret) { - dev_err(dev, "%04x:%pR ECAM region not found\n", seg, bus_res); - return NULL; - } - - adev = acpi_resource_consumer(&cfgres); - if (adev) - dev_info(dev, "ECAM area %pR reserved by %s\n", &cfgres, - dev_name(&adev->dev)); - else - dev_warn(dev, FW_BUG "ECAM area %pR not reserved in ACPI namespace\n", - &cfgres); - - cfg = pci_ecam_create(dev, &cfgres, bus_res, ecam_ops); - if (IS_ERR(cfg)) { - dev_err(dev, "%04x:%pR error %ld mapping ECAM\n", seg, bus_res, - PTR_ERR(cfg)); - return NULL; - } - - return cfg; -} - -/* release_info: free resources allocated by init_info */ -static void pci_acpi_generic_release_info(struct acpi_pci_root_info *ci) -{ - struct acpi_pci_generic_root_info *ri; - - ri = container_of(ci, struct acpi_pci_generic_root_info, common); - pci_ecam_free(ri->cfg); - kfree(ci->ops); - kfree(ri); -} - -/* Interface called from ACPI code to setup PCI host controller */ -struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root) -{ - struct acpi_pci_generic_root_info *ri; - struct pci_bus *bus, *child; - struct acpi_pci_root_ops *root_ops; - struct pci_host_bridge *host; - - ri = kzalloc(sizeof(*ri), GFP_KERNEL); - if (!ri) - return NULL; - - root_ops = kzalloc(sizeof(*root_ops), GFP_KERNEL); - if (!root_ops) { - kfree(ri); - return NULL; - } - - ri->cfg = pci_acpi_setup_ecam_mapping(root); - if (!ri->cfg) { - kfree(ri); - kfree(root_ops); - return NULL; - } - - root_ops->release_info = pci_acpi_generic_release_info; - root_ops->prepare_resources = pci_acpi_root_prepare_resources; - root_ops->pci_ops = (struct pci_ops *)&ri->cfg->ops->pci_ops; - bus = acpi_pci_root_create(root, root_ops, &ri->common, ri->cfg); - if (!bus) - return NULL; - - /* If we must preserve the resource configuration, claim now */ - host = pci_find_host_bridge(bus); - if (host->preserve_config) - pci_bus_claim_resources(bus); - - /* - * Assign whatever was left unassigned. If we didn't claim above, - * this will reassign everything. - */ - pci_assign_unassigned_root_bus_resources(bus); - - list_for_each_entry(child, &bus->children, node) - pcie_bus_configure_settings(child); - - return bus; -} - -void pcibios_add_bus(struct pci_bus *bus) -{ - acpi_pci_add_bus(bus); -} - -void pcibios_remove_bus(struct pci_bus *bus) -{ - acpi_pci_remove_bus(bus); -} - -#endif diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c index 004575091596..e8d84fa435da 100644 --- a/drivers/pci/pci-acpi.c +++ b/drivers/pci/pci-acpi.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -1519,3 +1520,184 @@ static int __init acpi_pci_init(void) return 0; } arch_initcall(acpi_pci_init); + +#if defined(CONFIG_ARM64) + +/* + * Try to assign the IRQ number when probing a new device + */ +int pcibios_alloc_irq(struct pci_dev *dev) +{ + if (!acpi_disabled) + acpi_pci_irq_enable(dev); + + return 0; +} + +struct acpi_pci_generic_root_info { + struct acpi_pci_root_info common; + struct pci_config_window *cfg; /* config space mapping */ +}; + +int acpi_pci_bus_find_domain_nr(struct pci_bus *bus) +{ + struct pci_config_window *cfg = bus->sysdata; + struct acpi_device *adev = to_acpi_device(cfg->parent); + struct acpi_pci_root *root = acpi_driver_data(adev); + + return root->segment; +} + +int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge) +{ + struct pci_config_window *cfg; + struct acpi_device *adev; + struct device *bus_dev; + + if (acpi_disabled) + return 0; + + cfg = bridge->bus->sysdata; + + /* + * On Hyper-V there is no corresponding ACPI device for a root bridge, + * therefore ->parent is set as NULL by the driver. And set 'adev' as + * NULL in this case because there is no proper ACPI device. + */ + if (!cfg->parent) + adev = NULL; + else + adev = to_acpi_device(cfg->parent); + + bus_dev = &bridge->bus->dev; + + ACPI_COMPANION_SET(&bridge->dev, adev); + set_dev_node(bus_dev, acpi_get_node(acpi_device_handle(adev))); + + return 0; +} + +static int pci_acpi_root_prepare_resources(struct acpi_pci_root_info *ci) +{ + struct resource_entry *entry, *tmp; + int status; + + status = acpi_pci_probe_root_resources(ci); + resource_list_for_each_entry_safe(entry, tmp, &ci->resources) { + if (!(entry->res->flags & IORESOURCE_WINDOW)) + resource_list_destroy_entry(entry); + } + return status; +} + +/* + * Lookup the bus range for the domain in MCFG, and set up config space + * mapping. + */ +static struct pci_config_window * +pci_acpi_setup_ecam_mapping(struct acpi_pci_root *root) +{ + struct device *dev = &root->device->dev; + struct resource *bus_res = &root->secondary; + u16 seg = root->segment; + const struct pci_ecam_ops *ecam_ops; + struct resource cfgres; + struct acpi_device *adev; + struct pci_config_window *cfg; + int ret; + + ret = pci_mcfg_lookup(root, &cfgres, &ecam_ops); + if (ret) { + dev_err(dev, "%04x:%pR ECAM region not found\n", seg, bus_res); + return NULL; + } + + adev = acpi_resource_consumer(&cfgres); + if (adev) + dev_info(dev, "ECAM area %pR reserved by %s\n", &cfgres, + dev_name(&adev->dev)); + else + dev_warn(dev, FW_BUG "ECAM area %pR not reserved in ACPI namespace\n", + &cfgres); + + cfg = pci_ecam_create(dev, &cfgres, bus_res, ecam_ops); + if (IS_ERR(cfg)) { + dev_err(dev, "%04x:%pR error %ld mapping ECAM\n", seg, bus_res, + PTR_ERR(cfg)); + return NULL; + } + + return cfg; +} + +/* release_info: free resources allocated by init_info */ +static void pci_acpi_generic_release_info(struct acpi_pci_root_info *ci) +{ + struct acpi_pci_generic_root_info *ri; + + ri = container_of(ci, struct acpi_pci_generic_root_info, common); + pci_ecam_free(ri->cfg); + kfree(ci->ops); + kfree(ri); +} + +/* Interface called from ACPI code to setup PCI host controller */ +struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root) +{ + struct acpi_pci_generic_root_info *ri; + struct pci_bus *bus, *child; + struct acpi_pci_root_ops *root_ops; + struct pci_host_bridge *host; + + ri = kzalloc(sizeof(*ri), GFP_KERNEL); + if (!ri) + return NULL; + + root_ops = kzalloc(sizeof(*root_ops), GFP_KERNEL); + if (!root_ops) { + kfree(ri); + return NULL; + } + + ri->cfg = pci_acpi_setup_ecam_mapping(root); + if (!ri->cfg) { + kfree(ri); + kfree(root_ops); + return NULL; + } + + root_ops->release_info = pci_acpi_generic_release_info; + root_ops->prepare_resources = pci_acpi_root_prepare_resources; + root_ops->pci_ops = (struct pci_ops *)&ri->cfg->ops->pci_ops; + bus = acpi_pci_root_create(root, root_ops, &ri->common, ri->cfg); + if (!bus) + return NULL; + + /* If we must preserve the resource configuration, claim now */ + host = pci_find_host_bridge(bus); + if (host->preserve_config) + pci_bus_claim_resources(bus); + + /* + * Assign whatever was left unassigned. If we didn't claim above, + * this will reassign everything. + */ + pci_assign_unassigned_root_bus_resources(bus); + + list_for_each_entry(child, &bus->children, node) + pcie_bus_configure_settings(child); + + return bus; +} + +void pcibios_add_bus(struct pci_bus *bus) +{ + acpi_pci_add_bus(bus); +} + +void pcibios_remove_bus(struct pci_bus *bus) +{ + acpi_pci_remove_bus(bus); +} + +#endif From patchwork Mon Apr 15 17:00:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 1923818 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com header.a=rsa-sha256 header.s=google header.b=Ibq4yvZ8; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=147.75.80.249; helo=am.mirrors.kernel.org; envelope-from=linux-pci+bounces-6259-incoming=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from am.mirrors.kernel.org (am.mirrors.kernel.org [147.75.80.249]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VJD436Tymz1yXv for ; Tue, 16 Apr 2024 03:02:11 +1000 (AEST) Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id 44FB51F22126 for ; Mon, 15 Apr 2024 17:02:09 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 77A2282C6C; Mon, 15 Apr 2024 17:01:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="Ibq4yvZ8" X-Original-To: linux-pci@vger.kernel.org Received: from mail-pf1-f175.google.com (mail-pf1-f175.google.com [209.85.210.175]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1B37E83CB9 for ; Mon, 15 Apr 2024 17:01:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.175 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200499; cv=none; b=jf51o/yFY5+2uADxeLxElIHpEbgKN+sqeFMHsoP/7reJoJfMc3u9LWngtFHlh8tVTmai+eDHTJ3mI03lJbxsFbzv4NwTRfW1szeEsijGJpHsrSktZVhFMhAzA6XkXtVivfJkTL3rT4r8DkhWdm4qdiL85GlAeDv4A1p0/AOY/Sk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200499; c=relaxed/simple; bh=d//fcv46H4LzOYIR8kFfFqlYP6RASRxKKzQCgxhHvNk=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=F/G+0/gDj7KUZ3rWJ7fu4s6nt2uU4ryzYBiTUCMXJwBwxj/C8BKOUuz97ZANzn1V1BRtYwB8Jr1wdSTvakvKh1AFUMWtuRmNE3mVa9PncTXm+nAE9dRJ51SCNiXIisCxPr2avO5OVjdiOjHPz/Ou3UYKpMQ4q8kDAQ2d465uuYQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com; spf=pass smtp.mailfrom=ventanamicro.com; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b=Ibq4yvZ8; arc=none smtp.client-ip=209.85.210.175 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Received: by mail-pf1-f175.google.com with SMTP id d2e1a72fcca58-6eff2be3b33so1193498b3a.2 for ; Mon, 15 Apr 2024 10:01:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1713200497; x=1713805297; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=SFAtcNyUPfmOo+WuzK4Rac+GFz0TbHOwinmWYmcFrxc=; b=Ibq4yvZ87GnCiGAJGBbAJR9dv9TRo9Rs12iETGjNcPzQimPMrc5TlCaQ7lB+7BSAT2 59mR0vmElr3Ia3cVyJmE5qExu3hurKvsCfUpWNitAQzsJw++lmOsDWE9pVriuN94FXv7 fqfGS74DHSI/7izzpM3KGQ1/gtQBqnErbC2OiIM0kymWAaspNrIUHxTDYOxzbpf5Y54H w6tp7f5DW0/UOSNWL8/vz/dhjCsMgwIcD7OpTvdfghNzTash//dXxcocXthNDyTMzvzy sLCjsxufKwSp/m25mRYjEI4/pUUSWZX5rXvJM/Kc8ljjWNt6yaevgG8QWabAZl5gx1zi Vy5g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713200497; x=1713805297; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=SFAtcNyUPfmOo+WuzK4Rac+GFz0TbHOwinmWYmcFrxc=; b=ui9hJ50NmrXO2c6oSx95lxgyk1niWMXuovqRY7/fyIs86jBf7GandA0Gfpcuc4ycdm FyGw12b9TzVnc913EMFIHjPpXp6HOHOzT7isQQDPcXyHLudvQH6cb+MtoX+3qFVY+A1u b5gWhS/X15QnJtpzGRb8950mwpFHQdqiIgrGJudKaBxQI+20ZCOMCF9MPBJ4JHrM94ME dsYe0ts7Eet9mjqPZCpwEGbhzH+Hh4YNJ6vVhU7z4VO/UNCWXGB1n6cvpA9pOiT9bNr4 HfviXKFchi7R4SA1Ggdt2ugVfIJrb7ycrR7NpbFykgOQz+JWFQOqOSia9DpqHd2BeSW7 ha8Q== X-Forwarded-Encrypted: i=1; AJvYcCUEWgOStC5NsohvuLrK7AGpDrnu0HBeFtkiNe3HSl6qEonVG5JlhpTphVT+8vmWz71EFpW1xlkq2C3zsVzm4W6NtAdHfuFU+Mmi X-Gm-Message-State: AOJu0YwexzHC2rFFfAKabX+kaajwOG0Sg52ixyuUU7lvc2AEAX/hMnWb DwoORVhwPPjZhaY8f8MRxOyrgUqNcO4P4sNAGpE9KWCdyCReV0mAsziUr8XU5cA= X-Google-Smtp-Source: AGHT+IGqYjIa76YfWohzDrF4RGeNhNZq2I7mTi99zpcmd5VEKjXE94y5JlYL9p7qJRGZUYYL3web8A== X-Received: by 2002:a05:6a00:22cf:b0:6eb:2b:43b4 with SMTP id f15-20020a056a0022cf00b006eb002b43b4mr11021959pfj.27.1713200496609; Mon, 15 Apr 2024 10:01:36 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.230]) by smtp.gmail.com with ESMTPSA id 1-20020a056a00072100b006ed045e3a70sm7433158pfm.25.2024.04.15.10.01.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 10:01:36 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Cc: Catalin Marinas , Will Deacon , Paul Walmsley , Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Bjorn Helgaas , Anup Patel , Thomas Gleixner , Samuel Holland , Robert Moore , Haibo1 Xu , Conor Dooley , Andrew Jones , Atish Kumar Patra , Andrei Warkentin , Marc Zyngier , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Sunil V L Subject: [RFC PATCH v4 02/20] RISC-V: ACPI: Implement PCI related functionality Date: Mon, 15 Apr 2024 22:30:55 +0530 Message-Id: <20240415170113.662318-3-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240415170113.662318-1-sunilvl@ventanamicro.com> References: <20240415170113.662318-1-sunilvl@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Replace the dummy implementation for PCI related functions with actual implementation. This needs ECAM and MCFG CONFIG options to be enabled for RISC-V. Signed-off-by: Sunil V L --- arch/riscv/Kconfig | 2 ++ arch/riscv/kernel/acpi.c | 31 ++++++++++++++----------------- drivers/pci/pci-acpi.c | 2 +- 3 files changed, 17 insertions(+), 18 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 6d64888134ba..69cc0509a19a 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -13,6 +13,7 @@ config 32BIT config RISCV def_bool y select ACPI_GENERIC_GSI if ACPI + select ACPI_MCFG if (ACPI && PCI) select ACPI_REDUCED_HARDWARE_ONLY if ACPI select ARCH_DMA_DEFAULT_COHERENT select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION @@ -173,6 +174,7 @@ config RISCV select OF_EARLY_FLATTREE select OF_IRQ select PCI_DOMAINS_GENERIC if PCI + select PCI_ECAM if (ACPI && PCI) select PCI_MSI if PCI select RISCV_ALTERNATIVE if !XIP_KERNEL select RISCV_APLIC diff --git a/arch/riscv/kernel/acpi.c b/arch/riscv/kernel/acpi.c index e619edc8b0cc..41aa77c8484b 100644 --- a/arch/riscv/kernel/acpi.c +++ b/arch/riscv/kernel/acpi.c @@ -306,29 +306,26 @@ void __iomem *acpi_os_ioremap(acpi_physical_address phys, acpi_size size) #ifdef CONFIG_PCI /* - * These interfaces are defined just to enable building ACPI core. - * TODO: Update it with actual implementation when external interrupt - * controller support is added in RISC-V ACPI. + * raw_pci_read/write - Platform-specific PCI config space access. */ -int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn, - int reg, int len, u32 *val) +int raw_pci_read(unsigned int domain, unsigned int bus, + unsigned int devfn, int reg, int len, u32 *val) { - return PCIBIOS_DEVICE_NOT_FOUND; -} + struct pci_bus *b = pci_find_bus(domain, bus); -int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn, - int reg, int len, u32 val) -{ - return PCIBIOS_DEVICE_NOT_FOUND; + if (!b) + return PCIBIOS_DEVICE_NOT_FOUND; + return b->ops->read(b, devfn, reg, len, val); } -int acpi_pci_bus_find_domain_nr(struct pci_bus *bus) +int raw_pci_write(unsigned int domain, unsigned int bus, + unsigned int devfn, int reg, int len, u32 val) { - return -1; -} + struct pci_bus *b = pci_find_bus(domain, bus); -struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root) -{ - return NULL; + if (!b) + return PCIBIOS_DEVICE_NOT_FOUND; + return b->ops->write(b, devfn, reg, len, val); } + #endif /* CONFIG_PCI */ diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c index e8d84fa435da..b5892d0fa68c 100644 --- a/drivers/pci/pci-acpi.c +++ b/drivers/pci/pci-acpi.c @@ -1521,7 +1521,7 @@ static int __init acpi_pci_init(void) } arch_initcall(acpi_pci_init); -#if defined(CONFIG_ARM64) +#if defined(CONFIG_ARM64) || defined(CONFIG_RISCV) /* * Try to assign the IRQ number when probing a new device From patchwork Mon Apr 15 17:00:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 1923819 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com header.a=rsa-sha256 header.s=google header.b=bV0Zo0LD; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=147.75.48.161; helo=sy.mirrors.kernel.org; envelope-from=linux-pci+bounces-6260-incoming=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org [147.75.48.161]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VJD4k5LDbz1yXv for ; Tue, 16 Apr 2024 03:02:46 +1000 (AEST) Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sy.mirrors.kernel.org (Postfix) with ESMTPS id 7E316B23584 for ; Mon, 15 Apr 2024 17:02:46 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 5B7068526C; Mon, 15 Apr 2024 17:01:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="bV0Zo0LD" X-Original-To: linux-pci@vger.kernel.org Received: from mail-pf1-f176.google.com (mail-pf1-f176.google.com [209.85.210.176]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 167A185260 for ; Mon, 15 Apr 2024 17:01:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.176 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200505; cv=none; b=aPuSiZDqAtI1WfUhB5ZbHUCvMWSMjSLaEkkaGQn4nsJkvdxdTO/8G4WgObQfnK28QxC/Y1y3JfpQSMUoO1Gksjb2xeHPLraR/eATz73MdHJYt+2bOeYVgfwPtb8QPS1gzPjDpAqlveJ6qxCjrPusmE1NotB82x20kC3aM/IV8bQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200505; c=relaxed/simple; bh=G6d/szsfyOmNpE6H7iCYICRZyVGX7D2nTzxNR2hGcHo=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=XyOcHz0Ysy1Cy1H3Ozp1ROArY8TDQeNDA34IJfi1EyLhM4TMk2XUs087Ri/0cQVU/78CCsoxrd/2IqAIvaWn9GmGp6SwDLQs+Iaigs1AMdNXvgFoXwFnw+5Ld3VLN6gHznlbKc3XrjBIZH9XOpybBcB6VYEQ4mkSMOO6FgEdHFA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com; spf=pass smtp.mailfrom=ventanamicro.com; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b=bV0Zo0LD; arc=none smtp.client-ip=209.85.210.176 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Received: by mail-pf1-f176.google.com with SMTP id d2e1a72fcca58-6ed627829e6so3791300b3a.1 for ; Mon, 15 Apr 2024 10:01:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1713200503; x=1713805303; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=VoHprznTatfd3jPIiDLel21Ov4h1fvX4qo25ti25gdk=; b=bV0Zo0LDx5NDrF6bqKXVmNbkIOSyeIRjQqV948/WmDDbWbcdCm/sqd0bYzvUgHuHqj oUOuyihoRZvTsgbNgTG/+EOqSPoqWt3ch26v8iuZMrTtUdiTyYTXTzrHX8DWAROnYQaq BVopx7D9OEbpHKOBL6/VZ9D+KpuM1gfaoHimXUjgwD34vxC8PdGcWbX2Uos6qg7h40vH BCbgkEYGcEdGhW5BlVM8yOlrd7unVSAcZ1M4CHLM4Avva2DRjf0JvEWPNYfv7SGj6whT OvHiVYQNnxrUp30ufygWULfZ3z0By+5QdAZbhSluSoi2wPoS1DY49Dgn0GvsjELsILKD 508A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713200503; x=1713805303; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VoHprznTatfd3jPIiDLel21Ov4h1fvX4qo25ti25gdk=; b=OVlMGOVbTyT+UbfUl8idsfscrtBxmDTZihy8/bn+31L9v8cbXM8s53K5wJTJ/aw58/ 7JRKpZVsa28ayBU4iGnK8gJXmdTFJHE/FZCRj4vIH/MGFjfzgUOu3jpYO3rjKHBp+/Wl WF3RQ7nszPoY7BzbFqwn02mV9LG9XOY5LrW3n+ZHC6dM43LR/+tB24UFFARQK6geNBrx HKP0ChxqWWxnu7Nt7PYeGP+mCePhytbP3T8Td+gLA+xQQyu0PThkNFKNvkf5CdnTEJZL kod+oshf0yfwGiM8CrlosLUEeHK0ztH7gO3NtAsD3GDSpFsYMfrmx9s+kLMQ0zRjnYLt fklQ== X-Forwarded-Encrypted: i=1; AJvYcCVBvQiMBELxxyWzT5iPXq7Biu4R9loyvvyvE4TlT/T7Ny2DfjOuCStYFpiMSJbPhwPoiy7jxHL00cqh7BEM9f4KXEMWXKMWdRHq X-Gm-Message-State: AOJu0Yw27/Eo0xjy/AQKtZiuI/5Eo3NenwRJcydb452PEg7v4W1LMvkH ZEu5gkqo8Ge9jt3GzVExuHqKd273ff3wHNMdFL+mQOQF3Lb0p8WvgqTLf3KbWpM= X-Google-Smtp-Source: AGHT+IEZTBakzY6PKzMTgs/zcMBONEtbNskqJbnRsI44xNlUKHaklyMLmZlZj49QTc7g7/a+/pPcjw== X-Received: by 2002:a05:6a21:3381:b0:1a7:58ca:cdf3 with SMTP id yy1-20020a056a21338100b001a758cacdf3mr14872194pzb.8.1713200503358; Mon, 15 Apr 2024 10:01:43 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.230]) by smtp.gmail.com with ESMTPSA id 1-20020a056a00072100b006ed045e3a70sm7433158pfm.25.2024.04.15.10.01.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 10:01:42 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Cc: Catalin Marinas , Will Deacon , Paul Walmsley , Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Bjorn Helgaas , Anup Patel , Thomas Gleixner , Samuel Holland , Robert Moore , Haibo1 Xu , Conor Dooley , Andrew Jones , Atish Kumar Patra , Andrei Warkentin , Marc Zyngier , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Sunil V L Subject: [RFC PATCH v4 03/20] PCI: Make pci_create_root_bus() declare its reliance on MSI domains Date: Mon, 15 Apr 2024 22:30:56 +0530 Message-Id: <20240415170113.662318-4-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240415170113.662318-1-sunilvl@ventanamicro.com> References: <20240415170113.662318-1-sunilvl@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Similar to commit 9ec37efb8783 ("PCI/MSI: Make pci_host_common_probe() declare its reliance on MSI domains"), declare this dependency for PCI probe in ACPI based flow. This is required especially for RISC-V platforms where MSI controller can be absent. However, setting this for all architectures seem to cause issues on non RISC-V architectures [1]. Hence, enabled this only for RISC-V. [1] - https://lore.kernel.org/oe-lkp/202403041047.791cb18e-oliver.sang@intel.com Signed-off-by: Sunil V L --- drivers/pci/probe.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 1325fbae2f28..e09915bee2ee 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -3048,6 +3048,9 @@ struct pci_bus *pci_create_root_bus(struct device *parent, int bus, bridge->sysdata = sysdata; bridge->busnr = bus; bridge->ops = ops; +#ifdef CONFIG_RISCV + bridge->msi_domain = true; +#endif error = pci_register_host_bridge(bridge); if (error < 0) From patchwork Mon Apr 15 17:00:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 1923820 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com header.a=rsa-sha256 header.s=google header.b=YHush3tG; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2604:1380:45d1:ec00::1; helo=ny.mirrors.kernel.org; envelope-from=linux-pci+bounces-6261-incoming=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org [IPv6:2604:1380:45d1:ec00::1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VJD5B4dfVz1yXv for ; Tue, 16 Apr 2024 03:03:10 +1000 (AEST) Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ny.mirrors.kernel.org (Postfix) with ESMTPS id BC9D21C20F46 for ; Mon, 15 Apr 2024 17:03:08 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 9D81985658; Mon, 15 Apr 2024 17:01:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="YHush3tG" X-Original-To: linux-pci@vger.kernel.org Received: from mail-pf1-f178.google.com (mail-pf1-f178.google.com [209.85.210.178]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ED6978565A for ; Mon, 15 Apr 2024 17:01:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.178 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200513; cv=none; b=c6bA20LRCUdXvmZsmOH1333yihRzaoK/3d6mCtPgBYjNo+HgloRy3t0Hk6FEaxY6ZpTWWuAsKZi5phRbf0HqeAwrAcLa1uSm00sa035MWY1OIHOIgEfUhDwI1XjOv7Tv8x9BWy1gCQUDl13HzSQ6tFDuLYNCVgVGci2keHKMitE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200513; c=relaxed/simple; bh=dDrKFILdmWkoGj6OkVS37yIsnuHW0WzK5+l8GvebI1Y=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=cAPoGlYOn6mooafrTwrxcu7+pS8BCk2kgcNVDNJDchqvIwfU/bLjWa4AKwfALV4gtFGM/qzEk3xCSQp+fsjCw2VJSSRiApoPFhoYRRjtNa33EdCiAHyzGOcZtePzO948TBt2jgi5HBlt3+S+nDPAC00rcgiec+x2yJWsZ2heOA0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com; spf=pass smtp.mailfrom=ventanamicro.com; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b=YHush3tG; arc=none smtp.client-ip=209.85.210.178 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Received: by mail-pf1-f178.google.com with SMTP id d2e1a72fcca58-6ed627829e6so3791478b3a.1 for ; Mon, 15 Apr 2024 10:01:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1713200510; x=1713805310; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=NV0OeA3LqOjcEQwVzmEUb3l+O0qMWG2Q7MAVkkjj25w=; b=YHush3tGWr4Hec4PFk5UeTWH2DN08a1TFuMnEGU8wZjSVYhfTmuBVu7ggj3M+XFOgx pf0SsscYHV/TcXhngqnFOlKmpBGbho4aWRmaxDwMQkyn8VEqlIkp8SnKUU7zkLeY9nUQ vfQgO4fRFZtscFwPgDdkEVmyRUYRtxjaLiuu8R9T1Bh3MoNfmpNWFHnWp8bdPRcLptm6 PcFpGREG0Z2TfOYm+vnMbKXEbxN0TBAgXa3CkfnMgrhloMHMl+b/G5z7dxvCQiuS7jcJ kxOXiRLdYWvAaptgYFbdFw1tZTNsg1fA43SGBOa77bTyhGoHwjp9E7p3eNrihl9SK85n RDFg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713200510; x=1713805310; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=NV0OeA3LqOjcEQwVzmEUb3l+O0qMWG2Q7MAVkkjj25w=; b=gsA+vFNP2r878ufvHiEClXMLQd8rQwPDBe4J1C+Z9KFpMuekIxwc7lqVv4ZkFVGRD0 GVSbkNHBNyeuK1YqOInqse//XAMSy8Ut8Yh8netGvIRDUTcrQeXT6lJ6H9VasZKaMszX nKzUsEmJAL1wSDMVyZnk9yocJwJghjFpYFDcOB4yk6OO4hGB0t3h1t9oWPoei9RUPzjK 0b6SqfXV/6AuArVwRpDHfeOa/cR/2KEwFfu7+UI0swYzDCUFj279eUdeQUGg1HVJk3QP NiULjJDvg73kmqlplLkBuk2nfVEZs2cmctqK9aQ2LWSD4av6jh6hhKdrp3Xb1PggD6q0 fOhQ== X-Forwarded-Encrypted: i=1; AJvYcCXmZASuxmgvJACO246VcKghTkL37US+PC9wz+kDdw/mvvfuCsFl5TodovYJwzq+gw9Ik9o3P6XZhiqYrtiCmahQI6iW8/7ran8k X-Gm-Message-State: AOJu0YypF6Q8hkIWoYY9xbbHsnTWoi8DP6RyDf/JvPc10mjokPQb9ZTy Der4gsDYScLkEig/0vdVgfBNXX+Y9iFg6nivwRm1x2mLYs1KYWUN7j8V9yhBYHU= X-Google-Smtp-Source: AGHT+IGvmjYeaJvV6Cs9b+D8sHsU8MJVs6hR0ePtYiL5D9g9wvurdSLwMSWttPbHZlSkX+z1czGUNQ== X-Received: by 2002:a05:6a00:21d0:b0:6ed:de6f:d738 with SMTP id t16-20020a056a0021d000b006edde6fd738mr13801645pfj.9.1713200510295; Mon, 15 Apr 2024 10:01:50 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.230]) by smtp.gmail.com with ESMTPSA id 1-20020a056a00072100b006ed045e3a70sm7433158pfm.25.2024.04.15.10.01.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 10:01:49 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Cc: Catalin Marinas , Will Deacon , Paul Walmsley , Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Bjorn Helgaas , Anup Patel , Thomas Gleixner , Samuel Holland , Robert Moore , Haibo1 Xu , Conor Dooley , Andrew Jones , Atish Kumar Patra , Andrei Warkentin , Marc Zyngier , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Sunil V L Subject: [RFC PATCH v4 04/20] ACPI: scan.c: Add weak arch specific function to reorder the IRQCHIP probe Date: Mon, 15 Apr 2024 22:30:57 +0530 Message-Id: <20240415170113.662318-5-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240415170113.662318-1-sunilvl@ventanamicro.com> References: <20240415170113.662318-1-sunilvl@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Unlike OF framework, the irqchip probe using IRQCHIP_ACPI_DECLARE has no order defined. Depending on the driver Makefile is not a good idea. So, usually it is worked around by mandating only root interrupt controller probed using IRQCHIP_ACPI_DECLARE and other interrupt controllers are probed via cascade mechanism. However, this is also not a clean solution because if there are multiple root controllers (ex: RINTC in RISC-V which is per CPU) which need to be probed first, then the cascade will happen for every root controller. So, introduce a architecture specific weak function to order the probing of the interrupt controllers which can be implemented by different architectures as per their interrupt controller hierarchy. Signed-off-by: Sunil V L --- drivers/acpi/scan.c | 3 +++ include/linux/acpi.h | 2 ++ 2 files changed, 5 insertions(+) diff --git a/drivers/acpi/scan.c b/drivers/acpi/scan.c index 68f101323f53..de30a0af7a2f 100644 --- a/drivers/acpi/scan.c +++ b/drivers/acpi/scan.c @@ -2749,6 +2749,8 @@ static int __init acpi_match_madt(union acpi_subtable_headers *header, return 0; } +void __weak arch_sort_irqchip_probe(struct acpi_probe_entry *ap_head, int nr) { } + int __init __acpi_probe_device_table(struct acpi_probe_entry *ap_head, int nr) { int count = 0; @@ -2757,6 +2759,7 @@ int __init __acpi_probe_device_table(struct acpi_probe_entry *ap_head, int nr) return 0; mutex_lock(&acpi_probe_mutex); + arch_sort_irqchip_probe(ap_head, nr); for (ape = ap_head; nr; ape++, nr--) { if (ACPI_COMPARE_NAMESEG(ACPI_SIG_MADT, ape->id)) { acpi_probe_count = 0; diff --git a/include/linux/acpi.h b/include/linux/acpi.h index 168201e4c782..914ecd22ba64 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -1337,6 +1337,8 @@ struct acpi_probe_entry { kernel_ulong_t driver_data; }; +void arch_sort_irqchip_probe(struct acpi_probe_entry *ap_head, int nr); + #define ACPI_DECLARE_PROBE_ENTRY(table, name, table_id, subtable, \ valid, data, fn) \ static const struct acpi_probe_entry __acpi_probe_##name \ From patchwork Mon Apr 15 17:00:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 1923821 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com header.a=rsa-sha256 header.s=google header.b=L5iRR3Qi; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2604:1380:4601:e00::3; helo=am.mirrors.kernel.org; envelope-from=linux-pci+bounces-6262-incoming=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from am.mirrors.kernel.org (am.mirrors.kernel.org [IPv6:2604:1380:4601:e00::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VJD5Q1p9fz1yXv for ; Tue, 16 Apr 2024 03:03:22 +1000 (AEST) Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id 521D81F21B44 for ; Mon, 15 Apr 2024 17:03:19 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id BFF4B83A18; Mon, 15 Apr 2024 17:01:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="L5iRR3Qi" X-Original-To: linux-pci@vger.kernel.org Received: from mail-pf1-f176.google.com (mail-pf1-f176.google.com [209.85.210.176]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6ABED839FD for ; Mon, 15 Apr 2024 17:01:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.176 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200518; cv=none; b=B54booBwJ4EDQsmWVM1tyc7uM3iMnu79cwATC7YcMQ4bwGh2imE44GwugSE4ay2qMw8liMjFmmCsy8psRMb1ceTwWMBWlhFb6AKahfYJ8Kdooy07MpOAPwQXN2EbO3rlPEUaGxo1KmNTx1BSw6yxmNN8DX54qBJql7960n24UI4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200518; c=relaxed/simple; bh=nvDPc3L6oEQANMqW6TwMQT+97dhGLiqDQqjjsq7m6Sg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=TEAdhy6T/lt8wWhmwwcXB2GFyYM2gzWheT9Ih2i6tBLyQ117lttozW24kFblCc7mAt9aSLLtRAh4H9Szah7v3TskpKQHLFOLtL91Wkc+7erTqYx2P5ELJFys7iggyEHx21jinX0epzTQYRewZpy1KPPTkDc52aIpLdswEkRhRjg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com; spf=pass smtp.mailfrom=ventanamicro.com; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b=L5iRR3Qi; arc=none smtp.client-ip=209.85.210.176 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Received: by mail-pf1-f176.google.com with SMTP id d2e1a72fcca58-6f00f24f761so659118b3a.3 for ; Mon, 15 Apr 2024 10:01:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1713200517; x=1713805317; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Z52/1ZZYR1CvGL0V5chwJsk+UfCztWDiXCAoT+2GZNk=; b=L5iRR3QiiU+6sb+LRsiGnwZl3gaT4EJfpuTqOak2N+oz304KL8S796qofU/wokpmAY 20+aZkZMzgnLnDns3R4xxR43dIc8sxadQCUUkwDEcJiy/YfMwYpwpSjy473phrvL+pAC Keq59DdmdBeCl2kQijYNUDWrf7zQeBxtBpj914Ct0B1A6j9zjZi0owd3pzKT+XrF6Jcq tcqlzKqaY35Fxn7vfWhqW/QjsbCkTt4prWfJaqng0N6Jrzg6qEy+dZlJ0EhYeneCNm1D 0b6LU9ctLvjplDsu2Xk9bk/R0EOHUSE2q1u4LPyTR9YMfN3PHo6Z/cLeY9qK84k/hG2u Rj/A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713200517; x=1713805317; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Z52/1ZZYR1CvGL0V5chwJsk+UfCztWDiXCAoT+2GZNk=; b=aSGgqFJ1ggtKel/SNgngGduoL3S+k0xANkeh+9QAxwzrIQ403mRrAGcjL1l73H6G29 hPTg2TEYFwYG67kCyC/NxSJRL1dp83rCPHXCBJTM6tj3sLpn1X5F1txKfwL2n4OtrWhS bhVfwpuOQPZcQcLvl4TLYoFSxY5XiJMscykbE1+IP1TK/fpApOvXUSTH0wJ8Vl0k0CZA wZgk5VqUcB3jPVPXIfGX9BY0e93tuWILMAaIw9JDyeQ3cFrMiQCQiA9TLaY8vbgZpsYI 2q5F3NFawkupWc3V69G05Y+rl6RYOn9+44QCtGj1iFhGer4aS0v7Kfc3K0IVOjqDG3LN 9SmA== X-Forwarded-Encrypted: i=1; AJvYcCW68sBA4J8vrIE5Qiaf/nL+wOiQfcGXrslFwgzwq09vTBwQ5g719uhzw8kphjjpezX5h5WWRoeS2ypSH+RPSHbQZLdcsUsnnP9k X-Gm-Message-State: AOJu0YyJ0MuGSR/XblmgHpWKt3kYr0PlFvbBZJEFs7ssdU3nVuzCf9p9 +rdqwN1nieEL2S3VixO5P1nIlfaLbREtHYfgsG8H8C/KgFDAOe5E79bAmaD9sFAltGpKomAMSoX 5UOM= X-Google-Smtp-Source: AGHT+IF3pZ5kgHd0L+s0ETBbrzTu2eQzZocJwTnnUWv3+XrCVjsqR27b/As/nt3u7TcsRgOfwdwSGQ== X-Received: by 2002:a05:6a00:986:b0:6ed:1c7:8c6b with SMTP id u6-20020a056a00098600b006ed01c78c6bmr10123074pfg.1.1713200516899; Mon, 15 Apr 2024 10:01:56 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.230]) by smtp.gmail.com with ESMTPSA id 1-20020a056a00072100b006ed045e3a70sm7433158pfm.25.2024.04.15.10.01.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 10:01:56 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Cc: Catalin Marinas , Will Deacon , Paul Walmsley , Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Bjorn Helgaas , Anup Patel , Thomas Gleixner , Samuel Holland , Robert Moore , Haibo1 Xu , Conor Dooley , Andrew Jones , Atish Kumar Patra , Andrei Warkentin , Marc Zyngier , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Sunil V L Subject: [RFC PATCH v4 05/20] ACPI: RISC-V: Implement arch function to reorder irqchip probe entries Date: Mon, 15 Apr 2024 22:30:58 +0530 Message-Id: <20240415170113.662318-6-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240415170113.662318-1-sunilvl@ventanamicro.com> References: <20240415170113.662318-1-sunilvl@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 ACPI MADT entries for interrupt controllers don't have a way to describe the hierarchy. However, the hierarchy is known to the architecture and on RISC-V platforms, the MADT sub table types are ordered in the incremental order from the root controller which is RINTC. So, add architecture function for RISC-V to reorder the interrupt controller probing as per the hierarchy as below. Signed-off-by: Sunil V L --- drivers/acpi/riscv/Makefile | 2 +- drivers/acpi/riscv/irq.c | 32 ++++++++++++++++++++++++++++++++ 2 files changed, 33 insertions(+), 1 deletion(-) create mode 100644 drivers/acpi/riscv/irq.c diff --git a/drivers/acpi/riscv/Makefile b/drivers/acpi/riscv/Makefile index 86b0925f612d..dceec808cfab 100644 --- a/drivers/acpi/riscv/Makefile +++ b/drivers/acpi/riscv/Makefile @@ -1,4 +1,4 @@ # SPDX-License-Identifier: GPL-2.0-only -obj-y += rhct.o +obj-y += rhct.o irq.o obj-$(CONFIG_ACPI_PROCESSOR_IDLE) += cpuidle.o obj-$(CONFIG_ACPI_CPPC_LIB) += cppc.o diff --git a/drivers/acpi/riscv/irq.c b/drivers/acpi/riscv/irq.c new file mode 100644 index 000000000000..36e0525b3235 --- /dev/null +++ b/drivers/acpi/riscv/irq.c @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2023, Ventana Micro Systems Inc + * Author: Sunil V L + * + */ + +#include +#include + +static int irqchip_cmp_func(const void *in0, const void *in1) +{ + struct acpi_probe_entry *elem0 = (struct acpi_probe_entry *)in0; + struct acpi_probe_entry *elem1 = (struct acpi_probe_entry *)in1; + + return (elem0->type > elem1->type) - (elem0->type < elem1->type); +} + +/* + * RISC-V irqchips in MADT of ACPI spec are defined in the same order how + * they should be probed. Since IRQCHIP_ACPI_DECLARE doesn't define any + * order, this arch function will reorder the probe functions as per the + * required order for the architecture. + */ +void arch_sort_irqchip_probe(struct acpi_probe_entry *ap_head, int nr) +{ + struct acpi_probe_entry *ape = ap_head; + + if (nr == 1 || !ACPI_COMPARE_NAMESEG(ACPI_SIG_MADT, ape->id)) + return; + sort(ape, nr, sizeof(*ape), irqchip_cmp_func, NULL); +} From patchwork Mon Apr 15 17:00:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 1923822 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com header.a=rsa-sha256 header.s=google header.b=ER/WmwXm; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=139.178.88.99; helo=sv.mirrors.kernel.org; envelope-from=linux-pci+bounces-6263-incoming=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org [139.178.88.99]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VJD5k1qn6z1yXv for ; Tue, 16 Apr 2024 03:03:38 +1000 (AEST) Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id A32AA281E8E for ; Mon, 15 Apr 2024 17:03:35 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id B672985646; Mon, 15 Apr 2024 17:02:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="ER/WmwXm" X-Original-To: linux-pci@vger.kernel.org Received: from mail-pf1-f180.google.com (mail-pf1-f180.google.com [209.85.210.180]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 442CC83CA4 for ; Mon, 15 Apr 2024 17:02:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.180 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200526; cv=none; b=egpEtLeXRhXJhkjX2+XG1i5A5dICzp+eh3T7dYl36Wn14T9oxeQEZB87f9/WvcScoEEkoL7MmkYc/vDKAUVkUEqHcAEgh46/viCNrrf5jZlKo2opwANGCXCpkPab9gVk+JhLhI25ipOQC4wjBpZ9rGNzP902+xzdDdEx7vV/nco= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200526; c=relaxed/simple; bh=6c1KPNfbsnJq9DUvTTQzdZQPzyBy24eoF7S1WvCF6y8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=C7R0GRZE9QX8jHk1Ifyg1r2bnew7Y77oBXG5cScck5jcRqDjoEPBSGN1A1ClUVnTcuWUoQ/QkSLAXWiIgqmkE0BIwOKeEYUhaByat+F2shOjZAwqjCb1NdHR1VC8z0qKmH8N4KqiTN1GRqzbijuGsJ+fJF4sl+zYZssbb49O9Ec= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com; spf=pass smtp.mailfrom=ventanamicro.com; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b=ER/WmwXm; arc=none smtp.client-ip=209.85.210.180 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Received: by mail-pf1-f180.google.com with SMTP id d2e1a72fcca58-6eff2be3b33so1194280b3a.2 for ; Mon, 15 Apr 2024 10:02:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1713200523; x=1713805323; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=teU93TtwDbXbcibIb7AXZv+o/BW+BbmtaOdYSVoKyTI=; b=ER/WmwXmBdMEr36nrxErZvolaNMxrOahPL/iWV15IB0Mvo6yOhqVFB53zyUyTysuUT vcfwQjfAiE2sNMJmRiaZjt4SDPos4+Q3Jvy1/55xTJa4DgpkHQUm455gWew7WB9EJ1sW PnVvJ0sw5chzxr1jBbOizKzvm0ky9eHloxT0NiEPK6kSHBJfopGtPjNRUbb1XOR04dK5 9+bWNgmgDpzwoTVmAf/AzBKSju777e4d6dRtjxEik1P48d4HPyzPgQT+LELrxKI9sTE1 SDiviKEjnRntF7q8CwUVAuWS9IZCDvSDTnvb1H8TTl6vu8uJo/lRVqvPNPLggJQDjJE/ dsag== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713200523; x=1713805323; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=teU93TtwDbXbcibIb7AXZv+o/BW+BbmtaOdYSVoKyTI=; b=dBqjNtp062ulsi9czWhKLv9V1CRT4vkij4BuUTMpCvC6sZAgNzTeju7PVob7aLK7zv LmN3gCqqDbzbEDdEfHeTWNPXdgfr+gqaindxew6vUaFg0dqVPPR6GXKUTBypCFLLwBPL WkzM07q5W3bIqQmxXj/opEGEUs3DXSqqTHr6B2G8Bz0UV0dSb/8UvkRSQE4nxyIlcYEi iVijHgs9wAbQ4zaPH7OwDhOOIKcAhqC4qd/dslpJISsDosKjsj/WBkVrFcYFepCFUMzp +xKD/54FZHJYZeT654OAmv0recuTB/XKpEts4YnoqbYxvswMeILogmJr1DKGp+pyDb6r f9JQ== X-Forwarded-Encrypted: i=1; AJvYcCXwdV1w34Io+WmlNtdAVu5qXeI9mndtaA283OPMfO6rIAeuBDEUMNteGj6ydfymdRPUg+T2jn4Ou3+xKeeMolG5Cb1ILKYQjSCl X-Gm-Message-State: AOJu0Yzdrh5idAUrVUjyPOvIbZL6zcbDNDO0a2kqReEScYr/xnIHT1f/ lMzAQDOFeqdVVq+A/R0UopHp7dT0pqZDpg+acq7pfi2YIQhKmPwHMubjF5qLXQk= X-Google-Smtp-Source: AGHT+IHIdjpEtA26gjeeDnuLKQpBt+rlByzg0zdHDQS2GYQedk9D3DuzAQNVqthcjh2+Xm9tW86rPQ== X-Received: by 2002:a05:6a00:3985:b0:6ea:e31e:dc75 with SMTP id fi5-20020a056a00398500b006eae31edc75mr12713019pfb.5.1713200523442; Mon, 15 Apr 2024 10:02:03 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.230]) by smtp.gmail.com with ESMTPSA id 1-20020a056a00072100b006ed045e3a70sm7433158pfm.25.2024.04.15.10.01.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 10:02:03 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Cc: Catalin Marinas , Will Deacon , Paul Walmsley , Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Bjorn Helgaas , Anup Patel , Thomas Gleixner , Samuel Holland , Robert Moore , Haibo1 Xu , Conor Dooley , Andrew Jones , Atish Kumar Patra , Andrei Warkentin , Marc Zyngier , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Sunil V L Subject: [RFC PATCH v4 06/20] ACPI: bus: Add acpi_riscv_init function Date: Mon, 15 Apr 2024 22:30:59 +0530 Message-Id: <20240415170113.662318-7-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240415170113.662318-1-sunilvl@ventanamicro.com> References: <20240415170113.662318-1-sunilvl@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add a new function for RISC-V to do any architecture specific initialization. This function will be used to create platform devices like APLIC, PLIC, RISC-V IOMMU etc. This is similar to acpi_arm_init(). Signed-off-by: Sunil V L --- drivers/acpi/bus.c | 1 + drivers/acpi/riscv/Makefile | 2 +- drivers/acpi/riscv/init.c | 12 ++++++++++++ include/linux/acpi.h | 6 ++++++ 4 files changed, 20 insertions(+), 1 deletion(-) create mode 100644 drivers/acpi/riscv/init.c diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c index 844c46447914..17ee483c3bf4 100644 --- a/drivers/acpi/bus.c +++ b/drivers/acpi/bus.c @@ -1446,6 +1446,7 @@ static int __init acpi_init(void) acpi_hest_init(); acpi_ghes_init(); acpi_arm_init(); + acpi_riscv_init(); acpi_scan_init(); acpi_ec_init(); acpi_debugfs_init(); diff --git a/drivers/acpi/riscv/Makefile b/drivers/acpi/riscv/Makefile index dceec808cfab..42d351859aeb 100644 --- a/drivers/acpi/riscv/Makefile +++ b/drivers/acpi/riscv/Makefile @@ -1,4 +1,4 @@ # SPDX-License-Identifier: GPL-2.0-only -obj-y += rhct.o irq.o +obj-y += rhct.o irq.o init.o obj-$(CONFIG_ACPI_PROCESSOR_IDLE) += cpuidle.o obj-$(CONFIG_ACPI_CPPC_LIB) += cppc.o diff --git a/drivers/acpi/riscv/init.c b/drivers/acpi/riscv/init.c new file mode 100644 index 000000000000..b5807bbdb171 --- /dev/null +++ b/drivers/acpi/riscv/init.c @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2023, Ventana Micro Systems Inc + * Author: Sunil V L + * + */ + +#include + +void __init acpi_riscv_init(void) +{ +} diff --git a/include/linux/acpi.h b/include/linux/acpi.h index 914ecd22ba64..f8f92aaf97ad 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -1525,6 +1525,12 @@ void acpi_arm_init(void); static inline void acpi_arm_init(void) { } #endif +#ifdef CONFIG_RISCV +void acpi_riscv_init(void); +#else +static inline void acpi_riscv_init(void) { } +#endif + #ifdef CONFIG_ACPI_PCC void acpi_init_pcc(void); #else From patchwork Mon Apr 15 17:01:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 1923823 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com header.a=rsa-sha256 header.s=google header.b=ENqBsMHG; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2604:1380:45e3:2400::1; helo=sv.mirrors.kernel.org; envelope-from=linux-pci+bounces-6264-incoming=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org [IPv6:2604:1380:45e3:2400::1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VJD5z1Ttrz1yXv for ; Tue, 16 Apr 2024 03:03:51 +1000 (AEST) Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id 043AB28217D for ; Mon, 15 Apr 2024 17:03:50 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 1DBC083CCC; Mon, 15 Apr 2024 17:02:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="ENqBsMHG" X-Original-To: linux-pci@vger.kernel.org Received: from mail-pf1-f171.google.com (mail-pf1-f171.google.com [209.85.210.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D460083CA1 for ; Mon, 15 Apr 2024 17:02:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200532; cv=none; b=JbyLohif//9IpQGDhOjxPjqPOCm6X4AlnuZHhmXsLM0Sk6MSAThM6Wla7lfo9V/x4lkd7WLxOgHn1dXCPGgpu/o72GWzxqNX5cY03W2HzXzmmHpsn5LcVTQO/l2gX5095P71KAFmuNzmi6UkVcgg2nZSJdHlqDs8rXp8KfdhD4E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200532; c=relaxed/simple; bh=NYDxzQHyf8gJHPAvOALBAMzhx5urWTz2dTzECHqtOGQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=tlnIJRhKSnmuUKDHoKHquQFhX3hCbmzpfuuo6Y7mplvxZSpC5nLbEvZNnDtKvrK7P6TRzG9U/T2Du3ePfHfRtHnbTFreg7nZSe2FM0W+i59PLT2ifDm4LJVmkZgYOq6ert1FISM7YH60VaDGCvtWtPMekB133PF/MaHHnKyIYTc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com; spf=pass smtp.mailfrom=ventanamicro.com; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b=ENqBsMHG; arc=none smtp.client-ip=209.85.210.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Received: by mail-pf1-f171.google.com with SMTP id d2e1a72fcca58-6ecf05fd12fso3342962b3a.2 for ; Mon, 15 Apr 2024 10:02:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1713200530; x=1713805330; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=wivOzLRmXtJHidm0Hubd14abZ9qXDzBQHr2qytLzYnU=; b=ENqBsMHG3dHJoDK9E+1dCa/IRXsngfMyh274xl+bLsBdlYCzo2pFpTtuEKw9OH4w7r tAPfZLryh54eyzgeCkvDXCxuU2sp2sATto8QOuxcUXUAUQTZi+KlH5g8EeWSKus98ESE vNCVQ8PzxF1/SrbLI+C36qS91tO7TBZk5hZn/BwKn8D411D3Ju0nzUMsIhMZOyNPcV11 0GXdaeOOhy3K3c3Zq55mOPo3TBaVGWtlN5TcwCWzTaMa91ICmdmHyRp9RXw9AQCMPG7p 9/n2vPRHPCoSz/e1FNzlsnuXcK44k/23f8P8G+2MuzIHdglTOHSlsRxtizRV12g1LO8k OZ+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713200530; x=1713805330; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wivOzLRmXtJHidm0Hubd14abZ9qXDzBQHr2qytLzYnU=; b=us6dYbWXTlhO8lMPDscZ8T5CCO3YBAu94RWN+FPKf7amImx+kBPjKkPIKC2wVn8lgJ ONK/bZE+v0yEBriycTU5aZsIresJG0bxA3su5XayPoa+qD/fmu+jjAvCxPkauAfQ5W/D AlxAN2rz2EKXmT1ZGqsZ6t9D4trOWbPqxtMeKR8jKGV7lNlt/TzhfrLjmCLc2fsqo5BB rKRONCD2x1vFXpSSzsIIH93ovgIjHOKHdPiaZGwcR4cJfcA4qXGbTXX/wdC3eYAyhBHe mkDnlHN3qza4/KeqPIDGjHzghHrW0ftf2nMKnWPOpjdYp5F+NKt3w9OD0TfROncx6e6I hOIQ== X-Forwarded-Encrypted: i=1; AJvYcCWCoA5PkI7HJa9skzWQJTO0wNAlnSH7FlgzxFhw/JZfWSWfu3KxOwNucsVMIiBoVBlt6tgZj7rtj72Z4EhXV+hY4WPM1dmImvyG X-Gm-Message-State: AOJu0Yw5vwDerRjSfhjwpF75pPv0Cqpq2TrQahyrd5H4uoFVZIFJfST5 u+KfhtLVR3LVkgv+LoSlcle/5a3a9bzGIKkM6BePHMxprjsCDNhlUtAsIOgrv7Y= X-Google-Smtp-Source: AGHT+IFQgj91jSGw2lUkZcvmJ8fK2VsBYSBL2HSqDtP8zaw7fuUgNF2lymwMr71eYZkL80x3yGmBkw== X-Received: by 2002:a05:6a00:4f94:b0:6e6:8df5:f77a with SMTP id ld20-20020a056a004f9400b006e68df5f77amr12893462pfb.31.1713200530140; Mon, 15 Apr 2024 10:02:10 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.230]) by smtp.gmail.com with ESMTPSA id 1-20020a056a00072100b006ed045e3a70sm7433158pfm.25.2024.04.15.10.02.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 10:02:09 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Cc: Catalin Marinas , Will Deacon , Paul Walmsley , Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Bjorn Helgaas , Anup Patel , Thomas Gleixner , Samuel Holland , Robert Moore , Haibo1 Xu , Conor Dooley , Andrew Jones , Atish Kumar Patra , Andrei Warkentin , Marc Zyngier , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Sunil V L Subject: [RFC PATCH v4 07/20] RISC-V: Kconfig: Select deferred GSI probe for ACPI systems Date: Mon, 15 Apr 2024 22:31:00 +0530 Message-Id: <20240415170113.662318-8-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240415170113.662318-1-sunilvl@ventanamicro.com> References: <20240415170113.662318-1-sunilvl@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On RISC-V platforms, apart from root interrupt controllers (which provide local interrupts and IPI), other interrupt controllers in the hierarchy are probed late. Enable this CONFIG option for RISC-V ACPI based platforms. Signed-off-by: Sunil V L --- arch/riscv/Kconfig | 1 + drivers/acpi/Kconfig | 3 +++ 2 files changed, 4 insertions(+) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 69cc0509a19a..d8cdb3535e44 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -15,6 +15,7 @@ config RISCV select ACPI_GENERIC_GSI if ACPI select ACPI_MCFG if (ACPI && PCI) select ACPI_REDUCED_HARDWARE_ONLY if ACPI + select ARCH_ACPI_DEFERRED_GSI if ACPI select ARCH_DMA_DEFAULT_COHERENT select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2 diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig index e3a7c2aedd5f..ebec1707f662 100644 --- a/drivers/acpi/Kconfig +++ b/drivers/acpi/Kconfig @@ -587,6 +587,9 @@ config ACPI_PRMT substantially increase computational overhead related to the initialization of some server systems. +config ARCH_ACPI_DEFERRED_GSI + bool + endif # ACPI config X86_PM_TIMER From patchwork Mon Apr 15 17:01:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 1923824 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com header.a=rsa-sha256 header.s=google header.b=g8VaR1/m; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=147.75.199.223; helo=ny.mirrors.kernel.org; envelope-from=linux-pci+bounces-6265-incoming=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org [147.75.199.223]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VJD6H1Wvmz1yXv for ; Tue, 16 Apr 2024 03:04:07 +1000 (AEST) Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ny.mirrors.kernel.org (Postfix) with ESMTPS id 2CE221C21120 for ; Mon, 15 Apr 2024 17:04:05 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id E69DB84A32; Mon, 15 Apr 2024 17:02:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="g8VaR1/m" X-Original-To: linux-pci@vger.kernel.org Received: from mail-pf1-f171.google.com (mail-pf1-f171.google.com [209.85.210.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8DA6B86655 for ; Mon, 15 Apr 2024 17:02:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200538; cv=none; b=n0jAsQmK6QMe4zEErWF+Ng3mlTnYetXH7/l/add8+O9uUS3QssYx8CB7r3nWdiImBuBJ1q2boFJ4h0qPiaJ3ICX1DLiqmt1w9mC7wM7DPDape4kNoUOwUOr7aBt+K8bFYu+7GKb3LxzLtaG8Ig28xvBLfZM8X5kIq4JiLZkdcOg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200538; c=relaxed/simple; bh=2Gz5QkDmnr7hC62yIyTV6F1j/bp+6gUwdzqqwho4EiY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=aYMNuMoWs7AMRGK9kr4q2XXPxsdmaxwupG2XFt0VMS9FmrjCrIQD8e+lP6x29eSfsM2crn4k0m0FkWsU0eHA2d3qhsluojsR5iXeSr/bERlpNOAet5k0L262QH7nM18rtmGGDro9HGMlUEtTo1Lhm9z5P+6GArQRyKa3xTkOrDc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com; spf=pass smtp.mailfrom=ventanamicro.com; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b=g8VaR1/m; arc=none smtp.client-ip=209.85.210.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Received: by mail-pf1-f171.google.com with SMTP id d2e1a72fcca58-6effe9c852eso927696b3a.3 for ; Mon, 15 Apr 2024 10:02:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1713200537; x=1713805337; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=wQjMcgzCCX1zvyyhnfJhjMc7UuQWOWfTm7mVOWGolO4=; b=g8VaR1/m3IE/227Bo+gzhO/WkqQiWRT+aN5TF6XOdmS0ACj8BJfeGXzAvjNJkWUeRh WihRMp590qQS3MpkgRKqdwavMDkkz0HIHFioE9TgjFtCR0VypVzIejirZ3AQJSgm5fY0 gEXGMz5A8FrhDEQO2+YPVlyjg2pMJthxpkgaEsvbxobMy2oqgMVu5tz0mLu/Ue+/ntfv GX7OkZvx/8uyJsT+oxuNI7kC3VjR6L1U2YRFAfA8IP+OVTmm7XeTQ0k64aalN+EZCftL FERWHQlSfdrPazQXuuwRQO4jcMPLOk7N8tcQiFE562urEdoA9KneK1UlKO8sxU2RHL9j 8Gbw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713200537; x=1713805337; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wQjMcgzCCX1zvyyhnfJhjMc7UuQWOWfTm7mVOWGolO4=; b=uNk8TryBqo9vefSPzS31EdPZoEuzhLwXuFI1HtTCnfwss+aIFQV8u8MwgitsD75i8W UbK8/u+3dm87fb5LE3DfLKoGIL3pHvbD6LMgxSWbShuxjeGZ/o7e9m2Swba5KL+ESfey xJpMWvml5gE7iHv9uvC7qLan5EXB8ZMDl7EGGgbnOAzAef8RKhkIxm3u+JcV5MZ5tiOp M1e4+x5WGE0XxZSGVuitowNs4rWwAcBo6EFYgeCT7fc33f7EvXLIGrz6AjODD7svhTdf PIyqMVOI2aVvSb8c9URuYas4mkR/IQmQMgl+dTy4EFa1xA27DekiVH/4ZxaqSf3jLARj X+rw== X-Forwarded-Encrypted: i=1; AJvYcCXeQ+uKihoJCswEDDzin+kc/vxtARAMelyN6DouaRNezpLmC9Qm58ZNlz1WWsPO3d3aNoGbU18jMG574FBUBlFR/qwsyM4K7Q9H X-Gm-Message-State: AOJu0Yz4WCHl3mbKuLaPUG3z+1legxfW8Um4Y5KBp43r3L4LIgsdmLyA BglzNhz93gyuQ2LCfXvLjmJWVHxoxDUhennKovOzZg86oztPDmfdKWSu3nBpROE= X-Google-Smtp-Source: AGHT+IEOKdv2GIoPVzAfszA+Mczkslu8VP2JvMat3iDp2rWUvNRo9ufo+FIpILZ6uWBafbyo9KluZw== X-Received: by 2002:a05:6a00:2314:b0:6ec:cec1:8fe3 with SMTP id h20-20020a056a00231400b006eccec18fe3mr10562037pfh.11.1713200536823; Mon, 15 Apr 2024 10:02:16 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.230]) by smtp.gmail.com with ESMTPSA id 1-20020a056a00072100b006ed045e3a70sm7433158pfm.25.2024.04.15.10.02.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 10:02:16 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Cc: Catalin Marinas , Will Deacon , Paul Walmsley , Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Bjorn Helgaas , Anup Patel , Thomas Gleixner , Samuel Holland , Robert Moore , Haibo1 Xu , Conor Dooley , Andrew Jones , Atish Kumar Patra , Andrei Warkentin , Marc Zyngier , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Sunil V L Subject: [RFC PATCH v4 08/20] ACPI: scan: Refactor dependency creation Date: Mon, 15 Apr 2024 22:31:01 +0530 Message-Id: <20240415170113.662318-9-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240415170113.662318-1-sunilvl@ventanamicro.com> References: <20240415170113.662318-1-sunilvl@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Some architectures like RISC-V will use implicit dependencies like GSI map to create dependencies between interrupt controller and devices. To support doing that, the function which creates the dependency, is refactored bit and made public so that dependency can be added from outside of scan.c as well. Signed-off-by: Sunil V L --- drivers/acpi/scan.c | 48 ++++++++++++++++++++++++----------------- include/acpi/acpi_bus.h | 1 + 2 files changed, 29 insertions(+), 20 deletions(-) diff --git a/drivers/acpi/scan.c b/drivers/acpi/scan.c index de30a0af7a2f..c8f40d81b6cb 100644 --- a/drivers/acpi/scan.c +++ b/drivers/acpi/scan.c @@ -2028,33 +2028,18 @@ static void acpi_scan_init_hotplug(struct acpi_device *adev) } } -static u32 acpi_scan_check_dep(acpi_handle handle) +int acpi_scan_add_dep(acpi_handle handle, struct acpi_handle_list *dep_devices) { - struct acpi_handle_list dep_devices; u32 count; int i; - /* - * Check for _HID here to avoid deferring the enumeration of: - * 1. PCI devices. - * 2. ACPI nodes describing USB ports. - * Still, checking for _HID catches more then just these cases ... - */ - if (!acpi_has_method(handle, "_DEP") || !acpi_has_method(handle, "_HID")) - return 0; - - if (!acpi_evaluate_reference(handle, "_DEP", NULL, &dep_devices)) { - acpi_handle_debug(handle, "Failed to evaluate _DEP.\n"); - return 0; - } - - for (count = 0, i = 0; i < dep_devices.count; i++) { + for (count = 0, i = 0; i < dep_devices->count; i++) { struct acpi_device_info *info; struct acpi_dep_data *dep; bool skip, honor_dep; acpi_status status; - status = acpi_get_object_info(dep_devices.handles[i], &info); + status = acpi_get_object_info(dep_devices->handles[i], &info); if (ACPI_FAILURE(status)) { acpi_handle_debug(handle, "Error reading _DEP device info\n"); continue; @@ -2073,7 +2058,7 @@ static u32 acpi_scan_check_dep(acpi_handle handle) count++; - dep->supplier = dep_devices.handles[i]; + dep->supplier = dep_devices->handles[i]; dep->consumer = handle; dep->honor_dep = honor_dep; @@ -2082,7 +2067,30 @@ static u32 acpi_scan_check_dep(acpi_handle handle) mutex_unlock(&acpi_dep_list_lock); } - acpi_handle_list_free(&dep_devices); + acpi_handle_list_free(dep_devices); + return count; +} + +static u32 acpi_scan_check_dep(acpi_handle handle) +{ + struct acpi_handle_list dep_devices; + u32 count = 0; + + /* + * Check for _HID here to avoid deferring the enumeration of: + * 1. PCI devices. + * 2. ACPI nodes describing USB ports. + * Still, checking for _HID catches more then just these cases ... + */ + if (!acpi_has_method(handle, "_DEP") || !acpi_has_method(handle, "_HID")) + return count; + + if (!acpi_evaluate_reference(handle, "_DEP", NULL, &dep_devices)) { + acpi_handle_debug(handle, "Failed to evaluate _DEP.\n"); + return count; + } + + count += acpi_scan_add_dep(handle, &dep_devices); return count; } diff --git a/include/acpi/acpi_bus.h b/include/acpi/acpi_bus.h index 1a4dfd7a1c4a..28a9b87c23fa 100644 --- a/include/acpi/acpi_bus.h +++ b/include/acpi/acpi_bus.h @@ -993,6 +993,7 @@ static inline void acpi_put_acpi_dev(struct acpi_device *adev) int acpi_wait_for_acpi_ipmi(void); +int acpi_scan_add_dep(acpi_handle handle, struct acpi_handle_list *dep_devices); #else /* CONFIG_ACPI */ static inline int register_acpi_bus_type(void *bus) { return 0; } From patchwork Mon Apr 15 17:01:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 1923825 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com header.a=rsa-sha256 header.s=google header.b=Syz5qiBo; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=147.75.80.249; helo=am.mirrors.kernel.org; envelope-from=linux-pci+bounces-6266-incoming=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from am.mirrors.kernel.org (am.mirrors.kernel.org [147.75.80.249]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VJD6c5Svbz1yXv for ; Tue, 16 Apr 2024 03:04:24 +1000 (AEST) Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id 0F2241F21B48 for ; Mon, 15 Apr 2024 17:04:22 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 36105126F05; Mon, 15 Apr 2024 17:02:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="Syz5qiBo" X-Original-To: linux-pci@vger.kernel.org Received: from mail-pf1-f177.google.com (mail-pf1-f177.google.com [209.85.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E94AD82D7C for ; Mon, 15 Apr 2024 17:02:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.177 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200545; cv=none; b=T5xRazFNEq+DwiSSQV88YHn6VLMNplrFSVXwBQayZV5DAddsnjWzMQngF+NfR7hmFpJMjVsjN7RPOrAlvJkhGMaGlFo0w58Z0rOLFIMqzA+TEBJns+XviOV9fvD2vHGN0WY7ak3hdQgurHJZ86H6WDb+6lwkVEXKU+3AVa5xgCM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200545; c=relaxed/simple; bh=T/1Xcao9xH6emFSa1ilV8PdiC7xRbDw6sg4wGWt0SgA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=hOQSdsjcYlawCjNYeVfNdzwBSEG4L0/DX0tjx+x+cbRpKgcybuFUsGkQS6J20sSvAqqGQQcl0/re5DTOjc50UR+yX3O1Au3N/QU+X3WRT5mkWKjz5oxEpb8FDtrPsfNpSyij/7uz/9A2C78ZTp0rYoObCMr/cjehdnnnrJT1ctU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com; spf=pass smtp.mailfrom=ventanamicro.com; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b=Syz5qiBo; arc=none smtp.client-ip=209.85.210.177 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Received: by mail-pf1-f177.google.com with SMTP id d2e1a72fcca58-6ed3cafd766so2695882b3a.0 for ; Mon, 15 Apr 2024 10:02:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1713200543; x=1713805343; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=W2LHe0TiKeYFnNPgLCeAe5BF4w5DQy6QPlu5Fs7U6q4=; b=Syz5qiBo9ORx5cGaitMszxDVZy+mpVYRakC1j8Wlnb/gtnQ9hKnM+I9Vy3sknKC4o2 tyIVh6GW4p81OIiiOR2EiaPQ/Q/z6SiePljf0jPzjvKSMdRziEBEKC/0ktZ2AD0CbChM im1n7qPmvXLeRt8zYYW5IEAkEPk3I5vO1wfh6zPi+VceJnF3Zauq1pH+x3cvLoaGOkD4 JicmEVydSeAsvTMhxlecj7ViHQ2+ETx8xXWMa5tPPH1b75Lt+bMNzVgn5J+hMssONM+o +RHnuXA4wSLE1zqLbvAlVk+x4oKm8hPGSPLFN+ypsn8FpJPtNo81gsdwmsBuOu5yCUL5 yipw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713200543; x=1713805343; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=W2LHe0TiKeYFnNPgLCeAe5BF4w5DQy6QPlu5Fs7U6q4=; b=TLkqYnRBIctPrnlzvDE2xBQn9Jff67nNcr9KLuMAueYOeVFiQv6MZPUubLBTMmDndy G+zKyzbp59KkzxQPfT81LepX9/p+tfUgAWM9VmfoSqpuHHvXastOTbZhXAJYC9Hty6TS UEl01AzZxHpBYev0xZMaWARsEl4G2ZhJI+pb1E4Y4OHsOPv3PRvHbqUJkFZfWW9I+bW1 Tpg2XkqDN6zqCk6m6gw5HOBn4Nt5zMrhB5LpA2hFXy8HaA/jQtiOMEvHyVgU7pGODKSl pbCw+keR4R2Jy5pvleRhIlpY6FgbUVvUM8k0XisX+jIWk4HVFvd0fSApj6U0fI/rLDt8 fBBg== X-Forwarded-Encrypted: i=1; AJvYcCUd60GgI8Qrh5vddMne/koa/GEi4+awieiPfmy1nzcydQuUiiXD/SFR9rVQ1T3ePjzWxxo/SgMd85HWfpfaBKXtkWcg5J/CvqRX X-Gm-Message-State: AOJu0YwRqyucLk/0x6pFzBPLcZjrzpCC7NRgYtKk0dTK7ialIH6OgUOl mSZa4xx+pEANhOyvx3IkncDW1kVLZB1Dv7/6oyx+KTIGqyz+jtBqCt7LIkhR0uc= X-Google-Smtp-Source: AGHT+IHZPG6wbKkbl+YL/8OPMELdPpFA9RlWoys/7cQw/AgmouLy6gSngELWynfeqJUNk2wi6bZfdA== X-Received: by 2002:a05:6a00:3d0f:b0:6ed:41f3:431d with SMTP id lo15-20020a056a003d0f00b006ed41f3431dmr11412835pfb.0.1713200543335; Mon, 15 Apr 2024 10:02:23 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.230]) by smtp.gmail.com with ESMTPSA id 1-20020a056a00072100b006ed045e3a70sm7433158pfm.25.2024.04.15.10.02.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 10:02:22 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Cc: Catalin Marinas , Will Deacon , Paul Walmsley , Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Bjorn Helgaas , Anup Patel , Thomas Gleixner , Samuel Holland , Robert Moore , Haibo1 Xu , Conor Dooley , Andrew Jones , Atish Kumar Patra , Andrei Warkentin , Marc Zyngier , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Sunil V L Subject: [RFC PATCH v4 09/20] drivers/acpi/scan.c: Update _DEP honor list Date: Mon, 15 Apr 2024 22:31:02 +0530 Message-Id: <20240415170113.662318-10-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240415170113.662318-1-sunilvl@ventanamicro.com> References: <20240415170113.662318-1-sunilvl@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 RISC-V PLIC and APLIC will have _DEP from devices using GSI. So, add these devices into the honor list. Signed-off-by: Sunil V L --- drivers/acpi/scan.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/acpi/scan.c b/drivers/acpi/scan.c index c8f40d81b6cb..07e91616b7d4 100644 --- a/drivers/acpi/scan.c +++ b/drivers/acpi/scan.c @@ -832,6 +832,8 @@ static const char * const acpi_honor_dep_ids[] = { "INTC1095", /* IVSC (ADL) driver must be loaded to allow i2c access to camera sensors */ "INTC100A", /* IVSC (RPL) driver must be loaded to allow i2c access to camera sensors */ "INTC10CF", /* IVSC (MTL) driver must be loaded to allow i2c access to camera sensors */ + "RSCV0001", /* RISC-V PLIC */ + "RSCV0002", /* RISC-V APLIC */ NULL }; From patchwork Mon Apr 15 17:01:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 1923826 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com header.a=rsa-sha256 header.s=google header.b=MTPGx8k3; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=139.178.88.99; helo=sv.mirrors.kernel.org; envelope-from=linux-pci+bounces-6267-incoming=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org [139.178.88.99]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VJD6r3Fpnz1yXv for ; Tue, 16 Apr 2024 03:04:36 +1000 (AEST) Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id 2E2AC2823BD for ; Mon, 15 Apr 2024 17:04:35 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 3494284038; Mon, 15 Apr 2024 17:02:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="MTPGx8k3" X-Original-To: linux-pci@vger.kernel.org Received: from mail-pf1-f172.google.com (mail-pf1-f172.google.com [209.85.210.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 52BF184D0D for ; Mon, 15 Apr 2024 17:02:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200553; cv=none; b=guBhdvRu9A+EeTvtWfH8jJl0ulOoP+H5PYEWWeK4jlgHZmFV2MmuNfOWHn00nV2pWBhDNxGeyywAwS+7xF6LvU2tMBw3ekuVoXDtQYR7b9o5B/uWOhaoW0OIuQ2BZz+L2vi5nz/IrQHXt3KFQQQDLXqeA/ENWchlCvsiXRw6B9g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200553; c=relaxed/simple; bh=8faRomOS+YY08OK+jIa6TJx7uMvk/iowqcEmkn3Wzl4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=k1Xkk6Dty6FtD9CJozSRaLPoqNUoiJVhugM+wwmr5VElkINKSq67VrjXV2TSS7N2I58uE+LwpRsnnDuSvF6xgepOGc5nL2FNTd83n+Q86+Uv6UveE62+EE4wMpdqWZRbf261L6wIZWfZycOeFHg5dVwGyVK2OSM+khUtIqLthv0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com; spf=pass smtp.mailfrom=ventanamicro.com; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b=MTPGx8k3; arc=none smtp.client-ip=209.85.210.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Received: by mail-pf1-f172.google.com with SMTP id d2e1a72fcca58-6ee12766586so2243920b3a.0 for ; Mon, 15 Apr 2024 10:02:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1713200551; x=1713805351; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=qa8aPZaBb5SHnjDhwNe5AO6s82EyT//Q/0nqKZneQ7s=; b=MTPGx8k3q+d72gS/sB4MfwDoNH568FqM8IrvodcxAgLFimnlPnAbRkC5fFJ4jX3PLI 124Srwt+oJY/FcMcKMcgNdBnLIiiTTi2dWGwjA9hMcGVg/yDzkEajsuUNvZ9WikZp184 ScVQnjlj42ge77Jx/Ion+UmQhhF0Ra+92ZWg+FGi75prYwTRLN9l68BHOmXAwyID/BPl J1Z+5jgzePLyMhhH4f4G9jzQp/U/GrbA4JBJGdg0pmZpFRPxqAjVn0fbLPNtwUt+W+hR ZgHoSIvkl/xc1Nd+fyUzms/a6Hz8Jf+DInSCLu8daRn+zL8JJaCzAgNmvhFziSbzoc6X UokA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713200551; x=1713805351; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qa8aPZaBb5SHnjDhwNe5AO6s82EyT//Q/0nqKZneQ7s=; b=lQR9uxOzqP+HJ2ygcrKk+x2zSsBMFT8UPVf53+BzLUQ8m16xUwgfZHnNl4eFLgsfZt bgCrusDP6967fQX3FiYR4OHXLTnCqEQ/DbcmjdT/Q8TV792g3o/F6JyEfnvhxq2jm8Tg OmompKYqN/nOVbTLIL7qzecD5HUUQTz7CBh6oYDfXfdFqiIEGo1tq0H1Stmxi0uMGAIc rgHMRv99n0wzwOW5JG7Hv8vQk8utNrrnhE2AuLvXHQrfQy7iQKsVJecMi1KE1fDKFGhd VVZrwcZfTxyksv+WG3fSPe0cPIYeoGP6+dFawIXG4bp+Mpz4LjIcXA+AIcXN+Z3VE7FH gzIw== X-Forwarded-Encrypted: i=1; AJvYcCVDcpRb5v2BjKAlgJg749jkTnrdTSUrMEZBt/Mq55Zk017mkKtojxTkUwF7H7DzXTcEPYxu1vdBBPZId5M+S9bVtg5JN8P01L4+ X-Gm-Message-State: AOJu0YzvgQABDGJtj8M2CrYA87xKKiamb8LUxoXi7pVaT2Mkn2mL5TEe C5gN/txT1Ss1Tyitd8zsLiCUG6icdacqu+/G56Tqg+MLN/T+ILBYFef2QNETTkE= X-Google-Smtp-Source: AGHT+IGeXHiOC0F13RXgbWt688j7t9WtlnZZWw2iOK4tJHmoNhJ03Rmp2MstRb1M8cWB8bLvffMYEA== X-Received: by 2002:a05:6a00:c88:b0:6ec:e21b:24f with SMTP id a8-20020a056a000c8800b006ece21b024fmr288145pfv.10.1713200550215; Mon, 15 Apr 2024 10:02:30 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.230]) by smtp.gmail.com with ESMTPSA id 1-20020a056a00072100b006ed045e3a70sm7433158pfm.25.2024.04.15.10.02.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 10:02:29 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Cc: Catalin Marinas , Will Deacon , Paul Walmsley , Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Bjorn Helgaas , Anup Patel , Thomas Gleixner , Samuel Holland , Robert Moore , Haibo1 Xu , Conor Dooley , Andrew Jones , Atish Kumar Patra , Andrei Warkentin , Marc Zyngier , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Sunil V L Subject: [RFC PATCH v4 10/20] RISC-V: ACPI: Initialize GSI mapping structures Date: Mon, 15 Apr 2024 22:31:03 +0530 Message-Id: <20240415170113.662318-11-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240415170113.662318-1-sunilvl@ventanamicro.com> References: <20240415170113.662318-1-sunilvl@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 RISC-V has PLIC and APLIC in MADT as well as namespace devices. Initialize the list of those structures using MADT and namespace devices to create mapping between the ACPI handle and the GSI ranges. This is will be used later to add dependencies. Signed-off-by: Sunil V L --- arch/riscv/include/asm/irq.h | 22 +++++ drivers/acpi/riscv/init.c | 2 + drivers/acpi/riscv/init.h | 4 + drivers/acpi/riscv/irq.c | 159 +++++++++++++++++++++++++++++++++++ 4 files changed, 187 insertions(+) create mode 100644 drivers/acpi/riscv/init.h diff --git a/arch/riscv/include/asm/irq.h b/arch/riscv/include/asm/irq.h index 8e10a94430a2..44a0b128c602 100644 --- a/arch/riscv/include/asm/irq.h +++ b/arch/riscv/include/asm/irq.h @@ -16,4 +16,26 @@ void riscv_set_intc_hwnode_fn(struct fwnode_handle *(*fn)(void)); struct fwnode_handle *riscv_get_intc_hwnode(void); +#ifdef CONFIG_ACPI + +enum riscv_irqchip_type { + ACPI_RISCV_IRQCHIP_INTC = 0x00, + ACPI_RISCV_IRQCHIP_IMSIC = 0x01, + ACPI_RISCV_IRQCHIP_PLIC = 0x02, + ACPI_RISCV_IRQCHIP_APLIC = 0x03, +}; + +int riscv_acpi_get_gsi_info(struct fwnode_handle *fwnode, u32 *gsi_base, + u32 *id, u32 *nr_irqs, u32 *nr_idcs); +struct fwnode_handle *riscv_acpi_get_gsi_domain_id(u32 gsi); + +#else +static inline int riscv_acpi_get_gsi_info(struct fwnode_handle *fwnode, u32 *gsi_base, + u32 *id, u32 *nr_irqs, u32 *nr_idcs) +{ + return 0; +} + +#endif /* CONFIG_ACPI */ + #endif /* _ASM_RISCV_IRQ_H */ diff --git a/drivers/acpi/riscv/init.c b/drivers/acpi/riscv/init.c index b5807bbdb171..56780af6ceb3 100644 --- a/drivers/acpi/riscv/init.c +++ b/drivers/acpi/riscv/init.c @@ -6,7 +6,9 @@ */ #include +#include "init.h" void __init acpi_riscv_init(void) { + riscv_acpi_init_gsi_mapping(); } diff --git a/drivers/acpi/riscv/init.h b/drivers/acpi/riscv/init.h new file mode 100644 index 000000000000..2a488ec684b9 --- /dev/null +++ b/drivers/acpi/riscv/init.h @@ -0,0 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#include + +int __init riscv_acpi_init_gsi_mapping(void); diff --git a/drivers/acpi/riscv/irq.c b/drivers/acpi/riscv/irq.c index 36e0525b3235..de0f1ba92068 100644 --- a/drivers/acpi/riscv/irq.c +++ b/drivers/acpi/riscv/irq.c @@ -7,6 +7,21 @@ #include #include +#include + +#include "init.h" + +struct riscv_ext_intc_list { + acpi_handle handle; + u32 gsi_base; + u32 nr_irqs; + u32 nr_idcs; + u32 id; + u32 type; + struct list_head list; +}; + +LIST_HEAD(ext_intc_list); static int irqchip_cmp_func(const void *in0, const void *in1) { @@ -30,3 +45,147 @@ void arch_sort_irqchip_probe(struct acpi_probe_entry *ap_head, int nr) return; sort(ape, nr, sizeof(*ape), irqchip_cmp_func, NULL); } + +static int riscv_acpi_update_gsi_handle(u32 gsi_base, acpi_handle handle) +{ + struct riscv_ext_intc_list *ext_intc_element; + struct list_head *i, *tmp; + + list_for_each_safe(i, tmp, &ext_intc_list) { + ext_intc_element = list_entry(i, struct riscv_ext_intc_list, list); + if (gsi_base == ext_intc_element->gsi_base) { + ext_intc_element->handle = handle; + return 0; + } + } + + return -1; +} + +static acpi_handle riscv_acpi_get_gsi_handle(u32 gsi) +{ + struct riscv_ext_intc_list *ext_intc_element; + struct list_head *i, *tmp; + + list_for_each_safe(i, tmp, &ext_intc_list) { + ext_intc_element = list_entry(i, struct riscv_ext_intc_list, list); + if (gsi >= ext_intc_element->gsi_base && + gsi < (ext_intc_element->gsi_base + ext_intc_element->nr_irqs)) + return ext_intc_element->handle; + } + + return NULL; +} + +int riscv_acpi_get_gsi_info(struct fwnode_handle *fwnode, u32 *gsi_base, + u32 *id, u32 *nr_irqs, u32 *nr_idcs) +{ + struct riscv_ext_intc_list *ext_intc_element; + struct list_head *i, *tmp; + + list_for_each_safe(i, tmp, &ext_intc_list) { + ext_intc_element = list_entry(i, struct riscv_ext_intc_list, list); + if (ext_intc_element->handle == ACPI_HANDLE_FWNODE(fwnode)) { + *gsi_base = ext_intc_element->gsi_base; + *id = ext_intc_element->id; + *nr_irqs = ext_intc_element->nr_irqs; + if (nr_idcs) + *nr_idcs = ext_intc_element->nr_idcs; + return 0; + } + } + + return -ENODEV; +} + +struct fwnode_handle *riscv_acpi_get_gsi_domain_id(u32 gsi) +{ + struct riscv_ext_intc_list *ext_intc_element; + struct acpi_device *adev; + struct list_head *i, *tmp; + + list_for_each_safe(i, tmp, &ext_intc_list) { + ext_intc_element = list_entry(i, struct riscv_ext_intc_list, list); + if (gsi >= ext_intc_element->gsi_base && + gsi < (ext_intc_element->gsi_base + ext_intc_element->nr_irqs)) { + adev = acpi_fetch_acpi_dev(ext_intc_element->handle); + if (!adev) + return NULL; + + return acpi_fwnode_handle(adev); + } + } + + return NULL; +} + +static int __init riscv_acpi_register_ext_intc(u32 gsi_base, u32 nr_irqs, u32 nr_idcs, + u32 id, u32 type) +{ + struct riscv_ext_intc_list *ext_intc_element; + + ext_intc_element = kzalloc(sizeof(*ext_intc_element), GFP_KERNEL); + if (!ext_intc_element) + return -1; + + ext_intc_element->gsi_base = gsi_base; + ext_intc_element->nr_irqs = nr_irqs; + ext_intc_element->nr_idcs = nr_idcs; + ext_intc_element->id = id; + list_add_tail(&ext_intc_element->list, &ext_intc_list); + return 0; +} + +static acpi_status __init riscv_acpi_create_gsi_map(acpi_handle handle, u32 level, + void *context, void **return_value) +{ + acpi_status status; + u64 gbase; + + if (!acpi_has_method(handle, "_GSB")) + return AE_OK; + + status = acpi_evaluate_integer(handle, "_GSB", NULL, &gbase); + if (ACPI_FAILURE(status)) { + acpi_handle_err(handle, "failed to evaluate _GSB method\n"); + return AE_OK; + } + + riscv_acpi_update_gsi_handle((u32)gbase, handle); + return AE_OK; +} + +static int __init riscv_acpi_aplic_parse_madt(union acpi_subtable_headers *header, + const unsigned long end) +{ + struct acpi_madt_aplic *aplic = (struct acpi_madt_aplic *)header; + + riscv_acpi_register_ext_intc(aplic->gsi_base, aplic->num_sources, + aplic->num_idcs, aplic->id, ACPI_RISCV_IRQCHIP_APLIC); + return 0; +} + +static int __init riscv_acpi_plic_parse_madt(union acpi_subtable_headers *header, + const unsigned long end) +{ + struct acpi_madt_plic *plic = (struct acpi_madt_plic *)header; + + riscv_acpi_register_ext_intc(plic->gsi_base, plic->num_irqs, 0, + plic->id, ACPI_RISCV_IRQCHIP_PLIC); + return 0; +} + +int __init riscv_acpi_init_gsi_mapping(void) +{ + int count = 0; + + count = acpi_table_parse_madt(ACPI_MADT_TYPE_PLIC, riscv_acpi_plic_parse_madt, 0); + if (count <= 0) { + acpi_table_parse_madt(ACPI_MADT_TYPE_APLIC, riscv_acpi_aplic_parse_madt, 0); + acpi_get_devices("RSCV0002", riscv_acpi_create_gsi_map, NULL, NULL); + return 0; + } + + acpi_get_devices("RSCV0001", riscv_acpi_create_gsi_map, NULL, NULL); + return 0; +} From patchwork Mon Apr 15 17:01:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 1923827 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com header.a=rsa-sha256 header.s=google header.b=jkpX6yBs; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=139.178.88.99; helo=sv.mirrors.kernel.org; envelope-from=linux-pci+bounces-6268-incoming=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org [139.178.88.99]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VJD733Yzmz1yXv for ; Tue, 16 Apr 2024 03:04:47 +1000 (AEST) Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id 12116281DD2 for ; Mon, 15 Apr 2024 17:04:46 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 0EC4A1272B7; Mon, 15 Apr 2024 17:02:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="jkpX6yBs" X-Original-To: linux-pci@vger.kernel.org Received: from mail-pf1-f173.google.com (mail-pf1-f173.google.com [209.85.210.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B287084D3D for ; Mon, 15 Apr 2024 17:02:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.173 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200560; cv=none; b=cL27JjAGLzYb10LB380BqnCkwXED2T2yvxAWEowsEIUlBj2nYj/GULpXHAYGWg0W153J2EPLVizMFjgcNRiuoCkTcPV2ePwm64vI/0ROZElF2Wnt3uj9Rq5xplEJA+TJtMiRbthvGxqWauQT6RBJCD5KD7l3s0MDs6k51P9oE14= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200560; c=relaxed/simple; bh=LYtUv6qDwrcBtr8K6aN25hN45uuc46R4wBZ+hNYpcAk=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=QRDaPkYNS/m9OBTQVUY8j7/yt3SxP9RdE01pvaCBFyZAR9fNj29bBpkE0Msh+19CQkLXED5gXh3FCUl6xHiKZKInVSItOry8e+PY627nY2pYulCf4FHN27HQTzjG5pAGQjoLnoYMvtdV3XLmSTpQUgjnjTXNWKmnpV61Hz+DNL4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com; spf=pass smtp.mailfrom=ventanamicro.com; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b=jkpX6yBs; arc=none smtp.client-ip=209.85.210.173 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Received: by mail-pf1-f173.google.com with SMTP id d2e1a72fcca58-6ecec796323so3655288b3a.3 for ; Mon, 15 Apr 2024 10:02:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1713200558; x=1713805358; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=c1X7evQ35uoewh1RNAGJwcs/iaU3rzDK4qB90vlKVhs=; b=jkpX6yBsDW7onPzCFAsKKcOMByACBD8XrIKYAhwQhMZR9kRXkw0YcTdqLkecL9gsIl 1iMrioEqkRlgVQ1B395y5gLmXpuH/dlRPyNddKUCZiSMgisGVjWFD1XV0vujsNJuC37Y ssPJBPXAS9oldXT4YCKxSyEQKrKVFWSoerQwR9ZaEQO4BMmn30eWIj5/6iWQ2dKn+FoU FsVHFjxm6SgMLyyJHs45PbaYl65N27FlmU5aqVLMJM5t2YP8SIkT03C6EHHgFO1he6tQ MeMzRcSpJCoCI5N9wWUhDmowv1fiYVgqNGkD62YFy4JCedoEdbmz8fBiQ/hTryCiEZcu yuzw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713200558; x=1713805358; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=c1X7evQ35uoewh1RNAGJwcs/iaU3rzDK4qB90vlKVhs=; b=dt1uieSDPZtHSVVe+KSFutXpXh9nenS33XWBinXgqC6L2xc583O98YDIdXj7nyqks0 QD1EqWzZ7bo7mUSyIRK3XxR3CL4Ky4D4AWMkUXGphIBZSNXpMcxbPt6600Pvzl5rNGYt 9KSoWc5SQhjoHsryBCtjDPJdoT+i6dHLe2Z/wGf0vbqYGZdOV8hVokKZGaQUzTX/8P5N CB7v9eNDgLh/9xWO95TlzZWdKLs0Iwvsvtw0EkFEMsFw/RFgCVMcp2ytymkQY0tlmbja qYVrh33fFJc7AQzVrxQdYo0rC9ZbQAy9Wuog+gkg+SglwChPE3vTGtDKSqd2Y0URVuaZ 15bg== X-Forwarded-Encrypted: i=1; AJvYcCUhPI0DcUq+Dn3VNTjgNhL02UsLXzlJ4S9BqSF82PzDQBwCmtf8PvgYqnHPemDIlbE6uo7Kp+4axkUm2lf5R0uCMDJEO7v6Rfno X-Gm-Message-State: AOJu0YzIsnj8wEWtca8TNju5egKD/mwofsvjihQXvfuAKOgPOagaZfdG JIOkxpRUH1ApPpWYTYqOrAvGjrHyr/yXqc8HA+2jRJjXtnH5cNM4JX53KCCXmXc= X-Google-Smtp-Source: AGHT+IHP5Rv0C3YxWinnwyj54lMdddb7BaD0yQpP0Yg8Qswii7cMjohW9Wcp53K9v1it+Ov4jHo51g== X-Received: by 2002:a05:6a00:181d:b0:6ec:fe26:4ec1 with SMTP id y29-20020a056a00181d00b006ecfe264ec1mr12412388pfa.22.1713200558011; Mon, 15 Apr 2024 10:02:38 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.230]) by smtp.gmail.com with ESMTPSA id 1-20020a056a00072100b006ed045e3a70sm7433158pfm.25.2024.04.15.10.02.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 10:02:36 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Cc: Catalin Marinas , Will Deacon , Paul Walmsley , Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Bjorn Helgaas , Anup Patel , Thomas Gleixner , Samuel Holland , Robert Moore , Haibo1 Xu , Conor Dooley , Andrew Jones , Atish Kumar Patra , Andrei Warkentin , Marc Zyngier , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Sunil V L Subject: [RFC PATCH v4 11/20] ACPI: scan.c: Define weak function to populate dependencies Date: Mon, 15 Apr 2024 22:31:04 +0530 Message-Id: <20240415170113.662318-12-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240415170113.662318-1-sunilvl@ventanamicro.com> References: <20240415170113.662318-1-sunilvl@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Some architectures like RISC-V need to add dependencies without explicit _DEP. Define a weak function which can be implemented by the architecture. Signed-off-by: Sunil V L --- drivers/acpi/scan.c | 11 +++++++++++ include/acpi/acpi_bus.h | 1 + 2 files changed, 12 insertions(+) diff --git a/drivers/acpi/scan.c b/drivers/acpi/scan.c index 07e91616b7d4..8e23b9508716 100644 --- a/drivers/acpi/scan.c +++ b/drivers/acpi/scan.c @@ -2073,11 +2073,22 @@ int acpi_scan_add_dep(acpi_handle handle, struct acpi_handle_list *dep_devices) return count; } +u32 __weak arch_acpi_add_auto_dep(acpi_handle handle) { return 0; } + static u32 acpi_scan_check_dep(acpi_handle handle) { struct acpi_handle_list dep_devices; u32 count = 0; + /* + * Some architectures like RISC-V need to add dependencies for + * all devices which use GSI to the interrupt controller so that + * interrupt controller is probed before any of those devices. + * Instead of mandating _DEP on all the devices, detect the + * dependency and add automatically. + */ + count += arch_acpi_add_auto_dep(handle); + /* * Check for _HID here to avoid deferring the enumeration of: * 1. PCI devices. diff --git a/include/acpi/acpi_bus.h b/include/acpi/acpi_bus.h index 28a9b87c23fa..5fba4075d764 100644 --- a/include/acpi/acpi_bus.h +++ b/include/acpi/acpi_bus.h @@ -994,6 +994,7 @@ static inline void acpi_put_acpi_dev(struct acpi_device *adev) int acpi_wait_for_acpi_ipmi(void); int acpi_scan_add_dep(acpi_handle handle, struct acpi_handle_list *dep_devices); +u32 arch_acpi_add_auto_dep(acpi_handle handle); #else /* CONFIG_ACPI */ static inline int register_acpi_bus_type(void *bus) { return 0; } From patchwork Mon Apr 15 17:01:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 1923828 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com header.a=rsa-sha256 header.s=google header.b=ioW7xzZI; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2604:1380:45e3:2400::1; helo=sv.mirrors.kernel.org; envelope-from=linux-pci+bounces-6269-incoming=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org [IPv6:2604:1380:45e3:2400::1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VJD7Q5N46z1yY4 for ; Tue, 16 Apr 2024 03:05:06 +1000 (AEST) Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id 5B4A8281F33 for ; Mon, 15 Apr 2024 17:05:05 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 82F5885269; Mon, 15 Apr 2024 17:02:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="ioW7xzZI" X-Original-To: linux-pci@vger.kernel.org Received: from mail-pf1-f172.google.com (mail-pf1-f172.google.com [209.85.210.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 00CB384FD2 for ; Mon, 15 Apr 2024 17:02:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200566; cv=none; b=XrMNtHoe18VFmUy31fDV+a+J41iOPMsKT44YXQGu63q1X4yTZnBSsHDlgpkrKAl1qGJ0HKkbFcZsw3vQKlRCK3lALdUwVxo696wDY2++MuqIx+bt/DSfzx+owZvHcK6rS+b4b9kp+oskQ6XFOxvjV1+xHxkKRKzq4zuIePU3Myo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200566; c=relaxed/simple; bh=lcp2vRbGtp8KCmYdWlqSYigWg+ei7eHBlhWOvHRhJIg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=SBd0grR7VhFMAFzwIsV3mlaK9PScTbsIRXS1OrKcmp4ctQh5DvekWVBKpqiQSnFGy6YvnYAbsvDkPjyKBl6sve5xxRpYesGC4Om/QvIROHEGkADDv8udod+bPvax/LWy4NjaSve6p5FkwnHG0tDn1QQlt9dipLAlTaA0mHs0CTQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com; spf=pass smtp.mailfrom=ventanamicro.com; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b=ioW7xzZI; arc=none smtp.client-ip=209.85.210.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Received: by mail-pf1-f172.google.com with SMTP id d2e1a72fcca58-6ed5109d924so2939389b3a.0 for ; Mon, 15 Apr 2024 10:02:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1713200564; x=1713805364; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=YAAOkQmqhfZx+8yFnraUuWf5SW+MXW6uPQvUnDzGd+Y=; b=ioW7xzZIk8X+LdD2s7acWrWptFqCbqbPHIycyzyE8GM99fBjF1QbenXW0QKzNCuB5C 4S/Z3z4fisDf/s2kpMdkEHKTW9zZL7+tiNU/ds97bdB0uWFF4UwxSTZwEQTI3NLWSdr8 B8LZgYQlc5Uk0n1UuBwG29/MVg6aWkxvzuiF/svAw61s9fk/1Ao3hQAbP0mrSheRFgfB 9Y+P3wG762bAPK1deXea/0nZlnIE21HGaiBhyZr+Oll/8tYwdcds0YZ3vXYJkc/q3EL+ 6uYyPzpwzxEop479PzdXYb/R4BfRG14/hQ++m65J6Wy2QYG+DRIV/LUTLHsiXON5TuSx PSDA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713200564; x=1713805364; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=YAAOkQmqhfZx+8yFnraUuWf5SW+MXW6uPQvUnDzGd+Y=; b=g8heAEka9FtkhJ/YGyzm2Oga3ayPjB45uL/fZyopEN836WEP7k94zodbZUb7ZJXbc5 GTLSnGhYur2Uwv281sqdMwRQ5LtP3lHXMPJRt6TtOK7Z0FMlKwfprCCgn6wI0IC43k3Z viWHvUcvn/Ze4E1h05kYhEj8/PXDuaiKUEknbMy2v0gDGOVlI8Mov7JmtegOo4tyu7D3 nVPnL5U53FG1qqSJ0IHhuEmChFqseZLC2ARmNq6WKYOD8UDhN/+XDoPOfSbA6I6RzPim OgKC7sa98aV73tGdRbPBkc2own7S42XiMukVfvs77G0vWUb5SXCzefPF5YF9rZhHt3mQ svYw== X-Forwarded-Encrypted: i=1; AJvYcCX/u/dlVe6kbfcPfqanzXNH7ImEQRHG22yMKv37mUYgZqvEXv2dH2BNnwCPkcZspTuuN2GNUhhTLFIAGlpyn4dXA/LQd+y19/De X-Gm-Message-State: AOJu0YyklZpIzeaGTefgeVz0WIk9siALFFAsfHqW1Pi1a19b33oofVyK Zb6Sd4iQhUX13BOznAogdZa0WM4uJnygLEJGFOnyTgeL9dHbpOzvXknSyrNKYoE= X-Google-Smtp-Source: AGHT+IG8/n77ZcwDo0dpINsAseTYN5DCCn1UfCXRDczymjXSK0MA9f3AzxnPM1y3GqoYLRAp+ADrkw== X-Received: by 2002:a05:6a00:4686:b0:6ee:1b6e:662a with SMTP id de6-20020a056a00468600b006ee1b6e662amr7890055pfb.32.1713200564540; Mon, 15 Apr 2024 10:02:44 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.230]) by smtp.gmail.com with ESMTPSA id 1-20020a056a00072100b006ed045e3a70sm7433158pfm.25.2024.04.15.10.02.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 10:02:44 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Cc: Catalin Marinas , Will Deacon , Paul Walmsley , Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Bjorn Helgaas , Anup Patel , Thomas Gleixner , Samuel Holland , Robert Moore , Haibo1 Xu , Conor Dooley , Andrew Jones , Atish Kumar Patra , Andrei Warkentin , Marc Zyngier , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Sunil V L Subject: [RFC PATCH v4 12/20] RISC-V: ACPI: Implement function to add implicit dependencies Date: Mon, 15 Apr 2024 22:31:05 +0530 Message-Id: <20240415170113.662318-13-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240415170113.662318-1-sunilvl@ventanamicro.com> References: <20240415170113.662318-1-sunilvl@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 RISC-V interrupt controllers for wired interrupts are platform devices and hence their driver will be probed late. Also, APLIC which is one such interrupt controller can not be probed early since it needs MSI services. This needs a probing order between the interrupt controller driver and the device drivers. _DEP is typically used to indicate such dependencies. However, the dependency may be already available like GSI mapping. Hence, instead of an explicit _DEP, architecture can find the implicit dependencies and add to the dependency list. For RISC-V, add the dependencies for below use cases. 1) For devices which has IRQ resource, find out the interrupt controller using GSI number map and add the dependency. 2) For PCI host bridges: a) If _PRT indicate PCI link devices, add dependency on the link device. b) If _PRT indicates GSI, find out the interrupt controller using GSI number map and add the dependency. Signed-off-by: Sunil V L --- drivers/acpi/riscv/irq.c | 132 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 132 insertions(+) diff --git a/drivers/acpi/riscv/irq.c b/drivers/acpi/riscv/irq.c index de0f1ba92068..f98645461bbe 100644 --- a/drivers/acpi/riscv/irq.c +++ b/drivers/acpi/riscv/irq.c @@ -21,6 +21,12 @@ struct riscv_ext_intc_list { struct list_head list; }; +struct acpi_irq_dep_ctx { + int rc; + unsigned int index; + acpi_handle handle; +}; + LIST_HEAD(ext_intc_list); static int irqchip_cmp_func(const void *in0, const void *in1) @@ -189,3 +195,129 @@ int __init riscv_acpi_init_gsi_mapping(void) acpi_get_devices("RSCV0001", riscv_acpi_create_gsi_map, NULL, NULL); return 0; } + +static acpi_status riscv_acpi_irq_get_parent(struct acpi_resource *ares, void *context) +{ + struct acpi_irq_dep_ctx *ctx = context; + struct acpi_resource_irq *irq; + struct acpi_resource_extended_irq *eirq; + + switch (ares->type) { + case ACPI_RESOURCE_TYPE_IRQ: + irq = &ares->data.irq; + if (ctx->index >= irq->interrupt_count) { + ctx->index -= irq->interrupt_count; + return AE_OK; + } + ctx->handle = riscv_acpi_get_gsi_handle(irq->interrupts[ctx->index]); + return AE_CTRL_TERMINATE; + case ACPI_RESOURCE_TYPE_EXTENDED_IRQ: + eirq = &ares->data.extended_irq; + if (eirq->producer_consumer == ACPI_PRODUCER) + return AE_OK; + + if (ctx->index >= eirq->interrupt_count) { + ctx->index -= eirq->interrupt_count; + return AE_OK; + } + + /* Not supported */ + if (eirq->resource_source.string_length) + return AE_OK; + + ctx->handle = riscv_acpi_get_gsi_handle(eirq->interrupts[ctx->index]); + return AE_CTRL_TERMINATE; + } + + return AE_OK; +} + +static int riscv_acpi_irq_get_dep(acpi_handle handle, unsigned int index, acpi_handle *gsi_handle) +{ + struct acpi_irq_dep_ctx ctx; + + ctx.rc = -EINVAL; + ctx.index = index; + acpi_walk_resources(handle, METHOD_NAME__CRS, riscv_acpi_irq_get_parent, &ctx); + *gsi_handle = ctx.handle; + if (*gsi_handle) + return 1; + + return 0; +} + +static u32 riscv_acpi_add_prt_dep(acpi_handle handle) +{ + struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; + struct acpi_pci_routing_table *entry; + struct acpi_handle_list dep_devices; + acpi_handle gsi_handle; + acpi_handle link_handle; + acpi_status status; + u32 count = 0; + + status = acpi_get_irq_routing_table(handle, &buffer); + if (ACPI_FAILURE(status)) { + kfree(buffer.pointer); + return 0; + } + + entry = buffer.pointer; + while (entry && (entry->length > 0)) { + if (entry->source[0]) { + acpi_get_handle(handle, entry->source, &link_handle); + dep_devices.count = 1; + dep_devices.handles = kcalloc(1, sizeof(*dep_devices.handles), GFP_KERNEL); + if (!dep_devices.handles) + continue; + + dep_devices.handles[0] = link_handle; + count += acpi_scan_add_dep(handle, &dep_devices); + } else { + gsi_handle = riscv_acpi_get_gsi_handle(entry->source_index); + dep_devices.count = 1; + dep_devices.handles = kcalloc(1, sizeof(*dep_devices.handles), GFP_KERNEL); + if (!dep_devices.handles) + continue; + + dep_devices.handles[0] = gsi_handle; + count += acpi_scan_add_dep(handle, &dep_devices); + } + + entry = (struct acpi_pci_routing_table *) + ((unsigned long)entry + entry->length); + } + + kfree(buffer.pointer); + return count; +} + +static u32 riscv_acpi_add_irq_dep(acpi_handle handle) +{ + struct acpi_handle_list dep_devices; + acpi_handle gsi_handle; + u32 count = 0; + int i; + + for (i = 0; + riscv_acpi_irq_get_dep(handle, i, &gsi_handle); + i++) { + dep_devices.count = 1; + dep_devices.handles = kcalloc(1, sizeof(*dep_devices.handles), GFP_KERNEL); + if (!dep_devices.handles) + continue; + + dep_devices.handles[0] = gsi_handle; + count += acpi_scan_add_dep(handle, &dep_devices); + } + + return count; +} + +u32 arch_acpi_add_auto_dep(acpi_handle handle) +{ + if (acpi_has_method(handle, "_PRT")) + return riscv_acpi_add_prt_dep(handle); + + return riscv_acpi_add_irq_dep(handle); +} From patchwork Mon Apr 15 17:01:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 1923829 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com header.a=rsa-sha256 header.s=google header.b=XHSVVDgR; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2604:1380:4601:e00::3; helo=am.mirrors.kernel.org; envelope-from=linux-pci+bounces-6270-incoming=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from am.mirrors.kernel.org (am.mirrors.kernel.org [IPv6:2604:1380:4601:e00::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VJD8505GTz1yY4 for ; Tue, 16 Apr 2024 03:05:41 +1000 (AEST) Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id 46F121F21B25 for ; Mon, 15 Apr 2024 17:05:38 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 83535127E3C; Mon, 15 Apr 2024 17:02:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="XHSVVDgR" X-Original-To: linux-pci@vger.kernel.org Received: from mail-pf1-f176.google.com (mail-pf1-f176.google.com [209.85.210.176]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B2A16127E2E for ; Mon, 15 Apr 2024 17:02:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.176 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200574; cv=none; b=MOkSzR0aUKX/Umz1eH7kPP6WsVVYRJYbCIzwliJYE7gWJHNCW4NrQ3EnjOI3IMy/wN8RRpxo85bHR4yl8zeRJQGxLiqqD5hb3qbK0DTr2Bu/8gLp0spKAIMU7kUu/YbrmnYTRAfkcsF0Oy9N92LLfPxgQqGh2E0aPeXq72bfAEo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200574; c=relaxed/simple; bh=W+FH+0WMCw7p8CDy8q3yUpAykRF8ezI4H2CH+9Zt25Y=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=O++uNlNOzETicYtxw4KqGki6n0muErR0NTTW9Rv2pqUZ5IsBxDQeWqmf0VBSXB+rrRFHGpdhoL609PzyBpWdMz4wTXYpjh8ZdrVultRHyMctmBcuw32lRJbkXtqdgzFwg4avHTrdlCcB2s1MW1ZNo8ueKHURwUqQFw4MqywYc20= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com; spf=pass smtp.mailfrom=ventanamicro.com; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b=XHSVVDgR; arc=none smtp.client-ip=209.85.210.176 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Received: by mail-pf1-f176.google.com with SMTP id d2e1a72fcca58-6ee12766586so2244233b3a.0 for ; Mon, 15 Apr 2024 10:02:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1713200571; x=1713805371; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=nLDuZBMdOA5LsIhe/7seDXRfkc825n/BCOMnccmbKZw=; b=XHSVVDgRdCTKFkMK9rK9YtFo/urVy1LsqXteMPyLGvJa8CwjUSYSnbPPgYNwxVyPdF EJk/AYD8DQTo5xz1TwAErPzVVCwNu5/dXSICcMZJEco05sD0AQCNAnWjJ4OEK6qqjkhl 7UWjxhWLZbg/VpSw903NSXdevwRbT6LMPhTcaSWq8eVWsrwgMX0IR1qjoIA4IQb+eiud YTVEHbyHycYW+XkXqHk2tvxfUPRjYyXNeGvbBUxBUOTfYJWy0QLdum000RfESWzQwXQo Z8RV1DV9V3aZ0aRo8TEAQreaM5/Xqb0Ya8ONKudTLcYTmWQOlNznms2i3uUL9IodwQMd z+DA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713200571; x=1713805371; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=nLDuZBMdOA5LsIhe/7seDXRfkc825n/BCOMnccmbKZw=; b=NNdPblaD40VTyLOiKSC3biTbMXcyY8G1ON+7guxtPAyQ4+uGM2RVtX/FCTXzlJXlb5 X4bpMqjjaMNIkBjPciQHWLHCJAmZouIoUyKNkek/rN22jKKMTnYGq5kxRmV38xrOr5SF g9gjUrsF1mTosfFvEuMd9ZSS+6MMvdxHwX3DryZr6mnbyzpHCEWqNO4+sQFxfjXg9Htl NK5XvA6UfPbxJ9rBzCytUSBhYWlIdYcdds1obW8sXHWM31qghyRjsbMoEd7z+ab0DYUv aIAAclLRTyiowt+ZoOjeibFZ996HI955EV1IPzt450CVx7JAHbGbXHBU0PC+zFFroNrv /kFQ== X-Forwarded-Encrypted: i=1; AJvYcCVZ1eHs8ShwBokJLE4yJDSY8tVEVUYfMS8K4bpsdG4ufoGYjwvvgHEjNmjiGak9HHFQQQSS578Q2iVl19u47ZFB4C3HqN4BnLzI X-Gm-Message-State: AOJu0Yy3Z8tawyB9uoDcW7U0XlZ56w+UR1nwgBlZc1XZ3lQWGurNuSLw zN48qT28D5RWTefoJ1HdlgXx7gaGy+mmyvWlPRZ8fAPpyhfay+WW2yMG8NeV8yU= X-Google-Smtp-Source: AGHT+IE0Br/sfLtBzDZxNra+WQQQj8UhdqDe5qbQkKbjYH9VavooVHUHBefLx4JOZPgJS4SQ5vD0ww== X-Received: by 2002:a05:6a00:190e:b0:6ec:fa34:34ab with SMTP id y14-20020a056a00190e00b006ecfa3434abmr279743pfi.9.1713200571057; Mon, 15 Apr 2024 10:02:51 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.230]) by smtp.gmail.com with ESMTPSA id 1-20020a056a00072100b006ed045e3a70sm7433158pfm.25.2024.04.15.10.02.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 10:02:50 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Cc: Catalin Marinas , Will Deacon , Paul Walmsley , Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Bjorn Helgaas , Anup Patel , Thomas Gleixner , Samuel Holland , Robert Moore , Haibo1 Xu , Conor Dooley , Andrew Jones , Atish Kumar Patra , Andrei Warkentin , Marc Zyngier , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Sunil V L Subject: [RFC PATCH v4 13/20] ACPI/PNP: Initialize PNP devices skipped due to _DEP Date: Mon, 15 Apr 2024 22:31:06 +0530 Message-Id: <20240415170113.662318-14-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240415170113.662318-1-sunilvl@ventanamicro.com> References: <20240415170113.662318-1-sunilvl@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 When PNP devices have _DEP, they will not be enumerated in pnpacpi_init() unless the dependency is met. Hence, when such PNP device's supplier device is probed, the PNP device need to be added to the PNP data structures. So, introduce pnpacpi_init_2() for doing this which gets called as part of clearing the dependency. This is currently required for RISC-V. Hence, restricted the code with a CONFIG option enabled for RISC-V. Since pnpacpi_add_device() can be called now even after boot, __init attribute is removed from pnpacpi_add_device() and its dependent functions. Signed-off-by: Sunil V L --- drivers/acpi/scan.c | 4 +++ drivers/pnp/pnpacpi/core.c | 24 ++++++++++--- drivers/pnp/pnpacpi/rsparser.c | 63 +++++++++++++++++----------------- include/linux/pnp.h | 7 ++++ 4 files changed, 62 insertions(+), 36 deletions(-) diff --git a/drivers/acpi/scan.c b/drivers/acpi/scan.c index 8e23b9508716..086ae040a5ad 100644 --- a/drivers/acpi/scan.c +++ b/drivers/acpi/scan.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include @@ -2370,6 +2371,9 @@ static void acpi_scan_clear_dep_fn(struct work_struct *work) acpi_bus_attach(cdw->adev, (void *)true); acpi_scan_lock_release(); + if (IS_ENABLED(CONFIG_ARCH_ACPI_DEFERRED_GSI) && IS_ENABLED(CONFIG_PNPACPI)) + pnpacpi_init_2(cdw->adev); + acpi_dev_put(cdw->adev); kfree(cdw); } diff --git a/drivers/pnp/pnpacpi/core.c b/drivers/pnp/pnpacpi/core.c index a0927081a003..c81893fc1fb2 100644 --- a/drivers/pnp/pnpacpi/core.c +++ b/drivers/pnp/pnpacpi/core.c @@ -26,7 +26,7 @@ static int num; #define TEST_ALPHA(c) \ if (!('A' <= (c) && (c) <= 'Z')) \ return 0 -static int __init ispnpidacpi(const char *id) +static int ispnpidacpi(const char *id) { TEST_ALPHA(id[0]); TEST_ALPHA(id[1]); @@ -194,7 +194,7 @@ struct pnp_protocol pnpacpi_protocol = { }; EXPORT_SYMBOL(pnpacpi_protocol); -static const char *__init pnpacpi_get_id(struct acpi_device *device) +static const char *pnpacpi_get_id(struct acpi_device *device) { struct acpi_hardware_id *id; @@ -206,7 +206,7 @@ static const char *__init pnpacpi_get_id(struct acpi_device *device) return NULL; } -static int __init pnpacpi_add_device(struct acpi_device *device) +static int pnpacpi_add_device(struct acpi_device *device) { struct pnp_dev *dev; const char *pnpid; @@ -283,6 +283,23 @@ static int __init pnpacpi_add_device(struct acpi_device *device) return 0; } +int pnpacpi_disabled; + +#ifdef CONFIG_ARCH_ACPI_DEFERRED_GSI +void pnpacpi_init_2(struct acpi_device *adev) +{ + if (acpi_disabled || pnpacpi_disabled) + return; + + if (!adev) + return; + + if (acpi_is_pnp_device(adev) && acpi_dev_ready_for_enumeration(adev)) + pnpacpi_add_device(adev); +} + +#endif + static acpi_status __init pnpacpi_add_device_handler(acpi_handle handle, u32 lvl, void *context, void **rv) @@ -296,7 +313,6 @@ static acpi_status __init pnpacpi_add_device_handler(acpi_handle handle, return AE_OK; } -int pnpacpi_disabled __initdata; static int __init pnpacpi_init(void) { if (acpi_disabled || pnpacpi_disabled) { diff --git a/drivers/pnp/pnpacpi/rsparser.c b/drivers/pnp/pnpacpi/rsparser.c index c02ce0834c2c..1008599901a2 100644 --- a/drivers/pnp/pnpacpi/rsparser.c +++ b/drivers/pnp/pnpacpi/rsparser.c @@ -289,9 +289,9 @@ int pnpacpi_parse_allocated_resource(struct pnp_dev *dev) return 0; } -static __init void pnpacpi_parse_dma_option(struct pnp_dev *dev, - unsigned int option_flags, - struct acpi_resource_dma *p) +static void pnpacpi_parse_dma_option(struct pnp_dev *dev, + unsigned int option_flags, + struct acpi_resource_dma *p) { int i; unsigned char map = 0, flags; @@ -303,9 +303,9 @@ static __init void pnpacpi_parse_dma_option(struct pnp_dev *dev, pnp_register_dma_resource(dev, option_flags, map, flags); } -static __init void pnpacpi_parse_irq_option(struct pnp_dev *dev, - unsigned int option_flags, - struct acpi_resource_irq *p) +static void pnpacpi_parse_irq_option(struct pnp_dev *dev, + unsigned int option_flags, + struct acpi_resource_irq *p) { int i; pnp_irq_mask_t map; @@ -320,9 +320,9 @@ static __init void pnpacpi_parse_irq_option(struct pnp_dev *dev, pnp_register_irq_resource(dev, option_flags, &map, flags); } -static __init void pnpacpi_parse_ext_irq_option(struct pnp_dev *dev, - unsigned int option_flags, - struct acpi_resource_extended_irq *p) +static void pnpacpi_parse_ext_irq_option(struct pnp_dev *dev, + unsigned int option_flags, + struct acpi_resource_extended_irq *p) { int i; pnp_irq_mask_t map; @@ -344,9 +344,9 @@ static __init void pnpacpi_parse_ext_irq_option(struct pnp_dev *dev, pnp_register_irq_resource(dev, option_flags, &map, flags); } -static __init void pnpacpi_parse_port_option(struct pnp_dev *dev, - unsigned int option_flags, - struct acpi_resource_io *io) +static void pnpacpi_parse_port_option(struct pnp_dev *dev, + unsigned int option_flags, + struct acpi_resource_io *io) { unsigned char flags = 0; @@ -357,16 +357,16 @@ static __init void pnpacpi_parse_port_option(struct pnp_dev *dev, } static __init void pnpacpi_parse_fixed_port_option(struct pnp_dev *dev, - unsigned int option_flags, - struct acpi_resource_fixed_io *io) + unsigned int option_flags, + struct acpi_resource_fixed_io *io) { pnp_register_port_resource(dev, option_flags, io->address, io->address, 0, io->address_length, IORESOURCE_IO_FIXED); } -static __init void pnpacpi_parse_mem24_option(struct pnp_dev *dev, - unsigned int option_flags, - struct acpi_resource_memory24 *p) +static void pnpacpi_parse_mem24_option(struct pnp_dev *dev, + unsigned int option_flags, + struct acpi_resource_memory24 *p) { unsigned char flags = 0; @@ -376,9 +376,9 @@ static __init void pnpacpi_parse_mem24_option(struct pnp_dev *dev, p->alignment, p->address_length, flags); } -static __init void pnpacpi_parse_mem32_option(struct pnp_dev *dev, - unsigned int option_flags, - struct acpi_resource_memory32 *p) +static void pnpacpi_parse_mem32_option(struct pnp_dev *dev, + unsigned int option_flags, + struct acpi_resource_memory32 *p) { unsigned char flags = 0; @@ -388,9 +388,9 @@ static __init void pnpacpi_parse_mem32_option(struct pnp_dev *dev, p->alignment, p->address_length, flags); } -static __init void pnpacpi_parse_fixed_mem32_option(struct pnp_dev *dev, - unsigned int option_flags, - struct acpi_resource_fixed_memory32 *p) +static void pnpacpi_parse_fixed_mem32_option(struct pnp_dev *dev, + unsigned int option_flags, + struct acpi_resource_fixed_memory32 *p) { unsigned char flags = 0; @@ -400,9 +400,9 @@ static __init void pnpacpi_parse_fixed_mem32_option(struct pnp_dev *dev, 0, p->address_length, flags); } -static __init void pnpacpi_parse_address_option(struct pnp_dev *dev, - unsigned int option_flags, - struct acpi_resource *r) +static void pnpacpi_parse_address_option(struct pnp_dev *dev, + unsigned int option_flags, + struct acpi_resource *r) { struct acpi_resource_address64 addr, *p = &addr; acpi_status status; @@ -427,9 +427,9 @@ static __init void pnpacpi_parse_address_option(struct pnp_dev *dev, IORESOURCE_IO_FIXED); } -static __init void pnpacpi_parse_ext_address_option(struct pnp_dev *dev, - unsigned int option_flags, - struct acpi_resource *r) +static void pnpacpi_parse_ext_address_option(struct pnp_dev *dev, + unsigned int option_flags, + struct acpi_resource *r) { struct acpi_resource_extended_address64 *p = &r->data.ext_address64; unsigned char flags = 0; @@ -451,8 +451,7 @@ struct acpipnp_parse_option_s { unsigned int option_flags; }; -static __init acpi_status pnpacpi_option_resource(struct acpi_resource *res, - void *data) +static acpi_status pnpacpi_option_resource(struct acpi_resource *res, void *data) { int priority; struct acpipnp_parse_option_s *parse_data = data; @@ -547,7 +546,7 @@ static __init acpi_status pnpacpi_option_resource(struct acpi_resource *res, return AE_OK; } -int __init pnpacpi_parse_resource_option_data(struct pnp_dev *dev) +int pnpacpi_parse_resource_option_data(struct pnp_dev *dev) { struct acpi_device *acpi_dev = dev->data; acpi_handle handle = acpi_dev->handle; diff --git a/include/linux/pnp.h b/include/linux/pnp.h index ddbe7c3ca4ce..440f8c268a29 100644 --- a/include/linux/pnp.h +++ b/include/linux/pnp.h @@ -347,6 +347,7 @@ static inline struct acpi_device *pnp_acpi_device(struct pnp_dev *dev) return dev->data; return NULL; } + #else #define pnp_acpi_device(dev) 0 #endif @@ -514,4 +515,10 @@ static inline void pnp_unregister_driver(struct pnp_driver *drv) { } module_driver(__pnp_driver, pnp_register_driver, \ pnp_unregister_driver) +#ifdef CONFIG_ARCH_ACPI_DEFERRED_GSI +void pnpacpi_init_2(struct acpi_device *adev); +#else +static inline void pnpacpi_init_2(struct acpi_device *adev) { } +#endif + #endif /* _LINUX_PNP_H */ From patchwork Mon Apr 15 17:01:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 1923830 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com header.a=rsa-sha256 header.s=google header.b=ZUv7yrbk; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2604:1380:45d1:ec00::1; helo=ny.mirrors.kernel.org; envelope-from=linux-pci+bounces-6271-incoming=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org [IPv6:2604:1380:45d1:ec00::1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VJD8K2HDDz1yY4 for ; Tue, 16 Apr 2024 03:05:53 +1000 (AEST) Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ny.mirrors.kernel.org (Postfix) with ESMTPS id 067201C20C9C for ; Mon, 15 Apr 2024 17:05:51 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id EC6E884FC9; Mon, 15 Apr 2024 17:02:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="ZUv7yrbk" X-Original-To: linux-pci@vger.kernel.org Received: from mail-pf1-f169.google.com (mail-pf1-f169.google.com [209.85.210.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5AAAF128376 for ; Mon, 15 Apr 2024 17:02:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.169 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200579; cv=none; b=n35pRPSya/Nbft+LHV/X2mKffKXUqptIJ67PfBdTndE7T6BqSqeF0ItlfoepotlTwRhNSqtRJxKyT+WL4YvpALwyOg+gMMX4ptcQNuDgfbH+NWFkqSykHgeXeG4fG3JUytJD2PL9AA9FY2o1wtT6tS6TSh8kcdSFf+Y3fMxZ3pM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200579; c=relaxed/simple; bh=VKC1k90N2jxwUCKVmE1XZOYw+oqHJYrFO5SRt4yp4n8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=TFl7SRXphyEaoNoUFuwaMkCnO6RrzAKK8u8d91mIfJ+LO30vHxgFLRIRV5HYt5eS30Dm1oEYDhEssw5toMCld8eVUYoAQKI38OoiUmmgJ/8Rjhccguf5M4Wg6G3Ae8RxGzOfdedtOGBIgLBJ4fuMQCEtFmZmQH5kF/+9dGVlaWc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com; spf=pass smtp.mailfrom=ventanamicro.com; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b=ZUv7yrbk; arc=none smtp.client-ip=209.85.210.169 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Received: by mail-pf1-f169.google.com with SMTP id d2e1a72fcca58-6ee12766586so2244355b3a.0 for ; Mon, 15 Apr 2024 10:02:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1713200577; x=1713805377; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=tESHp1nipL9G+lPho1WiqoKvdd8aCfbVHrPrMY3qcLM=; b=ZUv7yrbksK/6eK0+GO9Fv7wMC/sR/3KpqoOtrmy7gTwHxmE5VU2Wo1HcTmZwg0SUis qXeIcdQYldWtoHHdS2zELXwK250atKcy2xdvJyMBmfa05jSa++l5U7t5nB6PJCKaaoeW 2DLaAJfL84BJBErQ2/UE1d5tSQ37mtqoOU6W2OK0CM90WonJ6KD8efR3WP4I+P43i2fN LKqWwAkyVoZ9OGT5Ueh6Xd1NrPKM199Foqh/6IEOcjxMn9a+vw43QKmfoZ/+w8Rs6AXy uI2DDRSiL0VWzRFIhb1pFPx7HznW8oKy4+ss2GbFjx8797NpYsizrLUW6+VUsbFmJQoO c+cQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713200577; x=1713805377; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=tESHp1nipL9G+lPho1WiqoKvdd8aCfbVHrPrMY3qcLM=; b=KiRXuQqUZTCU8MS2uPygxUA99xFdPqk5Yr/RrDOTLR2r884kefKxos6KC4+D+UxPsR 26iaSoFSacivt3i+0KkxAcN425fHqp/ZhO3reNUs+fdCKmiD+N1870CZca27XlReUaXw Xfx6QOmesyitcVVqTkskoPnOAzHFMQPd5soGdQLp4sH+VkObuOTjL+3GioGDyJTHo6cQ YzIY8VpA/Xfv92dN+Q/V3dfw89zBeFQ9voMLOUfu5SMSE5GeXt5/LlBxxChKE/7lQd7/ x0XgtcIpkCQzzQuaV907DBowHssCQDqKX/iD45+6NLhPuyt+ciB0KOCzJqwEHVR7XGUj wCHg== X-Forwarded-Encrypted: i=1; AJvYcCVac1ygEjGMLAqCtcPdafsFXSD/VsMwCLK8C8z0FR4IHjrZecgxK87heyEoBcB25aIkSoIzlHxHqJHM4Dw3cpivFIOEz9RMm+rc X-Gm-Message-State: AOJu0Yye9F6da4Bem+QaIKdTTq/BeO+0iG1zbm0h3+bNeytzQOgbx2Fi SFQARePzR8hes5jsUzXoXbnuG6bzIk+FSQG6kVsNYNhmfV3Olu3rVMExj/89tx0= X-Google-Smtp-Source: AGHT+IGv/kllMgrVV78cn82AbUpzbO7/wD1E9hz7AVE67lzYg6zXQKt3/FnejYjVAq0dkP07wI6buA== X-Received: by 2002:a05:6a00:4611:b0:6ea:f3fb:26fe with SMTP id ko17-20020a056a00461100b006eaf3fb26femr305695pfb.12.1713200577636; Mon, 15 Apr 2024 10:02:57 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.230]) by smtp.gmail.com with ESMTPSA id 1-20020a056a00072100b006ed045e3a70sm7433158pfm.25.2024.04.15.10.02.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 10:02:57 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Cc: Catalin Marinas , Will Deacon , Paul Walmsley , Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Bjorn Helgaas , Anup Patel , Thomas Gleixner , Samuel Holland , Robert Moore , Haibo1 Xu , Conor Dooley , Andrew Jones , Atish Kumar Patra , Andrei Warkentin , Marc Zyngier , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Sunil V L Subject: [RFC PATCH v4 14/20] irqchip: riscv-intc: Add ACPI support for AIA Date: Mon, 15 Apr 2024 22:31:07 +0530 Message-Id: <20240415170113.662318-15-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240415170113.662318-1-sunilvl@ventanamicro.com> References: <20240415170113.662318-1-sunilvl@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The RINTC subtype structure in MADT also has information about other interrupt controllers. Save this information and provide interfaces to retrieve them when required by corresponding drivers. Signed-off-by: Sunil V L --- arch/riscv/include/asm/irq.h | 35 ++++++++++++ drivers/irqchip/irq-riscv-intc.c | 97 +++++++++++++++++++++++++++++++- 2 files changed, 130 insertions(+), 2 deletions(-) diff --git a/arch/riscv/include/asm/irq.h b/arch/riscv/include/asm/irq.h index 44a0b128c602..6bd578b1ffc9 100644 --- a/arch/riscv/include/asm/irq.h +++ b/arch/riscv/include/asm/irq.h @@ -25,9 +25,22 @@ enum riscv_irqchip_type { ACPI_RISCV_IRQCHIP_APLIC = 0x03, }; +/* + * The ext_intc_id format is as follows: + * Bits [31:24] APLIC/PLIC ID + * Bits [15:0] APLIC IDC ID / PLIC S-Mode Context ID for this hart + */ +#define APLIC_PLIC_ID(x) ((x) >> 24) +#define IDC_CONTEXT_ID(x) ((x) & 0x0000ffff) + int riscv_acpi_get_gsi_info(struct fwnode_handle *fwnode, u32 *gsi_base, u32 *id, u32 *nr_irqs, u32 *nr_idcs); struct fwnode_handle *riscv_acpi_get_gsi_domain_id(u32 gsi); +int __init acpi_get_intc_index_hartid(u32 index, unsigned long *hartid); +int acpi_get_ext_intc_parent_hartid(u8 id, u32 idx, unsigned long *hartid); +void acpi_get_plic_nr_contexts(u8 id, int *nr_contexts); +int acpi_get_plic_context(u8 id, u32 idx, int *context_id); +int __init acpi_get_imsic_mmio_info(u32 index, struct resource *res); #else static inline int riscv_acpi_get_gsi_info(struct fwnode_handle *fwnode, u32 *gsi_base, @@ -36,6 +49,28 @@ static inline int riscv_acpi_get_gsi_info(struct fwnode_handle *fwnode, u32 *gsi return 0; } +static inline int __init acpi_get_intc_index_hartid(u32 index, unsigned long *hartid) +{ + return -EINVAL; +} + +static inline int acpi_get_ext_intc_parent_hartid(u8 id, u32 idx, unsigned long *hartid) +{ + return -EINVAL; +} + +static inline void acpi_get_plic_nr_contexts(u8 id, int *nr_contexts) { } + +static inline int acpi_get_plic_context(u8 id, u32 idx, int *context_id) +{ + return -EINVAL; +} + +static inline int __init acpi_get_imsic_mmio_info(u32 index, struct resource *res) +{ + return 0; +} + #endif /* CONFIG_ACPI */ #endif /* _ASM_RISCV_IRQ_H */ diff --git a/drivers/irqchip/irq-riscv-intc.c b/drivers/irqchip/irq-riscv-intc.c index 9e71c4428814..b20272151aed 100644 --- a/drivers/irqchip/irq-riscv-intc.c +++ b/drivers/irqchip/irq-riscv-intc.c @@ -249,14 +249,101 @@ IRQCHIP_DECLARE(riscv, "riscv,cpu-intc", riscv_intc_init); IRQCHIP_DECLARE(andes, "andestech,cpu-intc", riscv_intc_init); #ifdef CONFIG_ACPI +struct rintc_data { + u32 ext_intc_id; + unsigned long hart_id; + u64 imsic_addr; + u32 imsic_size; +}; + +static u32 nr_rintc; +static struct rintc_data *rintc_acpi_data[NR_CPUS]; + +int acpi_get_intc_index_hartid(u32 index, unsigned long *hartid) +{ + if (index >= nr_rintc) + return -1; + + *hartid = rintc_acpi_data[index]->hart_id; + return 0; +} + +int acpi_get_ext_intc_parent_hartid(u8 id, u32 idx, unsigned long *hartid) +{ + int i, j = 0; + + for (i = 0; i < nr_rintc; i++) { + if (APLIC_PLIC_ID(rintc_acpi_data[i]->ext_intc_id) == id) { + if (idx == j) { + *hartid = rintc_acpi_data[i]->hart_id; + return 0; + } + j++; + } + } + + return -1; +} + +void acpi_get_plic_nr_contexts(u8 id, int *nr_contexts) +{ + int i, j = 0; + + for (i = 0; i < nr_rintc; i++) { + if (APLIC_PLIC_ID(rintc_acpi_data[i]->ext_intc_id) == id) + j++; + } + + *nr_contexts = j; +} + +int acpi_get_plic_context(u8 id, u32 idx, int *context_id) +{ + int i, j = 0; + + for (i = 0; i < nr_rintc; i++) { + if (APLIC_PLIC_ID(rintc_acpi_data[i]->ext_intc_id) == id) { + if (idx == j) { + *context_id = IDC_CONTEXT_ID(rintc_acpi_data[i]->ext_intc_id); + return 0; + } + + j++; + } + } + + return -1; +} + +int acpi_get_imsic_mmio_info(u32 index, struct resource *res) +{ + if (index >= nr_rintc) + return -1; + + res->start = rintc_acpi_data[index]->imsic_addr; + res->end = res->start + rintc_acpi_data[index]->imsic_size - 1; + res->flags = IORESOURCE_MEM; + return 0; +} + static int __init riscv_intc_acpi_init(union acpi_subtable_headers *header, const unsigned long end) { - struct fwnode_handle *fn; struct acpi_madt_rintc *rintc; + struct fwnode_handle *fn; + int rc; rintc = (struct acpi_madt_rintc *)header; + rintc_acpi_data[nr_rintc] = kzalloc(sizeof(*rintc_acpi_data[0]), GFP_KERNEL); + if (!rintc_acpi_data[nr_rintc]) + return -ENOMEM; + + rintc_acpi_data[nr_rintc]->ext_intc_id = rintc->ext_intc_id; + rintc_acpi_data[nr_rintc]->hart_id = rintc->hart_id; + rintc_acpi_data[nr_rintc]->imsic_addr = rintc->imsic_addr; + rintc_acpi_data[nr_rintc]->imsic_size = rintc->imsic_size; + nr_rintc++; /* * The ACPI MADT will have one INTC for each CPU (or HART) @@ -273,7 +360,13 @@ static int __init riscv_intc_acpi_init(union acpi_subtable_headers *header, return -ENOMEM; } - return riscv_intc_init_common(fn, &riscv_intc_chip); + rc = riscv_intc_init_common(fn, &riscv_intc_chip); + if (rc) { + irq_domain_free_fwnode(fn); + return rc; + } + + return 0; } IRQCHIP_ACPI_DECLARE(riscv_intc, ACPI_MADT_TYPE_RINTC, NULL, From patchwork Mon Apr 15 17:01:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 1923831 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com header.a=rsa-sha256 header.s=google header.b=Cn5TjvJQ; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=147.75.80.249; helo=am.mirrors.kernel.org; envelope-from=linux-pci+bounces-6272-incoming=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from am.mirrors.kernel.org (am.mirrors.kernel.org [147.75.80.249]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VJD8k1Vg5z1yY4 for ; Tue, 16 Apr 2024 03:06:14 +1000 (AEST) Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id 843C31F21B07 for ; Mon, 15 Apr 2024 17:06:11 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 8464F1292C3; Mon, 15 Apr 2024 17:03:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="Cn5TjvJQ" X-Original-To: linux-pci@vger.kernel.org Received: from mail-pf1-f177.google.com (mail-pf1-f177.google.com [209.85.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 55A7212839D for ; Mon, 15 Apr 2024 17:03:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.177 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200588; cv=none; b=hZDnzAS1iZY1hk4JvPYIiZMdA2zK440x0CapIH/5mkGAbjFSqqWD5DrJieENCIWiuzwcCnY8LRiNR5B1Yd3vPNRJVMW1Cur3p3Jep3PRtMzkjVaP8HHwaNuNE5Hn3AVptS/fG2mkxnkVHk4n02Wbh5BUbhD/7jrR+H7el1xt0V4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200588; c=relaxed/simple; bh=Vn78AWQmD+LeDoOykVQ6DoXDLq9B0srgvgKujNvgJ2s=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=sE7U1VtJ+Q520NEvIjx12ZE0naukYYFSwfXQwmMAZdaq8AUdYk803yu0wbcm31TmqFeFueEeg27ASDfys8yQeNDE4RHWJs+S2QxgtL3fCT2a4NMG+SX3U/uhUhh7yqMZj4d+ortGcqS5jt1gPBRheYBVV1FaWX2gilZJaP3Oq14= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com; spf=pass smtp.mailfrom=ventanamicro.com; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b=Cn5TjvJQ; arc=none smtp.client-ip=209.85.210.177 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Received: by mail-pf1-f177.google.com with SMTP id d2e1a72fcca58-6ecf8ebff50so2273557b3a.1 for ; Mon, 15 Apr 2024 10:03:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1713200585; x=1713805385; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=8smg3owWHWW9PU5G6t7mt+Tcv3LUpwWLhoyg8/upQCQ=; b=Cn5TjvJQm5SUKlRMiaqrXaCnUdmYJrhKhrA0hRpyBy5DxCzgvlCheW+Xt3mzin/hdR pPiPDZw4xuqYwTTUeaTD15Q5IS2wZ/YdogiFmd7CpvhUIpbgcXM2Khs1ghNj5LNPrIaE txBhSwML16JencRlBzq8m6vc6ef382gdZ7pszJeA4M1PgZ0HzJ+OcOQDJKd7EStA30+V UTqczjKpk+3txP4l7hnPV66ZlyOk9Y2nKuCxq9dtzhj/XfrE0zoeLJ+YPgTOwwEmqq7P kb8PVKTvZZfGQGyvcQMfv/5HRcEa5TSYM3hQdfSyS2wmdx5m/7ff1QBWTmDcJlMDul2T tUaA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713200585; x=1713805385; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8smg3owWHWW9PU5G6t7mt+Tcv3LUpwWLhoyg8/upQCQ=; b=FEe/jYJNEX7PI++0flCIlJHJIp+KFZ2HLVHKnB4BLrx0tPHUpSCoB13co2i0ItgeE4 cSBOwLEJHvMVQpS4z8BE4ZXFPFddXC2wZaOAy0LVdQmsWl6xNkT+NitaOKcwnVSqcWbL Wy7K/8VvNmYZpxLPo9fPz+gmUBVlsbi5+DdGoaQFtm6CpHqKEH1PI2ZNHzPTno12gWMG 9socBRKwUas8xF2cbki5AIHFk9n3iaQ9byCHFh/7RJNoXGaMBE0grjWkwZjxW6YlHc/8 8H1c8PMECOpzavH4lqnES6O/uLjaFuRXCD71oEjNXAnI8UfqYsn0CCkjaFwqzT4OkPlj qIFw== X-Forwarded-Encrypted: i=1; AJvYcCUmQTiZfloe80tuKArg8R18nxMf8U3f//LQT1COcU164dBCEyxAF3ZmMb8kai+QjJfabWF02sScv/c6NheaYyw8cIWm02UAKqP2 X-Gm-Message-State: AOJu0YwPGBUovxHUsfdUB3oXrU6CSeRzG7EdIVIRJtKd/TAmfc5pv8uE m+qn+8VKaSM6gliLHdAgFSqyfnXD4QZvdGy7hvezkZgTZ1X+j2XCbTN2OitaNHo= X-Google-Smtp-Source: AGHT+IGV77t74zXqumvBBSYJpdOPZfRZjrz4nC5DPyoQfvVW026my7l2yC+lQVQ7WYkkThW6carIhA== X-Received: by 2002:a05:6a00:3a19:b0:6e7:48e3:7895 with SMTP id fj25-20020a056a003a1900b006e748e37895mr308776pfb.2.1713200584491; Mon, 15 Apr 2024 10:03:04 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.230]) by smtp.gmail.com with ESMTPSA id 1-20020a056a00072100b006ed045e3a70sm7433158pfm.25.2024.04.15.10.02.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 10:03:03 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Cc: Catalin Marinas , Will Deacon , Paul Walmsley , Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Bjorn Helgaas , Anup Patel , Thomas Gleixner , Samuel Holland , Robert Moore , Haibo1 Xu , Conor Dooley , Andrew Jones , Atish Kumar Patra , Andrei Warkentin , Marc Zyngier , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Sunil V L Subject: [RFC PATCH v4 15/20] irqchip: riscv-imsic: Add ACPI support Date: Mon, 15 Apr 2024 22:31:08 +0530 Message-Id: <20240415170113.662318-16-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240415170113.662318-1-sunilvl@ventanamicro.com> References: <20240415170113.662318-1-sunilvl@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 RISC-V IMSIC interrupt controller provides IPI and MSI support. Currently, DT based drivers setup the IPI feature early during boot but defer setting up the MSI functionality. However, in ACPI systems, PCI scan happens early during boot and PCI subsystem expects MSI controller is already setup. Hence, in case of ACPI, both IPI and MSI features are initialized early itself. Signed-off-by: Sunil V L --- drivers/irqchip/irq-riscv-imsic-early.c | 52 +++++++++- drivers/irqchip/irq-riscv-imsic-platform.c | 32 ++++-- drivers/irqchip/irq-riscv-imsic-state.c | 115 ++++++++++----------- drivers/irqchip/irq-riscv-imsic-state.h | 2 +- include/linux/irqchip/riscv-imsic.h | 10 ++ 5 files changed, 144 insertions(+), 67 deletions(-) diff --git a/drivers/irqchip/irq-riscv-imsic-early.c b/drivers/irqchip/irq-riscv-imsic-early.c index 886418ec06cb..d8161243791d 100644 --- a/drivers/irqchip/irq-riscv-imsic-early.c +++ b/drivers/irqchip/irq-riscv-imsic-early.c @@ -5,13 +5,16 @@ */ #define pr_fmt(fmt) "riscv-imsic: " fmt +#include #include #include #include #include #include #include +#include #include +#include #include #include @@ -182,7 +185,7 @@ static int __init imsic_early_dt_init(struct device_node *node, struct device_no int rc; /* Setup IMSIC state */ - rc = imsic_setup_state(fwnode); + rc = imsic_setup_state(fwnode, NULL); if (rc) { pr_err("%pfwP: failed to setup state (error %d)\n", fwnode, rc); return rc; @@ -199,3 +202,50 @@ static int __init imsic_early_dt_init(struct device_node *node, struct device_no } IRQCHIP_DECLARE(riscv_imsic, "riscv,imsics", imsic_early_dt_init); + +#ifdef CONFIG_ACPI + +static struct fwnode_handle *imsic_acpi_fwnode; + +struct fwnode_handle *imsic_acpi_get_fwnode(struct device *dev) +{ + return imsic_acpi_fwnode; +} + +static int __init imsic_early_acpi_init(union acpi_subtable_headers *header, + const unsigned long end) +{ + struct acpi_madt_imsic *imsic = (struct acpi_madt_imsic *)header; + int rc; + + imsic_acpi_fwnode = irq_domain_alloc_named_fwnode("imsic"); + if (!imsic_acpi_fwnode) { + pr_err("unable to allocate IMSIC FW node\n"); + return -ENOMEM; + } + + /* Setup IMSIC state */ + rc = imsic_setup_state(imsic_acpi_fwnode, (void *)imsic); + if (rc) { + pr_err("%pfwP: failed to setup state (error %d)\n", imsic_acpi_fwnode, rc); + return rc; + } + + /* Do early setup of IMSIC state and IPIs */ + rc = imsic_early_probe(imsic_acpi_fwnode); + if (rc) + return rc; + + rc = imsic_platform_acpi_probe(imsic_acpi_fwnode); + +#ifdef CONFIG_PCI + if (!rc) + pci_msi_register_fwnode_provider(&imsic_acpi_get_fwnode); +#endif + + return rc; +} + +IRQCHIP_ACPI_DECLARE(riscv_imsic, ACPI_MADT_TYPE_IMSIC, NULL, + 1, imsic_early_acpi_init); +#endif diff --git a/drivers/irqchip/irq-riscv-imsic-platform.c b/drivers/irqchip/irq-riscv-imsic-platform.c index 11723a763c10..64905e6f52d7 100644 --- a/drivers/irqchip/irq-riscv-imsic-platform.c +++ b/drivers/irqchip/irq-riscv-imsic-platform.c @@ -5,6 +5,7 @@ */ #define pr_fmt(fmt) "riscv-imsic: " fmt +#include #include #include #include @@ -348,18 +349,37 @@ int imsic_irqdomain_init(void) return 0; } -static int imsic_platform_probe(struct platform_device *pdev) +static int imsic_platform_probe_common(struct fwnode_handle *fwnode) { - struct device *dev = &pdev->dev; - - if (imsic && imsic->fwnode != dev->fwnode) { - dev_err(dev, "fwnode mismatch\n"); + if (imsic && imsic->fwnode != fwnode) { + pr_err("%pfwP: fwnode mismatch\n", fwnode); return -ENODEV; } return imsic_irqdomain_init(); } +static int imsic_platform_dt_probe(struct platform_device *pdev) +{ + return imsic_platform_probe_common(pdev->dev.fwnode); +} + +#ifdef CONFIG_ACPI + +/* + * On ACPI based systems, PCI enumeration happens early during boot in + * acpi_scan_init(). PCI enumeration expects MSI domain setup before + * it calls pci_set_msi_domain(). Hence, unlike in DT where + * imsic-platform drive probe happens late during boot, ACPI based + * systems need to setup the MSI domain early. + */ +int imsic_platform_acpi_probe(struct fwnode_handle *fwnode) +{ + return imsic_platform_probe_common(fwnode); +} + +#endif + static const struct of_device_id imsic_platform_match[] = { { .compatible = "riscv,imsics" }, {} @@ -370,6 +390,6 @@ static struct platform_driver imsic_platform_driver = { .name = "riscv-imsic", .of_match_table = imsic_platform_match, }, - .probe = imsic_platform_probe, + .probe = imsic_platform_dt_probe, }; builtin_platform_driver(imsic_platform_driver); diff --git a/drivers/irqchip/irq-riscv-imsic-state.c b/drivers/irqchip/irq-riscv-imsic-state.c index 5479f872e62b..608b87dd0784 100644 --- a/drivers/irqchip/irq-riscv-imsic-state.c +++ b/drivers/irqchip/irq-riscv-imsic-state.c @@ -5,6 +5,7 @@ */ #define pr_fmt(fmt) "riscv-imsic: " fmt +#include #include #include #include @@ -516,12 +517,8 @@ static int __init imsic_get_parent_hartid(struct fwnode_handle *fwnode, struct of_phandle_args parent; int rc; - /* - * Currently, only OF fwnode is supported so extend this - * function for ACPI support. - */ if (!is_of_node(fwnode)) - return -EINVAL; + return acpi_get_intc_index_hartid(index, hartid); rc = of_irq_parse_one(to_of_node(fwnode), index, &parent); if (rc) @@ -540,12 +537,8 @@ static int __init imsic_get_parent_hartid(struct fwnode_handle *fwnode, static int __init imsic_get_mmio_resource(struct fwnode_handle *fwnode, u32 index, struct resource *res) { - /* - * Currently, only OF fwnode is supported so extend this - * function for ACPI support. - */ if (!is_of_node(fwnode)) - return -EINVAL; + return acpi_get_imsic_mmio_info(index, res); return of_address_to_resource(to_of_node(fwnode), index, res); } @@ -553,20 +546,15 @@ static int __init imsic_get_mmio_resource(struct fwnode_handle *fwnode, static int __init imsic_parse_fwnode(struct fwnode_handle *fwnode, struct imsic_global_config *global, u32 *nr_parent_irqs, - u32 *nr_mmios) + u32 *nr_mmios, + void *opaque) { + struct acpi_madt_imsic *imsic = (struct acpi_madt_imsic *)opaque; unsigned long hartid; struct resource res; int rc; u32 i; - /* - * Currently, only OF fwnode is supported so extend this - * function for ACPI support. - */ - if (!is_of_node(fwnode)) - return -EINVAL; - *nr_parent_irqs = 0; *nr_mmios = 0; @@ -578,51 +566,60 @@ static int __init imsic_parse_fwnode(struct fwnode_handle *fwnode, return -EINVAL; } - /* Find number of guest index bits in MSI address */ - rc = of_property_read_u32(to_of_node(fwnode), "riscv,guest-index-bits", - &global->guest_index_bits); - if (rc) - global->guest_index_bits = 0; + if (is_of_node(fwnode)) { + /* Find number of guest index bits in MSI address */ + rc = of_property_read_u32(to_of_node(fwnode), "riscv,guest-index-bits", + &global->guest_index_bits); + if (rc) + global->guest_index_bits = 0; - /* Find number of HART index bits */ - rc = of_property_read_u32(to_of_node(fwnode), "riscv,hart-index-bits", - &global->hart_index_bits); - if (rc) { - /* Assume default value */ - global->hart_index_bits = __fls(*nr_parent_irqs); - if (BIT(global->hart_index_bits) < *nr_parent_irqs) - global->hart_index_bits++; - } + /* Find number of HART index bits */ + rc = of_property_read_u32(to_of_node(fwnode), "riscv,hart-index-bits", + &global->hart_index_bits); + if (rc) { + /* Assume default value */ + global->hart_index_bits = __fls(*nr_parent_irqs); + if (BIT(global->hart_index_bits) < *nr_parent_irqs) + global->hart_index_bits++; + } - /* Find number of group index bits */ - rc = of_property_read_u32(to_of_node(fwnode), "riscv,group-index-bits", - &global->group_index_bits); - if (rc) - global->group_index_bits = 0; + /* Find number of group index bits */ + rc = of_property_read_u32(to_of_node(fwnode), "riscv,group-index-bits", + &global->group_index_bits); + if (rc) + global->group_index_bits = 0; - /* - * Find first bit position of group index. - * If not specified assumed the default APLIC-IMSIC configuration. - */ - rc = of_property_read_u32(to_of_node(fwnode), "riscv,group-index-shift", - &global->group_index_shift); - if (rc) - global->group_index_shift = IMSIC_MMIO_PAGE_SHIFT * 2; + /* + * Find first bit position of group index. + * If not specified assumed the default APLIC-IMSIC configuration. + */ + rc = of_property_read_u32(to_of_node(fwnode), "riscv,group-index-shift", + &global->group_index_shift); + if (rc) + global->group_index_shift = IMSIC_MMIO_PAGE_SHIFT * 2; + + /* Find number of interrupt identities */ + rc = of_property_read_u32(to_of_node(fwnode), "riscv,num-ids", + &global->nr_ids); + if (rc) { + pr_err("%pfwP: number of interrupt identities not found\n", fwnode); + return rc; + } - /* Find number of interrupt identities */ - rc = of_property_read_u32(to_of_node(fwnode), "riscv,num-ids", - &global->nr_ids); - if (rc) { - pr_err("%pfwP: number of interrupt identities not found\n", fwnode); - return rc; + /* Find number of guest interrupt identities */ + rc = of_property_read_u32(to_of_node(fwnode), "riscv,num-guest-ids", + &global->nr_guest_ids); + if (rc) + global->nr_guest_ids = global->nr_ids; + } else { + global->guest_index_bits = imsic->guest_index_bits; + global->hart_index_bits = imsic->hart_index_bits; + global->group_index_bits = imsic->group_index_bits; + global->group_index_shift = imsic->group_index_shift; + global->nr_ids = imsic->num_ids; + global->nr_guest_ids = imsic->num_guest_ids; } - /* Find number of guest interrupt identities */ - rc = of_property_read_u32(to_of_node(fwnode), "riscv,num-guest-ids", - &global->nr_guest_ids); - if (rc) - global->nr_guest_ids = global->nr_ids; - /* Sanity check guest index bits */ i = BITS_PER_LONG - IMSIC_MMIO_PAGE_SHIFT; if (i < global->guest_index_bits) { @@ -688,7 +685,7 @@ static int __init imsic_parse_fwnode(struct fwnode_handle *fwnode, return 0; } -int __init imsic_setup_state(struct fwnode_handle *fwnode) +int __init imsic_setup_state(struct fwnode_handle *fwnode, void *opaque) { u32 i, j, index, nr_parent_irqs, nr_mmios, nr_handlers = 0; struct imsic_global_config *global; @@ -729,7 +726,7 @@ int __init imsic_setup_state(struct fwnode_handle *fwnode) } /* Parse IMSIC fwnode */ - rc = imsic_parse_fwnode(fwnode, global, &nr_parent_irqs, &nr_mmios); + rc = imsic_parse_fwnode(fwnode, global, &nr_parent_irqs, &nr_mmios, opaque); if (rc) goto out_free_local; diff --git a/drivers/irqchip/irq-riscv-imsic-state.h b/drivers/irqchip/irq-riscv-imsic-state.h index 5ae2f69b035b..391e44280827 100644 --- a/drivers/irqchip/irq-riscv-imsic-state.h +++ b/drivers/irqchip/irq-riscv-imsic-state.h @@ -102,7 +102,7 @@ void imsic_vector_debug_show_summary(struct seq_file *m, int ind); void imsic_state_online(void); void imsic_state_offline(void); -int imsic_setup_state(struct fwnode_handle *fwnode); +int imsic_setup_state(struct fwnode_handle *fwnode, void *opaque); int imsic_irqdomain_init(void); #endif diff --git a/include/linux/irqchip/riscv-imsic.h b/include/linux/irqchip/riscv-imsic.h index faf0b800b1b0..e08680b1932b 100644 --- a/include/linux/irqchip/riscv-imsic.h +++ b/include/linux/irqchip/riscv-imsic.h @@ -84,4 +84,14 @@ static inline const struct imsic_global_config *imsic_get_global_config(void) #endif +#ifdef CONFIG_ACPI +int imsic_platform_acpi_probe(struct fwnode_handle *fwnode); +struct fwnode_handle *imsic_acpi_get_fwnode(struct device *dev); +#else +static inline struct fwnode_handle *imsic_acpi_get_fwnode(struct device *dev) +{ + return NULL; +} +#endif + #endif From patchwork Mon Apr 15 17:01:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 1923833 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com header.a=rsa-sha256 header.s=google header.b=IgooehBq; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=147.75.80.249; helo=am.mirrors.kernel.org; envelope-from=linux-pci+bounces-6273-incoming=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from am.mirrors.kernel.org (am.mirrors.kernel.org [147.75.80.249]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VJD9D4tLnz1yY4 for ; Tue, 16 Apr 2024 03:06:40 +1000 (AEST) Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id 199431F22F13 for ; Mon, 15 Apr 2024 17:06:38 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 9CEC0129A78; Mon, 15 Apr 2024 17:03:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="IgooehBq" X-Original-To: linux-pci@vger.kernel.org Received: from mail-pf1-f182.google.com (mail-pf1-f182.google.com [209.85.210.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0CED01292E5 for ; Mon, 15 Apr 2024 17:03:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.182 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200593; cv=none; b=XFzdp/+m9FexeElTT/aUi/yZtpeYYw0sTWFj2pY1i5Yil+DyGGE5XLOXvpr0LPELoktziYroe1sM9aHJYlUq7wEtMQCBDsHVa4jwWfmGQ9SZo4T+BpUqK2Q6UjaxHcpSW+PMpB8MkOHj0YeKowT8IEC2jdS8fXoqOeUtsQbTOEQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200593; c=relaxed/simple; bh=zR9YW/ONlpnGtOqbpcoPrl61EIaXzrcgrwGTwL9VCus=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=mqN8fPzTmQSmzbr7IRx3MmA1WzO2aFBF760FxFzgrk0TXNoqvLboJs/arrgARx3l9kkGFTVP1LSRWamQUMO4f6NLyI1naN5Q2+udJWlT74LYDnDfBwUPRNTZZXxkVGYuHYbuaIMaZam74LpTV/4mUCSJdudAWtvLCH41VdBNBH0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com; spf=pass smtp.mailfrom=ventanamicro.com; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b=IgooehBq; arc=none smtp.client-ip=209.85.210.182 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Received: by mail-pf1-f182.google.com with SMTP id d2e1a72fcca58-6ed04c91c46so3651003b3a.0 for ; Mon, 15 Apr 2024 10:03:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1713200591; x=1713805391; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=H3zPkz1xxC1CxVIHCuATW1be05yVqY6yZ3K4WTU3dxk=; b=IgooehBqroOJM4xvchZpEqVIwtA0s50OfUSv+hCaFzpIRgUMKKtUTkUPj2R8TB85tq sNfi6lAPHEnVBXoPkvtllsgSP+AQxqJA3z3yA0MU7/8zXx6TQCdVgM5kv7jsycTqiO8o pbyyb7piCnymz7qCMrSziTjyyPTiEezUxL8aZakFHUXpG+jeKHmXYZYAdbZFeywzZ8BZ 8rV9a22O0/HOil8o+jJwskmhMPPHvUhwVAG1Z+db2UD4DloUFkK7h9p9eges/xIqkqEh G1dicWCNQS9FltNHLW7R37kNbntR30lcXTQAB+43Zg08NFzGWpuNun3/aaaJzga4JFN9 H39A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713200591; x=1713805391; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=H3zPkz1xxC1CxVIHCuATW1be05yVqY6yZ3K4WTU3dxk=; b=BzYt0Hu4gkAiaJi31d7dg5TbRJ9GG9YKyq2exHC3FRaa82a/eXFfs2HjlyaCNLxJzb 0yq1Rf+EunzLk5Fc+FKg7OTOlh5U8AYTu/F+aFl1dpIueaVsIp4KPlyuQo1T1nrcGKKY Vp9bbFIHIArvB2uiEYEPBUvRhAmW9iLkSiv695D2r23fGYBhC/UeF5hPdb8AKITmfOZw TAJja0YpeW6hD6QSckwSInfU+OHw4xsPFcyc9KSm6fMMx69yDaXS3Rj4nc26PSYbsdRH cpX87Y3R4YhAPrVbcXFkjrC47yrUgc3+Be7xq+86E3/QimGJ7K40LEZkx/dRTjFZuQ7w Q3uQ== X-Forwarded-Encrypted: i=1; AJvYcCWscWWVoceRXaK4TXYGVdHhM69HNWQ6OESygKEXKLBNOCr+HjQsQKoIl9etAlSKWlzI8YfHv0eFUz3EiVmg2u+lMzImPmjcLORZ X-Gm-Message-State: AOJu0YyaHhPgJ9qvq8toyuAD+sWaVDKrCVqQFKMqdh8VKIzMtXISci5e ji5unSiQdcrDt1YXYux0a2GroR5r4iDrKIU/KCxY313qQ4SWMUS2dePX8JMLusE= X-Google-Smtp-Source: AGHT+IH0ficLpEhaCe8Pnb6wxywvR8vuQmlkndUIbxirsZ7VdL0/Vy3OLDYye3r5jTi06t4U01f4Dw== X-Received: by 2002:a05:6a20:8420:b0:1a7:ab39:4356 with SMTP id c32-20020a056a20842000b001a7ab394356mr14647289pzd.10.1713200591065; Mon, 15 Apr 2024 10:03:11 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.230]) by smtp.gmail.com with ESMTPSA id 1-20020a056a00072100b006ed045e3a70sm7433158pfm.25.2024.04.15.10.03.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 10:03:10 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Cc: Catalin Marinas , Will Deacon , Paul Walmsley , Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Bjorn Helgaas , Anup Patel , Thomas Gleixner , Samuel Holland , Robert Moore , Haibo1 Xu , Conor Dooley , Andrew Jones , Atish Kumar Patra , Andrei Warkentin , Marc Zyngier , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Sunil V L Subject: [RFC PATCH v4 16/20] irqchip: riscv-aplic: Add ACPI support Date: Mon, 15 Apr 2024 22:31:09 +0530 Message-Id: <20240415170113.662318-17-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240415170113.662318-1-sunilvl@ventanamicro.com> References: <20240415170113.662318-1-sunilvl@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add ACPI support in APLIC drivers. It used the namespace device to probe and MADT to get other details required. Use the mapping created early during boot to get the details about the APLIC. Signed-off-by: Sunil V L --- drivers/irqchip/irq-riscv-aplic-direct.c | 20 ++++--- drivers/irqchip/irq-riscv-aplic-main.c | 70 ++++++++++++++++-------- drivers/irqchip/irq-riscv-aplic-main.h | 1 + drivers/irqchip/irq-riscv-aplic-msi.c | 9 ++- 4 files changed, 67 insertions(+), 33 deletions(-) diff --git a/drivers/irqchip/irq-riscv-aplic-direct.c b/drivers/irqchip/irq-riscv-aplic-direct.c index 06bace9b7497..ccf08e617e5a 100644 --- a/drivers/irqchip/irq-riscv-aplic-direct.c +++ b/drivers/irqchip/irq-riscv-aplic-direct.c @@ -4,6 +4,7 @@ * Copyright (C) 2022 Ventana Micro Systems Inc. */ +#include #include #include #include @@ -192,17 +193,20 @@ static int aplic_direct_starting_cpu(unsigned int cpu) } static int aplic_direct_parse_parent_hwirq(struct device *dev, u32 index, - u32 *parent_hwirq, unsigned long *parent_hartid) + u32 *parent_hwirq, unsigned long *parent_hartid, + struct aplic_priv *priv) { struct of_phandle_args parent; int rc; - /* - * Currently, only OF fwnode is supported so extend this - * function for ACPI support. - */ - if (!is_of_node(dev->fwnode)) - return -EINVAL; + if (!is_of_node(dev->fwnode)) { + rc = acpi_get_ext_intc_parent_hartid(priv->id, index, parent_hartid); + if (rc) + return rc; + + *parent_hwirq = RV_IRQ_EXT; + return 0; + } rc = of_irq_parse_one(to_of_node(dev->fwnode), index, &parent); if (rc) @@ -240,7 +244,7 @@ int aplic_direct_setup(struct device *dev, void __iomem *regs) /* Setup per-CPU IDC and target CPU mask */ current_cpu = get_cpu(); for (i = 0; i < priv->nr_idcs; i++) { - rc = aplic_direct_parse_parent_hwirq(dev, i, &hwirq, &hartid); + rc = aplic_direct_parse_parent_hwirq(dev, i, &hwirq, &hartid, priv); if (rc) { dev_warn(dev, "parent irq for IDC%d not found\n", i); continue; diff --git a/drivers/irqchip/irq-riscv-aplic-main.c b/drivers/irqchip/irq-riscv-aplic-main.c index 774a0c97fdab..c1fd328ddf7d 100644 --- a/drivers/irqchip/irq-riscv-aplic-main.c +++ b/drivers/irqchip/irq-riscv-aplic-main.c @@ -4,8 +4,10 @@ * Copyright (C) 2022 Ventana Micro Systems Inc. */ +#include #include #include +#include #include #include #include @@ -125,39 +127,50 @@ static void aplic_init_hw_irqs(struct aplic_priv *priv) writel(0, priv->regs + APLIC_DOMAINCFG); } +#ifdef CONFIG_ACPI +static const struct acpi_device_id aplic_acpi_match[] = { + { "RSCV0002", 0 }, + {} +}; +MODULE_DEVICE_TABLE(acpi, aplic_acpi_match); + +#endif + int aplic_setup_priv(struct aplic_priv *priv, struct device *dev, void __iomem *regs) { struct of_phandle_args parent; int rc; - /* - * Currently, only OF fwnode is supported so extend this - * function for ACPI support. - */ - if (!is_of_node(dev->fwnode)) - return -EINVAL; - /* Save device pointer and register base */ priv->dev = dev; priv->regs = regs; - /* Find out number of interrupt sources */ - rc = of_property_read_u32(to_of_node(dev->fwnode), "riscv,num-sources", - &priv->nr_irqs); - if (rc) { - dev_err(dev, "failed to get number of interrupt sources\n"); - return rc; - } - - /* - * Find out number of IDCs based on parent interrupts - * - * If "msi-parent" property is present then we ignore the - * APLIC IDCs which forces the APLIC driver to use MSI mode. - */ - if (!of_property_present(to_of_node(dev->fwnode), "msi-parent")) { - while (!of_irq_parse_one(to_of_node(dev->fwnode), priv->nr_idcs, &parent)) - priv->nr_idcs++; + if (is_of_node(dev->fwnode)) { + /* Find out number of interrupt sources */ + rc = of_property_read_u32(to_of_node(dev->fwnode), "riscv,num-sources", + &priv->nr_irqs); + if (rc) { + dev_err(dev, "failed to get number of interrupt sources\n"); + return rc; + } + + /* + * Find out number of IDCs based on parent interrupts + * + * If "msi-parent" property is present then we ignore the + * APLIC IDCs which forces the APLIC driver to use MSI mode. + */ + if (!of_property_present(to_of_node(dev->fwnode), "msi-parent")) { + while (!of_irq_parse_one(to_of_node(dev->fwnode), priv->nr_idcs, &parent)) + priv->nr_idcs++; + } + } else { + rc = riscv_acpi_get_gsi_info(dev->fwnode, &priv->gsi_base, &priv->id, + &priv->nr_irqs, &priv->nr_idcs); + if (rc) { + dev_err(dev, "failed to find GSI mapping\n"); + return rc; + } } /* Setup initial state APLIC interrupts */ @@ -186,6 +199,9 @@ static int aplic_probe(struct platform_device *pdev) */ if (is_of_node(dev->fwnode)) msi_mode = of_property_present(to_of_node(dev->fwnode), "msi-parent"); + else + msi_mode = imsic_acpi_get_fwnode(NULL) ? 1 : 0; + if (msi_mode) rc = aplic_msi_setup(dev, regs); else @@ -193,6 +209,11 @@ static int aplic_probe(struct platform_device *pdev) if (rc) dev_err(dev, "failed to setup APLIC in %s mode\n", msi_mode ? "MSI" : "direct"); +#ifdef CONFIG_ACPI + if (!acpi_disabled) + acpi_dev_clear_dependencies(ACPI_COMPANION(dev)); +#endif + return rc; } @@ -205,6 +226,7 @@ static struct platform_driver aplic_driver = { .driver = { .name = "riscv-aplic", .of_match_table = aplic_match, + .acpi_match_table = ACPI_PTR(aplic_acpi_match), }, .probe = aplic_probe, }; diff --git a/drivers/irqchip/irq-riscv-aplic-main.h b/drivers/irqchip/irq-riscv-aplic-main.h index 4393927d8c80..9fbf45c7b4f7 100644 --- a/drivers/irqchip/irq-riscv-aplic-main.h +++ b/drivers/irqchip/irq-riscv-aplic-main.h @@ -28,6 +28,7 @@ struct aplic_priv { u32 gsi_base; u32 nr_irqs; u32 nr_idcs; + u32 id; void __iomem *regs; struct aplic_msicfg msicfg; }; diff --git a/drivers/irqchip/irq-riscv-aplic-msi.c b/drivers/irqchip/irq-riscv-aplic-msi.c index 028444af48bd..f5020241e0ed 100644 --- a/drivers/irqchip/irq-riscv-aplic-msi.c +++ b/drivers/irqchip/irq-riscv-aplic-msi.c @@ -157,6 +157,7 @@ static const struct msi_domain_template aplic_msi_template = { int aplic_msi_setup(struct device *dev, void __iomem *regs) { const struct imsic_global_config *imsic_global; + struct irq_domain *msi_domain; struct aplic_priv *priv; struct aplic_msicfg *mc; phys_addr_t pa; @@ -239,8 +240,14 @@ int aplic_msi_setup(struct device *dev, void __iomem *regs) * IMSIC and the IMSIC MSI domains are created later through * the platform driver probing so we set it explicitly here. */ - if (is_of_node(dev->fwnode)) + if (is_of_node(dev->fwnode)) { of_msi_configure(dev, to_of_node(dev->fwnode)); + } else { + msi_domain = irq_find_matching_fwnode(imsic_acpi_get_fwnode(dev), + DOMAIN_BUS_PLATFORM_MSI); + if (msi_domain) + dev_set_msi_domain(dev, msi_domain); + } } if (!msi_create_device_irq_domain(dev, MSI_DEFAULT_DOMAIN, &aplic_msi_template, From patchwork Mon Apr 15 17:01:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 1923834 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com header.a=rsa-sha256 header.s=google header.b=DP1kSAAB; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=147.75.199.223; helo=ny.mirrors.kernel.org; envelope-from=linux-pci+bounces-6274-incoming=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org [147.75.199.223]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VJD9l4Wtcz1yY4 for ; Tue, 16 Apr 2024 03:07:07 +1000 (AEST) Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ny.mirrors.kernel.org (Postfix) with ESMTPS id C8FE01C21C1A for ; Mon, 15 Apr 2024 17:07:05 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 554C312A16B; Mon, 15 Apr 2024 17:03:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="DP1kSAAB" X-Original-To: linux-pci@vger.kernel.org Received: from mail-pf1-f180.google.com (mail-pf1-f180.google.com [209.85.210.180]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 67DB6129E8E for ; Mon, 15 Apr 2024 17:03:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.180 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200602; cv=none; b=XGOd+Ia9vO36eNIgrSHuvcvDi+b1SVy1SO2C4ANd6oupNRrhbasmSawUYJ4jLW9r+5z/gNjVxKpB6XwUrssG7brnT34qSuxZxupekWkqC3AZ8GQdf5BurNJsYE9tYDNvzqCZge0YpRx2eWEqjpo8g9CqWFMGoemt6G67t1jMlkg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200602; c=relaxed/simple; bh=1ZQDs7+ZHziGzcARzxbD4/Mg73gTUDQb9qq/sbtrJ1U=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=cDzTGR/irex+zxXKpee5LakRwyTNct5O9sqdGa9whI8Zp0jtxUTWxNGdeH56keok6HOoC5tKqGsx/K2ySBh9dy6xwv7iREXvdgGYDXWIM94B7gSvw/KoHZI1qS/0JdHUGn30dYW6B7uIUQFWfVxufLg55/lU0lCeC8PaQkSahjg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com; spf=pass smtp.mailfrom=ventanamicro.com; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b=DP1kSAAB; arc=none smtp.client-ip=209.85.210.180 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Received: by mail-pf1-f180.google.com with SMTP id d2e1a72fcca58-6eff2be3b33so1196559b3a.2 for ; Mon, 15 Apr 2024 10:03:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1713200598; x=1713805398; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ThUaZ42acH6gIoHt/Xyyai1xsGISjU0BkoEw/XHj/Ns=; b=DP1kSAAB5CjzE0GKZgUO2kz++R9xMC0vf1dQ4BDhTo/Dfvs4lwNdHSed6VF2pJAAwB yTlQK1zqTtjbS/CS0vkzXZzTb2WnejG+hDWZoeghUPG2iKREkKmymc6bac9P8ATYp1xt +gvkGr99nQTUKaPBEkeA6cVkOvfw5/0wS/WD0ZQWoXmX8CjHvsj5f1/RwsivbPSMCWzr dIkb2AoOHxbuvZagJ8LanKehOduYtJb8wV5GkWDhz+fK2JnUUg4sAp8TpjNaVRmkQdd0 69i5R9MsobdVSm0ARZOj8YuNXUntRIUHLlS9IHS5pc8KGR3btJDlwTLOCOQvbd4aW/AV wi3w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713200598; x=1713805398; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ThUaZ42acH6gIoHt/Xyyai1xsGISjU0BkoEw/XHj/Ns=; b=QFJXGZrB9TbJefxY8jsDEcQqQBaYXsV+VoHW1RX5fa1LibYzEKwVvTJLso6I3Fw6w4 Ev5DNzA+wmTcjAg7t2k1P2jnTl4usIijVhsjhobx4lbl0zgLMROEUFOlZ4RqANtYjrmS ngd4xKEjgnaQ+uhg/g3WkR/dp5nJVoivK74Ds0boPpJdDkgI1ws7fqUzFe6oL1I0JQQR gjbi1dFRGsZ9MfBp76NPR+ViBIzerxmiPsjMhzWyyuYFdDuBLku6fqOreYSHBaF2482g 0s6mikXHCtaJJ2JKt3L3xvu4RPCtw26p9elR0qQ1ZvRMzddx1orPMV/UWQx7mtPsXQhl NLYg== X-Forwarded-Encrypted: i=1; AJvYcCU++z4MqBV/63nZPKgFTICqnXNU0XmeaVghxuB5e0IM6anehkiVm50aAY0xT/bB7bZ8eUVY6iQfetqpHMBQWgcf+MIQyxUFpC8p X-Gm-Message-State: AOJu0YxCK/cwShkJS3fbvAOC8InNRbwbJ3OQEoB09aPjcn9p2NLtQG+y tFVvjDktSRwiJY7kwBPesHXpKAmaKk/EoE5WoyRMFsehJNkSPjVG0XZwLSaIPFo= X-Google-Smtp-Source: AGHT+IHhuE17NgEEPGD23nh5CnQ5veXRbEyfj/0HGrVBsvBO1xoLfPY+OSt88142jHvtos+eqeLYfg== X-Received: by 2002:a05:6a00:391c:b0:6ec:f5d2:f6be with SMTP id fh28-20020a056a00391c00b006ecf5d2f6bemr10232711pfb.1.1713200597605; Mon, 15 Apr 2024 10:03:17 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.230]) by smtp.gmail.com with ESMTPSA id 1-20020a056a00072100b006ed045e3a70sm7433158pfm.25.2024.04.15.10.03.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 10:03:17 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Cc: Catalin Marinas , Will Deacon , Paul Walmsley , Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Bjorn Helgaas , Anup Patel , Thomas Gleixner , Samuel Holland , Robert Moore , Haibo1 Xu , Conor Dooley , Andrew Jones , Atish Kumar Patra , Andrei Warkentin , Marc Zyngier , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Sunil V L Subject: [RFC PATCH v4 17/20] irqchip: irq-sifive-plic: Add ACPI support Date: Mon, 15 Apr 2024 22:31:10 +0530 Message-Id: <20240415170113.662318-18-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240415170113.662318-1-sunilvl@ventanamicro.com> References: <20240415170113.662318-1-sunilvl@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add ACPI support in PLIC driver. Use the mapping created early during boot to get details about the PLIC. Signed-off-by: Sunil V L Co-developed-by: Haibo Xu Signed-off-by: Haibo Xu --- drivers/irqchip/irq-sifive-plic.c | 89 +++++++++++++++++++++++-------- 1 file changed, 68 insertions(+), 21 deletions(-) diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c index f3d4cb9e34f7..5fa45701ea24 100644 --- a/drivers/irqchip/irq-sifive-plic.c +++ b/drivers/irqchip/irq-sifive-plic.c @@ -3,6 +3,7 @@ * Copyright (C) 2017 SiFive * Copyright (C) 2018 Christoph Hellwig */ +#include #include #include #include @@ -70,6 +71,8 @@ struct plic_priv { unsigned long plic_quirks; unsigned int nr_irqs; unsigned long *prio_save; + u32 gsi_base; + int id; }; struct plic_handler { @@ -327,6 +330,10 @@ static int plic_irq_domain_translate(struct irq_domain *d, { struct plic_priv *priv = d->host_data; + /* For DT, gsi_base is always zero. */ + if (fwspec->param[0] >= priv->gsi_base) + fwspec->param[0] = fwspec->param[0] - priv->gsi_base; + if (test_bit(PLIC_QUIRK_EDGE_INTERRUPT, &priv->plic_quirks)) return irq_domain_translate_twocell(d, fwspec, hwirq, type); @@ -427,18 +434,32 @@ static const struct of_device_id plic_match[] = { {} }; +#ifdef CONFIG_ACPI + +static const struct acpi_device_id plic_acpi_match[] = { + { "RSCV0001", 0 }, + {} +}; +MODULE_DEVICE_TABLE(acpi, plic_acpi_match); + +#endif static int plic_parse_nr_irqs_and_contexts(struct platform_device *pdev, - u32 *nr_irqs, u32 *nr_contexts) + u32 *nr_irqs, u32 *nr_contexts, + u32 *gsi_base, u32 *id) { struct device *dev = &pdev->dev; int rc; - /* - * Currently, only OF fwnode is supported so extend this - * function for ACPI support. - */ - if (!is_of_node(dev->fwnode)) - return -EINVAL; + if (!is_of_node(dev->fwnode)) { + riscv_acpi_get_gsi_info(dev->fwnode, gsi_base, id, nr_irqs, NULL); + acpi_get_plic_nr_contexts(*id, nr_contexts); + if (WARN_ON(!*nr_contexts)) { + dev_err(dev, "no PLIC context available\n"); + return -EINVAL; + } + + return 0; + } rc = of_property_read_u32(to_of_node(dev->fwnode), "riscv,ndev", nr_irqs); if (rc) { @@ -452,23 +473,29 @@ static int plic_parse_nr_irqs_and_contexts(struct platform_device *pdev, return -EINVAL; } + *gsi_base = 0; + *id = 0; + return 0; } static int plic_parse_context_parent(struct platform_device *pdev, u32 context, - u32 *parent_hwirq, int *parent_cpu) + u32 *parent_hwirq, int *parent_cpu, u32 id) { struct device *dev = &pdev->dev; struct of_phandle_args parent; unsigned long hartid; int rc; - /* - * Currently, only OF fwnode is supported so extend this - * function for ACPI support. - */ - if (!is_of_node(dev->fwnode)) - return -EINVAL; + if (!is_of_node(dev->fwnode)) { + rc = acpi_get_ext_intc_parent_hartid(id, context, &hartid); + if (rc) + return rc; + + *parent_cpu = riscv_hartid_to_cpuid(hartid); + *parent_hwirq = RV_IRQ_EXT; + return 0; + } rc = of_irq_parse_one(to_of_node(dev->fwnode), context, &parent); if (rc) @@ -493,7 +520,9 @@ static int plic_probe(struct platform_device *pdev) struct irq_domain *domain; struct plic_priv *priv; irq_hw_number_t hwirq; + int id, context_id; bool cpuhp_setup; + u32 gsi_base; if (is_of_node(dev->fwnode)) { const struct of_device_id *id; @@ -503,7 +532,7 @@ static int plic_probe(struct platform_device *pdev) plic_quirks = (unsigned long)id->data; } - error = plic_parse_nr_irqs_and_contexts(pdev, &nr_irqs, &nr_contexts); + error = plic_parse_nr_irqs_and_contexts(pdev, &nr_irqs, &nr_contexts, &gsi_base, &id); if (error) return error; @@ -514,6 +543,8 @@ static int plic_probe(struct platform_device *pdev) priv->dev = dev; priv->plic_quirks = plic_quirks; priv->nr_irqs = nr_irqs; + priv->gsi_base = gsi_base; + priv->id = id; priv->regs = devm_platform_ioremap_resource(pdev, 0); if (WARN_ON(!priv->regs)) @@ -524,12 +555,22 @@ static int plic_probe(struct platform_device *pdev) return -ENOMEM; for (i = 0; i < nr_contexts; i++) { - error = plic_parse_context_parent(pdev, i, &parent_hwirq, &cpu); + error = plic_parse_context_parent(pdev, i, &parent_hwirq, &cpu, priv->id); if (error) { dev_warn(dev, "hwirq for context%d not found\n", i); continue; } + if (is_of_node(dev->fwnode)) { + context_id = i; + } else { + error = acpi_get_plic_context(priv->id, i, &context_id); + if (error) { + dev_warn(dev, "invalid context id for context%d\n", i); + continue; + } + } + /* * Skip contexts other than external interrupts for our * privilege level. @@ -575,10 +616,10 @@ static int plic_probe(struct platform_device *pdev) cpumask_set_cpu(cpu, &priv->lmask); handler->present = true; handler->hart_base = priv->regs + CONTEXT_BASE + - i * CONTEXT_SIZE; + context_id * CONTEXT_SIZE; raw_spin_lock_init(&handler->enable_lock); handler->enable_base = priv->regs + CONTEXT_ENABLE_BASE + - i * CONTEXT_ENABLE_SIZE; + context_id * CONTEXT_ENABLE_SIZE; handler->priv = priv; handler->enable_save = devm_kcalloc(dev, DIV_ROUND_UP(nr_irqs, 32), @@ -594,8 +635,8 @@ static int plic_probe(struct platform_device *pdev) nr_handlers++; } - priv->irqdomain = irq_domain_add_linear(to_of_node(dev->fwnode), nr_irqs + 1, - &plic_irqdomain_ops, priv); + priv->irqdomain = irq_domain_create_linear(dev->fwnode, nr_irqs + 1, + &plic_irqdomain_ops, priv); if (WARN_ON(!priv->irqdomain)) goto fail_cleanup_contexts; @@ -622,13 +663,18 @@ static int plic_probe(struct platform_device *pdev) } } +#ifdef CONFIG_ACPI + if (!acpi_disabled) + acpi_dev_clear_dependencies(ACPI_COMPANION(dev)); +#endif + dev_info(dev, "mapped %d interrupts with %d handlers for %d contexts.\n", nr_irqs, nr_handlers, nr_contexts); return 0; fail_cleanup_contexts: for (i = 0; i < nr_contexts; i++) { - if (plic_parse_context_parent(pdev, i, &parent_hwirq, &cpu)) + if (plic_parse_context_parent(pdev, i, &parent_hwirq, &cpu, priv->id)) continue; if (parent_hwirq != RV_IRQ_EXT || cpu < 0) continue; @@ -647,6 +693,7 @@ static struct platform_driver plic_driver = { .driver = { .name = "riscv-plic", .of_match_table = plic_match, + .acpi_match_table = ACPI_PTR(plic_acpi_match), }, .probe = plic_probe, }; From patchwork Mon Apr 15 17:01:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 1923835 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com header.a=rsa-sha256 header.s=google header.b=hY85NLRH; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=147.75.199.223; helo=ny.mirrors.kernel.org; envelope-from=linux-pci+bounces-6275-incoming=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org [147.75.199.223]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VJD9v2Nxtz1yY4 for ; Tue, 16 Apr 2024 03:07:15 +1000 (AEST) Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ny.mirrors.kernel.org (Postfix) with ESMTPS id 59F801C22E58 for ; Mon, 15 Apr 2024 17:07:13 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 1123985C6A; Mon, 15 Apr 2024 17:03:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="hY85NLRH" X-Original-To: linux-pci@vger.kernel.org Received: from mail-pf1-f171.google.com (mail-pf1-f171.google.com [209.85.210.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B5AC8839F8 for ; Mon, 15 Apr 2024 17:03:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200606; cv=none; b=YzQjWVygntfJqpesO0D17NLKhnee3qup4Cat+duScA6P94bbDOsPMIynxFlWxUqeVjtm9WTZKYzCb9P3owvuV0wdlo7KH95aiNRS2tbVIZ86/Iy6nOtEFXA8gKVjzgaJ3LW3d4CxShzjm7nJccjniJ6NU0qM1QhmVv7kQFR3ECs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200606; c=relaxed/simple; bh=iq+zCwdn57VORSoLKgJUoBBIF3f6Y9IiyHLbSdDt+cg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=rhX9Enp0ZrFCO0JT5dldRN2Xe2NUa369m3oBorQOMmWMo5bH3InJxjp8cETVPC6Rl2iPF+WrInJzeHl7IDvGZTQs/hF45Uhto3ySbjvlYfIG97s/qrwJoPbQ9+GTLLrMH3np12HSUwa3yUV4sEs0dlr0/hlWiUCnsHyGI4loOh4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com; spf=pass smtp.mailfrom=ventanamicro.com; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b=hY85NLRH; arc=none smtp.client-ip=209.85.210.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Received: by mail-pf1-f171.google.com with SMTP id d2e1a72fcca58-6ed2dc03df6so3121590b3a.1 for ; Mon, 15 Apr 2024 10:03:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1713200604; x=1713805404; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=tgBDpDYGQ0glprRFD8yP0RdoCRZMFoPF1RZGUEi3Dy4=; b=hY85NLRHwlYjZWYsKiclOqFiPC3qx2xzyWU1/2uXzVTqfR2KLiRH/J7sQhsEk+ulhU aN7j5M5TONSNMsszIuWjVLLC6bzndUZdOUMsgJ1zZ49pR4DL5nSMHoWZgULCIJoFMTMD 4RQ2eIy64Gbye+IPzkeDtrgdFygWoMWJWWG0kp9CeONxIfP7FwQLjKmVQh9LyxA9Othz /yI2C3Aqsm+IZsbhHb5L08XqKy6j6OLHao4gAVb4VekrS+lVs6oGFNAiIkBZ/Po1uy5F yv4smTv+6a6e/3+FKOV3WRnJ3jsfZjVZSHQE257RWyC6loE0Wnj0leg//b+pq/WY+Gkt hA3Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713200604; x=1713805404; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=tgBDpDYGQ0glprRFD8yP0RdoCRZMFoPF1RZGUEi3Dy4=; b=RnjOwirdVKQ6PjLmhz9l0m+IC1OB+sf3wr8Zn1/+7zkBVpq8IGwppyn+Tm8/75+pXn qUfIxyK+c764DJfXjgMS49vVj1KZcL1MgQRRHWFVylRJcvNy46yKEZT21sFofxE/y146 fvKL4CEfHqZzE8FsbnLoeI20p5LhRwasM6virFrOfO0MOJJcYd76/dxyvTzDWUl9GWeA D3HPFEWZGwWtZKEUjNSuO5wRr+1gIuN363yYO8MDgajR5qokdWlQrLwwksVWLfEAIIZy aKlAnTA47wU67hEpynMKKZkR4k3wZQ0OqijE3OwNB5DDEuVjPYPyhne0CBpCvlu1KZLD NAVg== X-Forwarded-Encrypted: i=1; AJvYcCU4Ux0GsF5hge5H4p3fZ60kMPdFkKyfEkhCt335Rpe7Rhghv1oG7RTx5rKxfgTdlz974SErUJ2YiiQSxL48gFvsztNyQBlDA49n X-Gm-Message-State: AOJu0YyAo765l16HFH7OUWX9WtwK6em5EAxaS0Vuz9qFLvn1x/eqSTIZ RZm9TCkYvlv2qVKGfC6YcM3qt3/SGOVC0405SrgA3El3j9xC0qNT8sxZQe4hk3M= X-Google-Smtp-Source: AGHT+IGfV3g4HnB1SEs58HPZghQyLF4oCdd9NUua8vNYxrzLQb9woMp8qFN8pqykKJDwEhBAY0XH6Q== X-Received: by 2002:a05:6a00:23cc:b0:6e7:29dd:84db with SMTP id g12-20020a056a0023cc00b006e729dd84dbmr14671886pfc.31.1713200604137; Mon, 15 Apr 2024 10:03:24 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.230]) by smtp.gmail.com with ESMTPSA id 1-20020a056a00072100b006ed045e3a70sm7433158pfm.25.2024.04.15.10.03.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 10:03:23 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Cc: Catalin Marinas , Will Deacon , Paul Walmsley , Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Bjorn Helgaas , Anup Patel , Thomas Gleixner , Samuel Holland , Robert Moore , Haibo1 Xu , Conor Dooley , Andrew Jones , Atish Kumar Patra , Andrei Warkentin , Marc Zyngier , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Sunil V L Subject: [RFC PATCH v4 18/20] ACPI: bus: Add RINTC IRQ model for RISC-V Date: Mon, 15 Apr 2024 22:31:11 +0530 Message-Id: <20240415170113.662318-19-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240415170113.662318-1-sunilvl@ventanamicro.com> References: <20240415170113.662318-1-sunilvl@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add the IRQ model for RISC-V INTC so that acpi_set_irq_model can use this for RISC-V. Signed-off-by: Sunil V L --- drivers/acpi/bus.c | 3 +++ include/linux/acpi.h | 1 + 2 files changed, 4 insertions(+) diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c index 17ee483c3bf4..6739db258a95 100644 --- a/drivers/acpi/bus.c +++ b/drivers/acpi/bus.c @@ -1190,6 +1190,9 @@ static int __init acpi_bus_init_irq(void) case ACPI_IRQ_MODEL_LPIC: message = "LPIC"; break; + case ACPI_IRQ_MODEL_RINTC: + message = "RINTC"; + break; default: pr_info("Unknown interrupt routing model\n"); return -ENODEV; diff --git a/include/linux/acpi.h b/include/linux/acpi.h index f8f92aaf97ad..c4b6d5c3aaed 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -107,6 +107,7 @@ enum acpi_irq_model_id { ACPI_IRQ_MODEL_PLATFORM, ACPI_IRQ_MODEL_GIC, ACPI_IRQ_MODEL_LPIC, + ACPI_IRQ_MODEL_RINTC, ACPI_IRQ_MODEL_COUNT }; From patchwork Mon Apr 15 17:01:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 1923836 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com header.a=rsa-sha256 header.s=google header.b=hUiz36kn; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=147.75.80.249; helo=am.mirrors.kernel.org; envelope-from=linux-pci+bounces-6276-incoming=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from am.mirrors.kernel.org (am.mirrors.kernel.org [147.75.80.249]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VJDBB6sM9z1yY4 for ; Tue, 16 Apr 2024 03:07:30 +1000 (AEST) Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id 5E3BC1F2186E for ; Mon, 15 Apr 2024 17:07:28 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 90D6085C79; Mon, 15 Apr 2024 17:03:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="hUiz36kn" X-Original-To: linux-pci@vger.kernel.org Received: from mail-pf1-f169.google.com (mail-pf1-f169.google.com [209.85.210.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 56BE412AAD2 for ; Mon, 15 Apr 2024 17:03:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.169 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200612; cv=none; b=XqZu5G2uf/XBRSnHkFot71o4IshTYmm1nlR8AcNtJ1yTzm5ofwy5KvEv52nKwtsznYhUUT9BCxReS28nL+UaHQ9HE9Mk7kYJ7sHLLJHOcGEZrG0WPDi/Vz9K/aAsIXCwcNeJotNsc2TDtx0dK0xg7hp18x12iTTmef4A4hciIEA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200612; c=relaxed/simple; bh=3keJ3Kuinu5AbppHGPB5DBSDarCkqrC+tWX8DaE+7S8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Io+PNfoF//aOsVY9CP1uUruxQAy+GtOvjrCMNOT7upPe8ikE1j4sSjmzTT2SmoYp7YAojug868J8Ge/Nh4VYwZgexuMFYJCH31Zb9wPlk8gRIrM8zK8RvdeIG/1BuKQw4NCvSV+dYB3hurS8ECTzNJU9/DmguKIcqCG8T2tswes= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com; spf=pass smtp.mailfrom=ventanamicro.com; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b=hUiz36kn; arc=none smtp.client-ip=209.85.210.169 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Received: by mail-pf1-f169.google.com with SMTP id d2e1a72fcca58-6ee13f19e7eso2454498b3a.1 for ; Mon, 15 Apr 2024 10:03:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1713200611; x=1713805411; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=BiK7floMzb7J5dAtjxG557Fp/B2Bd1rBgLoGJEgu0Mc=; b=hUiz36knPqPpd+S1tMexzQ6TUvLG4yRv6AKpTCq8usqHXkPSMlq30Xtx0WA1uHi2di /0UfJhgy/vnESbpVZpjwuGkODJxTJzgVe7AMNgQJ8c7V9mKLmADQuDVBdsF7dA2KlxdG L+svUYkVMTGoFg5sDDnSyetUNAk38Pvi7sg9bD/4HbjSeZxVcsXnMkVdJaaJv5SssrOE dTQLuu6aHMULrH4dOFuB85MoXmw/LBn5/Io/4ON7g7swpBvqOdqlPrQrAhDaLq8Qrkty 9w8fB1+//nivy2qVl5XtSIhWr7+O1Ba9TwsFFfngGf9sJmhXWnW0jmi6ci/FVH8B4kbW r8+A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713200611; x=1713805411; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BiK7floMzb7J5dAtjxG557Fp/B2Bd1rBgLoGJEgu0Mc=; b=Ewxvmy32dRwaletBSIT8FlI1iTSLGFBt99hCDFfCLA57hhJyG1g8ija3Scdkhv6qJq Mqsay2yLMoc7JHw2AFaW+8KQhhGJxPuS0/GG8OEodIuFtHyieyxqQnOfpUl+ttDEpHLE 6XCvd6IaL59tKgzytlcbf8HuFnE0jsXOmvaD8BqerntNF4Ngrem/Rr32sQhHE2whrTiD ePQlxtuYL2YIQcEENgK7S46cEk7hZACjUTAu77YNEizPjVPSsD5/Wdy4Fb5TGWBsOfJP LGrzYw9oDKswYHT/w7U3AL8ASceAzIcgnIHJBiRDO/F53AM1GWLdyT9Oew7UVGlflhnf Y0pw== X-Forwarded-Encrypted: i=1; AJvYcCVHNk0nXclK/zLUIRfn/HB5q5aTOpwoicIiYEqPRoGfUd1l+S5BxHMICatHrjd6EEOEaVOw/Dumrelv+mhxVN48zT4XbLpV/Mld X-Gm-Message-State: AOJu0Yw3mHtqvnmzXGA/vw0PnAzcGB9DtukE7wwecerQpXeO0kIp2wtL p3QmJju4ggwWo3yeuVyuHl8+BwBzfCuqpvC28wpcjiO+chZki54PCXE7XKMpbRY= X-Google-Smtp-Source: AGHT+IFd9+zDBggMUEnYbs4X0hsHQYh+Hj4Aej+R4rn7fzXqChszrhGpkzejjAS1RwVrkPfA71InHg== X-Received: by 2002:a05:6a21:3182:b0:1a9:da1f:1679 with SMTP id za2-20020a056a21318200b001a9da1f1679mr4846522pzb.34.1713200610709; Mon, 15 Apr 2024 10:03:30 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.230]) by smtp.gmail.com with ESMTPSA id 1-20020a056a00072100b006ed045e3a70sm7433158pfm.25.2024.04.15.10.03.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 10:03:30 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Cc: Catalin Marinas , Will Deacon , Paul Walmsley , Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Bjorn Helgaas , Anup Patel , Thomas Gleixner , Samuel Holland , Robert Moore , Haibo1 Xu , Conor Dooley , Andrew Jones , Atish Kumar Patra , Andrei Warkentin , Marc Zyngier , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Sunil V L Subject: [RFC PATCH v4 19/20] irqchip: riscv-intc: Set ACPI irqmodel Date: Mon, 15 Apr 2024 22:31:12 +0530 Message-Id: <20240415170113.662318-20-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240415170113.662318-1-sunilvl@ventanamicro.com> References: <20240415170113.662318-1-sunilvl@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 INTC being the root interrupt controller, set the ACPI irqmodel with callback function to get the GSI domain id. Signed-off-by: Sunil V L --- drivers/irqchip/irq-riscv-intc.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/irqchip/irq-riscv-intc.c b/drivers/irqchip/irq-riscv-intc.c index b20272151aed..af7a2f78f0ee 100644 --- a/drivers/irqchip/irq-riscv-intc.c +++ b/drivers/irqchip/irq-riscv-intc.c @@ -326,6 +326,10 @@ int acpi_get_imsic_mmio_info(u32 index, struct resource *res) return 0; } +static struct fwnode_handle *ext_entc_get_gsi_domain_id(u32 gsi) +{ + return riscv_acpi_get_gsi_domain_id(gsi); +} static int __init riscv_intc_acpi_init(union acpi_subtable_headers *header, const unsigned long end) @@ -366,6 +370,7 @@ static int __init riscv_intc_acpi_init(union acpi_subtable_headers *header, return rc; } + acpi_set_irq_model(ACPI_IRQ_MODEL_RINTC, ext_entc_get_gsi_domain_id); return 0; } From patchwork Mon Apr 15 17:01:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 1923837 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com header.a=rsa-sha256 header.s=google header.b=S+2Xh3yf; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2604:1380:45e3:2400::1; helo=sv.mirrors.kernel.org; envelope-from=linux-pci+bounces-6277-incoming=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org [IPv6:2604:1380:45e3:2400::1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VJDBR0Hkcz1yY4 for ; Tue, 16 Apr 2024 03:07:43 +1000 (AEST) Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id C5BDC285D76 for ; Mon, 15 Apr 2024 17:07:41 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 9FBFB8624E; Mon, 15 Apr 2024 17:03:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="S+2Xh3yf" X-Original-To: linux-pci@vger.kernel.org Received: from mail-pf1-f177.google.com (mail-pf1-f177.google.com [209.85.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 55A8F82862 for ; Mon, 15 Apr 2024 17:03:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.177 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200619; cv=none; b=kFA5HtZuqn7Q+tPWXyVktNJbvcD30jE+u9aIIEQiYD7I87vRDKk11SI5rEPaAfazY75eqySP9VqD7ws33145UVP5Oywtznrg1uRLUFUScqjVg9tqS3aRJkkmsBoR7rWTND1EiZ6iPqlun3vEp9CrJ0NwyrKTqkFXk+KpBQcHAOk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713200619; c=relaxed/simple; bh=egibTauTOK5De6SrAZsOC/2NVkpwGlv29Ym3R/RrsZM=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Q2ptgCcrQrWAVkLYWUqOgaZ06hvgf+Wo03HkjpIoYvmvmH0x+TV606WXxYBBclZaihwQLBnVGC9VeQvlU53g1IgX3Pf5WT2qTGFWbktd1T5Ci+JIr4yBvWZnaCJZTOiyD5ICbdCrNQytW6mAIwIVcHaajV5Z1gy3AAtJCjLBPFM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com; spf=pass smtp.mailfrom=ventanamicro.com; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b=S+2Xh3yf; arc=none smtp.client-ip=209.85.210.177 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Received: by mail-pf1-f177.google.com with SMTP id d2e1a72fcca58-6ecf05fd12fso3345212b3a.2 for ; Mon, 15 Apr 2024 10:03:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1713200618; x=1713805418; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=O4XnyCkVtMil3j8A/KjvpJf48jXr01BLYuVmlXnWMII=; b=S+2Xh3yfocQEr4U7oungQ9wWoas84CArQ5iojn3Jhxjg1TrR+U9MkCtaGNUzfdaYQ4 MMrYMjrOHTlj+tbeEssAovI0oz1ao6nlGeW5qP0a7SymcRXQWhx3YejF28sF5aHcn1Gt Ik9mvV5L00m+PIpOZFqwuQniQcbJylajPnGnr9hG/Mi2DwfYIw8VB0YxeQad8s3guGYu 6pc5fat7iv5BLOeaCi5PYs1XkBJGGEBvVRziGRH71ngc33KsAi6WiWRLMgdLvY7P/4XS kJkeH/ft//1Pd1QqJ0P2MItbXxxXX6NOKMi1UwXYK6MgKoN21o06Zlbpvedl4VlqKRfP Dtvw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713200618; x=1713805418; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=O4XnyCkVtMil3j8A/KjvpJf48jXr01BLYuVmlXnWMII=; b=QSePl8yGFJlZ821zMoBQesTSWEEw9tLuPL5kqmJMqr67P5TGY9qoTJs9gKew3eQ48U rLnzcFqvw+5QBrdGDOPI/6sR/q2MIdQIL+8p4pc1yxertE6X+XZAVJvya46s4C1n289o ZKcdU3ql4pkamXUkFa4CgJHoxo5ls9Bd2LS09ShHzFpO+uRONT9g4cypS9lPF95dH+sE TkrMIeTPxmpj9bRACcTlSFywH+/kJpY5NOX/vNaNqRNulgZtVCznhGdWqaZbLX5vOrg7 IDgLHoMpSrwFDoECykioYLMWITFwrsxczPYA/Q9hWO3vyV+ZZJ+sBEb7ZwiiydgTh705 CtTg== X-Forwarded-Encrypted: i=1; AJvYcCXV+OT1aUyq014yl5f5Nfl+LT+IT+c+WLnNvdfBJWiy4SBFtYha1JKbG47lO/G+KdEQYgz+q4oOYai8jKoZsUYujLwqoLYVaFUK X-Gm-Message-State: AOJu0YyjuWNB/e6UB6O+N5egFV7+xP0Dn0xm2fTsFKg6d5WiiEvPh1Kf 4ek+Vi4rPi9+V4886o7JVb79ZaBV3T1H0Ls77xvevC756g9GRzHlAFcB9JBLb4s= X-Google-Smtp-Source: AGHT+IEZ3MSxzXsGAz+ZLkxl8S7XJ3zcQ2NIg6LwPVYoJf81xxbiq6s9OomXLtGiFPJD3YOtkLtUPQ== X-Received: by 2002:a05:6a00:acb:b0:6ed:21d5:fc2c with SMTP id c11-20020a056a000acb00b006ed21d5fc2cmr12682862pfl.26.1713200617123; Mon, 15 Apr 2024 10:03:37 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.230]) by smtp.gmail.com with ESMTPSA id 1-20020a056a00072100b006ed045e3a70sm7433158pfm.25.2024.04.15.10.03.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 10:03:36 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Cc: Catalin Marinas , Will Deacon , Paul Walmsley , Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Len Brown , Bjorn Helgaas , Anup Patel , Thomas Gleixner , Samuel Holland , Robert Moore , Haibo1 Xu , Conor Dooley , Andrew Jones , Atish Kumar Patra , Andrei Warkentin , Marc Zyngier , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Sunil V L Subject: [RFC PATCH v4 20/20] ACPI: pci_link: Clear the dependencies after probe Date: Mon, 15 Apr 2024 22:31:13 +0530 Message-Id: <20240415170113.662318-21-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240415170113.662318-1-sunilvl@ventanamicro.com> References: <20240415170113.662318-1-sunilvl@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 RISC-V platforms need to use dependencies between PCI host bridge, Link devices and the interrupt controllers to ensure probe order. The dependency is like below. Interrupt controller <-- Link Device <-- PCI Host bridge. If there is no dependency added between Link device and PCI Host Bridge, then the PCI end points can get probed prior to link device unable to get mapping for INTx. So, add the link device's HID to dependency honor list and also clear it after its probe. Signed-off-by: Sunil V L --- drivers/acpi/pci_link.c | 3 +++ drivers/acpi/scan.c | 1 + 2 files changed, 4 insertions(+) diff --git a/drivers/acpi/pci_link.c b/drivers/acpi/pci_link.c index aa1038b8aec4..48cdcedafad6 100644 --- a/drivers/acpi/pci_link.c +++ b/drivers/acpi/pci_link.c @@ -748,6 +748,9 @@ static int acpi_pci_link_add(struct acpi_device *device, if (result) kfree(link); + if (IS_ENABLED(CONFIG_ARCH_ACPI_DEFERRED_GSI)) + acpi_dev_clear_dependencies(device); + return result < 0 ? result : 1; } diff --git a/drivers/acpi/scan.c b/drivers/acpi/scan.c index 086ae040a5ad..32865af071ce 100644 --- a/drivers/acpi/scan.c +++ b/drivers/acpi/scan.c @@ -835,6 +835,7 @@ static const char * const acpi_honor_dep_ids[] = { "INTC10CF", /* IVSC (MTL) driver must be loaded to allow i2c access to camera sensors */ "RSCV0001", /* RISC-V PLIC */ "RSCV0002", /* RISC-V APLIC */ + "PNP0C0F", /* PCI Link Device */ NULL };