From patchwork Thu Apr 11 04:25:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Watts X-Patchwork-Id: 1922358 X-Patchwork-Delegate: andre.przywara@arm.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=jookia.org header.i=@jookia.org header.a=rsa-sha256 header.s=key1 header.b=u+kBPUEZ; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VFRVy6jVlz1yY8 for ; Thu, 11 Apr 2024 14:27:22 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id C947A88149; Thu, 11 Apr 2024 06:27:05 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=jookia.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=jookia.org header.i=@jookia.org header.b="u+kBPUEZ"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 73D8888013; Thu, 11 Apr 2024 06:27:04 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from out-189.mta1.migadu.com (out-189.mta1.migadu.com [IPv6:2001:41d0:203:375::bd]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 6443D88120 for ; Thu, 11 Apr 2024 06:27:02 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=jookia.org Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=contact@jookia.org X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jookia.org; s=key1; t=1712809621; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=5lKMVJ73f6Nb2LMmcsNBMmQfTNk9cknfMRLApBsRpi4=; b=u+kBPUEZXD/FSqZbzixBk9Gz5EM/CcJbIFmNNqSWcZDLDOYV3eiXAEqbwLeOXEuO0ok0CX DRZsTNvSzpHXULxerMpAPLuNHzwVMT/m/aI4qY67oyMdf8MdYBolPNu/2/6NK3JqBstZHv 2r1T2Ccdub/+2Xek8cxxGoGjlV/xAz6k9n4kZ34lo3dXMFoP85/j0rjHoMbDa0IRu4+YQO sGwPbn7rAcAxzCaktZo88cARDXn+87SWIEXJYwlyJEXW8pSkzokA/zWkJRnB3J2cvTHZcR Yc5ILzzzHHt9ipxGxgGncna5Yb30B+ZHkeQiUL+V6XZjV796UrISyxt752+Pag== From: John Watts Date: Thu, 11 Apr 2024 14:25:18 +1000 Subject: [PATCH RFC 01/15] sunxi: SPL SPI: Add SPI boot support for the Allwinner R528/T113 SoCs MIME-Version: 1.0 Message-Id: <20240411-spinand-v1-1-62d31bb188e8@jookia.org> References: <20240411-spinand-v1-0-62d31bb188e8@jookia.org> In-Reply-To: <20240411-spinand-v1-0-62d31bb188e8@jookia.org> To: Jagan Teki , Andre Przywara , Tom Rini , Daniel Schwierzeck , Rick Chen , Leo , Simon Glass Cc: u-boot@lists.denx.de, John Watts , Maksim Kiselev , Sam Edwards X-Developer-Signature: v=1; a=openssh-sha256; t=1712809531; l=7921; i=contact@jookia.org; h=from:subject:message-id; bh=Yy4X+xhTna7kJp5ZjASMnzURZHw5est2CSExE+NooWo=; b=U1NIU0lHAAAAAQAAAEoAAAAac2stc3NoLWVkMjU1MTlAb3BlbnNzaC5jb20AAAAgpGuA3uho2 8zVxm554DVLHyl4gq5/nBHglU5WIWN8/zYAAAAEc3NoOgAAAAZwYXRhdHQAAAAAAAAABnNoYTUx MgAAAGcAAAAac2stc3NoLWVkMjU1MTlAb3BlbnNzaC5jb20AAABAfUoIKBc4YpT18/X0QDuO64V 4JOdBU0lSjC4k5COXhXWw4YdvuDgOnc+VzQW6+ISyHlGx5PeeO58KjaxXblmBBQUAAOkU X-Developer-Key: i=contact@jookia.org; a=openssh; fpr=SHA256:6LBQmZH5u7i/edmEZXzCTwCrpSevs/ZshZxNmlD1thY X-Migadu-Flow: FLOW_OUT X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Maksim Kiselev R528/T113 SoCs uses the same SPI IP as the H6, also have the same clocks and reset bits layout, but the CCU base is different. Another difference is that the new SoCs do not have a clock divider inside. Instead of this we should configure sample mode depending on input clock rate. The pin assignment is also different: the H6 uses PC0, the R528/T113 PC4 instead. This makes for a change in spi0_pinmux_setup() routine. This patch extends the H6/H616 #ifdef guards to also cover the R528/T113, using the shared CONFIG_SUNXI_GEN_NCAT2 and CONFIG_MACH_SUN8I_R528 symbols. Also use CONFIG_SUNXI_GEN_NCAT2 symbol for the Kconfig dependency. Signed-off-by: Maksim Kiselev Tested-by: Sam Edwards --- arch/arm/mach-sunxi/Kconfig | 2 +- arch/arm/mach-sunxi/spl_spi_sunxi.c | 78 +++++++++++++++++++++++++++---------- 2 files changed, 58 insertions(+), 22 deletions(-) diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index fe89aec6b9..ddf9414b08 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -1078,7 +1078,7 @@ config SPL_STACK_R_ADDR config SPL_SPI_SUNXI bool "Support for SPI Flash on Allwinner SoCs in SPL" - depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I || MACH_SUN8I_R40 || SUN50I_GEN_H6 || MACH_SUNIV + depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I || MACH_SUN8I_R40 || SUN50I_GEN_H6 || MACH_SUNIV || SUNXI_GEN_NCAT2 help Enable support for SPI Flash. This option allows SPL to read from sunxi SPI Flash. It uses the same method as the boot ROM, so does diff --git a/arch/arm/mach-sunxi/spl_spi_sunxi.c b/arch/arm/mach-sunxi/spl_spi_sunxi.c index 72faa7171c..7acb44f52a 100644 --- a/arch/arm/mach-sunxi/spl_spi_sunxi.c +++ b/arch/arm/mach-sunxi/spl_spi_sunxi.c @@ -72,18 +72,27 @@ #define SUN6I_CTL_ENABLE BIT(0) #define SUN6I_CTL_MASTER BIT(1) #define SUN6I_CTL_SRST BIT(31) +#define SUN6I_TCR_SDM BIT(13) #define SUN6I_TCR_XCH BIT(31) /*****************************************************************************/ -#define CCM_AHB_GATING0 (0x01C20000 + 0x60) -#define CCM_H6_SPI_BGR_REG (0x03001000 + 0x96c) -#ifdef CONFIG_SUN50I_GEN_H6 -#define CCM_SPI0_CLK (0x03001000 + 0x940) +#if IS_ENABLED(CONFIG_SUN50I_GEN_H6) +#define CCM_BASE 0x03001000 +#elif IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2) +#define CCM_BASE 0x02001000 #else -#define CCM_SPI0_CLK (0x01C20000 + 0xA0) +#define CCM_BASE 0x01C20000 #endif -#define SUN6I_BUS_SOFT_RST_REG0 (0x01C20000 + 0x2C0) + +#define CCM_AHB_GATING0 (CCM_BASE + 0x60) +#define CCM_H6_SPI_BGR_REG (CCM_BASE + 0x96c) +#if IS_ENABLED(CONFIG_SUN50I_GEN_H6) || IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2) +#define CCM_SPI0_CLK (CCM_BASE + 0x940) +#else +#define CCM_SPI0_CLK (CCM_BASE + 0xA0) +#endif +#define SUN6I_BUS_SOFT_RST_REG0 (CCM_BASE + 0x2C0) #define AHB_RESET_SPI0_SHIFT 20 #define AHB_GATE_OFFSET_SPI0 20 @@ -101,17 +110,22 @@ */ static void spi0_pinmux_setup(unsigned int pin_function) { - /* All chips use PC0 and PC2. */ - sunxi_gpio_set_cfgpin(SUNXI_GPC(0), pin_function); + /* All chips use PC2. And all chips use PC0, except R528/T113 */ + if (!IS_ENABLED(CONFIG_MACH_SUN8I_R528)) + sunxi_gpio_set_cfgpin(SUNXI_GPC(0), pin_function); + sunxi_gpio_set_cfgpin(SUNXI_GPC(2), pin_function); - /* All chips except H6 and H616 use PC1. */ - if (!IS_ENABLED(CONFIG_SUN50I_GEN_H6)) + /* All chips except H6/H616/R528/T113 use PC1. */ + if (!IS_ENABLED(CONFIG_SUN50I_GEN_H6) && + !IS_ENABLED(CONFIG_MACH_SUN8I_R528)) sunxi_gpio_set_cfgpin(SUNXI_GPC(1), pin_function); - if (IS_ENABLED(CONFIG_MACH_SUN50I_H6)) + if (IS_ENABLED(CONFIG_MACH_SUN50I_H6) || + IS_ENABLED(CONFIG_MACH_SUN8I_R528)) sunxi_gpio_set_cfgpin(SUNXI_GPC(5), pin_function); - if (IS_ENABLED(CONFIG_MACH_SUN50I_H616)) + if (IS_ENABLED(CONFIG_MACH_SUN50I_H616) || + IS_ENABLED(CONFIG_MACH_SUN8I_R528)) sunxi_gpio_set_cfgpin(SUNXI_GPC(4), pin_function); /* Older generations use PC23 for CS, newer ones use PC3. */ @@ -125,7 +139,8 @@ static void spi0_pinmux_setup(unsigned int pin_function) static bool is_sun6i_gen_spi(void) { return IS_ENABLED(CONFIG_SUNXI_GEN_SUN6I) || - IS_ENABLED(CONFIG_SUN50I_GEN_H6); + IS_ENABLED(CONFIG_SUN50I_GEN_H6) || + IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2); } static uintptr_t spi0_base_address(void) @@ -136,6 +151,9 @@ static uintptr_t spi0_base_address(void) if (IS_ENABLED(CONFIG_SUN50I_GEN_H6)) return 0x05010000; + if (IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2)) + return 0x04025000; + if (!is_sun6i_gen_spi() || IS_ENABLED(CONFIG_MACH_SUNIV)) return 0x01C05000; @@ -151,23 +169,30 @@ static void spi0_enable_clock(void) uintptr_t base = spi0_base_address(); /* Deassert SPI0 reset on SUN6I */ - if (IS_ENABLED(CONFIG_SUN50I_GEN_H6)) + if (IS_ENABLED(CONFIG_SUN50I_GEN_H6) || + IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2)) setbits_le32(CCM_H6_SPI_BGR_REG, (1U << 16) | 0x1); else if (is_sun6i_gen_spi()) setbits_le32(SUN6I_BUS_SOFT_RST_REG0, (1 << AHB_RESET_SPI0_SHIFT)); /* Open the SPI0 gate */ - if (!IS_ENABLED(CONFIG_SUN50I_GEN_H6)) + if (!IS_ENABLED(CONFIG_SUN50I_GEN_H6) && + !IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2)) setbits_le32(CCM_AHB_GATING0, (1 << AHB_GATE_OFFSET_SPI0)); if (IS_ENABLED(CONFIG_MACH_SUNIV)) { /* Divide by 32, clock source is AHB clock 200MHz */ writel(SPI0_CLK_DIV_BY_32, base + SUN6I_SPI0_CCTL); } else { - /* Divide by 4 */ - writel(SPI0_CLK_DIV_BY_4, base + (is_sun6i_gen_spi() ? - SUN6I_SPI0_CCTL : SUN4I_SPI0_CCTL)); + /* New SoCs do not have a clock divider inside */ + if (!IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2)) { + /* Divide by 4 */ + writel(SPI0_CLK_DIV_BY_4, + base + (is_sun6i_gen_spi() ? SUN6I_SPI0_CCTL : + SUN4I_SPI0_CCTL)); + } + /* 24MHz from OSC24M */ writel((1 << 31), CCM_SPI0_CLK); } @@ -179,6 +204,14 @@ static void spi0_enable_clock(void) /* Wait for completion */ while (readl(base + SUN6I_SPI0_GCR) & SUN6I_CTL_SRST) ; + + /* + * For new SoCs we should configure sample mode depending on + * input clock. As 24MHz from OSC24M is used, we could use + * normal sample mode by setting SDM bit in the TCR register + */ + if (IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2)) + setbits_le32(base + SUN6I_SPI0_TCR, SUN6I_TCR_SDM); } else { /* Enable SPI in the master mode and reset FIFO */ setbits_le32(base + SUN4I_SPI0_CTL, SUN4I_CTL_MASTER | @@ -205,11 +238,13 @@ static void spi0_disable_clock(void) writel(0, CCM_SPI0_CLK); /* Close the SPI0 gate */ - if (!IS_ENABLED(CONFIG_SUN50I_GEN_H6)) + if (!IS_ENABLED(CONFIG_SUN50I_GEN_H6) && + !IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2)) clrbits_le32(CCM_AHB_GATING0, (1 << AHB_GATE_OFFSET_SPI0)); /* Assert SPI0 reset on SUN6I */ - if (IS_ENABLED(CONFIG_SUN50I_GEN_H6)) + if (IS_ENABLED(CONFIG_SUN50I_GEN_H6) || + IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2)) clrbits_le32(CCM_H6_SPI_BGR_REG, (1U << 16) | 0x1); else if (is_sun6i_gen_spi()) clrbits_le32(SUN6I_BUS_SOFT_RST_REG0, @@ -223,7 +258,8 @@ static void spi0_init(void) if (IS_ENABLED(CONFIG_MACH_SUN50I) || IS_ENABLED(CONFIG_SUN50I_GEN_H6)) pin_function = SUN50I_GPC_SPI0; - else if (IS_ENABLED(CONFIG_MACH_SUNIV)) + else if (IS_ENABLED(CONFIG_MACH_SUNIV) || + IS_ENABLED(CONFIG_MACH_SUN8I_R528)) pin_function = SUNIV_GPC_SPI0; spi0_pinmux_setup(pin_function); From patchwork Thu Apr 11 04:25:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Watts X-Patchwork-Id: 1922359 X-Patchwork-Delegate: andre.przywara@arm.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=jookia.org header.i=@jookia.org header.a=rsa-sha256 header.s=key1 header.b=iMv6lSw1; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VFRW204zyz1yY8 for ; Thu, 11 Apr 2024 14:27:26 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 3C370881B7; Thu, 11 Apr 2024 06:27:14 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=jookia.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=jookia.org header.i=@jookia.org header.b="iMv6lSw1"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 5512E88163; Thu, 11 Apr 2024 06:27:12 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from out-170.mta1.migadu.com (out-170.mta1.migadu.com [95.215.58.170]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 5251D87D8E for ; Thu, 11 Apr 2024 06:27:10 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=jookia.org Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=contact@jookia.org X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jookia.org; s=key1; t=1712809629; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ZmAOLTvkMt83ZgNtT+HRER8yRuihQiEdRvd7/3/TEyo=; b=iMv6lSw11RUHOQf2Q1qSxTAFB7EcNwcrzXpiktW0uvR2GAhBMKcOeVNvsekeT6XtC52Ott YAbcU21/KLW7RXQys4xoaKoAY/EUeC6c6wwD5CjnyRZmMcp6v4djbo/Tvbo10cOJ/oCEe/ 6d19sSlKoT96daT6CzgX7uVb/Ixr4Y2x/SYl7Mgbcp50iSyVQQSSMxdV14+skIifRhI30u 3Wm2zpXDKISyQ6QQI/P/i5ZfXeYhCJBa+M1XjSpfypbJrSk5YoHalyU35d1Sv8ABdvF83L lGWXDfaNNJmubqv3d5sCM6sWnHvDXfqnBtpY6RzntPzE7rOARRQ1mDWGMlk67A== From: John Watts Date: Thu, 11 Apr 2024 14:25:19 +1000 Subject: [PATCH RFC 02/15] sunxi: SPL SPI: extract code for doing SPI transfer MIME-Version: 1.0 Message-Id: <20240411-spinand-v1-2-62d31bb188e8@jookia.org> References: <20240411-spinand-v1-0-62d31bb188e8@jookia.org> In-Reply-To: <20240411-spinand-v1-0-62d31bb188e8@jookia.org> To: Jagan Teki , Andre Przywara , Tom Rini , Daniel Schwierzeck , Rick Chen , Leo , Simon Glass Cc: u-boot@lists.denx.de, John Watts , Icenowy Zheng , Samuel Holland X-Developer-Signature: v=1; a=openssh-sha256; t=1712809535; l=4782; i=contact@jookia.org; h=from:subject:message-id; bh=OE+ahwD60s3nDTSJGLaw1ny6AsOdAgL1ZbQ7cHlfat0=; b=U1NIU0lHAAAAAQAAAEoAAAAac2stc3NoLWVkMjU1MTlAb3BlbnNzaC5jb20AAAAgpGuA3uho2 8zVxm554DVLHyl4gq5/nBHglU5WIWN8/zYAAAAEc3NoOgAAAAZwYXRhdHQAAAAAAAAABnNoYTUx MgAAAGcAAAAac2stc3NoLWVkMjU1MTlAb3BlbnNzaC5jb20AAABAvEzV0k+/oCMa4rkmRTvi4pz ov83+4q6flP+oI9LkDsL2xiJMf9mJOVPwhDFNRJ0EcrAhGmnq3tmZPxZmIJlaCAUAAOkY X-Developer-Key: i=contact@jookia.org; a=openssh; fpr=SHA256:6LBQmZH5u7i/edmEZXzCTwCrpSevs/ZshZxNmlD1thY X-Migadu-Flow: FLOW_OUT X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Icenowy Zheng To support SPI NAND flashes, more commands than Read (03h) are needed. Extract the code for doing SPI transfer from the reading code for code reuse. Signed-off-by: Icenowy Zheng Reviewed-by: Samuel Holland Tested-by: Samuel Holland # Orange Pi Zero Plus --- arch/arm/mach-sunxi/spl_spi_sunxi.c | 105 ++++++++++++++++++++---------------- 1 file changed, 59 insertions(+), 46 deletions(-) diff --git a/arch/arm/mach-sunxi/spl_spi_sunxi.c b/arch/arm/mach-sunxi/spl_spi_sunxi.c index 7acb44f52a..e85ae96485 100644 --- a/arch/arm/mach-sunxi/spl_spi_sunxi.c +++ b/arch/arm/mach-sunxi/spl_spi_sunxi.c @@ -282,77 +282,90 @@ static void spi0_deinit(void) #define SPI_READ_MAX_SIZE 60 /* FIFO size, minus 4 bytes of the header */ -static void sunxi_spi0_read_data(u8 *buf, u32 addr, u32 bufsize, - ulong spi_ctl_reg, - ulong spi_ctl_xch_bitmask, - ulong spi_fifo_reg, - ulong spi_tx_reg, - ulong spi_rx_reg, - ulong spi_bc_reg, - ulong spi_tc_reg, - ulong spi_bcc_reg) +static void sunxi_spi0_xfer(const u8 *txbuf, u32 txlen, + u8 *rxbuf, u32 rxlen, + ulong spi_ctl_reg, + ulong spi_ctl_xch_bitmask, + ulong spi_fifo_reg, + ulong spi_tx_reg, + ulong spi_rx_reg, + ulong spi_bc_reg, + ulong spi_tc_reg, + ulong spi_bcc_reg) { - writel(4 + bufsize, spi_bc_reg); /* Burst counter (total bytes) */ - writel(4, spi_tc_reg); /* Transfer counter (bytes to send) */ + writel(txlen + rxlen, spi_bc_reg); /* Burst counter (total bytes) */ + writel(txlen, spi_tc_reg); /* Transfer counter (bytes to send) */ if (spi_bcc_reg) - writel(4, spi_bcc_reg); /* SUN6I also needs this */ + writel(txlen, spi_bcc_reg); /* SUN6I also needs this */ - /* Send the Read Data Bytes (03h) command header */ - writeb(0x03, spi_tx_reg); - writeb((u8)(addr >> 16), spi_tx_reg); - writeb((u8)(addr >> 8), spi_tx_reg); - writeb((u8)(addr), spi_tx_reg); + for (u32 i = 0; i < txlen; i++) + writeb(*(txbuf++), spi_tx_reg); /* Start the data transfer */ setbits_le32(spi_ctl_reg, spi_ctl_xch_bitmask); /* Wait until everything is received in the RX FIFO */ - while ((readl(spi_fifo_reg) & 0x7F) < 4 + bufsize) + while ((readl(spi_fifo_reg) & 0x7F) < txlen + rxlen) ; - /* Skip 4 bytes */ - readl(spi_rx_reg); + /* Skip txlen bytes */ + for (u32 i = 0; i < txlen; i++) + readb(spi_rx_reg); /* Read the data */ - while (bufsize-- > 0) - *buf++ = readb(spi_rx_reg); + while (rxlen-- > 0) + *rxbuf++ = readb(spi_rx_reg); +} + +static void spi0_xfer(const u8 *txbuf, u32 txlen, u8 *rxbuf, u32 rxlen) +{ + uintptr_t base = spi0_base_address(); - /* tSHSL time is up to 100 ns in various SPI flash datasheets */ - udelay(1); + if (is_sun6i_gen_spi()) { + sunxi_spi0_xfer(txbuf, txlen, rxbuf, rxlen, + base + SUN6I_SPI0_TCR, + SUN6I_TCR_XCH, + base + SUN6I_SPI0_FIFO_STA, + base + SUN6I_SPI0_TXD, + base + SUN6I_SPI0_RXD, + base + SUN6I_SPI0_MBC, + base + SUN6I_SPI0_MTC, + base + SUN6I_SPI0_BCC); + } else { + sunxi_spi0_xfer(txbuf, txlen, rxbuf, rxlen, + base + SUN4I_SPI0_CTL, + SUN4I_CTL_XCH, + base + SUN4I_SPI0_FIFO_STA, + base + SUN4I_SPI0_TX, + base + SUN4I_SPI0_RX, + base + SUN4I_SPI0_BC, + base + SUN4I_SPI0_TC, + 0); + } } static void spi0_read_data(void *buf, u32 addr, u32 len) { u8 *buf8 = buf; u32 chunk_len; - uintptr_t base = spi0_base_address(); + u8 txbuf[4]; while (len > 0) { chunk_len = len; + + /* Configure the Read Data Bytes (03h) command header */ + txbuf[0] = 0x03; + txbuf[1] = (u8)(addr >> 16); + txbuf[2] = (u8)(addr >> 8); + txbuf[3] = (u8)(addr); + if (chunk_len > SPI_READ_MAX_SIZE) chunk_len = SPI_READ_MAX_SIZE; - if (is_sun6i_gen_spi()) { - sunxi_spi0_read_data(buf8, addr, chunk_len, - base + SUN6I_SPI0_TCR, - SUN6I_TCR_XCH, - base + SUN6I_SPI0_FIFO_STA, - base + SUN6I_SPI0_TXD, - base + SUN6I_SPI0_RXD, - base + SUN6I_SPI0_MBC, - base + SUN6I_SPI0_MTC, - base + SUN6I_SPI0_BCC); - } else { - sunxi_spi0_read_data(buf8, addr, chunk_len, - base + SUN4I_SPI0_CTL, - SUN4I_CTL_XCH, - base + SUN4I_SPI0_FIFO_STA, - base + SUN4I_SPI0_TX, - base + SUN4I_SPI0_RX, - base + SUN4I_SPI0_BC, - base + SUN4I_SPI0_TC, - 0); - } + spi0_xfer(txbuf, 4, buf8, chunk_len); + + /* tSHSL time is up to 100 ns in various SPI flash datasheets */ + udelay(1); len -= chunk_len; buf8 += chunk_len; From patchwork Thu Apr 11 04:25:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Watts X-Patchwork-Id: 1922360 X-Patchwork-Delegate: andre.przywara@arm.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jookia.org; s=key1; t=1712809638; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=paUtK0NnEwALzlzF3LD5jhuLTb/ujriiQnuVCtwgfPo=; b=Vj7xJ8fJO8OfduZMg6iEgUQTjztojNByxTj/YHAYNCwEStp7cnJDyfC4StR0Y8byU5ntTJ +EOqJV2CdB5y+LAvXbwbUDMlDDpYXQepeHwyDu7a/Lw8d+jEmvX8DewFvkt+BDP25TjHHM z3qMKTdYuj/YzkOykeJdZnu2mqgZX5zryPkQ90EpHTlTT0qIpJIARvphg34lUKcY7n1+iz IrzjIauX+VDdeM2wD9M2KVrB0wf4oEL1D9nyJbvwGBOjs56eoo3XdSdjwhULxYtmT01mtf eSzlh1Iq5qTA0sEdVKkXG3UenoIBHRYxmut0ILrqoZa3C+DZnMHEEGuiTO+glw== From: John Watts Date: Thu, 11 Apr 2024 14:25:20 +1000 Subject: [PATCH RFC 03/15] sunxi: SPL SPI: add support for read command with 2 byte address MIME-Version: 1.0 Message-Id: <20240411-spinand-v1-3-62d31bb188e8@jookia.org> References: <20240411-spinand-v1-0-62d31bb188e8@jookia.org> In-Reply-To: <20240411-spinand-v1-0-62d31bb188e8@jookia.org> To: Jagan Teki , Andre Przywara , Tom Rini , Daniel Schwierzeck , Rick Chen , Leo , Simon Glass Cc: u-boot@lists.denx.de, John Watts , Icenowy Zheng , Samuel Holland X-Developer-Signature: v=1; a=openssh-sha256; t=1712809541; l=2607; i=contact@jookia.org; h=from:subject:message-id; bh=rFhh6kIo6tgc0kS7U5WoeWx3IfgYKwXm4CJD2NevHTQ=; b=U1NIU0lHAAAAAQAAAEoAAAAac2stc3NoLWVkMjU1MTlAb3BlbnNzaC5jb20AAAAgpGuA3uho2 8zVxm554DVLHyl4gq5/nBHglU5WIWN8/zYAAAAEc3NoOgAAAAZwYXRhdHQAAAAAAAAABnNoYTUx MgAAAGcAAAAac2stc3NoLWVkMjU1MTlAb3BlbnNzaC5jb20AAABAj/4/H+D9wHrKKBjPuXe/OdZ YJN7TMpE7IeuFJHIo5Zzy5Isz2p5NpoZ6hbZT/RxfUL5IgEbwzARDRCzsRx5IAwUAAOkc X-Developer-Key: i=contact@jookia.org; a=openssh; fpr=SHA256:6LBQmZH5u7i/edmEZXzCTwCrpSevs/ZshZxNmlD1thY X-Migadu-Flow: FLOW_OUT X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Icenowy Zheng This kind of read command is utilized in SPI NANDs for reading data inside a selected page, which is obviously smaller than how much 2 byte address can address. So 2 bytes are used for the address and one dummy byte is needed after the real address. As the address is sent out in bit endian, this makes it not compatible with usual 3 byte address. Signed-off-by: Icenowy Zheng Reviewed-by: Samuel Holland Tested-by: Samuel Holland # Orange Pi Zero Plus --- arch/arm/mach-sunxi/spl_spi_sunxi.c | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) diff --git a/arch/arm/mach-sunxi/spl_spi_sunxi.c b/arch/arm/mach-sunxi/spl_spi_sunxi.c index e85ae96485..fe95878eae 100644 --- a/arch/arm/mach-sunxi/spl_spi_sunxi.c +++ b/arch/arm/mach-sunxi/spl_spi_sunxi.c @@ -344,7 +344,7 @@ static void spi0_xfer(const u8 *txbuf, u32 txlen, u8 *rxbuf, u32 rxlen) } } -static void spi0_read_data(void *buf, u32 addr, u32 len) +static void spi0_read_data(void *buf, u32 addr, u32 len, u32 addr_len) { u8 *buf8 = buf; u32 chunk_len; @@ -355,9 +355,15 @@ static void spi0_read_data(void *buf, u32 addr, u32 len) /* Configure the Read Data Bytes (03h) command header */ txbuf[0] = 0x03; - txbuf[1] = (u8)(addr >> 16); - txbuf[2] = (u8)(addr >> 8); - txbuf[3] = (u8)(addr); + if (addr_len == 3) { + txbuf[1] = (u8)(addr >> 16); + txbuf[2] = (u8)(addr >> 8); + txbuf[3] = (u8)(addr); + } else if (addr_len == 2) { + txbuf[1] = (u8)(addr >> 8); + txbuf[2] = (u8)(addr); + txbuf[3] = 0; /* dummy */ + } if (chunk_len > SPI_READ_MAX_SIZE) chunk_len = SPI_READ_MAX_SIZE; @@ -376,7 +382,7 @@ static void spi0_read_data(void *buf, u32 addr, u32 len) static ulong spi_load_read(struct spl_load_info *load, ulong sector, ulong count, void *buf) { - spi0_read_data(buf, sector, count); + spi0_read_data(buf, sector, count, 3); return count; } @@ -395,7 +401,7 @@ static int spl_spi_load_image(struct spl_image_info *spl_image, spi0_init(); - spi0_read_data((void *)header, load_offset, 0x40); + spi0_read_data((void *)header, load_offset, 0x40, 3); if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) && image_get_magic(header) == FDT_MAGIC) { @@ -412,7 +418,7 @@ static int spl_spi_load_image(struct spl_image_info *spl_image, return ret; spi0_read_data((void *)spl_image->load_addr, - load_offset, spl_image->size); + load_offset, spl_image->size, 3); } spi0_deinit(); From patchwork Thu Apr 11 04:25:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Watts X-Patchwork-Id: 1922361 X-Patchwork-Delegate: andre.przywara@arm.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=jookia.org header.i=@jookia.org header.a=rsa-sha256 header.s=key1 header.b=xV2SOIp3; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VFRWR6khDz1yY8 for ; Thu, 11 Apr 2024 14:27:47 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 043F588003; Thu, 11 Apr 2024 06:27:30 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=jookia.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=jookia.org header.i=@jookia.org header.b="xV2SOIp3"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 67203881DB; Thu, 11 Apr 2024 06:27:28 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from out-173.mta0.migadu.com (out-173.mta0.migadu.com [91.218.175.173]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 6DD7387D8E for ; Thu, 11 Apr 2024 06:27:26 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=jookia.org Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=contact@jookia.org X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jookia.org; s=key1; t=1712809645; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Kg0NiIoEYk+LJyhkzy8bHZIKjziDoLjPpWZp2tBKoJw=; b=xV2SOIp3GqPDa40OcghMIh8ZE7iunTd/5k9+1ey71bW1DRro3ZcOE8QLiOn7HE5tjVSwuF h/XuQ5xCsZPqTgIrilkRiUpSaYUNCQE/QZoEzoPQEp30TOzvvSpK4ZQYE8a9of0piRmjc1 8pYQOwToICS10gMVNHhsdVuZ3G4qgDCz9KMKYF3uII9kT8QhtJIGCmm/J6LWxZ6TYnOZkK N+ks9HbAxo/sbyO2aURSE9GIo8zTIQNX8Bshg31s6kdtdgn40M2oRVot1C+9jrsJlUMh3f mC3fHsrTsA5ebmWiuhueAHHBJ4vVATJV6z+MhoKWg/jpJyDsACUHJsdSdaZocw== From: John Watts Date: Thu, 11 Apr 2024 14:25:21 +1000 Subject: [PATCH RFC 04/15] sunxi: SPL SPI: allow multiple boot attempt MIME-Version: 1.0 Message-Id: <20240411-spinand-v1-4-62d31bb188e8@jookia.org> References: <20240411-spinand-v1-0-62d31bb188e8@jookia.org> In-Reply-To: <20240411-spinand-v1-0-62d31bb188e8@jookia.org> To: Jagan Teki , Andre Przywara , Tom Rini , Daniel Schwierzeck , Rick Chen , Leo , Simon Glass Cc: u-boot@lists.denx.de, John Watts , Icenowy Zheng , Samuel Holland X-Developer-Signature: v=1; a=openssh-sha256; t=1712809545; l=3364; i=contact@jookia.org; h=from:subject:message-id; bh=8vLFN0ktagZJ7nXUdwkjdHJ/yQHfm2ny/j7IQYhVRN8=; b=U1NIU0lHAAAAAQAAAEoAAAAac2stc3NoLWVkMjU1MTlAb3BlbnNzaC5jb20AAAAgpGuA3uho2 8zVxm554DVLHyl4gq5/nBHglU5WIWN8/zYAAAAEc3NoOgAAAAZwYXRhdHQAAAAAAAAABnNoYTUx MgAAAGcAAAAac2stc3NoLWVkMjU1MTlAb3BlbnNzaC5jb20AAABApJzOaPHuSTKsZnpylBhN5sd dxKoG7LWyWM7JubYAyq6tKuSchojfXXIAl+d5UO7qnHhtXiWkJuV/zOKpOxxaAQUAAOkl X-Developer-Key: i=contact@jookia.org; a=openssh; fpr=SHA256:6LBQmZH5u7i/edmEZXzCTwCrpSevs/ZshZxNmlD1thY X-Migadu-Flow: FLOW_OUT X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Icenowy Zheng As we're going to add support for SPI NAND to this code, add code that allows multiple boot attempts with different load offsets and functions. To keep compatibility with loading raw binary on SPI NOR, a bool parameter is used to allow booting without valid magic number when booting with SPI NOR. Signed-off-by: Icenowy Zheng Reviewed-by: Samuel Holland Tested-by: Samuel Holland # Orange Pi Zero Plus --- arch/arm/mach-sunxi/spl_spi_sunxi.c | 51 ++++++++++++++++++++++++------------- 1 file changed, 34 insertions(+), 17 deletions(-) diff --git a/arch/arm/mach-sunxi/spl_spi_sunxi.c b/arch/arm/mach-sunxi/spl_spi_sunxi.c index fe95878eae..58b1422da1 100644 --- a/arch/arm/mach-sunxi/spl_spi_sunxi.c +++ b/arch/arm/mach-sunxi/spl_spi_sunxi.c @@ -379,8 +379,8 @@ static void spi0_read_data(void *buf, u32 addr, u32 len, u32 addr_len) } } -static ulong spi_load_read(struct spl_load_info *load, ulong sector, - ulong count, void *buf) +static ulong spi_load_read_nor(struct spl_load_info *load, ulong sector, + ulong count, void *buf) { spi0_read_data(buf, sector, count, 3); @@ -389,38 +389,55 @@ static ulong spi_load_read(struct spl_load_info *load, ulong sector, /*****************************************************************************/ -static int spl_spi_load_image(struct spl_image_info *spl_image, - struct spl_boot_device *bootdev) +static int spl_spi_try_load(struct spl_image_info *spl_image, + struct spl_boot_device *bootdev, + struct spl_load_info *load, u32 offset, + bool allow_raw) { int ret = 0; struct legacy_img_hdr *header; - uint32_t load_offset = sunxi_get_spl_size(); - header = (struct legacy_img_hdr *)CONFIG_TEXT_BASE; - load_offset = max_t(uint32_t, load_offset, CONFIG_SYS_SPI_U_BOOT_OFFS); - spi0_init(); - - spi0_read_data((void *)header, load_offset, 0x40, 3); + if (load->read(load, offset, 0x40, (void *)header) == 0) + return -EINVAL; if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) && image_get_magic(header) == FDT_MAGIC) { - struct spl_load_info load; debug("Found FIT image\n"); - spl_set_bl_len(&load, 1); - load.read = spi_load_read; - ret = spl_load_simple_fit(spl_image, &load, - load_offset, header); + ret = spl_load_simple_fit(spl_image, load, + offset, header); } else { + if (!allow_raw && image_get_magic(header) != IH_MAGIC) + return -EINVAL; + ret = spl_parse_image_header(spl_image, bootdev, header); if (ret) return ret; - spi0_read_data((void *)spl_image->load_addr, - load_offset, spl_image->size, 3); + if (load->read(load, offset, spl_image->size, + (void *)spl_image->load_addr) == 0) + ret = -EINVAL; } + return ret; +} + +static int spl_spi_load_image(struct spl_image_info *spl_image, + struct spl_boot_device *bootdev) +{ + int ret = 0; + uint32_t load_offset = sunxi_get_spl_size(); + struct spl_load_info load; + + load_offset = max_t(uint32_t, load_offset, CONFIG_SYS_SPI_U_BOOT_OFFS); + + spi0_init(); + + spl_set_bl_len(&load, 1); + load.read = spi_load_read_nor; + ret = spl_spi_try_load(spl_image, bootdev, &load, load_offset, true); + spi0_deinit(); return ret; From patchwork Thu Apr 11 04:25:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Watts X-Patchwork-Id: 1922362 X-Patchwork-Delegate: andre.przywara@arm.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=jookia.org header.i=@jookia.org header.a=rsa-sha256 header.s=key1 header.b=aT0/xgUu; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; 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DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jookia.org; s=key1; t=1712809654; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=V/i06valPGLsZCOJP6OFxetN72m5WzJI3n3BUE8Kh+g=; b=aT0/xgUuMT3svs6rC0DMmu1ZEP/5TaSmS3PGISls8FTe7iAQku6mOzEYeGeG6VLLORa9/m aLl2oLX07RLzitEHYLU0HAWJy+Evc8f9JS/jBBnJmKDirdwQH3E+6u0Q4gUdAEIDBWDb5n GsvJf+LWEGHOMMbj90H1v1mpcLXcXMuEzvaGFNeVbTbbtwStduY2DzDQfsqPXHWahdIMyc FZg/u2QsyEBCdnxyF8pgvksnKIgz2DJM3LYFmjRC7sFYsQL1848aCNtvGMDFBxcbdYAxxo wRO6cweGG9Zt9Fbc4FPh4kXZ8EKJcFVbyRGV/0s1FRz18nrDsAzG0J/mbKDeYw== From: John Watts Date: Thu, 11 Apr 2024 14:25:22 +1000 Subject: [PATCH RFC 05/15] sunxi: SPL SPI: add initial support for booting from SPI NAND MIME-Version: 1.0 Message-Id: <20240411-spinand-v1-5-62d31bb188e8@jookia.org> References: <20240411-spinand-v1-0-62d31bb188e8@jookia.org> In-Reply-To: <20240411-spinand-v1-0-62d31bb188e8@jookia.org> To: Jagan Teki , Andre Przywara , Tom Rini , Daniel Schwierzeck , Rick Chen , Leo , Simon Glass Cc: u-boot@lists.denx.de, John Watts , Icenowy Zheng , Samuel Holland X-Developer-Signature: v=1; a=openssh-sha256; t=1712809549; l=4291; i=contact@jookia.org; h=from:subject:message-id; bh=j1qu9JNduDa04VVZsN9GoKQ3gcGYMN71FxkG9Fq65OA=; b=U1NIU0lHAAAAAQAAAEoAAAAac2stc3NoLWVkMjU1MTlAb3BlbnNzaC5jb20AAAAgpGuA3uho2 8zVxm554DVLHyl4gq5/nBHglU5WIWN8/zYAAAAEc3NoOgAAAAZwYXRhdHQAAAAAAAAABnNoYTUx MgAAAGcAAAAac2stc3NoLWVkMjU1MTlAb3BlbnNzaC5jb20AAABATYIZsEVyLx6gaE7+3UpzNa6 mrXFAtzNw+QRv/2S2+IvTy5/CmYGeyg2jw+u2LGi6ndOLUmV/UqLW/rpboLkRCwUAAOkx X-Developer-Key: i=contact@jookia.org; a=openssh; fpr=SHA256:6LBQmZH5u7i/edmEZXzCTwCrpSevs/ZshZxNmlD1thY X-Migadu-Flow: FLOW_OUT X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Icenowy Zheng This commit adds support for booting from SPI NAND to SPL SPI code by mimicing the behavior of boot ROM (use fixed page size and sequentially try SPI NOR and NAND). Signed-off-by: Icenowy Zheng Tested-by: Samuel Holland # Orange Pi Zero Plus --- arch/arm/mach-sunxi/Kconfig | 16 ++++++++ arch/arm/mach-sunxi/spl_spi_sunxi.c | 75 +++++++++++++++++++++++++++++++++++++ 2 files changed, 91 insertions(+) diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index ddf9414b08..cc576fc84d 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -1084,6 +1084,22 @@ config SPL_SPI_SUNXI sunxi SPI Flash. It uses the same method as the boot ROM, so does not need any extra configuration. +config SPL_SPI_SUNXI_NAND + bool "Support for SPI NAND Flash on Allwinner SoCs in SPL" + depends on SPL_SPI_SUNXI + help + Enable support for SPI NAND Flash. This option allows SPL to mimic + Allwinner boot ROM's behavior to gain support for SPI NAND Flash; + a fixed page size needs to be assumed when building the SPL image. + +config SPL_SPI_SUNXI_NAND_ASSUMED_PAGESIZE + hex "Assumed pagesize for SPI NAND Flash in SPL" + depends on SPL_SPI_SUNXI_NAND + default 0x400 if MACH_SUNIV + help + Set the page size assumed by the SPL SPI NAND code, the default + value is the same with the boot ROM. + config PINE64_DT_SELECTION bool "Enable Pine64 device tree selection code" depends on MACH_SUN50I diff --git a/arch/arm/mach-sunxi/spl_spi_sunxi.c b/arch/arm/mach-sunxi/spl_spi_sunxi.c index 58b1422da1..7ecde2b753 100644 --- a/arch/arm/mach-sunxi/spl_spi_sunxi.c +++ b/arch/arm/mach-sunxi/spl_spi_sunxi.c @@ -344,6 +344,49 @@ static void spi0_xfer(const u8 *txbuf, u32 txlen, u8 *rxbuf, u32 rxlen) } } +#if defined(CONFIG_SPL_SPI_SUNXI_NAND) +static int spi0_nand_switch_page(u32 page) +{ + unsigned count; + u8 buf[4]; + + /* Configure the Page Data Read (13h) command header */ + buf[0] = 0x13; + buf[1] = (u8)(page >> 16); + buf[2] = (u8)(page >> 8); + buf[3] = (u8)(page); + + spi0_xfer(buf, 4, NULL, 0); + + /* Wait for NAND chip to exit busy state */ + buf[0] = 0x0f; + buf[1] = 0xc0; + + /* Load a NAND page can take up to 2-decimal-digit microseconds */ + for (count = 0; count < 100; count ++) { + udelay(1); + spi0_xfer(buf, 2, buf+2, 1); + if (!(buf[2] & 0x1)) + return 0; + } + + return -ETIMEDOUT; +} + +static void spi0_nand_reset(void) +{ + u8 buf[1]; + + /* Configure the Device RESET (ffh) command */ + buf[0] = 0xff; + + spi0_xfer(buf, 1, NULL, 0); + + /* Wait for the NAND to finish resetting */ + udelay(10); +} +#endif + static void spi0_read_data(void *buf, u32 addr, u32 len, u32 addr_len) { u8 *buf8 = buf; @@ -387,6 +430,28 @@ static ulong spi_load_read_nor(struct spl_load_info *load, ulong sector, return count; } +#if defined(CONFIG_SPL_SPI_SUNXI_NAND) +static ulong spi_load_read_nand(struct spl_load_info *load, ulong sector, + ulong count, void *buf) +{ + const ulong pagesize = CONFIG_SPL_SPI_SUNXI_NAND_ASSUMED_PAGESIZE; + ulong remain = count; + + while (remain) { + ulong count_in_page = min(remain, pagesize - (sector % pagesize)); + ulong current_page = sector / pagesize; + if (spi0_nand_switch_page(current_page) != 0) + return 0; + spi0_read_data(buf, sector % pagesize, count_in_page, 2); + remain -= count_in_page; + sector += count_in_page; + buf += count_in_page; + } + + return count; +} +#endif + /*****************************************************************************/ static int spl_spi_try_load(struct spl_image_info *spl_image, @@ -434,10 +499,20 @@ static int spl_spi_load_image(struct spl_image_info *spl_image, spi0_init(); +#if defined(CONFIG_SPL_SPI_SUNXI_NAND) + spi0_nand_reset(); + load.read = spi_load_read_nand; + spl_set_bl_len(&load, 1); + ret = spl_spi_try_load(spl_image, bootdev, &load, load_offset, false); + if (!ret) + goto out; +#endif + spl_set_bl_len(&load, 1); load.read = spi_load_read_nor; ret = spl_spi_try_load(spl_image, bootdev, &load, load_offset, true); +out: spi0_deinit(); return ret; From patchwork Thu Apr 11 04:25:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Watts X-Patchwork-Id: 1922363 X-Patchwork-Delegate: andre.przywara@arm.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=jookia.org header.i=@jookia.org header.a=rsa-sha256 header.s=key1 header.b=zk/iSFAb; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VFRWs31MLz1yY8 for ; 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DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jookia.org; s=key1; t=1712809663; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=9xfQZmLAJaS+JWl2/qTwa8Q8cY1KW0DqPgpjLZrcd4E=; b=zk/iSFAbTmagFK4++wLcTmmdcLLRWM6axTCBwYtXjEs8hhcL+6JmTFtdfocXPryiKpjbN3 7bGSAxusKMa+H5fGfyWjrAnNL5UN3HlPMw1nNPhG+TAgtNr91yxdh/6f16i+XXDQLdCDuZ UgSs8vJgAqwctOcA5DlGTfi+xsLatWf0jUNKReG6xh8F03U4GmbqTlBi2P3Tm4PlizZEi1 Wy06VH651Ezxm+kW/MoEKfQkgvUqFXQ8F8uQWS6lGsPECKmUgKebzFG+m+NudPG9y7Ar7q IKqUA55mtyad+q0WKeiuuYXEfPH3GdxWd3KY+PVEdoyILAaedpa0ktsDLI8+Pg== From: John Watts Date: Thu, 11 Apr 2024 14:25:23 +1000 Subject: [PATCH RFC 06/15] sunxi: enable support for SPI NAND booting on SUNIV MIME-Version: 1.0 Message-Id: <20240411-spinand-v1-6-62d31bb188e8@jookia.org> References: <20240411-spinand-v1-0-62d31bb188e8@jookia.org> In-Reply-To: <20240411-spinand-v1-0-62d31bb188e8@jookia.org> To: Jagan Teki , Andre Przywara , Tom Rini , Daniel Schwierzeck , Rick Chen , Leo , Simon Glass Cc: u-boot@lists.denx.de, John Watts , Icenowy Zheng , Samuel Holland X-Developer-Signature: v=1; a=openssh-sha256; t=1712809554; l=1197; i=contact@jookia.org; h=from:subject:message-id; bh=GIHFo+VadtyezH1ouqQLkaMXEO69Jv0ZDQ7wBMpFGe8=; b=U1NIU0lHAAAAAQAAAEoAAAAac2stc3NoLWVkMjU1MTlAb3BlbnNzaC5jb20AAAAgpGuA3uho2 8zVxm554DVLHyl4gq5/nBHglU5WIWN8/zYAAAAEc3NoOgAAAAZwYXRhdHQAAAAAAAAABnNoYTUx MgAAAGcAAAAac2stc3NoLWVkMjU1MTlAb3BlbnNzaC5jb20AAABAZN4lCxmkCZVYUpL5GUPraOs BOxFr121RNHBgIjy3Ds+JalW+bB94Y6M4SxhBHHN1c4hN0NJbjXKWNVebsSSPDAUAAOkz X-Developer-Key: i=contact@jookia.org; a=openssh; fpr=SHA256:6LBQmZH5u7i/edmEZXzCTwCrpSevs/ZshZxNmlD1thY X-Migadu-Flow: FLOW_OUT X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Icenowy Zheng As we added support for SPI NAND to the existing SPL SPI codepath, route the boot code to it when it detects the BROM loads SPL from SPI NAND, as for SoCs with both SPI NAND and boot media indicator support, the boot media indicator is the same for SPI NOR and NAND. Signed-off-by: Icenowy Zheng Reviewed-by: Samuel Holland --- arch/arm/mach-sunxi/board.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index f4dbb2a740..9b0d68a7a0 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -223,12 +223,10 @@ static int suniv_get_boot_source(void) case SUNIV_BOOTED_FROM_MMC0: return SUNXI_BOOTED_FROM_MMC0; case SUNIV_BOOTED_FROM_SPI: + case SUNIV_BOOTED_FROM_NAND: return SUNXI_BOOTED_FROM_SPI; case SUNIV_BOOTED_FROM_MMC1: return SUNXI_BOOTED_FROM_MMC2; - /* SPI NAND is not supported yet. */ - case SUNIV_BOOTED_FROM_NAND: - return SUNXI_INVALID_BOOT_SOURCE; } /* If we get here something went wrong try to boot from FEL.*/ printf("Unknown boot source from BROM: 0x%x\n", brom_call); From patchwork Thu Apr 11 04:25:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Watts X-Patchwork-Id: 1922364 X-Patchwork-Delegate: andre.przywara@arm.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=jookia.org header.i=@jookia.org header.a=rsa-sha256 header.s=key1 header.b=0iD3lEV/; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VFRX35V4Dz1yY8 for ; Thu, 11 Apr 2024 14:28:19 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 28892881CD; Thu, 11 Apr 2024 06:27:56 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=jookia.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=jookia.org header.i=@jookia.org header.b="0iD3lEV/"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 732D8881F3; Thu, 11 Apr 2024 06:27:54 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from out-183.mta1.migadu.com (out-183.mta1.migadu.com [95.215.58.183]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 8AE9987FED for ; Thu, 11 Apr 2024 06:27:52 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=jookia.org Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=contact@jookia.org X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jookia.org; s=key1; t=1712809672; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=gJVRzRleHLgugqH6iGrc7r/C1wu8gWUu+M7PdwezpUo=; b=0iD3lEV/xthhRtBP9meg//TzDAE4m7zRISlZD008rVMuLq8Vj2szXJ1I+dUhwZ8Yc3eODr zkN/9aV1NvGP2bu08gXhTnsgaf4d2eVZHzqGHQBnOx6xJaxDqirS2dwAQhVvaQ6oFcBCFl md24Gf0AnCbAjRkvsZ9vGNGS68s/JddYyeg0BUflvMLxZjaV+ks3lpbJxsA8RAdNZKnKe+ yS6xKaYdLhJig58WBGrzHKxgRa1ESc1RdSh4l6DPvzCNjAoOHq/Agww8a5Io1EMUahgqd/ 9Iy26vTjslArFuNPxp9HwdLPTW95JW4nRfOG/mdXyBxf1qVpiy5hpEgwLIhlpA== From: John Watts Date: Thu, 11 Apr 2024 14:25:24 +1000 Subject: [PATCH RFC 07/15] sunxi: Separate boot device and boot position MIME-Version: 1.0 Message-Id: <20240411-spinand-v1-7-62d31bb188e8@jookia.org> References: <20240411-spinand-v1-0-62d31bb188e8@jookia.org> In-Reply-To: <20240411-spinand-v1-0-62d31bb188e8@jookia.org> To: Jagan Teki , Andre Przywara , Tom Rini , Daniel Schwierzeck , Rick Chen , Leo , Simon Glass Cc: u-boot@lists.denx.de, John Watts X-Developer-Signature: v=1; a=openssh-sha256; t=1712809561; l=2869; i=contact@jookia.org; h=from:subject:message-id; bh=x0RMOSGdRAJghSgo+Hz4TOgF5oe67guv5wTX6FTmDfM=; b=U1NIU0lHAAAAAQAAAEoAAAAac2stc3NoLWVkMjU1MTlAb3BlbnNzaC5jb20AAAAgpGuA3uho2 8zVxm554DVLHyl4gq5/nBHglU5WIWN8/zYAAAAEc3NoOgAAAAZwYXRhdHQAAAAAAAAABnNoYTUx MgAAAGcAAAAac2stc3NoLWVkMjU1MTlAb3BlbnNzaC5jb20AAABA4PTJM9Bn/UqE21BTtT4ZKEX FUkGmlOyBmX1OPt0UUNeuLXD4Lc8NnDkqGC6eBLlHJaCej5C6goVXlAXMtn7JAQUAAOk8 X-Developer-Key: i=contact@jookia.org; a=openssh; fpr=SHA256:6LBQmZH5u7i/edmEZXzCTwCrpSevs/ZshZxNmlD1thY X-Migadu-Flow: FLOW_OUT X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean While MMC1 and MMC2 each currently have only one upper byte possibility, SPI NAND has quite a few. To solve this, split up the byte handling across two functions in preparation for SPI NAND support. I have not tested this patch to validate that MMC SPL offsets are working. It looks like it should work though. Signed-off-by: John Watts --- arch/arm/include/asm/arch-sunxi/spl.h | 2 -- arch/arm/mach-sunxi/board.c | 22 +++++++++++++--------- 2 files changed, 13 insertions(+), 11 deletions(-) diff --git a/arch/arm/include/asm/arch-sunxi/spl.h b/arch/arm/include/asm/arch-sunxi/spl.h index 14944a20ea..92be936d56 100644 --- a/arch/arm/include/asm/arch-sunxi/spl.h +++ b/arch/arm/include/asm/arch-sunxi/spl.h @@ -16,8 +16,6 @@ #define SUNXI_BOOTED_FROM_NAND 1 #define SUNXI_BOOTED_FROM_MMC2 2 #define SUNXI_BOOTED_FROM_SPI 3 -#define SUNXI_BOOTED_FROM_MMC0_HIGH 0x10 -#define SUNXI_BOOTED_FROM_MMC2_HIGH 0x12 /* * Values taken from the F1C200s BootROM stack diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index 9b0d68a7a0..7f4ee92991 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -276,6 +276,7 @@ static int sunxi_get_boot_source(void) uint32_t sunxi_get_boot_device(void) { int boot_source = sunxi_get_boot_source(); + int boot_dev = (boot_source & 0xF); /* Low nibble is device */ /* * When booting from the SD card or NAND memory, the "eGON.BT0" @@ -293,16 +294,15 @@ uint32_t sunxi_get_boot_device(void) * binary over USB. If it is found, it determines where SPL was * read from. */ - switch (boot_source) { - case SUNXI_INVALID_BOOT_SOURCE: + if (boot_source == SUNXI_INVALID_BOOT_SOURCE) return BOOT_DEVICE_BOARD; + + switch (boot_dev) { case SUNXI_BOOTED_FROM_MMC0: - case SUNXI_BOOTED_FROM_MMC0_HIGH: return BOOT_DEVICE_MMC1; case SUNXI_BOOTED_FROM_NAND: return BOOT_DEVICE_NAND; case SUNXI_BOOTED_FROM_MMC2: - case SUNXI_BOOTED_FROM_MMC2_HIGH: return BOOT_DEVICE_MMC2; case SUNXI_BOOTED_FROM_SPI: return BOOT_DEVICE_SPI; @@ -312,6 +312,14 @@ uint32_t sunxi_get_boot_device(void) return -1; /* Never reached */ } +uint32_t sunxi_get_boot_position(void) +{ + int boot_source = sunxi_get_boot_source(); + int boot_pos = ((boot_source >> 8) & 0xF); /* High nibble is position */ + + return boot_pos; +} + #ifdef CONFIG_SPL_BUILD uint32_t sunxi_get_spl_size(void) { @@ -343,12 +351,8 @@ unsigned long board_spl_mmc_get_uboot_raw_sector(struct mmc *mmc, sector = max(raw_sect, spl_size / 512); - switch (sunxi_get_boot_source()) { - case SUNXI_BOOTED_FROM_MMC0_HIGH: - case SUNXI_BOOTED_FROM_MMC2_HIGH: + if (sunxi_get_boot_position() == 1) sector += (128 - 8) * 2; - break; - } return sector; } From patchwork Thu Apr 11 04:25:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Watts X-Patchwork-Id: 1922365 X-Patchwork-Delegate: andre.przywara@arm.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=jookia.org header.i=@jookia.org header.a=rsa-sha256 header.s=key1 header.b=cHiSV5Hs; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VFRXG15F8z1yY8 for ; Thu, 11 Apr 2024 14:28:30 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id BB1D988120; Thu, 11 Apr 2024 06:28:09 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=jookia.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=jookia.org header.i=@jookia.org header.b="cHiSV5Hs"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 4F31B87FA0; Thu, 11 Apr 2024 06:28:08 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from out-177.mta0.migadu.com (out-177.mta0.migadu.com [IPv6:2001:41d0:1004:224b::b1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id D39D8881DD for ; Thu, 11 Apr 2024 06:28:04 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=jookia.org Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=contact@jookia.org X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jookia.org; s=key1; t=1712809684; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=2DYWvP6tVwWZWvoaJzFLYYNKvyFpk0I9S+J3/A26GBw=; b=cHiSV5HsRKvAhH/9enYE1xtpNLMbJVxjwvO0hIPCIUfF/HY2Xfm0sEBjfxvNp0ooqA6RlM R/vJ+8ZGnP2RBb4szNcm6JMNTAV2wMv5j01QUadCgY8PEzf3ww7SIgL7qV/MFKBMziCW4E pli3gUicZbVeabzUlNBw4fEVA4rGKESCwXT3U6TxjC7aoaqaqWsB6wgAAj60cNYVlekUzF fmap4AML2CkQXApiaXODxRMWJLh6rX5lhpolkr5nyCKXP/tIMKwHHs4BM7LlVd8ixMT6rd 7fuAgR8DKEvykAIjN+mJ+PL2w5ru4wcAhr1jIRdALRnmcV1D9CIcnmm9ylSFLw== From: John Watts Date: Thu, 11 Apr 2024 14:25:25 +1000 Subject: [PATCH RFC 08/15] spl: Add BOOT_DEVICE_SPINAND option MIME-Version: 1.0 Message-Id: <20240411-spinand-v1-8-62d31bb188e8@jookia.org> References: <20240411-spinand-v1-0-62d31bb188e8@jookia.org> In-Reply-To: <20240411-spinand-v1-0-62d31bb188e8@jookia.org> To: Jagan Teki , Andre Przywara , Tom Rini , Daniel Schwierzeck , Rick Chen , Leo , Simon Glass Cc: u-boot@lists.denx.de, John Watts X-Developer-Signature: v=1; a=openssh-sha256; t=1712809565; l=1840; i=contact@jookia.org; h=from:subject:message-id; bh=fhuuQkcHwce/BjHWvu8VPcm5p8dDPaqvgT9EgHg/xpE=; b=U1NIU0lHAAAAAQAAAEoAAAAac2stc3NoLWVkMjU1MTlAb3BlbnNzaC5jb20AAAAgpGuA3uho2 8zVxm554DVLHyl4gq5/nBHglU5WIWN8/zYAAAAEc3NoOgAAAAZwYXRhdHQAAAAAAAAABnNoYTUx MgAAAGcAAAAac2stc3NoLWVkMjU1MTlAb3BlbnNzaC5jb20AAABATkjk1rbKy5q8VMAZ2CBzbN6 5/jLyso5eiJQKXKiACsXtldTxejjQcAKJvhk/tVHCb5o2Hh5Xw3UdHe3IFnT0CgUAAOlF X-Developer-Key: i=contact@jookia.org; a=openssh; fpr=SHA256:6LBQmZH5u7i/edmEZXzCTwCrpSevs/ZshZxNmlD1thY X-Migadu-Flow: FLOW_OUT X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Currently there are two different boot device options: SPI and NAND. One is intended for SPI NOR operation, the other is intended for dedicated NAND operation. Add a new option for SPI NAND operation. Signed-off-by: John Watts --- arch/arm/include/asm/spl.h | 1 + arch/mips/include/asm/spl.h | 1 + arch/riscv/include/asm/spl.h | 1 + arch/sandbox/include/asm/spl.h | 1 + 4 files changed, 4 insertions(+) diff --git a/arch/arm/include/asm/spl.h b/arch/arm/include/asm/spl.h index ee79a19c05..92deba8019 100644 --- a/arch/arm/include/asm/spl.h +++ b/arch/arm/include/asm/spl.h @@ -22,6 +22,7 @@ enum { BOOT_DEVICE_NOR, BOOT_DEVICE_UART, BOOT_DEVICE_SPI, + BOOT_DEVICE_SPINAND, BOOT_DEVICE_USB, BOOT_DEVICE_SATA, BOOT_DEVICE_I2C, diff --git a/arch/mips/include/asm/spl.h b/arch/mips/include/asm/spl.h index 0a847edec8..02b580079a 100644 --- a/arch/mips/include/asm/spl.h +++ b/arch/mips/include/asm/spl.h @@ -16,6 +16,7 @@ enum { BOOT_DEVICE_NOR, BOOT_DEVICE_UART, BOOT_DEVICE_SPI, + BOOT_DEVICE_SPINAND, BOOT_DEVICE_USB, BOOT_DEVICE_SATA, BOOT_DEVICE_I2C, diff --git a/arch/riscv/include/asm/spl.h b/arch/riscv/include/asm/spl.h index 9c0bf9755c..56b5bf9d7e 100644 --- a/arch/riscv/include/asm/spl.h +++ b/arch/riscv/include/asm/spl.h @@ -18,6 +18,7 @@ enum { BOOT_DEVICE_NOR, BOOT_DEVICE_UART, BOOT_DEVICE_SPI, + BOOT_DEVICE_SPINAND, BOOT_DEVICE_USB, BOOT_DEVICE_SATA, BOOT_DEVICE_NVME, diff --git a/arch/sandbox/include/asm/spl.h b/arch/sandbox/include/asm/spl.h index 4fab24cd15..70f8ad4b58 100644 --- a/arch/sandbox/include/asm/spl.h +++ b/arch/sandbox/include/asm/spl.h @@ -16,6 +16,7 @@ enum { BOOT_DEVICE_NOR, BOOT_DEVICE_SPI, BOOT_DEVICE_NAND, + BOOT_DEVICE_SPINAND, }; /** From patchwork Thu Apr 11 04:25:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Watts X-Patchwork-Id: 1922366 X-Patchwork-Delegate: andre.przywara@arm.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=jookia.org header.i=@jookia.org header.a=rsa-sha256 header.s=key1 header.b=mwEOQmP0; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VFRXR6Xvkz1yY8 for ; Thu, 11 Apr 2024 14:28:39 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 23671881DA; Thu, 11 Apr 2024 06:28:15 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=jookia.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=jookia.org header.i=@jookia.org header.b="mwEOQmP0"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 2270C88203; Thu, 11 Apr 2024 06:28:14 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from out-180.mta0.migadu.com (out-180.mta0.migadu.com [91.218.175.180]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 0D77B8820E for ; Thu, 11 Apr 2024 06:28:12 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=jookia.org Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=contact@jookia.org X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jookia.org; s=key1; t=1712809691; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=lzs7HYKNmS8KRA+RhF5cYoNWJ1CvTbrvpODy7HDViKE=; b=mwEOQmP0Yf5aapZVeaT4nkpZq40fonBI/wJBZlC13uLXJfNJm86ezv/lf7AT7tf7mGQSPP /x876VlNM2NtNUPFsJEhqHAuwPel6pDwvIXtFhWXYC+SFKrGxJ3ai2t0buDrgDwPnRE50g NWsshndBV6YjXnmb99wXEBpj+j64trqfyet4Wic/5EO3ltiYQJyCgslwOULwTm2k/aey6o wiyW6aKxslyZbDnAFoSFKF3FUkgZWNrVIY0DALMT8e827MAenVv8RGCOTRJL5pRWIsyO11 hQmp+p7IHhLXpuULCvChufTT6Ef36dzNaZJECU2mi2laquWHURslXgCNdoRrHA== From: John Watts Date: Thu, 11 Apr 2024 14:25:26 +1000 Subject: [PATCH RFC 09/15] sunxi: Implement BOOT_DEVICE_SPINAND in SPL MIME-Version: 1.0 Message-Id: <20240411-spinand-v1-9-62d31bb188e8@jookia.org> References: <20240411-spinand-v1-0-62d31bb188e8@jookia.org> In-Reply-To: <20240411-spinand-v1-0-62d31bb188e8@jookia.org> To: Jagan Teki , Andre Przywara , Tom Rini , Daniel Schwierzeck , Rick Chen , Leo , Simon Glass Cc: u-boot@lists.denx.de, John Watts X-Developer-Signature: v=1; a=openssh-sha256; t=1712809569; l=3428; i=contact@jookia.org; h=from:subject:message-id; bh=cTqOnM6hyf6ac+zBdGu6hwVzSP3wio7VTt6aVDxcf6g=; b=U1NIU0lHAAAAAQAAAEoAAAAac2stc3NoLWVkMjU1MTlAb3BlbnNzaC5jb20AAAAgpGuA3uho2 8zVxm554DVLHyl4gq5/nBHglU5WIWN8/zYAAAAEc3NoOgAAAAZwYXRhdHQAAAAAAAAABnNoYTUx MgAAAGcAAAAac2stc3NoLWVkMjU1MTlAb3BlbnNzaC5jb20AAABAfS6yjjVEv8eDGSESIhK8f5G 9XPmZs+BWvmdhX+ov6KXpGYqDO4oMOSSYnNTBBSzHASGShLs9KID4TBj/jbLLCQUAAOlR X-Developer-Key: i=contact@jookia.org; a=openssh; fpr=SHA256:6LBQmZH5u7i/edmEZXzCTwCrpSevs/ZshZxNmlD1thY X-Migadu-Flow: FLOW_OUT X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Instead of trying to boot from SPI NAND then SPI NOR in series, select one based on the current boot device. Signed-off-by: John Watts --- arch/arm/include/asm/arch-sunxi/spl.h | 1 + arch/arm/mach-sunxi/board.c | 5 ++++- arch/arm/mach-sunxi/spl_spi_sunxi.c | 28 ++++++++++++++++++---------- 3 files changed, 23 insertions(+), 11 deletions(-) diff --git a/arch/arm/include/asm/arch-sunxi/spl.h b/arch/arm/include/asm/arch-sunxi/spl.h index 92be936d56..a9b7c0daca 100644 --- a/arch/arm/include/asm/arch-sunxi/spl.h +++ b/arch/arm/include/asm/arch-sunxi/spl.h @@ -16,6 +16,7 @@ #define SUNXI_BOOTED_FROM_NAND 1 #define SUNXI_BOOTED_FROM_MMC2 2 #define SUNXI_BOOTED_FROM_SPI 3 +#define SUNXI_BOOTED_FROM_SPINAND 4 /* * Values taken from the F1C200s BootROM stack diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index 7f4ee92991..e374b75ac2 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -222,11 +222,12 @@ static int suniv_get_boot_source(void) switch (brom_call) { case SUNIV_BOOTED_FROM_MMC0: return SUNXI_BOOTED_FROM_MMC0; - case SUNIV_BOOTED_FROM_SPI: case SUNIV_BOOTED_FROM_NAND: return SUNXI_BOOTED_FROM_SPI; case SUNIV_BOOTED_FROM_MMC1: return SUNXI_BOOTED_FROM_MMC2; + case SUNIV_BOOTED_FROM_SPI: + return SUNXI_BOOTED_FROM_SPINAND; } /* If we get here something went wrong try to boot from FEL.*/ printf("Unknown boot source from BROM: 0x%x\n", brom_call); @@ -306,6 +307,8 @@ uint32_t sunxi_get_boot_device(void) return BOOT_DEVICE_MMC2; case SUNXI_BOOTED_FROM_SPI: return BOOT_DEVICE_SPI; + case SUNXI_BOOTED_FROM_SPINAND: + return BOOT_DEVICE_SPINAND; } panic("Unknown boot source %d\n", boot_source); diff --git a/arch/arm/mach-sunxi/spl_spi_sunxi.c b/arch/arm/mach-sunxi/spl_spi_sunxi.c index 7ecde2b753..46db2900ca 100644 --- a/arch/arm/mach-sunxi/spl_spi_sunxi.c +++ b/arch/arm/mach-sunxi/spl_spi_sunxi.c @@ -494,28 +494,36 @@ static int spl_spi_load_image(struct spl_image_info *spl_image, int ret = 0; uint32_t load_offset = sunxi_get_spl_size(); struct spl_load_info load; + bool allow_raw = false; load_offset = max_t(uint32_t, load_offset, CONFIG_SYS_SPI_U_BOOT_OFFS); spi0_init(); + switch (bootdev->boot_device) { #if defined(CONFIG_SPL_SPI_SUNXI_NAND) - spi0_nand_reset(); - load.read = spi_load_read_nand; - spl_set_bl_len(&load, 1); - ret = spl_spi_try_load(spl_image, bootdev, &load, load_offset, false); - if (!ret) - goto out; + case BOOT_DEVICE_SPINAND: + spi0_nand_reset(); + load.read = spi_load_read_nand; + spl_set_bl_len(&load, 1); + break; #endif + case BOOT_DEVICE_SPI: + load.read = spi_load_read_nor; + spl_set_bl_len(&load, 1); + allow_raw = true; + break; + } - spl_set_bl_len(&load, 1); - load.read = spi_load_read_nor; - ret = spl_spi_try_load(spl_image, bootdev, &load, load_offset, true); + ret = spl_spi_try_load(spl_image, bootdev, &load, load_offset, allow_raw); -out: spi0_deinit(); return ret; } /* Use priorty 0 to override the default if it happens to be linked in */ SPL_LOAD_IMAGE_METHOD("sunxi SPI", 0, BOOT_DEVICE_SPI, spl_spi_load_image); + +#if IS_ENABLED(CONFIG_SPL_SPI_SUNXI_NAND) +SPL_LOAD_IMAGE_METHOD("sunxi SPI NAND", 0, BOOT_DEVICE_SPINAND, spl_spi_load_image); +#endif From patchwork Thu Apr 11 04:25:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Watts X-Patchwork-Id: 1922367 X-Patchwork-Delegate: andre.przywara@arm.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=jookia.org header.i=@jookia.org header.a=rsa-sha256 header.s=key1 header.b=TV6GS536; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VFRXf56f5z1yY8 for ; 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DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jookia.org; s=key1; t=1712809699; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=4lR9pbVoAsxiiKijSXHGIAktKYyg316HJ+R0kotHJbI=; b=TV6GS536CpQ7xGBDPEQPlULRrNY5ZU/lsUnsVWyg6SIJapEDAzN9/b8aTJkccov09zvEqt I6rBh6NS/WROi48M8DafplQRImfZkXsE2+PRdSQVgG4/5w2nKh2C5wfmgv+N6ab7+RzykX 95ByTbSIhOOM5PUk0sIUe+L8IS0RKcFzFyL7D+K9NRwRDICM9UylitQwx2vZVZ/q2XyKmx vSuT3K0mWs3q1QOG8UJXhQECxbSn5Op6ZdVt87fEViI5ehSHM8kn1DC7K9MFt34O5usje7 HseVoVcY2V0NZwczkVU59Z02YCXPvrZ5hkukYr1kQNxgDGS0qORXbx1Zl+gOGw== From: John Watts Date: Thu, 11 Apr 2024 14:25:27 +1000 Subject: [PATCH RFC 10/15] spl: Add SPL_SPINAND configuration options MIME-Version: 1.0 Message-Id: <20240411-spinand-v1-10-62d31bb188e8@jookia.org> References: <20240411-spinand-v1-0-62d31bb188e8@jookia.org> In-Reply-To: <20240411-spinand-v1-0-62d31bb188e8@jookia.org> To: Jagan Teki , Andre Przywara , Tom Rini , Daniel Schwierzeck , Rick Chen , Leo , Simon Glass Cc: u-boot@lists.denx.de, John Watts X-Developer-Signature: v=1; a=openssh-sha256; t=1712809574; l=1420; i=contact@jookia.org; h=from:subject:message-id; bh=v3TLI0FGR3ybC+CFJhwtlipDsaQ/z6IqQ0q0Je4f7+E=; b=U1NIU0lHAAAAAQAAAEoAAAAac2stc3NoLWVkMjU1MTlAb3BlbnNzaC5jb20AAAAgpGuA3uho2 8zVxm554DVLHyl4gq5/nBHglU5WIWN8/zYAAAAEc3NoOgAAAAZwYXRhdHQAAAAAAAAABnNoYTUx MgAAAGcAAAAac2stc3NoLWVkMjU1MTlAb3BlbnNzaC5jb20AAABAl7lxkT67gz9VnULOHmqyDgD D/bNJSBGkm+IWCxpIanhZ2BYcj3ssDdwPPes2uC0Y7Xm7Zb+KC7N6CyOGDJ4lDgUAAOlU X-Developer-Key: i=contact@jookia.org; a=openssh; fpr=SHA256:6LBQmZH5u7i/edmEZXzCTwCrpSevs/ZshZxNmlD1thY X-Migadu-Flow: FLOW_OUT X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Boards that support SPI NAND need to specify the page and eraseblock size. Add those as Kconfig options. Signed-off-by: John Watts --- common/spl/Kconfig | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 6405374bcc..51d1f9f59d 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -906,6 +906,27 @@ config SPL_MUSB_NEW the drivers in drivers/usb/musb-new as part of an SPL build. The old drivers are in drivers/usb/musb. +config SPL_SPINAND_SUPPORT + bool "Support SPINAND flash" + help + Enable support for SPINAND (Negative AND) flash in SPL. SPINAND flash + can be used to allow SPL to load U-Boot from supported devices. + +config SPL_SPINAND_PAGE_SIZE + hex "SPINAND chip page size" + depends on SPL_SPINAND_SUPPORT + help + Number of data bytes in one page for the SPINAND chip on the + board, not including the OOB area. + +config SPL_SPINAND_BLOCK_SIZE + hex "SPINAND chip eraseblock size" + depends on SPL_SPINAND_SUPPORT + help + Number of data bytes in one eraseblock for the SPINAND chip on the + board. This is the multiple of SPINAND_PAGE_SIZE and the number of + pages. + config SPL_NAND_SUPPORT bool "Support NAND flash" select SPL_LOAD_BLOCK From patchwork Thu Apr 11 04:25:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Watts X-Patchwork-Id: 1922368 X-Patchwork-Delegate: andre.przywara@arm.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=jookia.org header.i=@jookia.org header.a=rsa-sha256 header.s=key1 header.b=Su4fGpER; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VFRXq67wwz1yY8 for ; Thu, 11 Apr 2024 14:28:59 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id EC4DD8821E; Thu, 11 Apr 2024 06:28:31 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=jookia.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=jookia.org header.i=@jookia.org header.b="Su4fGpER"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id E35C88820C; Thu, 11 Apr 2024 06:28:30 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from out-187.mta0.migadu.com (out-187.mta0.migadu.com [91.218.175.187]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 05447881ED for ; Thu, 11 Apr 2024 06:28:29 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=jookia.org Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=contact@jookia.org X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jookia.org; s=key1; t=1712809708; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=mELDRdXM40P64I8yegugHiGp89pHIVp3uHsVBflnay4=; b=Su4fGpERJ2Po3hLDhilrVE47WWtquBS8mwUSV+26l/lOFLaG6BVJdCyZiepgH+TuisMDjb zf3q5+aor3BkL6I2AMCJvgy32LVX4hwhlC9wTqnGGWts6K3p4jY5N/X8g23kimAbmhvRlC dyJYghTwVIUqKWFUBv/ok55sIAI86+Rp5jDVQjPUZLssxkVAIKQ9IKvePyDaeG+h2Wh1Kx qyJPzpxQDY96sg/53YP+QaXtIfnS2N4dyPeIS5pODl10u+odVo1xokzEMU6lA0RSdbVMVB n/ojfXq+T1YGKOHytn5NsAqc1Uk7fHfQBPyLB/59YdWtu90h1cIptOT3dFGbZg== From: John Watts Date: Thu, 11 Apr 2024 14:25:28 +1000 Subject: [PATCH RFC 11/15] sunxi: Use SPL_SPINAND for configuration MIME-Version: 1.0 Message-Id: <20240411-spinand-v1-11-62d31bb188e8@jookia.org> References: <20240411-spinand-v1-0-62d31bb188e8@jookia.org> In-Reply-To: <20240411-spinand-v1-0-62d31bb188e8@jookia.org> To: Jagan Teki , Andre Przywara , Tom Rini , Daniel Schwierzeck , Rick Chen , Leo , Simon Glass Cc: u-boot@lists.denx.de, John Watts X-Developer-Signature: v=1; a=openssh-sha256; t=1712809579; l=3181; i=contact@jookia.org; h=from:subject:message-id; bh=TixUq2T46BYSLZEPb0152Ety23Tp+UCqgNsjeCEEJAM=; b=U1NIU0lHAAAAAQAAAEoAAAAac2stc3NoLWVkMjU1MTlAb3BlbnNzaC5jb20AAAAgpGuA3uho2 8zVxm554DVLHyl4gq5/nBHglU5WIWN8/zYAAAAEc3NoOgAAAAZwYXRhdHQAAAAAAAAABnNoYTUx MgAAAGcAAAAac2stc3NoLWVkMjU1MTlAb3BlbnNzaC5jb20AAABAFiZwh6TDd+UrBEaRQmnQSs3 8APUmoWNXwzwTEU2S/N07qLG7c7kaD8uhP+S2mhSaslJAbeWACoMLqaxrNj3CCwUAAOlW X-Developer-Key: i=contact@jookia.org; a=openssh; fpr=SHA256:6LBQmZH5u7i/edmEZXzCTwCrpSevs/ZshZxNmlD1thY X-Migadu-Flow: FLOW_OUT X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Use the newly created SPL_SPINAND configuration options instead of sunxi-only options. No backwards compatibility is needed as the SPI NAND patches are not mainline yet. Signed-off-by: John Watts --- arch/arm/mach-sunxi/Kconfig | 16 ---------------- arch/arm/mach-sunxi/spl_spi_sunxi.c | 10 +++++----- 2 files changed, 5 insertions(+), 21 deletions(-) diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index cc576fc84d..ddf9414b08 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -1084,22 +1084,6 @@ config SPL_SPI_SUNXI sunxi SPI Flash. It uses the same method as the boot ROM, so does not need any extra configuration. -config SPL_SPI_SUNXI_NAND - bool "Support for SPI NAND Flash on Allwinner SoCs in SPL" - depends on SPL_SPI_SUNXI - help - Enable support for SPI NAND Flash. This option allows SPL to mimic - Allwinner boot ROM's behavior to gain support for SPI NAND Flash; - a fixed page size needs to be assumed when building the SPL image. - -config SPL_SPI_SUNXI_NAND_ASSUMED_PAGESIZE - hex "Assumed pagesize for SPI NAND Flash in SPL" - depends on SPL_SPI_SUNXI_NAND - default 0x400 if MACH_SUNIV - help - Set the page size assumed by the SPL SPI NAND code, the default - value is the same with the boot ROM. - config PINE64_DT_SELECTION bool "Enable Pine64 device tree selection code" depends on MACH_SUN50I diff --git a/arch/arm/mach-sunxi/spl_spi_sunxi.c b/arch/arm/mach-sunxi/spl_spi_sunxi.c index 46db2900ca..602ebfe8c5 100644 --- a/arch/arm/mach-sunxi/spl_spi_sunxi.c +++ b/arch/arm/mach-sunxi/spl_spi_sunxi.c @@ -344,7 +344,7 @@ static void spi0_xfer(const u8 *txbuf, u32 txlen, u8 *rxbuf, u32 rxlen) } } -#if defined(CONFIG_SPL_SPI_SUNXI_NAND) +#if defined(CONFIG_SPL_SPINAND_SUPPORT) static int spi0_nand_switch_page(u32 page) { unsigned count; @@ -430,11 +430,11 @@ static ulong spi_load_read_nor(struct spl_load_info *load, ulong sector, return count; } -#if defined(CONFIG_SPL_SPI_SUNXI_NAND) +#if defined(CONFIG_SPL_SPINAND_SUPPORT) static ulong spi_load_read_nand(struct spl_load_info *load, ulong sector, ulong count, void *buf) { - const ulong pagesize = CONFIG_SPL_SPI_SUNXI_NAND_ASSUMED_PAGESIZE; + const ulong pagesize = CONFIG_SPL_SPINAND_PAGE_SIZE; ulong remain = count; while (remain) { @@ -501,7 +501,7 @@ static int spl_spi_load_image(struct spl_image_info *spl_image, spi0_init(); switch (bootdev->boot_device) { -#if defined(CONFIG_SPL_SPI_SUNXI_NAND) +#if defined(CONFIG_SPL_SPINAND_SUPPORT) case BOOT_DEVICE_SPINAND: spi0_nand_reset(); load.read = spi_load_read_nand; @@ -524,6 +524,6 @@ static int spl_spi_load_image(struct spl_image_info *spl_image, /* Use priorty 0 to override the default if it happens to be linked in */ SPL_LOAD_IMAGE_METHOD("sunxi SPI", 0, BOOT_DEVICE_SPI, spl_spi_load_image); -#if IS_ENABLED(CONFIG_SPL_SPI_SUNXI_NAND) +#if IS_ENABLED(CONFIG_SPL_SPINAND_SUPPORT) SPL_LOAD_IMAGE_METHOD("sunxi SPI NAND", 0, BOOT_DEVICE_SPINAND, spl_spi_load_image); #endif From patchwork Thu Apr 11 04:25:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Watts X-Patchwork-Id: 1922370 X-Patchwork-Delegate: andre.przywara@arm.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=jookia.org header.i=@jookia.org header.a=rsa-sha256 header.s=key1 header.b=vWfLNziV; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VFRY34654z1yY8 for ; Thu, 11 Apr 2024 14:29:11 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 6411C881E7; Thu, 11 Apr 2024 06:28:40 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=jookia.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=jookia.org header.i=@jookia.org header.b="vWfLNziV"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 36A32881DC; Thu, 11 Apr 2024 06:28:39 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from out-181.mta0.migadu.com (out-181.mta0.migadu.com [IPv6:2001:41d0:1004:224b::b5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 5501C88207 for ; Thu, 11 Apr 2024 06:28:37 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=jookia.org Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=contact@jookia.org X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jookia.org; s=key1; t=1712809716; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=n3LMOdgg9cMPu+F5Wwl4YQ4aPXibELfSL8nWMatR9/Q=; b=vWfLNziVSimRxOyu2Jl55bu7pwpf6tGbPRiejT3sya9+0D2QEmOreMAstS2J5WKgq29PWz G2NiAzZzB1pbqTLGwrfM3pDYjInqihQ2IXIAeyIhjOcMUeQsTgNBEWHOM0i8xzRONvyjjM AZEo2fR6tASquxB4BNEBqHuDlpd0OBYX1k+TNdlyPWB1E10fnpCza6tTKR1qwT6bYHHq7U OutvaJEafrh3eNVEMFd/n/+PLTFTHJTD5P5UFewB989iMV8piw3vbBnbdgIl7n2rlhdi1z CxFQx73VofkenkuXqiu3AuIn7b+epAusa9HATnDEkn27/wB69r8zM83zm+kWrQ== From: John Watts Date: Thu, 11 Apr 2024 14:25:29 +1000 Subject: [PATCH RFC 12/15] nand: Add spinand_ helper functions MIME-Version: 1.0 Message-Id: <20240411-spinand-v1-12-62d31bb188e8@jookia.org> References: <20240411-spinand-v1-0-62d31bb188e8@jookia.org> In-Reply-To: <20240411-spinand-v1-0-62d31bb188e8@jookia.org> To: Jagan Teki , Andre Przywara , Tom Rini , Daniel Schwierzeck , Rick Chen , Leo , Simon Glass Cc: u-boot@lists.denx.de, John Watts X-Developer-Signature: v=1; a=openssh-sha256; t=1712809583; l=1045; i=contact@jookia.org; h=from:subject:message-id; bh=WERNGD2kgBdI2g5lxVJKMbVmr/9SfB1ucpGkRbeKEmA=; b=U1NIU0lHAAAAAQAAAEoAAAAac2stc3NoLWVkMjU1MTlAb3BlbnNzaC5jb20AAAAgpGuA3uho2 8zVxm554DVLHyl4gq5/nBHglU5WIWN8/zYAAAAEc3NoOgAAAAZwYXRhdHQAAAAAAAAABnNoYTUx MgAAAGcAAAAac2stc3NoLWVkMjU1MTlAb3BlbnNzaC5jb20AAABAIlQ1s7mSsvIFEhtwh+xh48l ke4diTz5sTReKAff6j3uQ2O37n9Ll2TkcQmRNc/mAahclpAMaiPaZ1sksiXlfCQUAAOlk X-Developer-Key: i=contact@jookia.org; a=openssh; fpr=SHA256:6LBQmZH5u7i/edmEZXzCTwCrpSevs/ZshZxNmlD1thY X-Migadu-Flow: FLOW_OUT X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean These are implemented by the board-specific SPL code for use with NAND-aware loaders like UBI. Signed-off-by: John Watts --- include/nand.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/nand.h b/include/nand.h index 220ffa202e..9fb8941dce 100644 --- a/include/nand.h +++ b/include/nand.h @@ -10,6 +10,7 @@ #include +extern void spinand_init(void); extern void nand_init(void); void nand_reinit(void); unsigned long nand_size(void); @@ -110,7 +111,9 @@ int nand_get_lock_status(struct mtd_info *mtd, loff_t offset); u32 nand_spl_adjust_offset(u32 sector, u32 offs); int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst); int nand_spl_read_block(int block, int offset, int len, void *dst); +int spinand_spl_read_block(int block, int offset, int len, void *dst); void nand_deselect(void); +void spinand_deselect(void); #ifdef CONFIG_SYS_NAND_SELECT_DEVICE void board_nand_select_device(struct nand_chip *nand, int chip); From patchwork Thu Apr 11 04:25:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Watts X-Patchwork-Id: 1922371 X-Patchwork-Delegate: andre.przywara@arm.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=jookia.org header.i=@jookia.org header.a=rsa-sha256 header.s=key1 header.b=sBy+n0ZQ; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VFRYF6jN1z1yY8 for ; Thu, 11 Apr 2024 14:29:21 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id BE36F881DC; Thu, 11 Apr 2024 06:28:47 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=jookia.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=jookia.org header.i=@jookia.org header.b="sBy+n0ZQ"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 1E7A988208; Thu, 11 Apr 2024 06:28:47 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from out-183.mta0.migadu.com (out-183.mta0.migadu.com [IPv6:2001:41d0:1004:224b::b7]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 407C087FA0 for ; Thu, 11 Apr 2024 06:28:45 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=jookia.org Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=contact@jookia.org X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jookia.org; s=key1; t=1712809724; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=jta+1G9h9yrhT+4h91Zur55fW10VPHtPNFhY2tuVxzI=; b=sBy+n0ZQnfbaRHb9RJH+JHYw+AP38Lg30254AU5MhwYr0Gs2CsxMoNGzrPDMIRfbGi2f3n TprsrcP86unYMLam6n7ivfQb6SK3gTNF6hznh/CspQ3lwyVAHc71N2cjw8nbkUPhV/uaaj E3jstDKyk2KfNGgb8oCPndWAeFJXDUczN7KqgOZJkZNJRZee3+XIExNCKVRSgg7W/OhW+j WYkadKE59bsrMJPemqgOFSE+vicM07BxfxWhdSGTvoPryDiqnXVLTwXRE/qi9IJ8YVajUd B7HfndcelBbhD2s+vq/51okMVkbY5YavWw+VnQ9JtJ0oLSom3UzQYNMnh+zqJw== From: John Watts Date: Thu, 11 Apr 2024 14:25:30 +1000 Subject: [PATCH RFC 13/15] sunxi: Implement spinand_ helpers MIME-Version: 1.0 Message-Id: <20240411-spinand-v1-13-62d31bb188e8@jookia.org> References: <20240411-spinand-v1-0-62d31bb188e8@jookia.org> In-Reply-To: <20240411-spinand-v1-0-62d31bb188e8@jookia.org> To: Jagan Teki , Andre Przywara , Tom Rini , Daniel Schwierzeck , Rick Chen , Leo , Simon Glass Cc: u-boot@lists.denx.de, John Watts X-Developer-Signature: v=1; a=openssh-sha256; t=1712809587; l=1012; i=contact@jookia.org; h=from:subject:message-id; bh=6Hq9+6Ld/70aWhqldFEqi9H8jBk1kPy1W9J0YwTUcus=; b=U1NIU0lHAAAAAQAAAEoAAAAac2stc3NoLWVkMjU1MTlAb3BlbnNzaC5jb20AAAAgpGuA3uho2 8zVxm554DVLHyl4gq5/nBHglU5WIWN8/zYAAAAEc3NoOgAAAAZwYXRhdHQAAAAAAAAABnNoYTUx MgAAAGcAAAAac2stc3NoLWVkMjU1MTlAb3BlbnNzaC5jb20AAABAqnOHdaFCol2nC0zIsu2TKD/ HB6DOWXoIVPglwgWw6/BZi39CUZi1XxQLLurlUYqGoqXnSyMdQB5wsohcO2EFCwUAAOly X-Developer-Key: i=contact@jookia.org; a=openssh; fpr=SHA256:6LBQmZH5u7i/edmEZXzCTwCrpSevs/ZshZxNmlD1thY X-Migadu-Flow: FLOW_OUT X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean These are used by NAND-aware loaders such as UBI. Signed-off-by: John Watts --- arch/arm/mach-sunxi/spl_spi_sunxi.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm/mach-sunxi/spl_spi_sunxi.c b/arch/arm/mach-sunxi/spl_spi_sunxi.c index 602ebfe8c5..d6b03678d0 100644 --- a/arch/arm/mach-sunxi/spl_spi_sunxi.c +++ b/arch/arm/mach-sunxi/spl_spi_sunxi.c @@ -450,6 +450,27 @@ static ulong spi_load_read_nand(struct spl_load_info *load, ulong sector, return count; } + +void spinand_init(void) +{ + spi0_init(); + spi0_nand_reset(); +} + +void spinand_deselect(void) +{ + spi0_deinit(); +} + +int spinand_spl_read_block(int block, int offset, int len, void *dst) +{ + ulong byte_offset = (block * CONFIG_SPL_SPINAND_BLOCK_SIZE) + offset; + + spi_load_read_nand(NULL, byte_offset, len, dst); + + return 0; +} + #endif /*****************************************************************************/ From patchwork Thu Apr 11 04:25:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Watts X-Patchwork-Id: 1922372 X-Patchwork-Delegate: andre.przywara@arm.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=jookia.org header.i=@jookia.org header.a=rsa-sha256 header.s=key1 header.b=r/qc+QET; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VFRYR4Q94z1yY8 for ; Thu, 11 Apr 2024 14:29:31 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 3129F881ED; Thu, 11 Apr 2024 06:28:56 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=jookia.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=jookia.org header.i=@jookia.org header.b="r/qc+QET"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id DCD49881ED; Thu, 11 Apr 2024 06:28:54 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from out-178.mta1.migadu.com (out-178.mta1.migadu.com [95.215.58.178]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id F2D9087FA0 for ; Thu, 11 Apr 2024 06:28:52 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=jookia.org Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=contact@jookia.org X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. 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Signed-off-by: John Watts --- common/spl/spl_ubi.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/common/spl/spl_ubi.c b/common/spl/spl_ubi.c index d7ab9efd11..72b4b195ed 100644 --- a/common/spl/spl_ubi.c +++ b/common/spl/spl_ubi.c @@ -21,6 +21,13 @@ int spl_ubi_load_image(struct spl_image_info *spl_image, int ret = 1; switch (bootdev->boot_device) { +#ifdef CONFIG_SPL_SPINAND_SUPPORT + case BOOT_DEVICE_SPINAND: + spinand_init(); + info.read = spinand_spl_read_block; + info.peb_size = CONFIG_SPL_SPINAND_BLOCK_SIZE; + break; +#endif #ifdef CONFIG_SPL_NAND_SUPPORT case BOOT_DEVICE_NAND: nand_init(); @@ -77,12 +84,18 @@ int spl_ubi_load_image(struct spl_image_info *spl_image, if (!ret) spl_parse_image_header(spl_image, bootdev, header); out: +#ifdef CONFIG_SPL_SPINAND_SUPPORT + if (bootdev->boot_device == BOOT_DEVICE_SPINAND) + spinand_deselect(); +#endif #ifdef CONFIG_SPL_NAND_SUPPORT if (bootdev->boot_device == BOOT_DEVICE_NAND) nand_deselect(); #endif return ret; } -/* Use priorty 0 so that Ubi will override NAND and ONENAND methods */ + +/* Use priority 0 so that UBI will override all NAND methods */ SPL_LOAD_IMAGE_METHOD("NAND", 0, BOOT_DEVICE_NAND, spl_ubi_load_image); SPL_LOAD_IMAGE_METHOD("OneNAND", 0, BOOT_DEVICE_ONENAND, spl_ubi_load_image); +SPL_LOAD_IMAGE_METHOD("SPINAND", 0, BOOT_DEVICE_SPINAND, spl_ubi_load_image); From patchwork Thu Apr 11 04:25:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Watts X-Patchwork-Id: 1922373 X-Patchwork-Delegate: andre.przywara@arm.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=jookia.org header.i=@jookia.org header.a=rsa-sha256 header.s=key1 header.b=n+qWO1Xs; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VFRYc5MxQz1yY8 for ; Thu, 11 Apr 2024 14:29:40 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 942FC88229; Thu, 11 Apr 2024 06:29:03 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=jookia.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=jookia.org header.i=@jookia.org header.b="n+qWO1Xs"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 29E5288227; Thu, 11 Apr 2024 06:29:03 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from out-175.mta0.migadu.com (out-175.mta0.migadu.com [IPv6:2001:41d0:1004:224b::af]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 3F54C88229 for ; Thu, 11 Apr 2024 06:29:01 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=jookia.org Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=contact@jookia.org X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jookia.org; s=key1; t=1712809740; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=7mIJlPD/fYwcElW7PtXXO+XgsDkwy8SYfxHm/zU86nk=; b=n+qWO1XsR0asjtUNaQIbZyV7w2bNZ6MRNQNN6EjQ5coYLJOSkvbjl2Nce1EB2Nxa+8bEMR jCdjt+6W1qbjCLO2NkHGbAVSBcKBjHvTl4bY/wbZR15EGKpA5AwPvTfMw6Ls60RHmIwEpm TN/c0LImFKcqfAZCl6NCzpZXScjfBflWRliAbkVlxiDEpP8pXHyfcgQtmizxQ6rtaQZBdh Dmy4ZrKDHUoxzsxsHWdtePolGptzI/qFLj7DvHI3mgLDYuxlLI8nn/qAZ0O9hzfm6m3q6V eFnRj9IWOwlSK9ULlrzBfrQKkGdUiuqqenW1jBXPUkMZA/h82vbL6P01iPUzCg== From: John Watts Date: Thu, 11 Apr 2024 14:25:32 +1000 Subject: [PATCH RFC 15/15] spl: Support loading FIT images in UBI MIME-Version: 1.0 Message-Id: <20240411-spinand-v1-15-62d31bb188e8@jookia.org> References: <20240411-spinand-v1-0-62d31bb188e8@jookia.org> In-Reply-To: <20240411-spinand-v1-0-62d31bb188e8@jookia.org> To: Jagan Teki , Andre Przywara , Tom Rini , Daniel Schwierzeck , Rick Chen , Leo , Simon Glass Cc: u-boot@lists.denx.de, John Watts X-Developer-Signature: v=1; a=openssh-sha256; t=1712809597; l=2116; i=contact@jookia.org; h=from:subject:message-id; bh=p32ZDMbTt+1k+r9iLkbLQ+GXhRsHxSBhxzI9xAFqIAo=; b=U1NIU0lHAAAAAQAAAEoAAAAac2stc3NoLWVkMjU1MTlAb3BlbnNzaC5jb20AAAAgpGuA3uho2 8zVxm554DVLHyl4gq5/nBHglU5WIWN8/zYAAAAEc3NoOgAAAAZwYXRhdHQAAAAAAAAABnNoYTUx MgAAAGcAAAAac2stc3NoLWVkMjU1MTlAb3BlbnNzaC5jb20AAABAC4WZkakmxAMkzrmuW3sI5At V6XkSVjAsRsXSULDIzM9iJixbAsH9HrF22mQlDwEDXHz28wG3p3Htp4HY/tzHBgUAAOmK X-Developer-Key: i=contact@jookia.org; a=openssh; fpr=SHA256:6LBQmZH5u7i/edmEZXzCTwCrpSevs/ZshZxNmlD1thY X-Migadu-Flow: FLOW_OUT X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The FIT loader doesn't support access through UBI, so load the FIT image ourself in to memory then boot it normally. Signed-off-by: John Watts --- common/spl/spl_ubi.c | 34 ++++++++++++++++++++++++++++++---- 1 file changed, 30 insertions(+), 4 deletions(-) diff --git a/common/spl/spl_ubi.c b/common/spl/spl_ubi.c index 72b4b195ed..b64f595160 100644 --- a/common/spl/spl_ubi.c +++ b/common/spl/spl_ubi.c @@ -12,6 +12,16 @@ #include #include +static ulong ram_spl_load_read(struct spl_load_info *load, ulong sector, + ulong count, void *buf) +{ + char *ubi_contents = load->priv; + + memcpy(buf, ubi_contents + sector, count); + + return count; +} + int spl_ubi_load_image(struct spl_image_info *spl_image, struct spl_boot_device *bootdev) { @@ -69,10 +79,11 @@ int spl_ubi_load_image(struct spl_image_info *spl_image, puts("Loading Linux failed, falling back to U-Boot.\n"); } #endif - header = spl_get_load_buffer(-sizeof(*header), sizeof(header)); + /* Ensure there's enough room for the full UBI volume! */ + header = (void *)CONFIG_SYS_LOAD_ADDR; #ifdef CONFIG_SPL_UBI_LOAD_BY_VOLNAME volumes[0].vol_id = -1; - strncpy(volumes[0].name, + strlcpy(volumes[0].name, CONFIG_SPL_UBI_LOAD_MONITOR_VOLNAME, UBI_VOL_NAME_MAX + 1); #else @@ -81,8 +92,23 @@ int spl_ubi_load_image(struct spl_image_info *spl_image, volumes[0].load_addr = (void *)header; ret = ubispl_load_volumes(&info, volumes, 1); - if (!ret) - spl_parse_image_header(spl_image, bootdev, header); + if (ret) + goto out; + + spl_parse_image_header(spl_image, bootdev, header); + + if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) && + image_get_magic(header) == FDT_MAGIC) { + struct spl_load_info load; + + printf("Found FIT\n"); + load.priv = (char *)header; + load.read = ram_spl_load_read; + spl_set_bl_len(&load, 1); + + ret = spl_load_simple_fit(spl_image, &load, 0, header); + } + out: #ifdef CONFIG_SPL_SPINAND_SUPPORT if (bootdev->boot_device == BOOT_DEVICE_SPINAND)