From patchwork Sun Mar 17 02:02:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lulu Cheng X-Patchwork-Id: 1912848 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Ty1X7323pz1yWv for ; Sun, 17 Mar 2024 13:04:55 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id B9BF13858402 for ; Sun, 17 Mar 2024 02:04:52 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from eggs.gnu.org (eggs.gnu.org [IPv6:2001:470:142:3::10]) by sourceware.org (Postfix) with ESMTPS id 39E843858437 for ; Sun, 17 Mar 2024 02:03:08 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 39E843858437 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=fail smtp.mailfrom=loongson.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 39E843858437 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2001:470:142:3::10 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1710640995; cv=none; b=FVcSeL4eoyaUvMn9VEaZVcOPWQzArevszlyfZrlET40liHVkaJE14CcWvinTSjvlGOpwPxcU5CYU316FmyMhLMj0LWJvkD78p8XCZSmcCFYtyNaH+2Xn6/57lwvTyArpwamNmjtidv+cuwR00LN1Z9YER2rwR+t1HhKydq5sX0M= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1710640995; c=relaxed/simple; bh=ZfVtP31TrGT9mOYLLZ9DpklSyG+YHZXrKvqyFHqfT9I=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=IysRfTbLcDJGuFglqed6SgIEaJP7JoqRlIjSqriexovqi0Y2CSSvypKW8Tai+QAJzkv8JnHQjXFpg/+SlmsxaJShgwlBshu2tjJFKVaXbAHbByr5uDvCQcnbYy8lR6h93kFsbiM+CRhM4H/4JEEq1F4PcwkP2XA6hpjYkU00vIs= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rlfrb-0004EC-1Q for gcc-patches@gcc.gnu.org; Sat, 16 Mar 2024 22:03:06 -0400 Received: from loongson.cn (unknown [10.20.4.107]) by gateway (Coremail) with SMTP id _____8DxdfFLT_ZlNwMaAA--.62736S3; Sun, 17 Mar 2024 10:02:51 +0800 (CST) Received: from loongson-pc.loongson.cn (unknown [10.20.4.107]) by localhost.localdomain (Coremail) with SMTP id AQAAf8CxZMxGT_Zlmt1bAA--.50893S3; Sun, 17 Mar 2024 10:02:50 +0800 (CST) From: Lulu Cheng To: gcc-patches@gcc.gnu.org Cc: xry111@xry111.site, i@xen0n.name, xuchenghua@loongson.cn, chenglulu@loongson.cn Subject: [PATCH] LoongArch: gcc13: Implement option save/restore. Date: Sun, 17 Mar 2024 10:02:42 +0800 Message-Id: <20240317020242.22325-2-chenglulu@loongson.cn> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20240317020242.22325-1-chenglulu@loongson.cn> References: <20240317020242.22325-1-chenglulu@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAf8CxZMxGT_Zlmt1bAA--.50893S3 X-CM-SenderInfo: xfkh0wpoxo3qxorr0wxvrqhubq/ X-Coremail-Antispam: 1Uk129KBj93XoWfJFWkuF4UJF1xWryrJw4rCrX_yoWkuw4rpr 9ruw15tr48GrZagr1qqa98Xw13Aw1Igr4293WfWa18Aa15Xr1UZF1vqr9xXFy7uayrZ34I qFn5K3WY9a1UAwcCm3ZEXasCq-sJn29KB7ZKAUJUUUU5529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUkjb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1Y6r17M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Jr0_JF4l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Jr0_Gr1l84ACjcxK6I8E87Iv67AKxVW8JVWxJwA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_ Gr0_Gr1UM2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12xvs2x26I8E6xACxx1l5I 8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r1Y6r17McIj6I8E87Iv67AK xVWUJVW8JwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41l42xK82IYc2Ij64 vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s026x8G jcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r126r1DMIIYrxkI7VAKI48JMIIF0xvE2I x0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2IY6xkF7I0E14v26r1j6r4UMIIF0xvE42xK 8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVWUJVW8JwCI42IY6I8E87Iv6xkF7I 0E14v26r1j6r4UYxBIdaVFxhVjvjDU0xZFpf9x07j1WlkUUUUU= Received-SPF: pass client-ip=114.242.206.163; envelope-from=chenglulu@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-Spam-Status: No, score=-12.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_FAIL, SPF_HELO_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org LTO option streaming and target attributes both require per-function target configuration, which is achieved via option save/restore. We implement TARGET_OPTION_{SAVE,RESTORE} to switch the la_target context in addition to other automatically maintained option states (via the "Save" option property in the .opt files). PR target/113233 gcc/ChangeLog: * config/loongarch/genopts/loongarch.opt.in: Mark options with the "Save" property. * config/loongarch/loongarch-opts.cc (loongarch_update_gcc_opt_status): Update the value of the la_target to global_options. * config/loongarch/loongarch-opts.h (loongarch_update_gcc_opt_status): Add a function declaration. * config/loongarch/loongarch.cc (loongarch_option_override_internal): Call the function loongarch_update_gcc_opt_status. (loongarch_option_save): New functions. (loongarch_option_restore): Likewise. (TARGET_OPTION_SAVE): Define macro. (TARGET_OPTION_RESTORE): Likewise. * config/loongarch/loongarch.opt: Regenerate. --- gcc/config/loongarch/genopts/loongarch.opt.in | 24 ++++++------- gcc/config/loongarch/loongarch-opts.cc | 22 ++++++++++++ gcc/config/loongarch/loongarch-opts.h | 6 ++++ gcc/config/loongarch/loongarch.cc | 34 +++++++++++++++++-- gcc/config/loongarch/loongarch.opt | 24 ++++++------- 5 files changed, 84 insertions(+), 26 deletions(-) diff --git a/gcc/config/loongarch/genopts/loongarch.opt.in b/gcc/config/loongarch/genopts/loongarch.opt.in index 76acd35d39c..aea4f2a4f61 100644 --- a/gcc/config/loongarch/genopts/loongarch.opt.in +++ b/gcc/config/loongarch/genopts/loongarch.opt.in @@ -58,7 +58,7 @@ EnumValue Enum(isa_ext_fpu) String(@@STR_ISA_EXT_FPU64@@) Value(ISA_EXT_FPU64) m@@OPTSTR_ISA_EXT_FPU@@= -Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN) +Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN) Save -m@@OPTSTR_ISA_EXT_FPU@@=FPU Generate code for the given FPU. m@@OPTSTR_ISA_EXT_FPU@@=@@STR_ISA_EXT_FPU0@@ @@ -92,11 +92,11 @@ EnumValue Enum(cpu_type) String(@@STR_CPU_LA464@@) Value(CPU_LA464) m@@OPTSTR_ARCH@@= -Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN) +Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN) Save -m@@OPTSTR_ARCH@@=PROCESSOR Generate code for the given PROCESSOR ISA. m@@OPTSTR_TUNE@@= -Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN) +Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN) Save -m@@OPTSTR_TUNE@@=PROCESSOR Generate optimized code for PROCESSOR. @@ -127,31 +127,31 @@ int la_opt_abi_ext = M_OPTION_NOT_SEEN mbranch-cost= -Target RejectNegative Joined UInteger Var(loongarch_branch_cost) +Target RejectNegative Joined UInteger Var(loongarch_branch_cost) Save -mbranch-cost=COST Set the cost of branches to roughly COST instructions. mcheck-zero-division -Target Mask(CHECK_ZERO_DIV) +Target Mask(CHECK_ZERO_DIV) Save Trap on integer divide by zero. mcond-move-int -Target Var(TARGET_COND_MOVE_INT) Init(1) +Target Var(TARGET_COND_MOVE_INT) Init(1) Save Conditional moves for integral are enabled. mcond-move-float -Target Var(TARGET_COND_MOVE_FLOAT) Init(1) +Target Var(TARGET_COND_MOVE_FLOAT) Init(1) Save Conditional moves for float are enabled. mmemcpy -Target Mask(MEMCPY) +Target Mask(MEMCPY) Save Prevent optimizing block moves, which is also the default behavior of -Os. mstrict-align -Target Var(TARGET_STRICT_ALIGN) Init(0) +Target Var(TARGET_STRICT_ALIGN) Init(0) Save Do not generate unaligned memory accesses. mmax-inline-memcpy-size= -Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024) +Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024) Save -mmax-inline-memcpy-size=SIZE Set the max size of memcpy to inline, default is 1024. mexplicit-relocs @@ -182,11 +182,11 @@ EnumValue Enum(cmodel) String(@@STR_CMODEL_EXTREME@@) Value(CMODEL_EXTREME) mcmodel= -Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL) +Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL) Save Specify the code model. mdirect-extern-access -Target Var(TARGET_DIRECT_EXTERN_ACCESS) Init(0) +Target Var(TARGET_DIRECT_EXTERN_ACCESS) Init(0) Save Avoid using the GOT to access external symbols. mrelax diff --git a/gcc/config/loongarch/loongarch-opts.cc b/gcc/config/loongarch/loongarch-opts.cc index a52e25236ea..e158de9a12f 100644 --- a/gcc/config/loongarch/loongarch-opts.cc +++ b/gcc/config/loongarch/loongarch-opts.cc @@ -594,3 +594,25 @@ multilib_enabled_abi_list () return XOBFINISH (&msg_obstack, const char *); } + +/* option status feedback for "gcc --help=target -Q" */ +void +loongarch_update_gcc_opt_status (struct loongarch_target *target, + struct gcc_options *opts, + struct gcc_options *opts_set) +{ + (void) opts_set; + + /* status of -mabi */ + opts->x_la_opt_abi_base = target->abi.base; + + /* status of -march and -mtune */ + opts->x_la_opt_cpu_arch = target->cpu_arch; + opts->x_la_opt_cpu_tune = target->cpu_tune; + + /* status of -mcmodel */ + opts->x_la_opt_cmodel = target->cmodel; + + /* status of -mfpu */ + opts->x_la_opt_fpu = target->isa.fpu; +} diff --git a/gcc/config/loongarch/loongarch-opts.h b/gcc/config/loongarch/loongarch-opts.h index 02184e2991a..3b53562c29f 100644 --- a/gcc/config/loongarch/loongarch-opts.h +++ b/gcc/config/loongarch/loongarch-opts.h @@ -39,6 +39,12 @@ loongarch_config_target (struct loongarch_target *target, int opt_arch, int opt_tune, int opt_fpu, int opt_abi_base, int opt_abi_ext, int opt_cmodel, int follow_multilib_list); + +/* option status feedback for "gcc --help=target -Q" */ +void +loongarch_update_gcc_opt_status (struct loongarch_target *target, + struct gcc_options *opts, + struct gcc_options *opts_set); #endif diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc index e78b81cd8fc..0e0bd047369 100644 --- a/gcc/config/loongarch/loongarch.cc +++ b/gcc/config/loongarch/loongarch.cc @@ -6138,7 +6138,8 @@ loongarch_init_machine_status (void) } static void -loongarch_option_override_internal (struct gcc_options *opts) +loongarch_option_override_internal (struct gcc_options *opts, + struct gcc_options *opts_set) { int i, regno, mode; @@ -6150,6 +6151,8 @@ loongarch_option_override_internal (struct gcc_options *opts) la_opt_cpu_arch, la_opt_cpu_tune, la_opt_fpu, la_opt_abi_base, la_opt_abi_ext, la_opt_cmodel, 0); + loongarch_update_gcc_opt_status (&la_target, opts, opts_set); + if (TARGET_ABI_LP64) flag_pcc_struct_return = 0; @@ -6264,7 +6267,30 @@ loongarch_option_override_internal (struct gcc_options *opts) static void loongarch_option_override (void) { - loongarch_option_override_internal (&global_options); + loongarch_option_override_internal (&global_options, &global_options_set); +} + +/* Implement TARGET_OPTION_SAVE. */ +static void +loongarch_option_save (struct cl_target_option *, + struct gcc_options *opts, + struct gcc_options *opts_set) +{ + loongarch_update_gcc_opt_status (&la_target, opts, opts_set); +} + +/* Implement TARGET_OPTION_RESTORE. */ +static void +loongarch_option_restore (struct gcc_options *, + struct gcc_options *, + struct cl_target_option *ptr) +{ + la_target.cpu_arch = ptr->x_la_opt_cpu_arch; + la_target.cpu_tune = ptr->x_la_opt_cpu_tune; + + la_target.isa.fpu = ptr->x_la_opt_fpu; + + la_target.cmodel = ptr->x_la_opt_cmodel; } /* Implement TARGET_CONDITIONAL_REGISTER_USAGE. */ @@ -6594,6 +6620,10 @@ loongarch_asan_shadow_offset (void) #undef TARGET_OPTION_OVERRIDE #define TARGET_OPTION_OVERRIDE loongarch_option_override +#define TARGET_OPTION_SAVE loongarch_option_save +#undef TARGET_OPTION_RESTORE +#define TARGET_OPTION_RESTORE loongarch_option_restore + #undef TARGET_LEGITIMIZE_ADDRESS #define TARGET_LEGITIMIZE_ADDRESS loongarch_legitimize_address diff --git a/gcc/config/loongarch/loongarch.opt b/gcc/config/loongarch/loongarch.opt index e61fbaed2c1..945f058eea8 100644 --- a/gcc/config/loongarch/loongarch.opt +++ b/gcc/config/loongarch/loongarch.opt @@ -65,7 +65,7 @@ EnumValue Enum(isa_ext_fpu) String(64) Value(ISA_EXT_FPU64) mfpu= -Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN) +Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN) Save -mfpu=FPU Generate code for the given FPU. mfpu=0 @@ -99,11 +99,11 @@ EnumValue Enum(cpu_type) String(la464) Value(CPU_LA464) march= -Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN) +Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN) Save -march=PROCESSOR Generate code for the given PROCESSOR ISA. mtune= -Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN) +Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN) Save -mtune=PROCESSOR Generate optimized code for PROCESSOR. @@ -134,31 +134,31 @@ int la_opt_abi_ext = M_OPTION_NOT_SEEN mbranch-cost= -Target RejectNegative Joined UInteger Var(loongarch_branch_cost) +Target RejectNegative Joined UInteger Var(loongarch_branch_cost) Save -mbranch-cost=COST Set the cost of branches to roughly COST instructions. mcheck-zero-division -Target Mask(CHECK_ZERO_DIV) +Target Mask(CHECK_ZERO_DIV) Save Trap on integer divide by zero. mcond-move-int -Target Var(TARGET_COND_MOVE_INT) Init(1) +Target Var(TARGET_COND_MOVE_INT) Init(1) Save Conditional moves for integral are enabled. mcond-move-float -Target Var(TARGET_COND_MOVE_FLOAT) Init(1) +Target Var(TARGET_COND_MOVE_FLOAT) Init(1) Save Conditional moves for float are enabled. mmemcpy -Target Mask(MEMCPY) +Target Mask(MEMCPY) Save Prevent optimizing block moves, which is also the default behavior of -Os. mstrict-align -Target Var(TARGET_STRICT_ALIGN) Init(0) +Target Var(TARGET_STRICT_ALIGN) Init(0) Save Do not generate unaligned memory accesses. mmax-inline-memcpy-size= -Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024) +Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024) Save -mmax-inline-memcpy-size=SIZE Set the max size of memcpy to inline, default is 1024. mexplicit-relocs @@ -189,11 +189,11 @@ EnumValue Enum(cmodel) String(extreme) Value(CMODEL_EXTREME) mcmodel= -Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL) +Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL) Save Specify the code model. mdirect-extern-access -Target Var(TARGET_DIRECT_EXTERN_ACCESS) Init(0) +Target Var(TARGET_DIRECT_EXTERN_ACCESS) Init(0) Save Avoid using the GOT to access external symbols. mrelax