From patchwork Thu Mar 7 11:34:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yang Xiwen via B4 Relay X-Patchwork-Id: 1909195 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=moEKhiLa; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2604:1380:45d1:ec00::1; helo=ny.mirrors.kernel.org; envelope-from=devicetree+bounces-49072-incoming-dt=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org [IPv6:2604:1380:45d1:ec00::1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Tr6ff0T27z1yX3 for ; Thu, 7 Mar 2024 22:35:06 +1100 (AEDT) Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ny.mirrors.kernel.org (Postfix) with ESMTPS id 3CD721C20E8D for ; Thu, 7 Mar 2024 11:35:04 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 03C5C129A6D; Thu, 7 Mar 2024 11:34:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="moEKhiLa" X-Original-To: devicetree@vger.kernel.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A242A1292C0; Thu, 7 Mar 2024 11:34:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709811289; cv=none; b=b4TW764U++xTdiYDLcnFNNfwkgprYLN0sJhxm8u7U7w1MC4hUvEYrUAFfzo81dU1YCWyAr1JkcSLlQA7ye4vPpj55KjlLl4xlIyFzO8gM+Ci9xMo3tmQAzohNV9WbnG0Gc2pTBt45no6sAYV2QhUszJ2OKLkXCoycSgmGc7adSc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709811289; c=relaxed/simple; bh=3nX8fP3l7Bt65toEN0CdGwFHFH0sX3inF2oQP8On+7k=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=rWZxdC+NjzwhK8fkRhzYH80RfLodMYwqwLUhFKPyqo4AQWdCiFQtlHXvKq7aEzPFyV5K2i+AE+IeUl9P0XZ91uIMKJ2DhlC0H+tMAh3pK7bw2NfEYdHe2lnZA+ntQy/HvdqJbjoq2he+kaiwY8XpkG7X3ezsMYgQzzGFN0b+v2E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=moEKhiLa; arc=none smtp.client-ip=10.30.226.201 Received: by smtp.kernel.org (Postfix) with ESMTPS id 4F000C43390; Thu, 7 Mar 2024 11:34:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1709811289; bh=3nX8fP3l7Bt65toEN0CdGwFHFH0sX3inF2oQP8On+7k=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=moEKhiLalkkG+Dnn0B4tI51YGpGaIG8RpdwvzF4sr4Ebxf97hp2Khyo/0R77z1iyj 5e8jg012cCCeW2UXt/NG+zIKtXVy/qKgBOMPRRKE7YgCU6NdOOztPI53G5UDt43Wvf 0XKF/BDMJFlAtu++weKScc8f4/evdfmeo5bw2f6KwGHiMJO/e1nEgTQzd+ncXSTtVZ 05hJ8MBQokoCNpUpfVGYt/vbqwCVRQpKrb8g279Jrnfj/P5MjFiZ3kipAsQlJ2RZbv aXc6pxSHlo6I12A3XmX1mXuz0nVu/XhH166wNAWu34j+f/X+PLwHZEewz+Y+H42nCv Ma1EFmcj5iT8Q== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 37783C54E58; Thu, 7 Mar 2024 11:34:49 +0000 (UTC) From: Yang Xiwen via B4 Relay Date: Thu, 07 Mar 2024 19:34:47 +0800 Subject: [PATCH net-next v9 1/9] dt-bindings: net: hisilicon-femac-mdio: convert to YAML Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240307-net-v9-1-6e0cf3e6584d@outlook.com> References: <20240307-net-v9-0-6e0cf3e6584d@outlook.com> In-Reply-To: <20240307-net-v9-0-6e0cf3e6584d@outlook.com> To: Yisen Zhuang , Salil Mehta , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andrew Lunn , Heiner Kallweit , Russell King Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Yang Xiwen , Krzysztof Kozlowski X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1709811287; l=2517; i=forbidden405@outlook.com; s=20230724; h=from:subject:message-id; bh=stv+a/mRLJaLswc2WeXjirfjJSRDl5txIs38K87wIhs=; b=mlkaqT33wizaPh1Wu7/9X/xSrChk2Hhc0IPoYG5q2GlzqUbGqa1Z5futKoTMzNe71r0kWqtJ1 p2cLPk9WAQfCOGTBB1Vv4TLA4kZs1TB3VqVssF7GP/YsJWEE+W6z6ou X-Developer-Key: i=forbidden405@outlook.com; a=ed25519; pk=qOD5jhp891/Xzc+H/PZ8LWVSWE3O/XCQnAg+5vdU2IU= X-Endpoint-Received: by B4 Relay for forbidden405@outlook.com/20230724 with auth_id=67 X-Original-From: Yang Xiwen Reply-To: From: Yang Xiwen convert the old text binding to modern YAML based binding. No semantic change. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Yang Xiwen --- .../bindings/net/hisilicon,hisi-femac-mdio.yaml | 44 ++++++++++++++++++++++ .../bindings/net/hisilicon-femac-mdio.txt | 22 ----------- 2 files changed, 44 insertions(+), 22 deletions(-) diff --git a/Documentation/devicetree/bindings/net/hisilicon,hisi-femac-mdio.yaml b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac-mdio.yaml new file mode 100644 index 000000000000..36def9d5eecd --- /dev/null +++ b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac-mdio.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/hisilicon,hisi-femac-mdio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: HiSilicon FEMAC MDIO bus + +maintainers: + - Yang Xiwen + +allOf: + - $ref: mdio.yaml# + +properties: + compatible: + const: hisilicon,hisi-femac-mdio + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - clocks + +unevaluatedProperties: false + +examples: + - | + mdio@10091100 { + compatible = "hisilicon,hisi-femac-mdio"; + reg = <0x10091100 0x20>; + clocks = <&clk_mdio>; + #address-cells = <1>; + #size-cells = <0>; + + phy@1 { + reg = <1>; + }; + }; diff --git a/Documentation/devicetree/bindings/net/hisilicon-femac-mdio.txt b/Documentation/devicetree/bindings/net/hisilicon-femac-mdio.txt deleted file mode 100644 index 23a39a309d17..000000000000 --- a/Documentation/devicetree/bindings/net/hisilicon-femac-mdio.txt +++ /dev/null @@ -1,22 +0,0 @@ -Hisilicon Fast Ethernet MDIO Controller interface - -Required properties: -- compatible: should be "hisilicon,hisi-femac-mdio". -- reg: address and length of the register set for the device. -- clocks: A phandle to the reference clock for this device. - -- PHY subnode: inherits from phy binding [1] -[1] Documentation/devicetree/bindings/net/phy.txt - -Example: -mdio: mdio@10091100 { - compatible = "hisilicon,hisi-femac-mdio"; - reg = <0x10091100 0x10>; - clocks = <&crg HI3516CV300_MDIO_CLK>; - #address-cells = <1>; - #size-cells = <0>; - - phy0: phy@1 { - reg = <1>; - }; -}; From patchwork Thu Mar 7 11:34:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yang Xiwen via B4 Relay X-Patchwork-Id: 1909196 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=L5PQQ5AB; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2604:1380:4601:e00::3; helo=am.mirrors.kernel.org; envelope-from=devicetree+bounces-49074-incoming-dt=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from am.mirrors.kernel.org (am.mirrors.kernel.org [IPv6:2604:1380:4601:e00::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Tr6fm0nQ7z1yX3 for ; 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andrew Lunn , Heiner Kallweit , Russell King Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Yang Xiwen , Krzysztof Kozlowski X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1709811287; l=1118; i=forbidden405@outlook.com; s=20230724; h=from:subject:message-id; bh=zFRj07D287wM/dCKue4SsEqnuuC7qPQ9ydZbNJ2lxsQ=; b=+iZ7saWYkk7PHCMwIj2k9K+iHDcqAgrSFLzPLIoK9KP6YQE8VRjNQxWs7huG3CKRWC1LKU24F 8+EQScfMDYNCHlqh1adhv0N4r4dlbZsIZ6EZMMDoyeyfzbEZsXkrVnc X-Developer-Key: i=forbidden405@outlook.com; a=ed25519; pk=qOD5jhp891/Xzc+H/PZ8LWVSWE3O/XCQnAg+5vdU2IU= X-Endpoint-Received: by B4 Relay for forbidden405@outlook.com/20230724 with auth_id=67 X-Original-From: Yang Xiwen Reply-To: From: Yang Xiwen This integrated MDIO bus does not have a dedicated clock. Remove it. The old binding is wrong. Acked-by: Krzysztof Kozlowski Signed-off-by: Yang Xiwen --- Documentation/devicetree/bindings/net/hisilicon,hisi-femac-mdio.yaml | 5 ----- 1 file changed, 5 deletions(-) diff --git a/Documentation/devicetree/bindings/net/hisilicon,hisi-femac-mdio.yaml b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac-mdio.yaml index 36def9d5eecd..dea1bcc27381 100644 --- a/Documentation/devicetree/bindings/net/hisilicon,hisi-femac-mdio.yaml +++ b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac-mdio.yaml @@ -19,13 +19,9 @@ properties: reg: maxItems: 1 - clocks: - maxItems: 1 - required: - compatible - reg - - clocks unevaluatedProperties: false @@ -34,7 +30,6 @@ examples: mdio@10091100 { compatible = "hisilicon,hisi-femac-mdio"; reg = <0x10091100 0x20>; - clocks = <&clk_mdio>; #address-cells = <1>; #size-cells = <0>; From patchwork Thu Mar 7 11:34:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yang Xiwen via B4 Relay X-Patchwork-Id: 1909197 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Thu, 7 Mar 2024 11:34:49 +0000 (UTC) From: Yang Xiwen via B4 Relay Date: Thu, 07 Mar 2024 19:34:50 +0800 Subject: [PATCH net-next v9 4/9] dt-bindings: net: convert hisi-femac.txt to YAML Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240307-net-v9-4-6e0cf3e6584d@outlook.com> References: <20240307-net-v9-0-6e0cf3e6584d@outlook.com> In-Reply-To: <20240307-net-v9-0-6e0cf3e6584d@outlook.com> To: Yisen Zhuang , Salil Mehta , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andrew Lunn , Heiner Kallweit , Russell King Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Yang Xiwen X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1709811287; l=5220; i=forbidden405@outlook.com; s=20230724; h=from:subject:message-id; bh=uiezMY2DCteYHM0P+l+HGnsL5XUDuLgoCSyIIdl/Lc4=; b=HummQZy6B+cyoBBY2k7pxtBhG3NUCeUvMyaTQZH7zi6VlZzwUpUI1Arv15UsVOfXy0JeFfyzr yQkZhqgAvAPAxd3CuOGzQWzaIIjflUr72W+IHJaxkno1RuHY8vtcJCW X-Developer-Key: i=forbidden405@outlook.com; a=ed25519; pk=qOD5jhp891/Xzc+H/PZ8LWVSWE3O/XCQnAg+5vdU2IU= X-Endpoint-Received: by B4 Relay for forbidden405@outlook.com/20230724 with auth_id=67 X-Original-From: Yang Xiwen Reply-To: From: Yang Xiwen Convert the old text binding to new YAML. While at it, make some changes to the binding: - The version numbers are not documented publicly. The version also does not change programming interface. Remove it until it's really needed. - A few clocks are missing in old binding file. Add them to match the real hardware. Signed-off-by: Yang Xiwen Reviewed-by: Krzysztof Kozlowski --- .../bindings/net/hisilicon,hisi-femac.yaml | 87 ++++++++++++++++++++++ .../devicetree/bindings/net/hisilicon-femac.txt | 41 ---------- 2 files changed, 87 insertions(+), 41 deletions(-) diff --git a/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml new file mode 100644 index 000000000000..3344d3bfefb8 --- /dev/null +++ b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml @@ -0,0 +1,87 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/hisilicon,hisi-femac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hisilicon Fast Ethernet MAC controller + +maintainers: + - Yang Xiwen + +allOf: + - $ref: ethernet-controller.yaml + +properties: + compatible: + enum: + - hisilicon,hi3516cv300-femac + + reg: + items: + - description: The first region is the MAC core register base and size. + - description: The second region is the global MAC control register. + + interrupts: + maxItems: 1 + + clocks: + items: + - description: MAC main clock + - description: MAC bus interface clock + - description: PHY clock + + clock-names: + items: + - const: mac + - const: macif + - const: phy + + resets: + items: + - description: MAC reset signal + - description: PHY reset signal + + reset-names: + items: + - const: mac + - const: phy + + hisilicon,phy-reset-delays-us: + description: PHY reset timing requirement (in micro seconds). + The integrated PHY usually have a special reset timing sequence and must + interact with MAC controller to accomplish the entire reset procedure. So + these properties belong to MAC controller, not PHY. + items: + - description: pre-reset delay for PHY + - description: reset pulse for PHY + - description: post-reset delay for PHY + +required: + - compatible + - reg + - interrupts + - clocks + - resets + - reset-names + - phy-mode + - phy-handle + - hisilicon,phy-reset-delays-us + +unevaluatedProperties: false + +examples: + - | + ethernet@10090000 { + compatible = "hisilicon,hi3516cv300-femac"; + reg = <0x10090000 0x1000>, <0x10091300 0x200>; + interrupts = <12>; + clocks = <&clk_femac>, <&clk_femacif>, <&clk_fephy>; + clock-names = "mac", "macif", "phy"; + resets = <&crg 0xec 0>, <&crg 0xec 3>; + reset-names = "mac", "phy"; + mac-address = [00 00 00 00 00 00]; + phy-mode = "mii"; + phy-handle = <&fephy>; + hisilicon,phy-reset-delays-us = <10000 20000 20000>; + }; diff --git a/Documentation/devicetree/bindings/net/hisilicon-femac.txt b/Documentation/devicetree/bindings/net/hisilicon-femac.txt deleted file mode 100644 index 5f96976f3cea..000000000000 --- a/Documentation/devicetree/bindings/net/hisilicon-femac.txt +++ /dev/null @@ -1,41 +0,0 @@ -Hisilicon Fast Ethernet MAC controller - -Required properties: -- compatible: should contain one of the following version strings: - * "hisilicon,hisi-femac-v1" - * "hisilicon,hisi-femac-v2" - and the soc string "hisilicon,hi3516cv300-femac". -- reg: specifies base physical address(s) and size of the device registers. - The first region is the MAC core register base and size. - The second region is the global MAC control register. -- interrupts: should contain the MAC interrupt. -- clocks: A phandle to the MAC main clock. -- resets: should contain the phandle to the MAC reset signal(required) and - the PHY reset signal(optional). -- reset-names: should contain the reset signal name "mac"(required) - and "phy"(optional). -- phy-mode: see ethernet.txt [1]. -- phy-handle: see ethernet.txt [1]. -- hisilicon,phy-reset-delays-us: triplet of delays if PHY reset signal given. - The 1st cell is reset pre-delay in micro seconds. - The 2nd cell is reset pulse in micro seconds. - The 3rd cell is reset post-delay in micro seconds. - -The MAC address will be determined using the optional properties -defined in ethernet.txt[1]. - -[1] Documentation/devicetree/bindings/net/ethernet.txt - -Example: - hisi_femac: ethernet@10090000 { - compatible = "hisilicon,hi3516cv300-femac","hisilicon,hisi-femac-v2"; - reg = <0x10090000 0x1000>,<0x10091300 0x200>; - interrupts = <12>; - clocks = <&crg HI3518EV200_ETH_CLK>; - resets = <&crg 0xec 0>,<&crg 0xec 3>; - reset-names = "mac","phy"; - mac-address = [00 00 00 00 00 00]; - phy-mode = "mii"; - phy-handle = <&phy0>; - hisilicon,phy-reset-delays-us = <10000 20000 20000>; - }; From patchwork Thu Mar 7 11:34:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yang Xiwen via B4 Relay X-Patchwork-Id: 1909198 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=cGV7TXmf; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2604:1380:4601:e00::3; helo=am.mirrors.kernel.org; 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andrew Lunn , Heiner Kallweit , Russell King Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Yang Xiwen , Krzysztof Kozlowski X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1709811287; l=2289; i=forbidden405@outlook.com; s=20230724; h=from:subject:message-id; bh=4fkGrr79J0kJPETyUJ+upr3jatyv9l4bbxNa0d6pOpo=; b=yF6Gx/oIFBH+QWLXV0eN7Eef9X95SzYrHB731UFAKoOQnbjbgNaCe+fXI+uRjCXp7glRixFZN 3QSQL+2OC/pASE+rIGPMuKRZgXLYqZw+Mwg+uRt8K3mN8wt6vNyS3po X-Developer-Key: i=forbidden405@outlook.com; a=ed25519; pk=qOD5jhp891/Xzc+H/PZ8LWVSWE3O/XCQnAg+5vdU2IU= X-Endpoint-Received: by B4 Relay for forbidden405@outlook.com/20230724 with auth_id=67 X-Original-From: Yang Xiwen Reply-To: From: Yang Xiwen FEMAC core always has an integrated MDIO bus mapped in its address space. Add required properties '#address-cells', 'size-cells', 'ranges' and MDIO bus subnode. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Yang Xiwen --- .../bindings/net/hisilicon,hisi-femac.yaml | 30 ++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml index 3344d3bfefb8..5cd2331668bc 100644 --- a/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml +++ b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml @@ -22,6 +22,15 @@ properties: - description: The first region is the MAC core register base and size. - description: The second region is the global MAC control register. + ranges: + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 1 + interrupts: maxItems: 1 @@ -57,9 +66,16 @@ properties: - description: reset pulse for PHY - description: post-reset delay for PHY +patternProperties: + 'mdio@[0-9a-f]+': + $ref: hisilicon,hisi-femac-mdio.yaml# + required: - compatible - reg + - ranges + - '#address-cells' + - '#size-cells' - interrupts - clocks - resets @@ -75,6 +91,9 @@ examples: ethernet@10090000 { compatible = "hisilicon,hi3516cv300-femac"; reg = <0x10090000 0x1000>, <0x10091300 0x200>; + ranges = <0x0 0x10090000 0x10000>; + #address-cells = <1>; + #size-cells = <1>; interrupts = <12>; clocks = <&clk_femac>, <&clk_femacif>, <&clk_fephy>; clock-names = "mac", "macif", "phy"; @@ -84,4 +103,15 @@ examples: phy-mode = "mii"; phy-handle = <&fephy>; hisilicon,phy-reset-delays-us = <10000 20000 20000>; + + mdio@1100 { + compatible = "hisilicon,hisi-femac-mdio"; + reg = <0x1100 0x20>; + #address-cells = <1>; + #size-cells = <0>; + + phy@1 { + reg = <1>; + }; + }; }; From patchwork Thu Mar 7 11:34:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yang Xiwen via B4 Relay X-Patchwork-Id: 1909199 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=nHoekiVR; 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Thu, 7 Mar 2024 11:34:49 +0000 (UTC) From: Yang Xiwen via B4 Relay Date: Thu, 07 Mar 2024 19:34:52 +0800 Subject: [PATCH net-next v9 6/9] dt-bindings: net: hisi-femac: add binding for Hi3798MV200 FEMAC core Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240307-net-v9-6-6e0cf3e6584d@outlook.com> References: <20240307-net-v9-0-6e0cf3e6584d@outlook.com> In-Reply-To: <20240307-net-v9-0-6e0cf3e6584d@outlook.com> To: Yisen Zhuang , Salil Mehta , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andrew Lunn , Heiner Kallweit , Russell King Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Yang Xiwen X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1709811287; l=834; i=forbidden405@outlook.com; s=20230724; h=from:subject:message-id; bh=5BWYBEwUYlHXBQkC5dFDbigUBgjxRE1IxBueme4TLEM=; b=O7e98hdy3R+731XT9ZPwOAQuxiBXV4WY8pe3OHfvOCGqHGRoOfdNunvoz8YVLFIYZuHYaJYVW HlRCy8ZUgYwBO8oLM3xwKsbnJVp+JtfzsFr4shlniFRc/SAHppWe4yR X-Developer-Key: i=forbidden405@outlook.com; a=ed25519; pk=qOD5jhp891/Xzc+H/PZ8LWVSWE3O/XCQnAg+5vdU2IU= X-Endpoint-Received: by B4 Relay for forbidden405@outlook.com/20230724 with auth_id=67 X-Original-From: Yang Xiwen Reply-To: From: Yang Xiwen HiSilicon FEMAC core is also found on Hi3798MV200 SoC. Document it in binding. Signed-off-by: Yang Xiwen # Conflicts: # Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml --- Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml index 5cd2331668bc..4f8a07864eb4 100644 --- a/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml +++ b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml @@ -16,6 +16,7 @@ properties: compatible: enum: - hisilicon,hi3516cv300-femac + - hisilicon,hi3798mv200-femac reg: items: