From patchwork Wed Mar 6 06:16:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?WWFuZyBKaWFsb25nIOadqOS9s+m+mQ==?= X-Patchwork-Id: 1908549 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=139.178.88.99; helo=sv.mirrors.kernel.org; envelope-from=devicetree+bounces-48626-incoming-dt=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org [139.178.88.99]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TqMZP6SBkz1yX3 for ; Wed, 6 Mar 2024 17:13:49 +1100 (AEDT) Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id 73708284F54 for ; Wed, 6 Mar 2024 06:13:48 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id A3B8D1BDCF; Wed, 6 Mar 2024 06:13:44 +0000 (UTC) X-Original-To: devicetree@vger.kernel.org Received: from bg1.exmail.qq.com (bg1.exmail.qq.com [114.132.77.159]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 62DC51B7E5; Wed, 6 Mar 2024 06:13:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=114.132.77.159 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709705624; cv=none; b=j8M2xolPMVs14h3XUm3mkGtRKGTy6QH7nU6pjtxetLeNU896qxjiXULCaBkzyTVkuGuQXfoaaP7ilnPXnat8OERSY6oo2P3zF4Ot2LcSurpWABzPBy7etFa81PjX+cOoWzPX+QRnAb5iNgc+oBQJYOc7l5AnsFNoR0ZFr7qAKr0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709705624; c=relaxed/simple; bh=tlq2g2nlfO8hH8i4zeibwVPijfkfMjcm2SA6C4dQypI=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=qn+J8DGWq251aRDj55nTmrkoB6nvD/0NDLSwLtYPBlITZ9RMQz/3ML5TunwcRvfDVy3/zEUMPI/lRv0CvkoVFncO+YDKHPX8DFmBgK0T9RxKVsFgne38u8dvBCzynZSgQwpETuVBAt3l3SjG6sECVBfiejeabG/zKlLSBePP2go= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=shingroup.cn; spf=pass smtp.mailfrom=shingroup.cn; arc=none smtp.client-ip=114.132.77.159 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=shingroup.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=shingroup.cn X-QQ-mid: bizesmtp79t1709705539t7dq31o3 X-QQ-Originating-IP: NCw4+/Q9USsflDJBmpT7/46+g+hPwy5cB3WlwgYr7sI= Received: from HX01040022.powercore.com.cn ( [223.112.234.130]) by bizesmtp.qq.com (ESMTP) with id ; Wed, 06 Mar 2024 14:12:17 +0800 (CST) X-QQ-SSF: 01400000000000B0B000000A0000000 X-QQ-FEAT: C46Rb8GPIEemHKu/k6HngzPWI4Sro/K2jOZ6+nhYm/itjZ15pS2MBSf9WT4e9 mlr6jVRajTCCaJrTk6mFFBVexQeSUTmNuQ83shY+cW57orGqDR+32Hh1BwVkjn4HdY0K89E SuLTWTX/IjLWee5mdFN+7QTiIob62s8kK8OqZjroC+ur2l6NBm7ghXlNVqWInUaI6qR4vNi wTukssOTPrW15glNQGzjr+E0CajIIS02BjBVFUmYOKA8v5zd5wpd7Uu5xDIUozRkn5jZNHP UxBZmdnp6fcRvvlqXJOtasV1zXpAk+zMMX0fbb5DqQMtUdw7rbtcW4pefka4sBC8FwtereT eG/EkLv0NyWx4M1PCxMzF4l0XlKhIAshlk541gwDrfwEuM2VBbPeLa0mNvGB9/HxZkkNv/v 5DSkc97eGqhT1WolQksgHhOW3/joQyhM X-QQ-GoodBg: 2 X-BIZMAIL-ID: 5249391986606984289 From: "JiaLong.Yang" To: Jialong Yang , Will Deacon , Mark Rutland , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: shenghui.qu@shingroup.cn, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 1/2] dt-bindings: perf: Support uncore NI-700 PMU Date: Wed, 6 Mar 2024 14:16:02 +0800 Message-Id: <7f2576291e51043b33296a2cd9e21263d16ca077.1709694173.git.jialong.yang@shingroup.cn> In-Reply-To: References: Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:shingroup.cn:qybglogicsvrgz:qybglogicsvrgz6a-1 Add file corresponding to hx_arm_ni.c introducing ARM NI-700 PMU driver for HX. Signed-off-by: JiaLong.Yang --- v1 --> v2: 1. Submit dt-bindings file Seperately. 2. Do some check: ~ #: make dt_binding_check DT_SCHEMA_FILES=perf LINT Documentation/devicetree/bindings CHKDT Documentation/devicetree/bindings/processed-schema.json SCHEMA Documentation/devicetree/bindings/processed-schema.json DTEX Documentation/devicetree/bindings/perf/hx,c2000-arm-ni.example.dts DTC_CHK Documentation/devicetree/bindings/perf/hx,c2000-arm-ni.example.dtb v2 --> v3: 1. Change vendor from hx to hexin. 2. Submit driver and dt-bindings files together. 3. Delete pccs-id property. Use alias-id to do this. 4. There are at least one interrupt line for the hardware and driver for handling counter overflow. 5. Use 4 spaces for example indentation in yaml file. .../bindings/perf/hexin,c2000-arm-ni.yaml | 51 +++++++++++++++++++ MAINTAINERS | 6 +++ 2 files changed, 57 insertions(+) create mode 100644 Documentation/devicetree/bindings/perf/hexin,c2000-arm-ni.yaml diff --git a/Documentation/devicetree/bindings/perf/hexin,c2000-arm-ni.yaml b/Documentation/devicetree/bindings/perf/hexin,c2000-arm-ni.yaml new file mode 100644 index 000000000000..b2641ee84d60 --- /dev/null +++ b/Documentation/devicetree/bindings/perf/hexin,c2000-arm-ni.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/perf/hexin,c2000-arm-ni.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: HX-C2000 NI (Network-on-chip Interconnect) Performance Monitors + +maintainers: + - Jialong Yang + +properties: + compatible: + enum: + - hexin,c2000-arm-ni + + reg: + items: + - description: Physical address of the base (PERIPHBASE) and + size of the whole NI configuration address space. + + interrupts: + minItems: 1 + items: + - description: Overflow interrupt for clock domain 0 + - description: Overflow interrupt for clock domain 1 + - description: Overflow interrupt for clock domain 2 + - description: Generally, one interrupt line for one PMU. But this also + support one interrupt line for a NI if merged. + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + #include + #include + + aliases { + ni-pmu0 = &nipmu0; + }; + + nipmu0: pmu@23ff0000 { + compatible = "hexin,c2000-arm-ni"; + reg = <0x2b420000 0x10000>; + interrupts = ; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 4f298c4187fb..4b664cec98a7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -18890,6 +18890,12 @@ L: linux-riscv@lists.infradead.org S: Maintained F: arch/riscv/boot/dts/thead/ +HX ARM-NI-700 PMU DRIVERS +M: Jialong Yang +S: Supported +F: Documentation/devicetree/bindings/perf/hexin,c2000-arm-ni.yaml +F: drivers/perf/hx_arm_ni.c + RNBD BLOCK DRIVERS M: Md. Haris Iqbal M: Jack Wang