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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andrew Lunn , Heiner Kallweit , Russell King Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Yang Xiwen , Krzysztof Kozlowski X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1709110945; l=2517; i=forbidden405@outlook.com; s=20240228; h=from:subject:message-id; bh=stv+a/mRLJaLswc2WeXjirfjJSRDl5txIs38K87wIhs=; b=i1QaEYVqRNc6pkZ4uX161aYrm7OD2YSAFoOgERKGJfSFK2ZjbiYbDqqEDwyy5cIIYKnLtKI6J HK+Uzvx/VM+AbdcME0LUNo5her3rhWVIx26dTSG3v6MXupJM28hiP4z X-Developer-Key: i=forbidden405@outlook.com; a=ed25519; pk=KAWv6ZzFsT54MGllOczJgFiWB+DuayEmyn24iiVVThU= X-Endpoint-Received: by B4 Relay for forbidden405@outlook.com/20240228 with auth_id=136 X-Original-From: Yang Xiwen Reply-To: From: Yang Xiwen convert the old text binding to modern YAML based binding. No semantic change. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Yang Xiwen --- .../bindings/net/hisilicon,hisi-femac-mdio.yaml | 44 ++++++++++++++++++++++ .../bindings/net/hisilicon-femac-mdio.txt | 22 ----------- 2 files changed, 44 insertions(+), 22 deletions(-) diff --git a/Documentation/devicetree/bindings/net/hisilicon,hisi-femac-mdio.yaml b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac-mdio.yaml new file mode 100644 index 000000000000..36def9d5eecd --- /dev/null +++ b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac-mdio.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/hisilicon,hisi-femac-mdio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: HiSilicon FEMAC MDIO bus + +maintainers: + - Yang Xiwen + +allOf: + - $ref: mdio.yaml# + +properties: + compatible: + const: hisilicon,hisi-femac-mdio + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - clocks + +unevaluatedProperties: false + +examples: + - | + mdio@10091100 { + compatible = "hisilicon,hisi-femac-mdio"; + reg = <0x10091100 0x20>; + clocks = <&clk_mdio>; + #address-cells = <1>; + #size-cells = <0>; + + phy@1 { + reg = <1>; + }; + }; diff --git a/Documentation/devicetree/bindings/net/hisilicon-femac-mdio.txt b/Documentation/devicetree/bindings/net/hisilicon-femac-mdio.txt deleted file mode 100644 index 23a39a309d17..000000000000 --- a/Documentation/devicetree/bindings/net/hisilicon-femac-mdio.txt +++ /dev/null @@ -1,22 +0,0 @@ -Hisilicon Fast Ethernet MDIO Controller interface - -Required properties: -- compatible: should be "hisilicon,hisi-femac-mdio". -- reg: address and length of the register set for the device. -- clocks: A phandle to the reference clock for this device. - -- PHY subnode: inherits from phy binding [1] -[1] Documentation/devicetree/bindings/net/phy.txt - -Example: -mdio: mdio@10091100 { - compatible = "hisilicon,hisi-femac-mdio"; - reg = <0x10091100 0x10>; - clocks = <&crg HI3516CV300_MDIO_CLK>; - #address-cells = <1>; - #size-cells = <0>; - - phy0: phy@1 { - reg = <1>; - }; -}; From patchwork Wed Feb 28 09:02:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yang Xiwen via B4 Relay X-Patchwork-Id: 1905625 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=KRbbelZu; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=147.75.48.161; helo=sy.mirrors.kernel.org; envelope-from=devicetree+bounces-46722-incoming-dt=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org [147.75.48.161]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Tl7fW5RYJz23qX for ; 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andrew Lunn , Heiner Kallweit , Russell King Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Yang Xiwen , Krzysztof Kozlowski X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1709110945; l=1118; i=forbidden405@outlook.com; s=20240228; h=from:subject:message-id; bh=zFRj07D287wM/dCKue4SsEqnuuC7qPQ9ydZbNJ2lxsQ=; b=wccrlFqnkY16QlFTzC49WXlslqsmco/SZT7/gLpofD10XQu6VgR2J4xCkaDkluMduEWYG/6pp 2YAoLrTNZSVAutvsGFHiNX4r76Gf7flSLqzD45CUlrqNZpViWR6tCgV X-Developer-Key: i=forbidden405@outlook.com; a=ed25519; pk=KAWv6ZzFsT54MGllOczJgFiWB+DuayEmyn24iiVVThU= X-Endpoint-Received: by B4 Relay for forbidden405@outlook.com/20240228 with auth_id=136 X-Original-From: Yang Xiwen Reply-To: From: Yang Xiwen This integrated MDIO bus does not have a dedicated clock. Remove it. The old binding is wrong. Acked-by: Krzysztof Kozlowski Signed-off-by: Yang Xiwen --- Documentation/devicetree/bindings/net/hisilicon,hisi-femac-mdio.yaml | 5 ----- 1 file changed, 5 deletions(-) diff --git a/Documentation/devicetree/bindings/net/hisilicon,hisi-femac-mdio.yaml b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac-mdio.yaml index 36def9d5eecd..dea1bcc27381 100644 --- a/Documentation/devicetree/bindings/net/hisilicon,hisi-femac-mdio.yaml +++ b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac-mdio.yaml @@ -19,13 +19,9 @@ properties: reg: maxItems: 1 - clocks: - maxItems: 1 - required: - compatible - reg - - clocks unevaluatedProperties: false @@ -34,7 +30,6 @@ examples: mdio@10091100 { compatible = "hisilicon,hisi-femac-mdio"; reg = <0x10091100 0x20>; - clocks = <&clk_mdio>; #address-cells = <1>; #size-cells = <0>; From patchwork Wed Feb 28 09:02:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yang Xiwen via B4 Relay X-Patchwork-Id: 1905628 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Wed, 28 Feb 2024 09:02:26 +0000 (UTC) From: Yang Xiwen via B4 Relay Date: Wed, 28 Feb 2024 17:02:28 +0800 Subject: [PATCH net-next v6 04/11] dt-bindings: net: convert hisi-femac.txt to YAML Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240228-net-v6-4-6d78d3d598c1@outlook.com> References: <20240228-net-v6-0-6d78d3d598c1@outlook.com> In-Reply-To: <20240228-net-v6-0-6d78d3d598c1@outlook.com> To: Yisen Zhuang , Salil Mehta , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andrew Lunn , Heiner Kallweit , Russell King Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Yang Xiwen X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1709110945; l=4845; i=forbidden405@outlook.com; s=20240228; h=from:subject:message-id; bh=PSEYqEoYzlBBu6yX+HTyEhlHFF2ZYTm301mnnQnq38Y=; b=ZP584DCe7m2JsV2i8t41Oc/Bj1Kq+fSH3N/8PxPPsyp++ETHiLDLeL1UpRhPuRsFdrWujvWQt vUQNDB2HqcADmTzrtd9dSG3y+D/ioASCxCIHwVpApWhcwq0OohvsMmo X-Developer-Key: i=forbidden405@outlook.com; a=ed25519; pk=KAWv6ZzFsT54MGllOczJgFiWB+DuayEmyn24iiVVThU= X-Endpoint-Received: by B4 Relay for forbidden405@outlook.com/20240228 with auth_id=136 X-Original-From: Yang Xiwen Reply-To: From: Yang Xiwen convert the old text biinding to new YAML. No semantic change. Signed-off-by: Yang Xiwen --- .../bindings/net/hisilicon,hisi-femac.yaml | 82 ++++++++++++++++++++++ .../devicetree/bindings/net/hisilicon-femac.txt | 41 ----------- 2 files changed, 82 insertions(+), 41 deletions(-) diff --git a/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml new file mode 100644 index 000000000000..016e9e409a30 --- /dev/null +++ b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml @@ -0,0 +1,82 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/hisilicon,hisi-femac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hisilicon Fast Ethernet MAC controller + +maintainers: + - Yang Xiwen + +allOf: + - $ref: ethernet-controller.yaml + +properties: + compatible: + items: + - enum: + - hisilicon,hi3516cv300-femac + - enum: + - hisilicon,hisi-femac-v1 + - hisilicon,hisi-femac-v2 + + reg: + items: + - description: The first region is the MAC core register base and size. + - description: The second region is the global MAC control register. + + interrupts: + maxItems: 1 + + clocks: + items: + - description: MAC main clock + + resets: + items: + - description: MAC reset signal + - description: PHY reset signal + + reset-names: + items: + - const: mac + - const: phy + + hisilicon,phy-reset-delays-us: + description: PHY reset timing requirement (in micro seconds). + The integrated PHY usually have a special reset timing sequence and must + interact with MAC controller to accomplish the entire reset procedure. So + these properties belong to MAC controller, not PHY. + items: + - description: pre-reset delay for PHY + - description: reset pulse for PHY + - description: post-reset delay for PHY + +required: + - compatible + - reg + - interrupts + - clocks + - resets + - reset-names + - phy-mode + - phy-handle + - hisilicon,phy-reset-delays-us + +unevaluatedProperties: false + +examples: + - | + ethernet@10090000 { + compatible = "hisilicon,hi3516cv300-femac", "hisilicon,hisi-femac-v2"; + reg = <0x10090000 0x1000>, <0x10091300 0x200>; + interrupts = <12>; + clocks = <&clk_femac>; + resets = <&crg 0xec 0>, <&crg 0xec 3>; + reset-names = "mac", "phy"; + mac-address = [00 00 00 00 00 00]; + phy-mode = "mii"; + phy-handle = <&fephy>; + hisilicon,phy-reset-delays-us = <10000 20000 20000>; + }; diff --git a/Documentation/devicetree/bindings/net/hisilicon-femac.txt b/Documentation/devicetree/bindings/net/hisilicon-femac.txt deleted file mode 100644 index 5f96976f3cea..000000000000 --- a/Documentation/devicetree/bindings/net/hisilicon-femac.txt +++ /dev/null @@ -1,41 +0,0 @@ -Hisilicon Fast Ethernet MAC controller - -Required properties: -- compatible: should contain one of the following version strings: - * "hisilicon,hisi-femac-v1" - * "hisilicon,hisi-femac-v2" - and the soc string "hisilicon,hi3516cv300-femac". -- reg: specifies base physical address(s) and size of the device registers. - The first region is the MAC core register base and size. - The second region is the global MAC control register. -- interrupts: should contain the MAC interrupt. -- clocks: A phandle to the MAC main clock. -- resets: should contain the phandle to the MAC reset signal(required) and - the PHY reset signal(optional). -- reset-names: should contain the reset signal name "mac"(required) - and "phy"(optional). -- phy-mode: see ethernet.txt [1]. -- phy-handle: see ethernet.txt [1]. -- hisilicon,phy-reset-delays-us: triplet of delays if PHY reset signal given. - The 1st cell is reset pre-delay in micro seconds. - The 2nd cell is reset pulse in micro seconds. - The 3rd cell is reset post-delay in micro seconds. - -The MAC address will be determined using the optional properties -defined in ethernet.txt[1]. - -[1] Documentation/devicetree/bindings/net/ethernet.txt - -Example: - hisi_femac: ethernet@10090000 { - compatible = "hisilicon,hi3516cv300-femac","hisilicon,hisi-femac-v2"; - reg = <0x10090000 0x1000>,<0x10091300 0x200>; - interrupts = <12>; - clocks = <&crg HI3518EV200_ETH_CLK>; - resets = <&crg 0xec 0>,<&crg 0xec 3>; - reset-names = "mac","phy"; - mac-address = [00 00 00 00 00 00]; - phy-mode = "mii"; - phy-handle = <&phy0>; - hisilicon,phy-reset-delays-us = <10000 20000 20000>; - }; From patchwork Wed Feb 28 09:02:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yang Xiwen via B4 Relay X-Patchwork-Id: 1905627 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=kedKpLZz; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2604:1380:45e3:2400::1; helo=sv.mirrors.kernel.org; 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andrew Lunn , Heiner Kallweit , Russell King Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Yang Xiwen X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1709110945; l=1304; i=forbidden405@outlook.com; s=20240228; h=from:subject:message-id; bh=QaLk+lI8wjJQd0lZBh2cmavdezy+qKZvyIpwbApopOY=; b=l5U1wW1kB4lGB6SEiVqjtKkYCq6xwMOu/+uEl3FnZaD8SWhssPq8y+GR5HJB9WRVS9mUOBF3S hSoU8mLvtiMDm+eSIIVtjBnCUvFQjIfZ2P5Rd0igQM/4494n5xVi07M X-Developer-Key: i=forbidden405@outlook.com; a=ed25519; pk=KAWv6ZzFsT54MGllOczJgFiWB+DuayEmyn24iiVVThU= X-Endpoint-Received: by B4 Relay for forbidden405@outlook.com/20240228 with auth_id=136 X-Original-From: Yang Xiwen Reply-To: From: Yang Xiwen The version numbers are not documented publicly. The version also does not change programming interface. Remove it until it's really needed. Signed-off-by: Yang Xiwen --- Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml index 016e9e409a30..be8e34b48243 100644 --- a/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml +++ b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml @@ -17,9 +17,7 @@ properties: items: - enum: - hisilicon,hi3516cv300-femac - - enum: - - hisilicon,hisi-femac-v1 - - hisilicon,hisi-femac-v2 + - const: hisilicon,hisi-femac reg: items: @@ -69,7 +67,7 @@ unevaluatedProperties: false examples: - | ethernet@10090000 { - compatible = "hisilicon,hi3516cv300-femac", "hisilicon,hisi-femac-v2"; + compatible = "hisilicon,hi3516cv300-femac", "hisilicon,hisi-femac"; reg = <0x10090000 0x1000>, <0x10091300 0x200>; interrupts = <12>; clocks = <&clk_femac>; From patchwork Wed Feb 28 09:02:30 2024 Content-Type: text/plain; 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andrew Lunn , Heiner Kallweit , Russell King Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Yang Xiwen X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1709110945; l=1390; i=forbidden405@outlook.com; s=20240228; h=from:subject:message-id; bh=SAqU1dlvXmk1RmH1J0egzZj4SE6kA1y4eeXVDLyRO28=; b=MGeGh9vcJucfrOUy4UwkspwQpi6g+ejOsZjXYNkCGbkGxi9GrfpIG3GLwKNpiugvRIWqvDzaP POnOPWZIkENBl/NuvWCi2MNDZF/rqcDOSrXw5JMfyzs/kW8gyXs7teC X-Developer-Key: i=forbidden405@outlook.com; a=ed25519; pk=KAWv6ZzFsT54MGllOczJgFiWB+DuayEmyn24iiVVThU= X-Endpoint-Received: by B4 Relay for forbidden405@outlook.com/20240228 with auth_id=136 X-Original-From: Yang Xiwen Reply-To: From: Yang Xiwen A few clocks are missing in old binding file. Add them to match the real hardware. Signed-off-by: Yang Xiwen --- .../devicetree/bindings/net/hisilicon,hisi-femac.yaml | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml index be8e34b48243..ba207f2c9ae4 100644 --- a/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml +++ b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml @@ -30,6 +30,14 @@ properties: clocks: items: - description: MAC main clock + - description: MAC bus interface clock + - description: PHY clock + + clock-names: + items: + - const: mac + - const: macif + - const: phy resets: items: @@ -70,7 +78,8 @@ examples: compatible = "hisilicon,hi3516cv300-femac", "hisilicon,hisi-femac"; reg = <0x10090000 0x1000>, <0x10091300 0x200>; interrupts = <12>; - clocks = <&clk_femac>; + clocks = <&clk_femac>, <&clk_femacif>, <&clk_fephy>; + clock-names = "mac", "macif", "phy"; resets = <&crg 0xec 0>, <&crg 0xec 3>; reset-names = "mac", "phy"; mac-address = [00 00 00 00 00 00]; From patchwork Wed Feb 28 09:02:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yang Xiwen via B4 Relay X-Patchwork-Id: 1905629 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=TxXoc0Eo; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=147.75.199.223; helo=ny.mirrors.kernel.org; envelope-from=devicetree+bounces-46730-incoming-dt=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org [147.75.199.223]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Tl7fy5MP0z23qY for ; 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andrew Lunn , Heiner Kallweit , Russell King Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Yang Xiwen X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1709110945; l=1121; i=forbidden405@outlook.com; s=20240228; h=from:subject:message-id; bh=UkM6cazLUUcGm7V+UelgyTmRZYNnC9CwRUbl7j+gA44=; b=f5Z5JfMhFzIZrioziMkhpJB/CbSksX9sZDGw/4dP0dQYJHzTEaL2jb0GFBOtYQQ1738WyKZ4X GWICiPgPUFOCNGnp3xFLFHiUbPWx0lzBribGIcCjE8z3ivD+rsr8FPV X-Developer-Key: i=forbidden405@outlook.com; a=ed25519; pk=KAWv6ZzFsT54MGllOczJgFiWB+DuayEmyn24iiVVThU= X-Endpoint-Received: by B4 Relay for forbidden405@outlook.com/20240228 with auth_id=136 X-Original-From: Yang Xiwen Reply-To: From: Yang Xiwen The old property "phy-mode" should be replaced with the latest "phy-connection-type". Signed-off-by: Yang Xiwen --- Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml index ba207f2c9ae4..6c5888897876 100644 --- a/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml +++ b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml @@ -66,7 +66,7 @@ required: - clocks - resets - reset-names - - phy-mode + - phy-connection-type - phy-handle - hisilicon,phy-reset-delays-us @@ -83,7 +83,7 @@ examples: resets = <&crg 0xec 0>, <&crg 0xec 3>; reset-names = "mac", "phy"; mac-address = [00 00 00 00 00 00]; - phy-mode = "mii"; + phy-connection-type = "mii"; phy-handle = <&fephy>; hisilicon,phy-reset-delays-us = <10000 20000 20000>; }; From patchwork Wed Feb 28 09:02:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yang Xiwen via B4 Relay X-Patchwork-Id: 1905630 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Wed, 28 Feb 2024 09:02:26 +0000 (UTC) From: Yang Xiwen via B4 Relay Date: Wed, 28 Feb 2024 17:02:32 +0800 Subject: [PATCH net-next v6 08/11] dt-bindings: net: hisi-femac: add mandatory MDIO bus subnode Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240228-net-v6-8-6d78d3d598c1@outlook.com> References: <20240228-net-v6-0-6d78d3d598c1@outlook.com> In-Reply-To: <20240228-net-v6-0-6d78d3d598c1@outlook.com> To: Yisen Zhuang , Salil Mehta , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andrew Lunn , Heiner Kallweit , Russell King Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Yang Xiwen X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1709110945; l=2257; i=forbidden405@outlook.com; s=20240228; h=from:subject:message-id; bh=MD9OppYNChwYfG+o7jC+6/9qGjd639+9Q/OQeo2lPDE=; b=GZzpszJU5Lk1WHcFpWaL2FCo4+GVzam2ZcPlapSzzm5ZVst/XdgO4bRL4RTS5n3gUO4uYubDk Rq5HheLT4ZpDfvP6WYD5e+85IW39MwnY4q7DJZi800L5aNEq6csMTd/ X-Developer-Key: i=forbidden405@outlook.com; a=ed25519; pk=KAWv6ZzFsT54MGllOczJgFiWB+DuayEmyn24iiVVThU= X-Endpoint-Received: by B4 Relay for forbidden405@outlook.com/20240228 with auth_id=136 X-Original-From: Yang Xiwen Reply-To: From: Yang Xiwen FEMAC core always has an integrated MDIO bus mapped in its address space. Add required properties '#address-cells', 'size-cells', 'ranges' and MDIO bus subnode. Signed-off-by: Yang Xiwen Reviewed-by: Krzysztof Kozlowski --- .../bindings/net/hisilicon,hisi-femac.yaml | 30 ++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml index 6c5888897876..d56ff8538a86 100644 --- a/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml +++ b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml @@ -24,6 +24,15 @@ properties: - description: The first region is the MAC core register base and size. - description: The second region is the global MAC control register. + ranges: + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 1 + interrupts: maxItems: 1 @@ -59,9 +68,16 @@ properties: - description: reset pulse for PHY - description: post-reset delay for PHY +patternProperties: + 'mdio@[0-9a-f]+': + $ref: hisilicon,hisi-femac-mdio.yaml# + required: - compatible - reg + - ranges + - '#address-cells' + - '#size-cells' - interrupts - clocks - resets @@ -77,6 +93,9 @@ examples: ethernet@10090000 { compatible = "hisilicon,hi3516cv300-femac", "hisilicon,hisi-femac"; reg = <0x10090000 0x1000>, <0x10091300 0x200>; + ranges = <0x0 0x10090000 0x10000>; + #address-cells = <1>; + #size-cells = <1>; interrupts = <12>; clocks = <&clk_femac>, <&clk_femacif>, <&clk_fephy>; clock-names = "mac", "macif", "phy"; @@ -86,4 +105,15 @@ examples: phy-connection-type = "mii"; phy-handle = <&fephy>; hisilicon,phy-reset-delays-us = <10000 20000 20000>; + + mdio@1100 { + compatible = "hisilicon,hisi-femac-mdio"; + reg = <0x1100 0x20>; + #address-cells = <1>; + #size-cells = <0>; + + phy@1 { + reg = <1>; + }; + }; }; From patchwork Wed Feb 28 09:02:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yang Xiwen via B4 Relay X-Patchwork-Id: 1905631 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=IJe6AZHW; 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Wed, 28 Feb 2024 09:02:26 +0000 (UTC) From: Yang Xiwen via B4 Relay Date: Wed, 28 Feb 2024 17:02:33 +0800 Subject: [PATCH net-next v6 09/11] dt-bindings: net: hisi-femac: add binding for Hi3798MV200 FEMAC core Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240228-net-v6-9-6d78d3d598c1@outlook.com> References: <20240228-net-v6-0-6d78d3d598c1@outlook.com> In-Reply-To: <20240228-net-v6-0-6d78d3d598c1@outlook.com> To: Yisen Zhuang , Salil Mehta , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andrew Lunn , Heiner Kallweit , Russell King Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Yang Xiwen X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1709110945; l=785; i=forbidden405@outlook.com; s=20240228; h=from:subject:message-id; bh=COJmDTQSvWrCuczgOVd8svTjkGxYhL4n6fAjqOWpCZY=; b=BRBk7J2qE7S7G9bi3QzqNa6odKfDqKNHbp6g03RevnuAm1PXeDcjwIgnbEdnYWEFqlTmbOifA 19dDDWgGvMLB/B+5oXomn3RkmpCFsYbrlxZX/8FveA2dg6TOXj8zObp X-Developer-Key: i=forbidden405@outlook.com; a=ed25519; pk=KAWv6ZzFsT54MGllOczJgFiWB+DuayEmyn24iiVVThU= X-Endpoint-Received: by B4 Relay for forbidden405@outlook.com/20240228 with auth_id=136 X-Original-From: Yang Xiwen Reply-To: From: Yang Xiwen HiSilicon FEMAC core is also found on Hi3798MV200 SoC. Document it in binding. Signed-off-by: Yang Xiwen --- Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml index d56ff8538a86..0e5e62d2b8aa 100644 --- a/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml +++ b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml @@ -17,6 +17,7 @@ properties: items: - enum: - hisilicon,hi3516cv300-femac + - hisilicon,hi3798mv200-femac - const: hisilicon,hisi-femac reg: