From patchwork Thu Feb 22 12:43:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yang Xiwen via B4 Relay X-Patchwork-Id: 1902753 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=sFy86V0b; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2604:1380:4601:e00::3; helo=am.mirrors.kernel.org; envelope-from=devicetree+bounces-44766-incoming-dt=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from am.mirrors.kernel.org (am.mirrors.kernel.org [IPv6:2604:1380:4601:e00::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TgXrg5QtTz23hc for ; Thu, 22 Feb 2024 23:44:03 +1100 (AEDT) Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id 82B3D1F241E5 for ; Thu, 22 Feb 2024 12:44:01 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id A7E5312EBDC; Thu, 22 Feb 2024 12:43:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="sFy86V0b" X-Original-To: devicetree@vger.kernel.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3221912DD82; Thu, 22 Feb 2024 12:43:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708605822; cv=none; b=AhTndIaOp4F094K8WoI9rd2OnR/zCxo9UGiObPQZVsnMesiPLdGWibrHaZExNdnns6o+FLnASlv0or6F5pgyTySB0DBBZOjChansKQ9GkMT9rDvMj8WfOEUbzwHeXIK451xFAOW8DgllTWaryS4bFUN3aPqLCDrtb9wGHHPb/ac= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708605822; c=relaxed/simple; bh=dU0HjJgUNo33Wr86FpAaPRHjBCYGelpAaLa0iwZ1osU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=IyqPoFUido0G9qRy3PY0TeNqGz1WqH4SQlKLFTbSOXhwH9089Dy1QMNv3A+lVYieF2wplJ5d9hjBEiNLO2NT2+Ftfbcx9wCcG3C9mLvPKEgbGlPPjE6S4oZamPQ8FGddbg21Z+A8UoXL8phbSApXy352Ss6xg76DBG9GDwJOJMo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=sFy86V0b; arc=none smtp.client-ip=10.30.226.201 Received: by smtp.kernel.org (Postfix) with ESMTPS id C4E7DC433C7; Thu, 22 Feb 2024 12:43:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1708605821; bh=dU0HjJgUNo33Wr86FpAaPRHjBCYGelpAaLa0iwZ1osU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=sFy86V0bmpvV1NpzvFQ50N8T2DTKDhx4tka5nj6Usvyfllp4VKsaEBh5q5FP3gLpD UCOJOL2Mi6bYnj1Ahbex1nvB8bpxxEfhNSTiZjQ+zD1QaCTepL9jmPXRTUbe9XV8IP eHXZvsqPyZlkrQXQZN/d+sR3zqxQY0ESg7OTV8K1lAG7JR2ULp51dhcLTKv+pmgDa9 ChqDuPC2EUgaSjONyFYiBHVhZE5ifmMAYTTo5BDfp2gfgnIiCoYTNbkBUPLrc4dtfn TDxSM15MG6687fUXMJNMhnNDYS2XMaccxsw7Hy0zCJ6gb8mE/NypGFFgHYjsy3jCyG Wt9b4uEtrcbFg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id AAEBDC48BF8; Thu, 22 Feb 2024 12:43:41 +0000 (UTC) From: Yang Xiwen via B4 Relay Date: Thu, 22 Feb 2024 20:43:21 +0800 Subject: [PATCH net-next v4 1/6] dt-bindings: net: hisilicon-femac-mdio: convert to YAML Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240222-net-v4-1-eea68f93f090@outlook.com> References: <20240222-net-v4-0-eea68f93f090@outlook.com> In-Reply-To: <20240222-net-v4-0-eea68f93f090@outlook.com> To: Yisen Zhuang , Salil Mehta , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andrew Lunn , Heiner Kallweit , Russell King Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Yang Xiwen X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1708605802; l=2707; i=forbidden405@outlook.com; s=20230724; h=from:subject:message-id; bh=kBNRfWKBQ0id01gl7avKkUC4CeGpm5ZtYlqpv6WG6d8=; b=z8h7WVhMvCqDOAxS7nz/ePDZ0zE/t1zWZkPmj4E2Xmaa5JM686ebtGI5YHp2MZY/Y6wJwYvxI ryr+FCIiwAXB029JDU/DsG37u/5iCqz9IFcxqW2YtUSt1vZKTOAYk3U X-Developer-Key: i=forbidden405@outlook.com; a=ed25519; pk=qOD5jhp891/Xzc+H/PZ8LWVSWE3O/XCQnAg+5vdU2IU= X-Endpoint-Received: by B4 Relay for forbidden405@outlook.com/20230724 with auth_id=67 X-Original-From: Yang Xiwen Reply-To: From: Yang Xiwen For some FEMAC cores, MDIO bus is integrated to the MAC controller. So We don't have a dedicated MDIO bus clock. Also due to the PHY reset procedure, it's required to manage all clocks and resets in the MAC controller driver. MAC controller clock can not be shared with MDIO bus node in dts. Mark the clock optional to resolve this problem. Signed-off-by: Yang Xiwen --- .../bindings/net/hisilicon,hisi-femac-mdio.yaml | 43 ++++++++++++++++++++++ .../bindings/net/hisilicon-femac-mdio.txt | 22 ----------- 2 files changed, 43 insertions(+), 22 deletions(-) diff --git a/Documentation/devicetree/bindings/net/hisilicon,hisi-femac-mdio.yaml b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac-mdio.yaml new file mode 100644 index 000000000000..ee8650ad98fc --- /dev/null +++ b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac-mdio.yaml @@ -0,0 +1,43 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/hisilicon,hisi-femac-mdio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: HiSilicon FEMAC MDIO bus + +maintainers: + - Yang Xiwen + +allOf: + - $ref: mdio.yaml# + +properties: + compatible: + const: hisilicon,hisi-femac-mdio + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + mdio@10091100 { + compatible = "hisilicon,hisi-femac-mdio"; + reg = <0x10091100 0x20>; + clocks = <&clk_mdio>; + #address-cells = <1>; + #size-cells = <0>; + + phy@1 { + reg = <1>; + }; + }; diff --git a/Documentation/devicetree/bindings/net/hisilicon-femac-mdio.txt b/Documentation/devicetree/bindings/net/hisilicon-femac-mdio.txt deleted file mode 100644 index 23a39a309d17..000000000000 --- a/Documentation/devicetree/bindings/net/hisilicon-femac-mdio.txt +++ /dev/null @@ -1,22 +0,0 @@ -Hisilicon Fast Ethernet MDIO Controller interface - -Required properties: -- compatible: should be "hisilicon,hisi-femac-mdio". -- reg: address and length of the register set for the device. -- clocks: A phandle to the reference clock for this device. - -- PHY subnode: inherits from phy binding [1] -[1] Documentation/devicetree/bindings/net/phy.txt - -Example: -mdio: mdio@10091100 { - compatible = "hisilicon,hisi-femac-mdio"; - reg = <0x10091100 0x10>; - clocks = <&crg HI3516CV300_MDIO_CLK>; - #address-cells = <1>; - #size-cells = <0>; - - phy0: phy@1 { - reg = <1>; - }; -}; From patchwork Thu Feb 22 12:43:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yang Xiwen via B4 Relay X-Patchwork-Id: 1902752 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=lYGGSCmK; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=139.178.88.99; helo=sv.mirrors.kernel.org; envelope-from=devicetree+bounces-44770-incoming-dt=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org [139.178.88.99]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TgXrg1P39z23d2 for ; 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andrew Lunn , Heiner Kallweit , Russell King Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Yang Xiwen X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1708605802; l=2357; i=forbidden405@outlook.com; s=20230724; h=from:subject:message-id; bh=8ICAnSLBv8dPhcTYWVHR0AJKAQbZebLk5c3PYvX8hqQ=; b=5TXGKPCxCKZJE9vi91I/BFRQmlRjtAazNf/GxA2ymReFPMiV583iXm+mMFxYGKFRgwZv77Ojd 4E43/yz6COxAjwaaOvCaSlyAWiPHpc6DlxMfpzXjIlv40JqSuHA3nOL X-Developer-Key: i=forbidden405@outlook.com; a=ed25519; pk=qOD5jhp891/Xzc+H/PZ8LWVSWE3O/XCQnAg+5vdU2IU= X-Endpoint-Received: by B4 Relay for forbidden405@outlook.com/20230724 with auth_id=67 X-Original-From: Yang Xiwen Reply-To: From: Yang Xiwen The user documented(Hi3516) is not found in current kernel anymore. And it seems this SoC has been EOL for a long time. While at it, Remove this binding entirely due to recent driver changes. Signed-off-by: Yang Xiwen --- .../devicetree/bindings/net/hisilicon-femac.txt | 41 ---------------------- 1 file changed, 41 deletions(-) diff --git a/Documentation/devicetree/bindings/net/hisilicon-femac.txt b/Documentation/devicetree/bindings/net/hisilicon-femac.txt deleted file mode 100644 index 5f96976f3cea..000000000000 --- a/Documentation/devicetree/bindings/net/hisilicon-femac.txt +++ /dev/null @@ -1,41 +0,0 @@ -Hisilicon Fast Ethernet MAC controller - -Required properties: -- compatible: should contain one of the following version strings: - * "hisilicon,hisi-femac-v1" - * "hisilicon,hisi-femac-v2" - and the soc string "hisilicon,hi3516cv300-femac". -- reg: specifies base physical address(s) and size of the device registers. - The first region is the MAC core register base and size. - The second region is the global MAC control register. -- interrupts: should contain the MAC interrupt. -- clocks: A phandle to the MAC main clock. -- resets: should contain the phandle to the MAC reset signal(required) and - the PHY reset signal(optional). -- reset-names: should contain the reset signal name "mac"(required) - and "phy"(optional). -- phy-mode: see ethernet.txt [1]. -- phy-handle: see ethernet.txt [1]. -- hisilicon,phy-reset-delays-us: triplet of delays if PHY reset signal given. - The 1st cell is reset pre-delay in micro seconds. - The 2nd cell is reset pulse in micro seconds. - The 3rd cell is reset post-delay in micro seconds. - -The MAC address will be determined using the optional properties -defined in ethernet.txt[1]. - -[1] Documentation/devicetree/bindings/net/ethernet.txt - -Example: - hisi_femac: ethernet@10090000 { - compatible = "hisilicon,hi3516cv300-femac","hisilicon,hisi-femac-v2"; - reg = <0x10090000 0x1000>,<0x10091300 0x200>; - interrupts = <12>; - clocks = <&crg HI3518EV200_ETH_CLK>; - resets = <&crg 0xec 0>,<&crg 0xec 3>; - reset-names = "mac","phy"; - mac-address = [00 00 00 00 00 00]; - phy-mode = "mii"; - phy-handle = <&phy0>; - hisilicon,phy-reset-delays-us = <10000 20000 20000>; - }; From patchwork Thu Feb 22 12:43:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yang Xiwen via B4 Relay X-Patchwork-Id: 1902755 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=Wim7ArOc; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2604:1380:4601:e00::3; helo=am.mirrors.kernel.org; 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andrew Lunn , Heiner Kallweit , Russell King Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Yang Xiwen X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1708605802; l=3843; i=forbidden405@outlook.com; s=20230724; h=from:subject:message-id; bh=s74McZo3tz0CRQGXU249Pq+NWVbKcQ+gU6lSPVvGiGw=; b=Ux9CgjbsJPHzU+Zx5d2w/9uRO1P76Bej7dRkQuKK3tS2fryiPKHEVPERaDrd5yTltOdVEoPJv Epk915lkMSRCaqOv5ddOj9lGora3qD4O+8xNslqXk7Af4gOAn14hvzA X-Developer-Key: i=forbidden405@outlook.com; a=ed25519; pk=qOD5jhp891/Xzc+H/PZ8LWVSWE3O/XCQnAg+5vdU2IU= X-Endpoint-Received: by B4 Relay for forbidden405@outlook.com/20230724 with auth_id=67 X-Original-From: Yang Xiwen Reply-To: From: Yang Xiwen Compared to previous txt based binding doc, the following changes are made according to the TRM: - Remove unmaintained Hi3516 SoC, add Hi3798MV200 - add MDIO subnode, because MDIO bus is integrated - add ahb bus clock, phy clock and reset Also remove "hisi-femac-v1/2" binding. The difference between versions is unknown and not documented anywhere. Nor is it used in driver. Remove it until it's needed in the future. Signed-off-by: Yang Xiwen --- .../bindings/net/hisilicon,hisi-femac.yaml | 116 +++++++++++++++++++++ 1 file changed, 116 insertions(+) diff --git a/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml new file mode 100644 index 000000000000..56d7c8a26d0c --- /dev/null +++ b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac.yaml @@ -0,0 +1,116 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/hisilicon,hisi-femac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hisilicon Fast Ethernet MAC controller + +maintainers: + - Yang Xiwen + +allOf: + - $ref: ethernet-controller.yaml + +properties: + compatible: + items: + - enum: + - hisilicon,hi3798mv200-femac + - const: hisilicon,hisi-femac + + reg: + items: + - description: The first region is the MAC core register base and size. + - description: The second region is the global MAC control register. + + ranges: + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 3 + + clock-names: + items: + - const: mac + - const: macif + - const: phy + + resets: + maxItems: 2 + + reset-names: + items: + - const: mac + - const: phy + + hisilicon,phy-reset-delays-us: + items: + - description: The 1st cell is reset pre-delay in micro seconds. + - description: The 2nd cell is reset pulse in micro seconds. + - description: The 3rd cell is reset post-delay in micro seconds. + +patternProperties: + '^mdio@[0-9a-f]+$': + $ref: hisilicon,hisi-femac-mdio.yaml# + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - resets + - reset-names + - phy-connection-type + - phy-handle + - hisilicon,phy-reset-delays-us + +unevaluatedProperties: false + +examples: + - | + #include + + ethernet@9c30000 { + compatible = "hisilicon,hi3798mv200-femac", "hisilicon,hisi-femac"; + reg = <0x9c30000 0x1000>, <0x9c31300 0x200>; + ranges = <0x0 0x9c30000 0x10000>; + #address-cells = <1>; + #size-cells = <1>; + interrupts = ; + clocks = <&clk_femac>, + <&clk_femacif>, + <&clk_fephy>; + clock-names = "mac", "macif", "phy"; + resets = <&crg 0xd0 3>, <&crg 0x388 4>; + reset-names = "mac", "phy"; + phy-handle = <&fephy>; + phy-connection-type = "mii"; + // To be filled by bootloader + mac-address = [00 00 00 00 00 00]; + hisilicon,phy-reset-delays-us = <10000 10000 500000>; + status = "okay"; + + mdio@1100 { + compatible = "hisilicon,hisi-femac-mdio"; + reg = <0x1100 0x20>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + ethernet-phy@1 { + reg = <1>; + #phy-cells = <0>; + }; + }; + };