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Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , Richard Henderson , Eduardo Habkost Subject: [PULL 01/25] hw/input/pckbd: Open-code i8042_setup_a20_line() wrapper Date: Wed, 21 Feb 2024 22:16:01 +0100 Message-ID: <20240221211626.48190-2-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240221211626.48190-1-philmd@linaro.org> References: <20240221211626.48190-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=philmd@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Philippe Mathieu-Daudé Since the named GPIO lines are a "public" interface to the device, we can directly call qdev_connect_gpio_out_named(), making it consistent with how the other A20 input source (port92) is wired. Suggested-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Yanan Wang Message-Id: <20211218130437.1516929-6-f4bug@amsat.org> --- include/hw/input/i8042.h | 1 - hw/i386/pc.c | 3 ++- hw/input/pckbd.c | 5 ----- 3 files changed, 2 insertions(+), 7 deletions(-) diff --git a/include/hw/input/i8042.h b/include/hw/input/i8042.h index 9fb3f8d787..e90f008b66 100644 --- a/include/hw/input/i8042.h +++ b/include/hw/input/i8042.h @@ -89,7 +89,6 @@ struct MMIOKBDState { void i8042_isa_mouse_fake_event(ISAKBDState *isa); -void i8042_setup_a20_line(ISADevice *dev, qemu_irq a20_out); static inline bool i8042_present(void) { diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 28194014f8..9cbc59665f 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1195,7 +1195,8 @@ static void pc_superio_init(ISABus *isa_bus, bool create_fdctrl, port92 = isa_create_simple(isa_bus, TYPE_PORT92); a20_line = qemu_allocate_irqs(handle_a20_line_change, first_cpu, 2); - i8042_setup_a20_line(i8042, a20_line[0]); + qdev_connect_gpio_out_named(DEVICE(i8042), + I8042_A20_LINE, 0, a20_line[0]); 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Wed, 21 Feb 2024 13:16:42 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-block@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Peter Maydell , Paolo Bonzini , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Eduardo Habkost , Richard Henderson , "Michael S. Tsirkin" , Marcel Apfelbaum , Aleksandar Rikalo , Gerd Hoffmann , kvm@vger.kernel.org Subject: [PULL 02/25] hw/sysbus: Inline and remove sysbus_add_io() Date: Wed, 21 Feb 2024 22:16:02 +0100 Message-ID: <20240221211626.48190-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240221211626.48190-1-philmd@linaro.org> References: <20240221211626.48190-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=philmd@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01, T_SPF_HELO_TEMPERROR=0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org sysbus_add_io(...) is a simple wrapper to memory_region_add_subregion(get_system_io(), ...). It is used in 3 places; inline it directly. Rationale: we want to move to an explicit I/O bus, rather that an implicit one. Besides in heterogeneous setup we can have more than one I/O bus. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell Message-Id: <20240216150441.45681-1-philmd@linaro.org> --- include/hw/sysbus.h | 2 -- hw/core/sysbus.c | 6 ------ hw/i386/kvmvapic.c | 2 +- hw/mips/mipssim.c | 2 +- hw/nvram/fw_cfg.c | 5 +++-- 5 files changed, 5 insertions(+), 12 deletions(-) diff --git a/include/hw/sysbus.h b/include/hw/sysbus.h index 3564b7b6a2..14dbc22d0c 100644 --- a/include/hw/sysbus.h +++ b/include/hw/sysbus.h @@ -83,8 +83,6 @@ void sysbus_mmio_map(SysBusDevice *dev, int n, hwaddr addr); void sysbus_mmio_map_overlap(SysBusDevice *dev, int n, hwaddr addr, int priority); void sysbus_mmio_unmap(SysBusDevice *dev, int n); -void sysbus_add_io(SysBusDevice *dev, hwaddr addr, - MemoryRegion *mem); MemoryRegion *sysbus_address_space(SysBusDevice *dev); bool sysbus_realize(SysBusDevice *dev, Error **errp); diff --git a/hw/core/sysbus.c b/hw/core/sysbus.c index 35f902b582..9f1d5b2d6d 100644 --- a/hw/core/sysbus.c +++ b/hw/core/sysbus.c @@ -298,12 +298,6 @@ static char *sysbus_get_fw_dev_path(DeviceState *dev) return g_strdup(qdev_fw_name(dev)); } -void sysbus_add_io(SysBusDevice *dev, hwaddr addr, - MemoryRegion *mem) -{ - memory_region_add_subregion(get_system_io(), addr, mem); -} - MemoryRegion *sysbus_address_space(SysBusDevice *dev) { return get_system_memory(); diff --git a/hw/i386/kvmvapic.c b/hw/i386/kvmvapic.c index f2b0aff479..3be64fba3b 100644 --- a/hw/i386/kvmvapic.c +++ b/hw/i386/kvmvapic.c @@ -727,7 +727,7 @@ static void vapic_realize(DeviceState *dev, Error **errp) VAPICROMState *s = VAPIC(dev); memory_region_init_io(&s->io, OBJECT(s), &vapic_ops, s, "kvmvapic", 2); - sysbus_add_io(sbd, VAPIC_IO_PORT, &s->io); + memory_region_add_subregion(get_system_io(), VAPIC_IO_PORT, &s->io); sysbus_init_ioports(sbd, VAPIC_IO_PORT, 2); option_rom[nb_option_roms].name = "kvmvapic.bin"; diff --git a/hw/mips/mipssim.c b/hw/mips/mipssim.c index a12427b6c8..57c8c33e2b 100644 --- a/hw/mips/mipssim.c +++ b/hw/mips/mipssim.c @@ -226,7 +226,7 @@ mips_mipssim_init(MachineState *machine) qdev_prop_set_uint8(dev, "endianness", DEVICE_LITTLE_ENDIAN); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, env->irq[4]); - sysbus_add_io(SYS_BUS_DEVICE(dev), 0x3f8, + memory_region_add_subregion(get_system_io(), 0x3f8, sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0)); } diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c index e85493d513..6d6b17462d 100644 --- a/hw/nvram/fw_cfg.c +++ b/hw/nvram/fw_cfg.c @@ -1142,6 +1142,7 @@ FWCfgState *fw_cfg_init_io_dma(uint32_t iobase, uint32_t dma_iobase, SysBusDevice *sbd; FWCfgIoState *ios; FWCfgState *s; + MemoryRegion *iomem = get_system_io(); bool dma_requested = dma_iobase && dma_as; dev = qdev_new(TYPE_FW_CFG_IO); @@ -1155,7 +1156,7 @@ FWCfgState *fw_cfg_init_io_dma(uint32_t iobase, uint32_t dma_iobase, sbd = SYS_BUS_DEVICE(dev); sysbus_realize_and_unref(sbd, &error_fatal); ios = FW_CFG_IO(dev); - sysbus_add_io(sbd, iobase, &ios->comb_iomem); + memory_region_add_subregion(iomem, iobase, &ios->comb_iomem); s = FW_CFG(dev); @@ -1163,7 +1164,7 @@ FWCfgState *fw_cfg_init_io_dma(uint32_t iobase, uint32_t dma_iobase, /* 64 bits for the address field */ s->dma_as = dma_as; s->dma_addr = 0; - sysbus_add_io(sbd, dma_iobase, &s->dma_iomem); + memory_region_add_subregion(iomem, dma_iobase, &s->dma_iomem); } return s; From patchwork Wed Feb 21 21:16:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1902409 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=qsM2Tz+l; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org 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Received: from m1x-phil.lan ([176.187.211.34]) by smtp.gmail.com with ESMTPSA id ba20-20020a0560001c1400b0033d640c8942sm7735486wrb.10.2024.02.21.13.16.46 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 21 Feb 2024 13:16:47 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-block@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , BALATON Zoltan , Thomas Huth Subject: [PULL 03/25] hw/ppc/ppc4xx_pci: Remove unused "hw/ppc/ppc.h" header Date: Wed, 21 Feb 2024 22:16:03 +0100 Message-ID: <20240221211626.48190-4-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240221211626.48190-1-philmd@linaro.org> References: <20240221211626.48190-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=philmd@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 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"qemu/units.h" #include "hw/irq.h" -#include "hw/ppc/ppc.h" #include "hw/ppc/ppc4xx.h" #include "hw/pci/pci_device.h" #include "hw/pci/pci_host.h" diff --git a/hw/ppc/ppc4xx_pci.c b/hw/ppc/ppc4xx_pci.c index 0a07aab5d1..e4101398c9 100644 --- a/hw/ppc/ppc4xx_pci.c +++ b/hw/ppc/ppc4xx_pci.c @@ -24,7 +24,6 @@ #include "qemu/osdep.h" #include "qemu/log.h" #include "hw/irq.h" -#include "hw/ppc/ppc.h" #include "hw/ppc/ppc4xx.h" #include "migration/vmstate.h" #include "qemu/module.h" From patchwork Wed Feb 21 21:16:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1902449 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=s2bYLsq/; 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AGHT+IGfgsZXmjxVbcD0rnQvNVUiD/uZOY4xP1iLwFSz+ySQHXhyphKMCM7a8iCvIyHaLgIaWZqarw== X-Received: by 2002:a5d:47ac:0:b0:33d:38cf:aa76 with SMTP id 12-20020a5d47ac000000b0033d38cfaa76mr10702068wrb.46.1708550213945; Wed, 21 Feb 2024 13:16:53 -0800 (PST) Received: from m1x-phil.lan ([176.187.211.34]) by smtp.gmail.com with ESMTPSA id df5-20020a5d5b85000000b0033d87557283sm997351wrb.0.2024.02.21.13.16.52 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 21 Feb 2024 13:16:53 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-block@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , BALATON Zoltan , Thomas Huth Subject: [PULL 04/25] hw/ppc/ppc4xx_pci: Extract PCI host definitions to hw/pci-host/ppc4xx.h Date: Wed, 21 Feb 2024 22:16:04 +0100 Message-ID: <20240221211626.48190-5-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240221211626.48190-1-philmd@linaro.org> References: <20240221211626.48190-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=philmd@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Reviewed-by: BALATON Zoltan Reviewed-by: Thomas Huth Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20240215105017.57748-3-philmd@linaro.org> --- MAINTAINERS | 1 + include/hw/pci-host/ppc4xx.h | 17 +++++++++++++++++ include/hw/ppc/ppc4xx.h | 5 ----- hw/ppc/ppc440_bamboo.c | 1 + hw/ppc/ppc440_pcix.c | 2 +- hw/ppc/ppc440_uc.c | 1 + hw/ppc/ppc4xx_pci.c | 2 +- hw/ppc/sam460ex.c | 1 + 8 files changed, 23 insertions(+), 7 deletions(-) create mode 100644 include/hw/pci-host/ppc4xx.h diff --git a/MAINTAINERS b/MAINTAINERS index 7d61fb9319..9b6ce9a934 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2070,6 +2070,7 @@ F: hw/ppc/ppc4xx*.c F: hw/ppc/ppc440_uc.c F: hw/ppc/ppc440.h F: hw/i2c/ppc4xx_i2c.c +F: include/hw/pci-host/ppc4xx.h F: include/hw/ppc/ppc4xx.h F: include/hw/i2c/ppc4xx_i2c.h F: hw/intc/ppc-uic.c diff --git a/include/hw/pci-host/ppc4xx.h b/include/hw/pci-host/ppc4xx.h new file mode 100644 index 0000000000..32396417fc --- /dev/null +++ b/include/hw/pci-host/ppc4xx.h @@ -0,0 +1,17 @@ +/* + * QEMU PowerPC 4xx PCI-host definitions + * + * Copyright (c) 2018-2023 BALATON Zoltan + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#ifndef HW_PCIHOST_PPC4XX_H +#define HW_PCIHOST_PPC4XX_H + +#define TYPE_PPC4xx_HOST_BRIDGE "ppc4xx-host-bridge" +#define TYPE_PPC4xx_PCI_HOST "ppc4xx-pci-host" +#define TYPE_PPC440_PCIX_HOST "ppc440-pcix-host" +#define TYPE_PPC460EX_PCIE_HOST "ppc460ex-pcie-host" + +#endif diff --git a/include/hw/ppc/ppc4xx.h b/include/hw/ppc/ppc4xx.h index ea7740239b..1bd9b8821b 100644 --- a/include/hw/ppc/ppc4xx.h +++ b/include/hw/ppc/ppc4xx.h @@ -29,11 +29,6 @@ #include "exec/memory.h" #include "hw/sysbus.h" -#define TYPE_PPC4xx_HOST_BRIDGE "ppc4xx-host-bridge" -#define TYPE_PPC4xx_PCI_HOST "ppc4xx-pci-host" -#define TYPE_PPC440_PCIX_HOST "ppc440-pcix-host" -#define TYPE_PPC460EX_PCIE_HOST "ppc460ex-pcie-host" - /* * Generic DCR device */ diff --git a/hw/ppc/ppc440_bamboo.c b/hw/ppc/ppc440_bamboo.c index c75c3083e6..e18f57efce 100644 --- a/hw/ppc/ppc440_bamboo.c +++ b/hw/ppc/ppc440_bamboo.c @@ -24,6 +24,7 @@ #include "elf.h" #include "hw/char/serial.h" #include "hw/ppc/ppc.h" +#include "hw/pci-host/ppc4xx.h" #include "sysemu/sysemu.h" #include "sysemu/reset.h" #include "hw/sysbus.h" diff --git a/hw/ppc/ppc440_pcix.c b/hw/ppc/ppc440_pcix.c index d84418cb7b..1926ae2a27 100644 --- a/hw/ppc/ppc440_pcix.c +++ b/hw/ppc/ppc440_pcix.c @@ -25,7 +25,7 @@ #include "qemu/module.h" #include "qemu/units.h" #include "hw/irq.h" -#include "hw/ppc/ppc4xx.h" +#include "hw/pci-host/ppc4xx.h" #include "hw/pci/pci_device.h" #include "hw/pci/pci_host.h" #include "trace.h" diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c index 7d6ca70387..1312aa2080 100644 --- a/hw/ppc/ppc440_uc.c +++ b/hw/ppc/ppc440_uc.c @@ -14,6 +14,7 @@ #include "qemu/log.h" #include "hw/irq.h" #include "hw/ppc/ppc4xx.h" +#include "hw/pci-host/ppc4xx.h" #include "hw/qdev-properties.h" #include "hw/pci/pci.h" #include "sysemu/reset.h" diff --git a/hw/ppc/ppc4xx_pci.c b/hw/ppc/ppc4xx_pci.c index e4101398c9..b6c6c8993c 100644 --- a/hw/ppc/ppc4xx_pci.c +++ b/hw/ppc/ppc4xx_pci.c @@ -24,7 +24,7 @@ #include "qemu/osdep.h" #include "qemu/log.h" #include "hw/irq.h" -#include "hw/ppc/ppc4xx.h" +#include "hw/pci-host/ppc4xx.h" #include "migration/vmstate.h" #include "qemu/module.h" #include "sysemu/reset.h" diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c index 1e615b8d35..a28498f39c 100644 --- a/hw/ppc/sam460ex.c +++ b/hw/ppc/sam460ex.c @@ -25,6 +25,7 @@ #include "elf.h" #include "exec/memory.h" #include "ppc440.h" +#include "hw/pci-host/ppc4xx.h" #include "hw/block/flash.h" #include "sysemu/sysemu.h" #include "sysemu/reset.h" From patchwork Wed Feb 21 21:16:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1902452 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 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git-send-email 2.41.0 In-Reply-To: <20240221211626.48190-1-philmd@linaro.org> References: <20240221211626.48190-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philmd@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org ppc4xx_pci.c is moved from the target specific ppc_ss[] meson source set to pci_ss[] which is common to all targets: the object is built once. Declare PPC4XX_PCI selector in pci-host/Kconfig. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Message-Id: <20240215105017.57748-4-philmd@linaro.org> --- MAINTAINERS | 1 + hw/{ppc => pci-host}/ppc4xx_pci.c | 0 hw/pci-host/ppce500.c | 2 +- hw/pci-host/Kconfig | 4 ++++ hw/pci-host/meson.build | 1 + hw/pci-host/trace-events | 4 ++++ hw/ppc/Kconfig | 2 +- hw/ppc/meson.build | 1 - hw/ppc/trace-events | 4 ---- 9 files changed, 12 insertions(+), 7 deletions(-) rename hw/{ppc => pci-host}/ppc4xx_pci.c (100%) diff --git a/MAINTAINERS b/MAINTAINERS index 9b6ce9a934..8d9ccd5073 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1423,6 +1423,7 @@ Bamboo L: qemu-ppc@nongnu.org S: Orphan F: hw/ppc/ppc440_bamboo.c +F: hw/pci-host/ppc4xx_pci.c F: tests/avocado/ppc_bamboo.py e500 diff --git a/hw/ppc/ppc4xx_pci.c b/hw/pci-host/ppc4xx_pci.c similarity index 100% rename from hw/ppc/ppc4xx_pci.c rename to hw/pci-host/ppc4xx_pci.c diff --git a/hw/pci-host/ppce500.c b/hw/pci-host/ppce500.c index fa0d67b342..95b983b2b3 100644 --- a/hw/pci-host/ppce500.c +++ b/hw/pci-host/ppce500.c @@ -5,7 +5,7 @@ * * Author: Yu Liu, * - * This file is derived from hw/ppc4xx_pci.c, + * This file is derived from ppc4xx_pci.c, * the copyright for that material belongs to the original owners. * * This is free software; you can redistribute it and/or modify diff --git a/hw/pci-host/Kconfig b/hw/pci-host/Kconfig index f046d76a68..0a221e719e 100644 --- a/hw/pci-host/Kconfig +++ b/hw/pci-host/Kconfig @@ -6,6 +6,10 @@ config XEN_IGD_PASSTHROUGH default y depends on XEN && PCI_I440FX +config PPC4XX_PCI + bool + select PCI + config RAVEN_PCI bool select PCI diff --git a/hw/pci-host/meson.build b/hw/pci-host/meson.build index 36d5ab756f..eb6dc71c88 100644 --- a/hw/pci-host/meson.build +++ b/hw/pci-host/meson.build @@ -14,6 +14,7 @@ pci_ss.add(when: 'CONFIG_REMOTE_PCIHOST', if_true: files('remote.c')) pci_ss.add(when: 'CONFIG_SH_PCI', if_true: files('sh_pci.c')) # PPC devices +pci_ss.add(when: 'CONFIG_PPC4XX_PCI', if_true: files('ppc4xx_pci.c')) pci_ss.add(when: 'CONFIG_RAVEN_PCI', if_true: files('raven.c')) pci_ss.add(when: 'CONFIG_GRACKLE_PCI', if_true: files('grackle.c')) # NewWorld PowerMac diff --git a/hw/pci-host/trace-events b/hw/pci-host/trace-events index b2f47e6335..90a37ebff0 100644 --- a/hw/pci-host/trace-events +++ b/hw/pci-host/trace-events @@ -37,6 +37,10 @@ unin_data_read(uint64_t addr, unsigned len, uint64_t val) "read addr 0x%"PRIx64 unin_write(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64 unin_read(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64 +# ppc4xx_pci.c +ppc4xx_pci_map_irq(int32_t devfn, int irq_num, int slot) "devfn 0x%x irq %d -> %d" +ppc4xx_pci_set_irq(int irq_num) "PCI irq %d" + # pnv_phb4.c pnv_phb4_xive_notify(uint64_t notif_port, uint64_t data) "notif=@0x%"PRIx64" data=0x%"PRIx64 pnv_phb4_xive_notify_ic(uint64_t addr, uint64_t data) "addr=@0x%"PRIx64" data=0x%"PRIx64 diff --git a/hw/ppc/Kconfig b/hw/ppc/Kconfig index 44263a58c4..82e847d22c 100644 --- a/hw/ppc/Kconfig +++ b/hw/ppc/Kconfig @@ -53,7 +53,7 @@ config PPC440 config PPC4XX bool select BITBANG_I2C - select PCI + select PPC4XX_PCI select PPC_UIC config SAM460EX diff --git a/hw/ppc/meson.build b/hw/ppc/meson.build index eba3406e7f..d0efc0aba5 100644 --- a/hw/ppc/meson.build +++ b/hw/ppc/meson.build @@ -63,7 +63,6 @@ ppc_ss.add(when: 'CONFIG_PPC440', if_true: files( 'ppc440_pcix.c', 'ppc440_uc.c')) ppc_ss.add(when: 'CONFIG_PPC4XX', if_true: files( 'ppc4xx_devs.c', - 'ppc4xx_pci.c', 'ppc4xx_sdram.c')) ppc_ss.add(when: 'CONFIG_SAM460EX', if_true: files('sam460ex.c')) # PReP diff --git a/hw/ppc/trace-events b/hw/ppc/trace-events index f670e8906c..b59fbf340f 100644 --- a/hw/ppc/trace-events +++ b/hw/ppc/trace-events @@ -146,10 +146,6 @@ rs6000mc_size_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x" rs6000mc_size_write(uint32_t addr, uint32_t val) "write addr=0x%x val=0x%x" rs6000mc_parity_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x" -# ppc4xx_pci.c -ppc4xx_pci_map_irq(int32_t devfn, int irq_num, int slot) "devfn 0x%x irq %d -> %d" -ppc4xx_pci_set_irq(int irq_num) "PCI irq %d" - # ppc440_pcix.c ppc440_pcix_map_irq(int32_t devfn, int irq_num, int slot) "devfn 0x%x irq %d -> %d" ppc440_pcix_set_irq(int irq_num) "PCI irq %d" From patchwork Wed Feb 21 21:16:06 2024 Content-Type: text/plain; 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Wed, 21 Feb 2024 13:17:33 -0800 (PST) Received: from m1x-phil.lan ([176.187.211.34]) by smtp.gmail.com with ESMTPSA id bs20-20020a056000071400b0033d449f5f65sm12675816wrb.4.2024.02.21.13.17.31 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 21 Feb 2024 13:17:32 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-block@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Thomas Huth , Paolo Bonzini , Nicholas Piggin , Daniel Henrique Barboza , =?utf-8?q?C=C3=A9dric_Le_G?= =?utf-8?q?oater?= Subject: [PULL 06/25] hw/ppc/ppc440_pcix: Move ppc440_pcix.c to hw/pci-host/ Date: Wed, 21 Feb 2024 22:16:06 +0100 Message-ID: <20240221211626.48190-7-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240221211626.48190-1-philmd@linaro.org> References: <20240221211626.48190-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=philmd@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org ppc440_pcix.c is moved from the target specific ppc_ss[] meson source set to pci_ss[] which is common to all targets: the object is built once. Reviewed-by: Thomas Huth Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20240215105017.57748-5-philmd@linaro.org> --- MAINTAINERS | 2 +- hw/{ppc => pci-host}/ppc440_pcix.c | 0 hw/pci-host/Kconfig | 4 ++++ hw/pci-host/meson.build | 1 + hw/pci-host/trace-events | 8 ++++++++ hw/ppc/Kconfig | 1 + hw/ppc/meson.build | 2 +- hw/ppc/trace-events | 8 -------- 8 files changed, 16 insertions(+), 10 deletions(-) rename hw/{ppc => pci-host}/ppc440_pcix.c (100%) diff --git a/MAINTAINERS b/MAINTAINERS index 8d9ccd5073..5535df4487 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1556,7 +1556,7 @@ L: qemu-ppc@nongnu.org S: Maintained F: hw/ppc/sam460ex.c F: hw/ppc/ppc440_uc.c -F: hw/ppc/ppc440_pcix.c +F: hw/pci-host/ppc440_pcix.c F: hw/display/sm501* F: hw/ide/sii3112.c F: hw/rtc/m41t80.c diff --git a/hw/ppc/ppc440_pcix.c b/hw/pci-host/ppc440_pcix.c similarity index 100% rename from hw/ppc/ppc440_pcix.c rename to hw/pci-host/ppc440_pcix.c diff --git a/hw/pci-host/Kconfig b/hw/pci-host/Kconfig index 0a221e719e..c91880b237 100644 --- a/hw/pci-host/Kconfig +++ b/hw/pci-host/Kconfig @@ -10,6 +10,10 @@ config PPC4XX_PCI bool select PCI +config PPC440_PCIX + bool + select PCI + config RAVEN_PCI bool select PCI diff --git a/hw/pci-host/meson.build b/hw/pci-host/meson.build index eb6dc71c88..3001e93a43 100644 --- a/hw/pci-host/meson.build +++ b/hw/pci-host/meson.build @@ -15,6 +15,7 @@ pci_ss.add(when: 'CONFIG_SH_PCI', if_true: files('sh_pci.c')) # PPC devices pci_ss.add(when: 'CONFIG_PPC4XX_PCI', if_true: files('ppc4xx_pci.c')) +pci_ss.add(when: 'CONFIG_PPC440_PCIX', if_true: files('ppc440_pcix.c')) pci_ss.add(when: 'CONFIG_RAVEN_PCI', if_true: files('raven.c')) pci_ss.add(when: 'CONFIG_GRACKLE_PCI', if_true: files('grackle.c')) # NewWorld PowerMac diff --git a/hw/pci-host/trace-events b/hw/pci-host/trace-events index 90a37ebff0..0a816b9aa1 100644 --- a/hw/pci-host/trace-events +++ b/hw/pci-host/trace-events @@ -41,6 +41,14 @@ unin_read(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64 ppc4xx_pci_map_irq(int32_t devfn, int irq_num, int slot) "devfn 0x%x irq %d -> %d" ppc4xx_pci_set_irq(int irq_num) "PCI irq %d" +# ppc440_pcix.c +ppc440_pcix_map_irq(int32_t devfn, int irq_num, int slot) "devfn 0x%x irq %d -> %d" +ppc440_pcix_set_irq(int irq_num) "PCI irq %d" +ppc440_pcix_update_pim(int idx, uint64_t size, uint64_t la) "Added window %d of size=0x%" PRIx64 " to CPU=0x%" PRIx64 +ppc440_pcix_update_pom(int idx, uint32_t size, uint64_t la, uint64_t pcia) "Added window %d of size=0x%x from CPU=0x%" PRIx64 " to PCI=0x%" PRIx64 +ppc440_pcix_reg_read(uint64_t addr, uint32_t val) "addr 0x%" PRIx64 " = 0x%" PRIx32 +ppc440_pcix_reg_write(uint64_t addr, uint32_t val, uint32_t size) "addr 0x%" PRIx64 " = 0x%" PRIx32 " size 0x%" PRIx32 + # pnv_phb4.c pnv_phb4_xive_notify(uint64_t notif_port, uint64_t data) "notif=@0x%"PRIx64" data=0x%"PRIx64 pnv_phb4_xive_notify_ic(uint64_t addr, uint64_t data) "addr=@0x%"PRIx64" data=0x%"PRIx64 diff --git a/hw/ppc/Kconfig b/hw/ppc/Kconfig index 82e847d22c..99d571fa20 100644 --- a/hw/ppc/Kconfig +++ b/hw/ppc/Kconfig @@ -46,6 +46,7 @@ config PPC440 imply TEST_DEVICES imply E1000_PCI select PCI_EXPRESS + select PPC440_PCIX select PPC4XX select SERIAL select FDT_PPC diff --git a/hw/ppc/meson.build b/hw/ppc/meson.build index d0efc0aba5..da14fccce5 100644 --- a/hw/ppc/meson.build +++ b/hw/ppc/meson.build @@ -60,7 +60,7 @@ ppc_ss.add(when: 'CONFIG_PPC405', if_true: files( 'ppc405_uc.c')) ppc_ss.add(when: 'CONFIG_PPC440', if_true: files( 'ppc440_bamboo.c', - 'ppc440_pcix.c', 'ppc440_uc.c')) + 'ppc440_uc.c')) ppc_ss.add(when: 'CONFIG_PPC4XX', if_true: files( 'ppc4xx_devs.c', 'ppc4xx_sdram.c')) diff --git a/hw/ppc/trace-events b/hw/ppc/trace-events index b59fbf340f..157ea756e9 100644 --- a/hw/ppc/trace-events +++ b/hw/ppc/trace-events @@ -146,14 +146,6 @@ rs6000mc_size_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x" rs6000mc_size_write(uint32_t addr, uint32_t val) "write addr=0x%x val=0x%x" rs6000mc_parity_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x" -# ppc440_pcix.c -ppc440_pcix_map_irq(int32_t devfn, int irq_num, int slot) "devfn 0x%x irq %d -> %d" -ppc440_pcix_set_irq(int irq_num) "PCI irq %d" -ppc440_pcix_update_pim(int idx, uint64_t size, uint64_t la) "Added window %d of size=0x%" PRIx64 " to CPU=0x%" PRIx64 -ppc440_pcix_update_pom(int idx, uint32_t size, uint64_t la, uint64_t pcia) "Added window %d of size=0x%x from CPU=0x%" PRIx64 " to PCI=0x%" PRIx64 -ppc440_pcix_reg_read(uint64_t addr, uint32_t val) "addr 0x%" PRIx64 " = 0x%" PRIx32 -ppc440_pcix_reg_write(uint64_t addr, uint32_t val, uint32_t size) "addr 0x%" PRIx64 " = 0x%" PRIx32 " size 0x%" PRIx32 - # ppc405_boards.c opba_readb(uint64_t addr, uint32_t val) "addr 0x%" PRIx64 " = 0x%" PRIx32 opba_writeb(uint64_t addr, uint64_t val) "addr 0x%" PRIx64 " = 0x%" PRIx64 From patchwork Wed Feb 21 21:16:07 2024 Content-Type: text/plain; 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Wed, 21 Feb 2024 13:17:38 -0800 (PST) Received: from m1x-phil.lan ([176.187.211.34]) by smtp.gmail.com with ESMTPSA id 14-20020a056000154e00b0033d10bd6612sm18477037wry.81.2024.02.21.13.17.37 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 21 Feb 2024 13:17:38 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-block@nongnu.org, qemu-ppc@nongnu.org, Joe Komlodi , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Corey Minyard Subject: [PULL 07/25] hw/i2c/smbus_slave: Add object path on error prints Date: Wed, 21 Feb 2024 22:16:07 +0100 Message-ID: <20240221211626.48190-8-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240221211626.48190-1-philmd@linaro.org> References: <20240221211626.48190-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=philmd@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01, T_SPF_TEMPERROR=0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Joe Komlodi The current logging doesn't tell us which specific smbus device is an error state. Signed-off-by: Joe Komlodi Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20240202204847.2062798-3-komlodi@google.com> Signed-off-by: Philippe Mathieu-Daudé --- hw/i2c/smbus_slave.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/hw/i2c/smbus_slave.c b/hw/i2c/smbus_slave.c index 1300c9ec72..9f9afc25a4 100644 --- a/hw/i2c/smbus_slave.c +++ b/hw/i2c/smbus_slave.c @@ -25,11 +25,15 @@ #define DPRINTF(fmt, ...) \ do { printf("smbus(%02x): " fmt , dev->i2c.address, ## __VA_ARGS__); } while (0) #define BADF(fmt, ...) \ -do { fprintf(stderr, "smbus: error: " fmt , ## __VA_ARGS__); exit(1);} while (0) +do { g_autofree char *qom_path = object_get_canonical_path(OBJECT(dev)); \ + fprintf(stderr, "%s: smbus: error: " fmt , qom_path, ## __VA_ARGS__); \ + exit(1); } while (0) #else #define DPRINTF(fmt, ...) do {} while(0) #define BADF(fmt, ...) \ -do { fprintf(stderr, "smbus: error: " fmt , ## __VA_ARGS__);} while (0) +do { g_autofree char *qom_path = object_get_canonical_path(OBJECT(dev)); \ + fprintf(stderr, "%s: smbus: error: " fmt , qom_path, ## __VA_ARGS__); \ + } while (0) #endif enum { From patchwork Wed Feb 21 21:16:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1902461 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=qe8mzHBk; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Tg8R65J6qz23cl for ; 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Tsirkin" , Marcel Apfelbaum Subject: [PULL 08/25] hw/i386/pc_piix: Share pc_cmos_init() invocation between pc and isapc machines Date: Wed, 21 Feb 2024 22:16:08 +0100 Message-ID: <20240221211626.48190-9-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240221211626.48190-1-philmd@linaro.org> References: <20240221211626.48190-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=philmd@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Bernhard Beschow Both invocations are the same and either one is always executed. Avoid this redundancy. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20240208220349.4948-3-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé --- hw/i386/pc_piix.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 999b7b806c..9064511507 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -341,11 +341,8 @@ static void pc_init1(MachineState *machine, pc_nic_init(pcmc, isa_bus, pci_bus); - if (pcmc->pci_enabled) { - pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); - } #ifdef CONFIG_IDE_ISA - else { + if (!pcmc->pci_enabled) { DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; int i; @@ -363,10 +360,11 @@ static void pc_init1(MachineState *machine, busname[4] = '0' + i; idebus[i] = qdev_get_child_bus(DEVICE(dev), busname); } - pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); } #endif + pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); + if (piix4_pm) { smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0); 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Wed, 21 Feb 2024 13:17:50 -0800 (PST) Received: from m1x-phil.lan ([176.187.211.34]) by smtp.gmail.com with ESMTPSA id n1-20020a5d51c1000000b0033b1c321070sm17958745wrv.31.2024.02.21.13.17.48 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 21 Feb 2024 13:17:50 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-block@nongnu.org, qemu-ppc@nongnu.org, Peter Maydell , Richard Henderson , "Michael S . Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Marcel Apfelbaum , Paolo Bonzini , Eduardo Habkost Subject: [PULL 09/25] hw/i386/pc: Store pointers to IDE buses in PCMachineState Date: Wed, 21 Feb 2024 22:16:09 +0100 Message-ID: <20240221211626.48190-10-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240221211626.48190-1-philmd@linaro.org> References: <20240221211626.48190-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=philmd@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Peter Maydell Add the two IDE bus BusState pointers to the set we keep in PCMachineState. This allows us to avoid passing them to pc_cmos_init(), and also will allow a refactoring of how we call pc_cmos_init_late(). Signed-off-by: Peter Maydell Acked-by: Richard Henderson Reviewed-by: Michael S. Tsirkin Reviewed-by: Philippe Mathieu-Daudé [PMD: Do not zero-init pcms->idebus[] again] Message-ID: <20240220160622.114437-2-peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé --- include/hw/i386/pc.h | 4 +++- hw/i386/pc.c | 5 ++--- hw/i386/pc_piix.c | 12 ++++-------- hw/i386/pc_q35.c | 9 +++------ 4 files changed, 12 insertions(+), 18 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 02a0deedd3..cf2fa60868 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -17,6 +17,8 @@ #define HPET_INTCAP "hpet-intcap" +#define MAX_IDE_BUS 2 + /** * PCMachineState: * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling @@ -37,6 +39,7 @@ typedef struct PCMachineState { PFlashCFI01 *flash[2]; ISADevice *pcspk; DeviceState *iommu; + BusState *idebus[MAX_IDE_BUS]; /* Configuration options: */ uint64_t max_ram_below_4g; @@ -182,7 +185,6 @@ void pc_basic_device_init(struct PCMachineState *pcms, bool create_fdctrl, uint32_t hpet_irqs); void pc_cmos_init(PCMachineState *pcms, - BusState *ide0, BusState *ide1, ISADevice *s); void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus); diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 9cbc59665f..3e9ca6295f 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -574,7 +574,6 @@ static void pc_cmos_init_late(void *opaque) } void pc_cmos_init(PCMachineState *pcms, - BusState *idebus0, BusState *idebus1, ISADevice *rtc) { int val; @@ -634,8 +633,8 @@ void pc_cmos_init(PCMachineState *pcms, /* hard drives and FDC */ arg.rtc_state = s; - arg.idebus[0] = idebus0; - arg.idebus[1] = idebus1; + arg.idebus[0] = pcms->idebus[0]; + arg.idebus[1] = pcms->idebus[1]; qemu_register_reset(pc_cmos_init_late, &arg); } diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 9064511507..bea096f569 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -68,7 +68,6 @@ #include "kvm/kvm-cpu.h" #include "target/i386/cpu.h" -#define MAX_IDE_BUS 2 #define XEN_IOAPIC_NUM_PIRQS 128ULL #ifdef CONFIG_IDE_ISA @@ -114,7 +113,6 @@ static void pc_init1(MachineState *machine, Object *piix4_pm = NULL; qemu_irq smi_irq; GSIState *gsi_state; - BusState *idebus[MAX_IDE_BUS]; ISADevice *rtc_state; MemoryRegion *ram_memory; MemoryRegion *pci_memory = NULL; @@ -299,8 +297,8 @@ static void pc_init1(MachineState *machine, piix4_pm = object_resolve_path_component(OBJECT(pci_dev), "pm"); dev = DEVICE(object_resolve_path_component(OBJECT(pci_dev), "ide")); pci_ide_create_devs(PCI_DEVICE(dev)); - idebus[0] = qdev_get_child_bus(dev, "ide.0"); - idebus[1] = qdev_get_child_bus(dev, "ide.1"); + pcms->idebus[0] = qdev_get_child_bus(dev, "ide.0"); + pcms->idebus[1] = qdev_get_child_bus(dev, "ide.1"); } else { isa_bus = isa_bus_new(NULL, system_memory, system_io, &error_abort); @@ -312,8 +310,6 @@ static void pc_init1(MachineState *machine, i8257_dma_init(OBJECT(machine), isa_bus, 0); pcms->hpet_enabled = false; - idebus[0] = NULL; - idebus[1] = NULL; } if (x86ms->pic == ON_OFF_AUTO_ON || x86ms->pic == ON_OFF_AUTO_AUTO) { @@ -358,12 +354,12 @@ static void pc_init1(MachineState *machine, * second one. */ busname[4] = '0' + i; - idebus[i] = qdev_get_child_bus(DEVICE(dev), busname); + pcms->idebus[i] = qdev_get_child_bus(DEVICE(dev), busname); } } #endif - pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); + pc_cmos_init(pcms, rtc_state); if (piix4_pm) { smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0); diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index d346fa3b1d..0e9bd27a6e 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -126,7 +126,6 @@ static void pc_q35_init(MachineState *machine) PCIBus *host_bus; PCIDevice *lpc; DeviceState *lpc_dev; - BusState *idebus[MAX_SATA_PORTS]; ISADevice *rtc_state; MemoryRegion *system_memory = get_system_memory(); MemoryRegion *system_io = get_system_io(); @@ -300,13 +299,11 @@ static void pc_q35_init(MachineState *machine) ICH9_SATA1_FUNC), "ich9-ahci"); ich9 = ICH9_AHCI(pdev); - idebus[0] = qdev_get_child_bus(DEVICE(pdev), "ide.0"); - idebus[1] = qdev_get_child_bus(DEVICE(pdev), "ide.1"); + pcms->idebus[0] = qdev_get_child_bus(DEVICE(pdev), "ide.0"); + pcms->idebus[1] = qdev_get_child_bus(DEVICE(pdev), "ide.1"); g_assert(MAX_SATA_PORTS == ich9->ahci.ports); ide_drive_get(hd, ich9->ahci.ports); ahci_ide_create_devs(&ich9->ahci, hd); - } else { - idebus[0] = idebus[1] = NULL; } if (machine_usb(machine)) { @@ -327,7 +324,7 @@ static void pc_q35_init(MachineState *machine) smbus_eeprom_init(pcms->smbus, 8, NULL, 0); } - pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); + pc_cmos_init(pcms, rtc_state); /* the rest devices to which pci devfn is automatically assigned */ pc_vga_init(isa_bus, host_bus); From patchwork Wed Feb 21 21:16:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1902406 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=kex/o3hY; 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Wed, 21 Feb 2024 13:17:56 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-block@nongnu.org, qemu-ppc@nongnu.org, Peter Maydell , Richard Henderson , "Michael S . Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Eduardo Habkost , Marcel Apfelbaum Subject: [PULL 10/25] hw/i386/pc: Do pc_cmos_init_late() from pc_machine_done() Date: Wed, 21 Feb 2024 22:16:10 +0100 Message-ID: <20240221211626.48190-11-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240221211626.48190-1-philmd@linaro.org> References: <20240221211626.48190-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::134; envelope-from=philmd@linaro.org; helo=mail-lf1-x134.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Peter Maydell In the i386 PC machine, we want to run the pc_cmos_init_late() function only once the IDE and floppy drive devices have been set up. We currently do this using qemu_register_reset(), and then have the function call qemu_unregister_reset() on itself, so it runs exactly once. This was an expedient way to do it back in 2010 when we first added this (in commit c0897e0cb94e8), but now we have a more obvious point to do "machine initialization that has to happen after generic device init": the machine-init-done hook. Do the pc_cmos_init_late() work from our existing PC machine init done hook function, so we can drop the use of qemu_register_reset() and qemu_unregister_reset(). Because the pointers to the devices we need (the IDE buses and the RTC) are now all in the machine state, we don't need the pc_cmos_init_late_arg struct and can just pass the PCMachineState pointer. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Reviewed-by: Michael S. Tsirkin Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20240220160622.114437-3-peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé --- hw/i386/pc.c | 39 ++++++++++++++++----------------------- 1 file changed, 16 insertions(+), 23 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 3e9ca6295f..1733dffc00 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -465,11 +465,6 @@ static void pc_cmos_init_floppy(MC146818RtcState *rtc_state, ISADevice *floppy) mc146818rtc_set_cmos_data(rtc_state, REG_EQUIPMENT_BYTE, val); } -typedef struct pc_cmos_init_late_arg { - MC146818RtcState *rtc_state; - BusState *idebus[2]; -} pc_cmos_init_late_arg; - typedef struct check_fdc_state { ISADevice *floppy; bool multiple; @@ -530,23 +525,25 @@ static ISADevice *pc_find_fdc0(void) return state.floppy; } -static void pc_cmos_init_late(void *opaque) +static void pc_cmos_init_late(PCMachineState *pcms) { - pc_cmos_init_late_arg *arg = opaque; - MC146818RtcState *s = arg->rtc_state; + X86MachineState *x86ms = X86_MACHINE(pcms); + MC146818RtcState *s = MC146818_RTC(x86ms->rtc); int16_t cylinders; int8_t heads, sectors; int val; int i, trans; val = 0; - if (arg->idebus[0] && ide_get_geometry(arg->idebus[0], 0, - &cylinders, &heads, §ors) >= 0) { + if (pcms->idebus[0] && + ide_get_geometry(pcms->idebus[0], 0, + &cylinders, &heads, §ors) >= 0) { cmos_init_hd(s, 0x19, 0x1b, cylinders, heads, sectors); val |= 0xf0; } - if (arg->idebus[0] && ide_get_geometry(arg->idebus[0], 1, - &cylinders, &heads, §ors) >= 0) { + if (pcms->idebus[0] && + ide_get_geometry(pcms->idebus[0], 1, + &cylinders, &heads, §ors) >= 0) { cmos_init_hd(s, 0x1a, 0x24, cylinders, heads, sectors); val |= 0x0f; } @@ -558,10 +555,11 @@ static void pc_cmos_init_late(void *opaque) geometry. It is always such that: 1 <= sects <= 63, 1 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS geometry can be different if a translation is done. */ - if (arg->idebus[i / 2] && - ide_get_geometry(arg->idebus[i / 2], i % 2, + BusState *idebus = pcms->idebus[i / 2]; + if (idebus && + ide_get_geometry(idebus, i % 2, &cylinders, &heads, §ors) >= 0) { - trans = ide_get_bios_chs_trans(arg->idebus[i / 2], i % 2) - 1; + trans = ide_get_bios_chs_trans(idebus, i % 2) - 1; assert((trans & ~3) == 0); val |= trans << (i * 2); } @@ -569,15 +567,12 @@ static void pc_cmos_init_late(void *opaque) mc146818rtc_set_cmos_data(s, 0x39, val); pc_cmos_init_floppy(s, pc_find_fdc0()); - - qemu_unregister_reset(pc_cmos_init_late, opaque); } void pc_cmos_init(PCMachineState *pcms, ISADevice *rtc) { int val; - static pc_cmos_init_late_arg arg; X86MachineState *x86ms = X86_MACHINE(pcms); MC146818RtcState *s = MC146818_RTC(rtc); @@ -631,11 +626,7 @@ void pc_cmos_init(PCMachineState *pcms, val |= 0x04; /* PS/2 mouse installed */ mc146818rtc_set_cmos_data(s, REG_EQUIPMENT_BYTE, val); - /* hard drives and FDC */ - arg.rtc_state = s; - arg.idebus[0] = pcms->idebus[0]; - arg.idebus[1] = pcms->idebus[1]; - qemu_register_reset(pc_cmos_init_late, &arg); + /* hard drives and FDC are handled by pc_cmos_init_late() */ } static void handle_a20_line_change(void *opaque, int irq, int level) @@ -703,6 +694,8 @@ void pc_machine_done(Notifier *notifier, void *data) /* update FW_CFG_NB_CPUS to account for -device added CPUs */ fw_cfg_modify_i16(x86ms->fw_cfg, FW_CFG_NB_CPUS, x86ms->boot_cpus); } + + pc_cmos_init_late(pcms); } void pc_guest_info_init(PCMachineState *pcms) From patchwork Wed Feb 21 21:16:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1902421 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=bxlRPqzI; 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Wed, 21 Feb 2024 13:18:02 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-block@nongnu.org, qemu-ppc@nongnu.org, Bernhard Beschow , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Michael S. Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , Richard Henderson , Eduardo Habkost Subject: [PULL 11/25] hw/i386/x86: Turn apic_xrupt_override into class attribute Date: Wed, 21 Feb 2024 22:16:11 +0100 Message-ID: <20240221211626.48190-12-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240221211626.48190-1-philmd@linaro.org> References: <20240221211626.48190-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::22b; envelope-from=philmd@linaro.org; helo=mail-lj1-x22b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Bernhard Beschow The attribute isn't user-changeable and only true for pc-based machines. Turn it into a class attribute which allows for inlining pc_guest_info_init() into pc_machine_initfn(). Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20240208220349.4948-4-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé --- include/hw/i386/x86.h | 3 ++- hw/i386/acpi-common.c | 3 ++- hw/i386/pc.c | 5 ++--- 3 files changed, 6 insertions(+), 5 deletions(-) diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h index da19ae1546..8e306db7bb 100644 --- a/include/hw/i386/x86.h +++ b/include/hw/i386/x86.h @@ -34,6 +34,8 @@ struct X86MachineClass { bool save_tsc_khz; /* use DMA capable linuxboot option rom */ bool fwcfg_dma_enabled; + /* CPU and apic information: */ + bool apic_xrupt_override; }; struct X86MachineState { @@ -57,7 +59,6 @@ struct X86MachineState { uint64_t above_4g_mem_start; /* CPU and apic information: */ - bool apic_xrupt_override; unsigned pci_irq_mask; unsigned apic_id_limit; uint16_t boot_cpus; diff --git a/hw/i386/acpi-common.c b/hw/i386/acpi-common.c index 43dc23f7e0..cea4b3d71c 100644 --- a/hw/i386/acpi-common.c +++ b/hw/i386/acpi-common.c @@ -100,6 +100,7 @@ void acpi_build_madt(GArray *table_data, BIOSLinker *linker, int i; bool x2apic_mode = false; MachineClass *mc = MACHINE_GET_CLASS(x86ms); + X86MachineClass *x86mc = X86_MACHINE_GET_CLASS(x86ms); const CPUArchIdList *apic_ids = mc->possible_cpu_arch_ids(MACHINE(x86ms)); AcpiTable table = { .sig = "APIC", .rev = 3, .oem_id = oem_id, .oem_table_id = oem_table_id }; @@ -122,7 +123,7 @@ void acpi_build_madt(GArray *table_data, BIOSLinker *linker, IO_APIC_SECONDARY_ADDRESS, IO_APIC_SECONDARY_IRQBASE); } - if (x86ms->apic_xrupt_override) { + if (x86mc->apic_xrupt_override) { build_xrupt_override(table_data, 0, 2, 0 /* Flags: Conforms to the specifications of the bus */); } diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 1733dffc00..d7183780bd 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -700,9 +700,6 @@ void pc_machine_done(Notifier *notifier, void *data) void pc_guest_info_init(PCMachineState *pcms) { - X86MachineState *x86ms = X86_MACHINE(pcms); - - x86ms->apic_xrupt_override = true; pcms->machine_done.notify = pc_machine_done; qemu_add_machine_init_done_notifier(&pcms->machine_done); } @@ -1795,6 +1792,7 @@ static bool pc_hotplug_allowed(MachineState *ms, DeviceState *dev, Error **errp) static void pc_machine_class_init(ObjectClass *oc, void *data) { MachineClass *mc = MACHINE_CLASS(oc); + X86MachineClass *x86mc = X86_MACHINE_CLASS(oc); PCMachineClass *pcmc = PC_MACHINE_CLASS(oc); HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc); @@ -1814,6 +1812,7 @@ static void pc_machine_class_init(ObjectClass *oc, void *data) pcmc->pvh_enabled = true; pcmc->kvmclock_create_always = true; pcmc->resizable_acpi_blob = true; + x86mc->apic_xrupt_override = true; assert(!mc->get_hotplug_handler); mc->get_hotplug_handler = pc_get_hotplug_handler; mc->hotplug_allowed = pc_hotplug_allowed; From patchwork Wed Feb 21 21:16:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1902466 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , Richard Henderson , Eduardo Habkost Subject: [PULL 12/25] hw/i386/pc: Merge pc_guest_info_init() into pc_machine_initfn() Date: Wed, 21 Feb 2024 22:16:12 +0100 Message-ID: <20240221211626.48190-13-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240221211626.48190-1-philmd@linaro.org> References: <20240221211626.48190-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=philmd@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Bernhard Beschow Resolves redundant code in the piix and q35 machines. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20240208220349.4948-5-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé --- include/hw/i386/pc.h | 2 -- hw/i386/pc.c | 9 +++------ hw/i386/pc_piix.c | 2 -- hw/i386/pc_q35.c | 2 -- 4 files changed, 3 insertions(+), 12 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index cf2fa60868..39cdb9b933 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -154,8 +154,6 @@ extern int fd_bootchk; void pc_acpi_smi_interrupt(void *opaque, int irq, int level); -void pc_guest_info_init(PCMachineState *pcms); - #define PCI_HOST_PROP_RAM_MEM "ram-mem" #define PCI_HOST_PROP_PCI_MEM "pci-mem" #define PCI_HOST_PROP_SYSTEM_MEM "system-mem" diff --git a/hw/i386/pc.c b/hw/i386/pc.c index d7183780bd..694de8e130 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -698,12 +698,6 @@ void pc_machine_done(Notifier *notifier, void *data) pc_cmos_init_late(pcms); } -void pc_guest_info_init(PCMachineState *pcms) -{ - pcms->machine_done.notify = pc_machine_done; - qemu_add_machine_init_done_notifier(&pcms->machine_done); -} - /* setup pci memory address space mapping into system address space */ void pc_pci_as_mapping_init(MemoryRegion *system_memory, MemoryRegion *pci_address_space) @@ -1744,6 +1738,9 @@ static void pc_machine_initfn(Object *obj) object_property_add_alias(OBJECT(pcms), "pcspk-audiodev", OBJECT(pcms->pcspk), "audiodev"); cxl_machine_init(obj, &pcms->cxl_devices_state); + + pcms->machine_done.notify = pc_machine_done; + qemu_add_machine_init_done_notifier(&pcms->machine_done); } static void pc_machine_reset(MachineState *machine, ShutdownCause reason) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index bea096f569..eeca725504 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -225,8 +225,6 @@ static void pc_init1(MachineState *machine, &error_abort); } - pc_guest_info_init(pcms); - if (pcmc->smbios_defaults) { MachineClass *mc = MACHINE_GET_CLASS(machine); /* These values are guest ABI, do not change */ diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 0e9bd27a6e..8053d8cccb 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -188,8 +188,6 @@ static void pc_q35_init(MachineState *machine) kvmclock_create(pcmc->kvmclock_create_always); } - pc_guest_info_init(pcms); - if (pcmc->smbios_defaults) { /* These values are guest ABI, do not change */ smbios_set_defaults("QEMU", mc->desc, From patchwork Wed Feb 21 21:16:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1902419 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=Fcy48vvJ; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Tg8KL5JsVz23hY for ; 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Wed, 21 Feb 2024 13:18:14 -0800 (PST) Received: from m1x-phil.lan ([176.187.211.34]) by smtp.gmail.com with ESMTPSA id e6-20020adffd06000000b0033cf60e268fsm17873029wrr.116.2024.02.21.13.18.12 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 21 Feb 2024 13:18:13 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-block@nongnu.org, qemu-ppc@nongnu.org, Bernhard Beschow , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Michael S. Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , Richard Henderson , Eduardo Habkost Subject: [PULL 13/25] hw/i386/pc: Defer smbios_set_defaults() to machine_done Date: Wed, 21 Feb 2024 22:16:13 +0100 Message-ID: <20240221211626.48190-14-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240221211626.48190-1-philmd@linaro.org> References: <20240221211626.48190-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=philmd@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Bernhard Beschow Handling most of smbios data generation in the machine_done notifier is similar to how the ARM virt machine handles it which also calls smbios_set_defaults() there. The result is that all pc machines are freed from explicitly worrying about smbios setup. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20240208220349.4948-6-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé --- hw/i386/fw_cfg.h | 3 ++- include/hw/i386/pc.h | 1 - hw/i386/fw_cfg.c | 12 +++++++++++- hw/i386/pc.c | 2 +- hw/i386/pc_piix.c | 10 ---------- hw/i386/pc_q35.c | 9 --------- 6 files changed, 14 insertions(+), 23 deletions(-) diff --git a/hw/i386/fw_cfg.h b/hw/i386/fw_cfg.h index 86ca7c1c0c..1e1de6b4a3 100644 --- a/hw/i386/fw_cfg.h +++ b/hw/i386/fw_cfg.h @@ -10,6 +10,7 @@ #define HW_I386_FW_CFG_H #include "hw/boards.h" +#include "hw/i386/pc.h" #include "hw/nvram/fw_cfg.h" #define FW_CFG_IO_BASE 0x510 @@ -22,7 +23,7 @@ FWCfgState *fw_cfg_arch_create(MachineState *ms, uint16_t boot_cpus, uint16_t apic_id_limit); -void fw_cfg_build_smbios(MachineState *ms, FWCfgState *fw_cfg); +void fw_cfg_build_smbios(PCMachineState *ms, FWCfgState *fw_cfg); void fw_cfg_build_feature_control(MachineState *ms, FWCfgState *fw_cfg); void fw_cfg_add_acpi_dsdt(Aml *scope, FWCfgState *fw_cfg); diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 39cdb9b933..0a8a96600c 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -12,7 +12,6 @@ #include "hw/hotplug.h" #include "qom/object.h" #include "hw/i386/sgx-epc.h" -#include "hw/firmware/smbios.h" #include "hw/cxl/cxl.h" #define HPET_INTCAP "hpet-intcap" diff --git a/hw/i386/fw_cfg.c b/hw/i386/fw_cfg.c index 7362daa45a..98a478c276 100644 --- a/hw/i386/fw_cfg.c +++ b/hw/i386/fw_cfg.c @@ -48,15 +48,25 @@ const char *fw_cfg_arch_key_name(uint16_t key) return NULL; } -void fw_cfg_build_smbios(MachineState *ms, FWCfgState *fw_cfg) +void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg) { #ifdef CONFIG_SMBIOS uint8_t *smbios_tables, *smbios_anchor; size_t smbios_tables_len, smbios_anchor_len; struct smbios_phys_mem_area *mem_array; unsigned i, array_count; + MachineState *ms = MACHINE(pcms); + PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); + MachineClass *mc = MACHINE_GET_CLASS(pcms); X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu); + if (pcmc->smbios_defaults) { + /* These values are guest ABI, do not change */ + smbios_set_defaults("QEMU", mc->desc, mc->name, + pcmc->smbios_legacy_mode, pcmc->smbios_uuid_encoded, + pcms->smbios_entry_point_type); + } + /* tell smbios about cpuid version and features */ smbios_set_cpuid(cpu->env.cpuid_version, cpu->env.features[FEAT_1_EDX]); diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 694de8e130..e526498164 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -689,7 +689,7 @@ void pc_machine_done(Notifier *notifier, void *data) acpi_setup(); if (x86ms->fw_cfg) { - fw_cfg_build_smbios(MACHINE(pcms), x86ms->fw_cfg); + fw_cfg_build_smbios(pcms, x86ms->fw_cfg); fw_cfg_build_feature_control(MACHINE(pcms), x86ms->fw_cfg); /* update FW_CFG_NB_CPUS to account for -device added CPUs */ fw_cfg_modify_i16(x86ms->fw_cfg, FW_CFG_NB_CPUS, x86ms->boot_cpus); diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index eeca725504..34203927e1 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -36,7 +36,6 @@ #include "hw/rtc/mc146818rtc.h" #include "hw/southbridge/piix.h" #include "hw/display/ramfb.h" -#include "hw/firmware/smbios.h" #include "hw/pci/pci.h" #include "hw/pci/pci_ids.h" #include "hw/usb.h" @@ -225,15 +224,6 @@ static void pc_init1(MachineState *machine, &error_abort); } - if (pcmc->smbios_defaults) { - MachineClass *mc = MACHINE_GET_CLASS(machine); - /* These values are guest ABI, do not change */ - smbios_set_defaults("QEMU", mc->desc, - mc->name, pcmc->smbios_legacy_mode, - pcmc->smbios_uuid_encoded, - pcms->smbios_entry_point_type); - } - /* allocate ram and load rom/bios */ if (!xen_enabled()) { pc_memory_init(pcms, system_memory, rom_memory, hole64_size); diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 8053d8cccb..ab7750c346 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -45,7 +45,6 @@ #include "hw/i386/amd_iommu.h" #include "hw/i386/intel_iommu.h" #include "hw/display/ramfb.h" -#include "hw/firmware/smbios.h" #include "hw/ide/pci.h" #include "hw/ide/ahci-pci.h" #include "hw/intc/ioapic.h" @@ -188,14 +187,6 @@ static void pc_q35_init(MachineState *machine) kvmclock_create(pcmc->kvmclock_create_always); } - if (pcmc->smbios_defaults) { - /* These values are guest ABI, do not change */ - smbios_set_defaults("QEMU", mc->desc, - mc->name, pcmc->smbios_legacy_mode, - pcmc->smbios_uuid_encoded, - pcms->smbios_entry_point_type); - } - /* create pci host bus */ phb = OBJECT(qdev_new(TYPE_Q35_HOST_DEVICE)); From patchwork Wed Feb 21 21:16:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1902426 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=h68HLyeh; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Tg8L81ZY4z20Qg for ; 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Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , Richard Henderson , Eduardo Habkost Subject: [PULL 14/25] hw/i386/pc: Confine system flash handling to pc_sysfw Date: Wed, 21 Feb 2024 22:16:14 +0100 Message-ID: <20240221211626.48190-15-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240221211626.48190-1-philmd@linaro.org> References: <20240221211626.48190-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=philmd@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Bernhard Beschow Rather than distributing PC system flash handling across three files, let's confine it to one. Now, pc_system_firmware_init() creates, configures and cleans up the system flash which makes the code easier to understand. It also avoids the extra call to pc_system_flash_cleanup_unused() in the Xen case. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20240208220349.4948-7-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé --- include/hw/i386/pc.h | 2 -- hw/i386/pc.c | 1 - hw/i386/pc_piix.c | 1 - hw/i386/pc_sysfw.c | 6 ++++-- 4 files changed, 4 insertions(+), 6 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 0a8a96600c..e8f4af5d5c 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -193,8 +193,6 @@ void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs); #define TYPE_PORT92 "port92" /* pc_sysfw.c */ -void pc_system_flash_create(PCMachineState *pcms); -void pc_system_flash_cleanup_unused(PCMachineState *pcms); void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory); bool pc_system_ovmf_table_find(const char *entry, uint8_t **data, int *data_len); diff --git a/hw/i386/pc.c b/hw/i386/pc.c index e526498164..1ee41a5e56 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1733,7 +1733,6 @@ static void pc_machine_initfn(Object *obj) #endif pcms->default_bus_bypass_iommu = false; - pc_system_flash_create(pcms); pcms->pcspk = isa_new(TYPE_PC_SPEAKER); object_property_add_alias(OBJECT(pcms), "pcspk-audiodev", OBJECT(pcms->pcspk), "audiodev"); diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 34203927e1..ec7c07b362 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -231,7 +231,6 @@ static void pc_init1(MachineState *machine, assert(machine->ram_size == x86ms->below_4g_mem_size + x86ms->above_4g_mem_size); - pc_system_flash_cleanup_unused(pcms); if (machine->kernel_filename != NULL) { /* For xen HVM direct kernel boot, load linux here */ xen_load_linux(pcms); diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c index c8d9e71b88..b4c3833352 100644 --- a/hw/i386/pc_sysfw.c +++ b/hw/i386/pc_sysfw.c @@ -91,7 +91,7 @@ static PFlashCFI01 *pc_pflash_create(PCMachineState *pcms, return PFLASH_CFI01(dev); } -void pc_system_flash_create(PCMachineState *pcms) +static void pc_system_flash_create(PCMachineState *pcms) { PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); @@ -103,7 +103,7 @@ void pc_system_flash_create(PCMachineState *pcms) } } -void pc_system_flash_cleanup_unused(PCMachineState *pcms) +static void pc_system_flash_cleanup_unused(PCMachineState *pcms) { char *prop_name; int i; @@ -212,6 +212,8 @@ void pc_system_firmware_init(PCMachineState *pcms, return; } + pc_system_flash_create(pcms); + /* Map legacy -drive if=pflash to machine properties */ for (i = 0; i < ARRAY_SIZE(pcms->flash); i++) { pflash_cfi01_legacy_drive(pcms->flash[i], From patchwork Wed Feb 21 21:16:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1902453 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=ThuE/8q9; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; 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Wed, 21 Feb 2024 13:18:25 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-block@nongnu.org, qemu-ppc@nongnu.org, Bernhard Beschow , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Michael S. Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , Richard Henderson , Eduardo Habkost Subject: [PULL 15/25] hw/i386/pc_sysfw: Inline pc_system_flash_create() and remove it Date: Wed, 21 Feb 2024 22:16:15 +0100 Message-ID: <20240221211626.48190-16-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240221211626.48190-1-philmd@linaro.org> References: <20240221211626.48190-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Bernhard Beschow pc_system_flash_create() checked for pcmc->pci_enabled which is redundant since its caller already checked it. The method can be turned into just two lines, so inline and remove it. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20240208220349.4948-8-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé --- hw/i386/pc_sysfw.c | 15 ++------------- 1 file changed, 2 insertions(+), 13 deletions(-) diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c index b4c3833352..2dcaa116ad 100644 --- a/hw/i386/pc_sysfw.c +++ b/hw/i386/pc_sysfw.c @@ -91,18 +91,6 @@ static PFlashCFI01 *pc_pflash_create(PCMachineState *pcms, return PFLASH_CFI01(dev); } -static void pc_system_flash_create(PCMachineState *pcms) -{ - PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); - - if (pcmc->pci_enabled) { - pcms->flash[0] = pc_pflash_create(pcms, "system.flash0", - "pflash0"); - pcms->flash[1] = pc_pflash_create(pcms, "system.flash1", - "pflash1"); - } -} - static void pc_system_flash_cleanup_unused(PCMachineState *pcms) { char *prop_name; @@ -212,7 +200,8 @@ void pc_system_firmware_init(PCMachineState *pcms, return; } - pc_system_flash_create(pcms); + pcms->flash[0] = pc_pflash_create(pcms, "system.flash0", "pflash0"); + pcms->flash[1] = pc_pflash_create(pcms, "system.flash1", "pflash1"); /* Map legacy -drive if=pflash to machine properties */ for (i = 0; i < ARRAY_SIZE(pcms->flash); i++) { From patchwork Wed Feb 21 21:16:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1902451 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=Pg5yT5Cy; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Tg8Q85nysz23cl for ; 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Wed, 21 Feb 2024 13:18:32 -0800 (PST) Received: from m1x-phil.lan ([176.187.211.34]) by smtp.gmail.com with ESMTPSA id bw2-20020a0560001f8200b003392206c808sm12383532wrb.105.2024.02.21.13.18.30 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 21 Feb 2024 13:18:31 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-block@nongnu.org, qemu-ppc@nongnu.org, Bernhard Beschow , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Paolo Bonzini , Richard Henderson , Eduardo Habkost , "Michael S. Tsirkin" , Marcel Apfelbaum Subject: [PULL 16/25] hw/i386/pc_q35: Populate interrupt handlers before realizing LPC PCI function Date: Wed, 21 Feb 2024 22:16:16 +0100 Message-ID: <20240221211626.48190-17-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240221211626.48190-1-philmd@linaro.org> References: <20240221211626.48190-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::233; envelope-from=philmd@linaro.org; helo=mail-lj1-x233.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Bernhard Beschow The interrupt handlers need to be populated before the device is realized since internal devices such as the RTC are wired during realize(). If the interrupt handlers aren't populated, devices such as the RTC will be wired with a NULL interrupt handler, i.e. MC146818RtcState::irq is NULL. Fixes: fc11ca08bc29 "hw/i386/q35: Realize LPC PCI function before accessing it" Cc: Philippe Mathieu-Daudé Signed-off-by: Bernhard Beschow Message-ID: <20240217104644.19755-1-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé --- hw/i386/pc_q35.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index ab7750c346..53fb3db26d 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -228,10 +228,10 @@ static void pc_q35_init(MachineState *machine) lpc_dev = DEVICE(lpc); qdev_prop_set_bit(lpc_dev, "smm-enabled", x86_machine_is_smm_enabled(x86ms)); - pci_realize_and_unref(lpc, host_bus, &error_fatal); for (i = 0; i < IOAPIC_NUM_PINS; i++) { qdev_connect_gpio_out_named(lpc_dev, ICH9_GPIO_GSI, i, x86ms->gsi[i]); } + pci_realize_and_unref(lpc, host_bus, &error_fatal); rtc_state = ISA_DEVICE(object_resolve_path_component(OBJECT(lpc), "rtc")); From patchwork Wed Feb 21 21:16:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1902471 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Wed, 21 Feb 2024 13:18:37 -0800 (PST) Received: from m1x-phil.lan ([176.187.211.34]) by smtp.gmail.com with ESMTPSA id m5-20020a05600c4f4500b004127dd1f713sm436127wmq.27.2024.02.21.13.18.36 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 21 Feb 2024 13:18:37 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-block@nongnu.org, qemu-ppc@nongnu.org, Bernhard Beschow , Mark Cave-Ayland , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PULL 17/25] hw/isa/meson.build: Sort alphabetically Date: Wed, 21 Feb 2024 22:16:17 +0100 Message-ID: <20240221211626.48190-18-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240221211626.48190-1-philmd@linaro.org> References: <20240221211626.48190-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=philmd@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Bernhard Beschow Fixes: fbd758008f0f "hw/isa: extract FDC37M81X to a separate file" Signed-off-by: Bernhard Beschow Reviewed-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20240218131701.91132-2-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé --- hw/isa/meson.build | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/isa/meson.build b/hw/isa/meson.build index f650b39507..3219282217 100644 --- a/hw/isa/meson.build +++ b/hw/isa/meson.build @@ -1,10 +1,10 @@ system_ss.add(when: 'CONFIG_APM', if_true: files('apm.c')) +system_ss.add(when: 'CONFIG_FDC37M81X', if_true: files('fdc37m81x-superio.c')) system_ss.add(when: 'CONFIG_I82378', if_true: files('i82378.c')) system_ss.add(when: 'CONFIG_ISA_BUS', if_true: files('isa-bus.c')) system_ss.add(when: 'CONFIG_ISA_SUPERIO', if_true: files('isa-superio.c')) system_ss.add(when: 'CONFIG_PC87312', if_true: files('pc87312.c')) system_ss.add(when: 'CONFIG_PIIX', if_true: files('piix.c')) -system_ss.add(when: 'CONFIG_FDC37M81X', if_true: files('fdc37m81x-superio.c')) system_ss.add(when: 'CONFIG_SMC37C669', if_true: files('smc37c669-superio.c')) system_ss.add(when: 'CONFIG_VT82C686', if_true: files('vt82c686.c')) From patchwork Wed Feb 21 21:16:18 2024 Content-Type: text/plain; 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Wed, 21 Feb 2024 13:18:43 -0800 (PST) Received: from m1x-phil.lan ([176.187.211.34]) by smtp.gmail.com with ESMTPSA id x4-20020adff644000000b0033b792ed609sm18116174wrp.91.2024.02.21.13.18.42 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 21 Feb 2024 13:18:43 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-block@nongnu.org, qemu-ppc@nongnu.org, Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Mark Cave-Ayland , Paolo Bonzini , John Snow Subject: [PULL 18/25] hw/ide: Add the possibility to disable the CompactFlash device in the build Date: Wed, 21 Feb 2024 22:16:18 +0100 Message-ID: <20240221211626.48190-19-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240221211626.48190-1-philmd@linaro.org> References: <20240221211626.48190-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=philmd@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Thomas Huth For distros like downstream RHEL, it would be helpful to allow to disable the CompactFlash device. For making this possible, we need a separate Kconfig switch for this device, and the code should reside in a separate file. Let's also introduce a new header ide-dev.h which can be used to collect definitions related to IDE devices. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Thomas Huth Acked-by: Mark Cave-Ayland Message-ID: <20240220085505.30255-2-thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé --- include/hw/ide/ide-dev.h | 41 ++++++++++++++++++++++++++++ hw/ide/cf.c | 58 ++++++++++++++++++++++++++++++++++++++++ hw/ide/qdev.c | 51 ++--------------------------------- hw/ide/Kconfig | 4 +++ hw/ide/meson.build | 1 + 5 files changed, 106 insertions(+), 49 deletions(-) create mode 100644 include/hw/ide/ide-dev.h create mode 100644 hw/ide/cf.c diff --git a/include/hw/ide/ide-dev.h b/include/hw/ide/ide-dev.h new file mode 100644 index 0000000000..7e9663cda9 --- /dev/null +++ b/include/hw/ide/ide-dev.h @@ -0,0 +1,41 @@ +/* + * ide device definitions + * + * Copyright (c) 2009 Gerd Hoffmann + * + * This code is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#ifndef IDE_DEV_H +#define IDE_DEV_H + +#include "hw/qdev-properties.h" +#include "hw/block/block.h" +#include "hw/ide/internal.h" + +typedef struct IDEDrive { + IDEDevice dev; +} IDEDrive; + +#define DEFINE_IDE_DEV_PROPERTIES() \ + DEFINE_BLOCK_PROPERTIES(IDEDrive, dev.conf), \ + DEFINE_BLOCK_ERROR_PROPERTIES(IDEDrive, dev.conf), \ + DEFINE_PROP_STRING("ver", IDEDrive, dev.version), \ + DEFINE_PROP_UINT64("wwn", IDEDrive, dev.wwn, 0), \ + DEFINE_PROP_STRING("serial", IDEDrive, dev.serial),\ + DEFINE_PROP_STRING("model", IDEDrive, dev.model) + +void ide_dev_initfn(IDEDevice *dev, IDEDriveKind kind, Error **errp); + +#endif diff --git a/hw/ide/cf.c b/hw/ide/cf.c new file mode 100644 index 0000000000..2a425cb0f2 --- /dev/null +++ b/hw/ide/cf.c @@ -0,0 +1,58 @@ +/* + * ide CompactFlash support + * + * This code is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#include "qemu/osdep.h" +#include "hw/ide/ide-dev.h" +#include "qapi/qapi-types-block.h" + +static void ide_cf_realize(IDEDevice *dev, Error **errp) +{ + ide_dev_initfn(dev, IDE_CFATA, errp); +} + +static Property ide_cf_properties[] = { + DEFINE_IDE_DEV_PROPERTIES(), + DEFINE_BLOCK_CHS_PROPERTIES(IDEDrive, dev.conf), + DEFINE_PROP_BIOS_CHS_TRANS("bios-chs-trans", + IDEDrive, dev.chs_trans, BIOS_ATA_TRANSLATION_AUTO), + DEFINE_PROP_END_OF_LIST(), +}; + +static void ide_cf_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + IDEDeviceClass *k = IDE_DEVICE_CLASS(klass); + + k->realize = ide_cf_realize; + dc->fw_name = "drive"; + dc->desc = "virtual CompactFlash card"; + device_class_set_props(dc, ide_cf_properties); +} + +static const TypeInfo ide_cf_info = { + .name = "ide-cf", + .parent = TYPE_IDE_DEVICE, + .instance_size = sizeof(IDEDrive), + .class_init = ide_cf_class_init, +}; + +static void ide_cf_register_type(void) +{ + type_register_static(&ide_cf_info); +} + +type_init(ide_cf_register_type) diff --git a/hw/ide/qdev.c b/hw/ide/qdev.c index 1b3b4da01d..4189313d30 100644 --- a/hw/ide/qdev.c +++ b/hw/ide/qdev.c @@ -24,12 +24,9 @@ #include "qemu/error-report.h" #include "qemu/main-loop.h" #include "qemu/module.h" -#include "hw/ide/internal.h" -#include "hw/qdev-properties.h" -#include "hw/qdev-properties-system.h" +#include "hw/ide/ide-dev.h" #include "sysemu/block-backend.h" #include "sysemu/blockdev.h" -#include "hw/block/block.h" #include "sysemu/sysemu.h" #include "sysemu/runstate.h" #include "qapi/visitor.h" @@ -158,11 +155,7 @@ int ide_get_bios_chs_trans(BusState *bus, int unit) /* --------------------------------- */ -typedef struct IDEDrive { - IDEDevice dev; -} IDEDrive; - -static void ide_dev_initfn(IDEDevice *dev, IDEDriveKind kind, Error **errp) +void ide_dev_initfn(IDEDevice *dev, IDEDriveKind kind, Error **errp) { IDEBus *bus = DO_UPCAST(IDEBus, qbus, dev->qdev.parent_bus); IDEState *s = bus->ifs + dev->unit; @@ -283,19 +276,6 @@ static void ide_cd_realize(IDEDevice *dev, Error **errp) ide_dev_initfn(dev, IDE_CD, errp); } -static void ide_cf_realize(IDEDevice *dev, Error **errp) -{ - ide_dev_initfn(dev, IDE_CFATA, errp); -} - -#define DEFINE_IDE_DEV_PROPERTIES() \ - DEFINE_BLOCK_PROPERTIES(IDEDrive, dev.conf), \ - DEFINE_BLOCK_ERROR_PROPERTIES(IDEDrive, dev.conf), \ - DEFINE_PROP_STRING("ver", IDEDrive, dev.version), \ - DEFINE_PROP_UINT64("wwn", IDEDrive, dev.wwn, 0), \ - DEFINE_PROP_STRING("serial", IDEDrive, dev.serial),\ - DEFINE_PROP_STRING("model", IDEDrive, dev.model) - static Property ide_hd_properties[] = { DEFINE_IDE_DEV_PROPERTIES(), DEFINE_BLOCK_CHS_PROPERTIES(IDEDrive, dev.conf), @@ -346,32 +326,6 @@ static const TypeInfo ide_cd_info = { .class_init = ide_cd_class_init, }; -static Property ide_cf_properties[] = { - DEFINE_IDE_DEV_PROPERTIES(), - DEFINE_BLOCK_CHS_PROPERTIES(IDEDrive, dev.conf), - DEFINE_PROP_BIOS_CHS_TRANS("bios-chs-trans", - IDEDrive, dev.chs_trans, BIOS_ATA_TRANSLATION_AUTO), - DEFINE_PROP_END_OF_LIST(), -}; - -static void ide_cf_class_init(ObjectClass *klass, void *data) -{ - DeviceClass *dc = DEVICE_CLASS(klass); - IDEDeviceClass *k = IDE_DEVICE_CLASS(klass); - - k->realize = ide_cf_realize; - dc->fw_name = "drive"; - dc->desc = "virtual CompactFlash card"; - device_class_set_props(dc, ide_cf_properties); -} - -static const TypeInfo ide_cf_info = { - .name = "ide-cf", - .parent = TYPE_IDE_DEVICE, - .instance_size = sizeof(IDEDrive), - .class_init = ide_cf_class_init, -}; - static void ide_device_class_init(ObjectClass *klass, void *data) { DeviceClass *k = DEVICE_CLASS(klass); @@ -396,7 +350,6 @@ static void ide_register_types(void) type_register_static(&ide_bus_info); type_register_static(&ide_hd_info); type_register_static(&ide_cd_info); - type_register_static(&ide_cf_info); type_register_static(&ide_device_type_info); } diff --git a/hw/ide/Kconfig b/hw/ide/Kconfig index dd85fa3619..b93d6743d5 100644 --- a/hw/ide/Kconfig +++ b/hw/ide/Kconfig @@ -57,3 +57,7 @@ config IDE_SII3112 bool select IDE_PCI select IDE_QDEV + +config IDE_CF + bool + default y if IDE_QDEV diff --git a/hw/ide/meson.build b/hw/ide/meson.build index e050eef942..d2e5b45c9e 100644 --- a/hw/ide/meson.build +++ b/hw/ide/meson.build @@ -1,6 +1,7 @@ system_ss.add(when: 'CONFIG_AHCI', if_true: files('ahci.c')) system_ss.add(when: 'CONFIG_AHCI_ICH9', if_true: files('ich.c')) system_ss.add(when: 'CONFIG_ALLWINNER_A10', if_true: files('ahci-allwinner.c')) +system_ss.add(when: 'CONFIG_IDE_CF', if_true: files('cf.c')) system_ss.add(when: 'CONFIG_IDE_CMD646', if_true: files('cmd646.c')) system_ss.add(when: 'CONFIG_IDE_CORE', if_true: files('core.c', 'atapi.c')) system_ss.add(when: 'CONFIG_IDE_ISA', if_true: files('isa.c', 'ioport.c')) From patchwork Wed Feb 21 21:16:19 2024 Content-Type: text/plain; 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Wed, 21 Feb 2024 13:18:49 -0800 (PST) Received: from m1x-phil.lan ([176.187.211.34]) by smtp.gmail.com with ESMTPSA id d2-20020adfef82000000b0033b75b39aebsm18035057wro.11.2024.02.21.13.18.47 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 21 Feb 2024 13:18:48 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-block@nongnu.org, qemu-ppc@nongnu.org, Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Mark Cave-Ayland , Paolo Bonzini , Peter Maydell , John Snow Subject: [PULL 19/25] hw/ide: Split qdev.c into ide-bus.c and ide-dev.c Date: Wed, 21 Feb 2024 22:16:19 +0100 Message-ID: <20240221211626.48190-20-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240221211626.48190-1-philmd@linaro.org> References: <20240221211626.48190-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Thomas Huth qdev.c is a mixture between IDE bus specific functions and IDE device functions. Let's split it up to make it more obvious which part is related to bus handling and which part is related to device handling. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Thomas Huth Acked-by: Mark Cave-Ayland Message-ID: <20240220085505.30255-3-thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé --- hw/ide/ide-bus.c | 111 +++++++++++++++++++++++++++++++++++ hw/ide/{qdev.c => ide-dev.c} | 87 +-------------------------- hw/arm/Kconfig | 2 + hw/ide/Kconfig | 30 ++++++---- hw/ide/meson.build | 3 +- 5 files changed, 134 insertions(+), 99 deletions(-) create mode 100644 hw/ide/ide-bus.c rename hw/ide/{qdev.c => ide-dev.c} (78%) diff --git a/hw/ide/ide-bus.c b/hw/ide/ide-bus.c new file mode 100644 index 0000000000..57fe67b29c --- /dev/null +++ b/hw/ide/ide-bus.c @@ -0,0 +1,111 @@ +/* + * ide bus support for qdev. + * + * Copyright (c) 2009 Gerd Hoffmann + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "qemu/error-report.h" +#include "qemu/module.h" +#include "hw/ide/internal.h" +#include "sysemu/block-backend.h" +#include "sysemu/blockdev.h" +#include "sysemu/runstate.h" + +static char *idebus_get_fw_dev_path(DeviceState *dev); +static void idebus_unrealize(BusState *qdev); + +static void ide_bus_class_init(ObjectClass *klass, void *data) +{ + BusClass *k = BUS_CLASS(klass); + + k->get_fw_dev_path = idebus_get_fw_dev_path; + k->unrealize = idebus_unrealize; +} + +static void idebus_unrealize(BusState *bus) +{ + IDEBus *ibus = IDE_BUS(bus); + + if (ibus->vmstate) { + qemu_del_vm_change_state_handler(ibus->vmstate); + } +} + +static const TypeInfo ide_bus_info = { + .name = TYPE_IDE_BUS, + .parent = TYPE_BUS, + .instance_size = sizeof(IDEBus), + .class_init = ide_bus_class_init, +}; + +void ide_bus_init(IDEBus *idebus, size_t idebus_size, DeviceState *dev, + int bus_id, int max_units) +{ + qbus_init(idebus, idebus_size, TYPE_IDE_BUS, dev, NULL); + idebus->bus_id = bus_id; + idebus->max_units = max_units; +} + +static char *idebus_get_fw_dev_path(DeviceState *dev) +{ + char path[30]; + + snprintf(path, sizeof(path), "%s@%x", qdev_fw_name(dev), + ((IDEBus *)dev->parent_bus)->bus_id); + + return g_strdup(path); +} + +IDEDevice *ide_bus_create_drive(IDEBus *bus, int unit, DriveInfo *drive) +{ + DeviceState *dev; + + dev = qdev_new(drive->media_cd ? "ide-cd" : "ide-hd"); + qdev_prop_set_uint32(dev, "unit", unit); + qdev_prop_set_drive_err(dev, "drive", blk_by_legacy_dinfo(drive), + &error_fatal); + qdev_realize_and_unref(dev, &bus->qbus, &error_fatal); + return DO_UPCAST(IDEDevice, qdev, dev); +} + +int ide_get_geometry(BusState *bus, int unit, + int16_t *cyls, int8_t *heads, int8_t *secs) +{ + IDEState *s = &DO_UPCAST(IDEBus, qbus, bus)->ifs[unit]; + + if (s->drive_kind != IDE_HD || !s->blk) { + return -1; + } + + *cyls = s->cylinders; + *heads = s->heads; + *secs = s->sectors; + return 0; +} + +int ide_get_bios_chs_trans(BusState *bus, int unit) +{ + return DO_UPCAST(IDEBus, qbus, bus)->ifs[unit].chs_trans; +} + +static void ide_bus_register_type(void) +{ + type_register_static(&ide_bus_info); +} + +type_init(ide_bus_register_type) diff --git a/hw/ide/qdev.c b/hw/ide/ide-dev.c similarity index 78% rename from hw/ide/qdev.c rename to hw/ide/ide-dev.c index 4189313d30..15d088fd06 100644 --- a/hw/ide/qdev.c +++ b/hw/ide/ide-dev.c @@ -1,5 +1,5 @@ /* - * ide bus support for qdev. + * IDE device functions * * Copyright (c) 2009 Gerd Hoffmann * @@ -18,71 +18,21 @@ */ #include "qemu/osdep.h" -#include "sysemu/dma.h" #include "qapi/error.h" #include "qapi/qapi-types-block.h" #include "qemu/error-report.h" -#include "qemu/main-loop.h" #include "qemu/module.h" #include "hw/ide/ide-dev.h" #include "sysemu/block-backend.h" #include "sysemu/blockdev.h" #include "sysemu/sysemu.h" -#include "sysemu/runstate.h" #include "qapi/visitor.h" -/* --------------------------------- */ - -static char *idebus_get_fw_dev_path(DeviceState *dev); -static void idebus_unrealize(BusState *qdev); - static Property ide_props[] = { DEFINE_PROP_UINT32("unit", IDEDevice, unit, -1), DEFINE_PROP_END_OF_LIST(), }; -static void ide_bus_class_init(ObjectClass *klass, void *data) -{ - BusClass *k = BUS_CLASS(klass); - - k->get_fw_dev_path = idebus_get_fw_dev_path; - k->unrealize = idebus_unrealize; -} - -static void idebus_unrealize(BusState *bus) -{ - IDEBus *ibus = IDE_BUS(bus); - - if (ibus->vmstate) { - qemu_del_vm_change_state_handler(ibus->vmstate); - } -} - -static const TypeInfo ide_bus_info = { - .name = TYPE_IDE_BUS, - .parent = TYPE_BUS, - .instance_size = sizeof(IDEBus), - .class_init = ide_bus_class_init, -}; - -void ide_bus_init(IDEBus *idebus, size_t idebus_size, DeviceState *dev, - int bus_id, int max_units) -{ - qbus_init(idebus, idebus_size, TYPE_IDE_BUS, dev, NULL); - idebus->bus_id = bus_id; - idebus->max_units = max_units; -} - -static char *idebus_get_fw_dev_path(DeviceState *dev) -{ - char path[30]; - - snprintf(path, sizeof(path), "%s@%x", qdev_fw_name(dev), - ((IDEBus*)dev->parent_bus)->bus_id); - - return g_strdup(path); -} - static void ide_qdev_realize(DeviceState *qdev, Error **errp) { IDEDevice *dev = IDE_DEVICE(qdev); @@ -121,40 +71,6 @@ static void ide_qdev_realize(DeviceState *qdev, Error **errp) dc->realize(dev, errp); } -IDEDevice *ide_bus_create_drive(IDEBus *bus, int unit, DriveInfo *drive) -{ - DeviceState *dev; - - dev = qdev_new(drive->media_cd ? "ide-cd" : "ide-hd"); - qdev_prop_set_uint32(dev, "unit", unit); - qdev_prop_set_drive_err(dev, "drive", blk_by_legacy_dinfo(drive), - &error_fatal); - qdev_realize_and_unref(dev, &bus->qbus, &error_fatal); - return DO_UPCAST(IDEDevice, qdev, dev); -} - -int ide_get_geometry(BusState *bus, int unit, - int16_t *cyls, int8_t *heads, int8_t *secs) -{ - IDEState *s = &DO_UPCAST(IDEBus, qbus, bus)->ifs[unit]; - - if (s->drive_kind != IDE_HD || !s->blk) { - return -1; - } - - *cyls = s->cylinders; - *heads = s->heads; - *secs = s->sectors; - return 0; -} - -int ide_get_bios_chs_trans(BusState *bus, int unit) -{ - return DO_UPCAST(IDEBus, qbus, bus)->ifs[unit].chs_trans; -} - -/* --------------------------------- */ - void ide_dev_initfn(IDEDevice *dev, IDEDriveKind kind, Error **errp) { IDEBus *bus = DO_UPCAST(IDEBus, qbus, dev->qdev.parent_bus); @@ -347,7 +263,6 @@ static const TypeInfo ide_device_type_info = { static void ide_register_types(void) { - type_register_static(&ide_bus_info); type_register_static(&ide_hd_info); type_register_static(&ide_cd_info); type_register_static(&ide_device_type_info); diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index 29abe1da29..b372b819a4 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -275,6 +275,8 @@ config SBSA_REF select USB_XHCI_SYSBUS select WDT_SBSA select BOCHS_DISPLAY + select IDE_BUS + select IDE_DEV config SABRELITE bool diff --git a/hw/ide/Kconfig b/hw/ide/Kconfig index b93d6743d5..6dfc5a2129 100644 --- a/hw/ide/Kconfig +++ b/hw/ide/Kconfig @@ -1,51 +1,58 @@ config IDE_CORE bool -config IDE_QDEV +config IDE_BUS bool select IDE_CORE +config IDE_DEV + bool + depends on IDE_BUS + config IDE_PCI bool depends on PCI - select IDE_QDEV + select IDE_BUS + select IDE_DEV config IDE_ISA bool depends on ISA_BUS - select IDE_QDEV + select IDE_BUS + select IDE_DEV config IDE_PIIX bool select IDE_PCI - select IDE_QDEV config IDE_CMD646 bool select IDE_PCI - select IDE_QDEV config IDE_MACIO bool - select IDE_QDEV + select IDE_BUS + select IDE_DEV config IDE_MMIO bool - select IDE_QDEV + select IDE_BUS + select IDE_DEV config IDE_VIA bool select IDE_PCI - select IDE_QDEV config MICRODRIVE bool - select IDE_QDEV + select IDE_BUS + select IDE_DEV depends on PCMCIA config AHCI bool - select IDE_QDEV + select IDE_BUS + select IDE_DEV config AHCI_ICH9 bool @@ -56,8 +63,7 @@ config AHCI_ICH9 config IDE_SII3112 bool select IDE_PCI - select IDE_QDEV config IDE_CF bool - default y if IDE_QDEV + default y if IDE_BUS diff --git a/hw/ide/meson.build b/hw/ide/meson.build index d2e5b45c9e..d09705cac0 100644 --- a/hw/ide/meson.build +++ b/hw/ide/meson.build @@ -1,15 +1,16 @@ system_ss.add(when: 'CONFIG_AHCI', if_true: files('ahci.c')) system_ss.add(when: 'CONFIG_AHCI_ICH9', if_true: files('ich.c')) system_ss.add(when: 'CONFIG_ALLWINNER_A10', if_true: files('ahci-allwinner.c')) +system_ss.add(when: 'CONFIG_IDE_BUS', if_true: files('ide-bus.c')) system_ss.add(when: 'CONFIG_IDE_CF', if_true: files('cf.c')) system_ss.add(when: 'CONFIG_IDE_CMD646', if_true: files('cmd646.c')) system_ss.add(when: 'CONFIG_IDE_CORE', if_true: files('core.c', 'atapi.c')) +system_ss.add(when: 'CONFIG_IDE_DEV', if_true: files('ide-dev.c')) system_ss.add(when: 'CONFIG_IDE_ISA', if_true: files('isa.c', 'ioport.c')) system_ss.add(when: 'CONFIG_IDE_MACIO', if_true: files('macio.c')) system_ss.add(when: 'CONFIG_IDE_MMIO', if_true: files('mmio.c')) system_ss.add(when: 'CONFIG_IDE_PCI', if_true: files('pci.c')) system_ss.add(when: 'CONFIG_IDE_PIIX', if_true: files('piix.c', 'ioport.c')) -system_ss.add(when: 'CONFIG_IDE_QDEV', if_true: files('qdev.c')) system_ss.add(when: 'CONFIG_IDE_SII3112', if_true: files('sii3112.c')) system_ss.add(when: 'CONFIG_IDE_VIA', if_true: files('via.c')) system_ss.add(when: 'CONFIG_MICRODRIVE', if_true: files('microdrive.c')) From patchwork Wed Feb 21 21:16:20 2024 Content-Type: text/plain; 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Wed, 21 Feb 2024 13:18:55 -0800 (PST) Received: from m1x-phil.lan ([176.187.211.34]) by smtp.gmail.com with ESMTPSA id f9-20020a05600c44c900b00411e3cc0e0asm18723489wmo.44.2024.02.21.13.18.53 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 21 Feb 2024 13:18:54 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-block@nongnu.org, qemu-ppc@nongnu.org, Thomas Huth , Mark Cave-Ayland , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= , John Snow Subject: [PULL 20/25] hw/ide: Move IDE DMA related definitions to a separate header ide-dma.h Date: Wed, 21 Feb 2024 22:16:20 +0100 Message-ID: <20240221211626.48190-21-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240221211626.48190-1-philmd@linaro.org> References: <20240221211626.48190-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Thomas Huth These definitions are required outside of the hw/ide/ code, too, so lets's move them from internal.h to a new header called ide-dma.h. Signed-off-by: Thomas Huth Acked-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20240220085505.30255-4-thuth@redhat.com> [PMD: Use IDEDMAOps typedef in struct IDEDMA] Signed-off-by: Philippe Mathieu-Daudé --- include/hw/ide/ide-dma.h | 37 +++++++++++++++++++++++++++++++++++++ include/hw/ide/internal.h | 29 +---------------------------- 2 files changed, 38 insertions(+), 28 deletions(-) create mode 100644 include/hw/ide/ide-dma.h diff --git a/include/hw/ide/ide-dma.h b/include/hw/ide/ide-dma.h new file mode 100644 index 0000000000..d0b19ac9c5 --- /dev/null +++ b/include/hw/ide/ide-dma.h @@ -0,0 +1,37 @@ +#ifndef HW_IDE_DMA_H +#define HW_IDE_DMA_H + +#include "block/aio.h" +#include "qemu/iov.h" + +typedef struct IDEState IDEState; +typedef struct IDEDMAOps IDEDMAOps; +typedef struct IDEDMA IDEDMA; + +typedef void DMAStartFunc(const IDEDMA *, IDEState *, BlockCompletionFunc *); +typedef void DMAVoidFunc(const IDEDMA *); +typedef int DMAIntFunc(const IDEDMA *, bool); +typedef int32_t DMAInt32Func(const IDEDMA *, int32_t len); +typedef void DMAu32Func(const IDEDMA *, uint32_t); +typedef void DMAStopFunc(const IDEDMA *, bool); + +struct IDEDMAOps { + DMAStartFunc *start_dma; + DMAVoidFunc *pio_transfer; + DMAInt32Func *prepare_buf; + DMAu32Func *commit_buf; + DMAIntFunc *rw_buf; + DMAVoidFunc *restart; + DMAVoidFunc *restart_dma; + DMAStopFunc *set_inactive; + DMAVoidFunc *cmd_done; + DMAVoidFunc *reset; +}; + +struct IDEDMA { + const IDEDMAOps *ops; + QEMUIOVector qiov; + BlockAIOCB *aiocb; +}; + +#endif diff --git a/include/hw/ide/internal.h b/include/hw/ide/internal.h index 3bdcc75597..a3a6702eec 100644 --- a/include/hw/ide/internal.h +++ b/include/hw/ide/internal.h @@ -11,6 +11,7 @@ #include "sysemu/dma.h" #include "hw/block/block.h" #include "exec/ioport.h" +#include "hw/ide/ide-dma.h" /* debug IDE devices */ #define USE_DMA_CDROM @@ -18,8 +19,6 @@ typedef struct IDEDevice IDEDevice; typedef struct IDEState IDEState; -typedef struct IDEDMA IDEDMA; -typedef struct IDEDMAOps IDEDMAOps; #define TYPE_IDE_BUS "IDE" OBJECT_DECLARE_SIMPLE_TYPE(IDEBus, IDE_BUS) @@ -332,13 +331,6 @@ typedef enum { IDE_HD, IDE_CD, IDE_CFATA } IDEDriveKind; typedef void EndTransferFunc(IDEState *); -typedef void DMAStartFunc(const IDEDMA *, IDEState *, BlockCompletionFunc *); -typedef void DMAVoidFunc(const IDEDMA *); -typedef int DMAIntFunc(const IDEDMA *, bool); -typedef int32_t DMAInt32Func(const IDEDMA *, int32_t len); -typedef void DMAu32Func(const IDEDMA *, uint32_t); -typedef void DMAStopFunc(const IDEDMA *, bool); - struct unreported_events { bool eject_request; bool new_media; @@ -460,25 +452,6 @@ struct IDEState { int ncq_queues; }; -struct IDEDMAOps { - DMAStartFunc *start_dma; - DMAVoidFunc *pio_transfer; - DMAInt32Func *prepare_buf; - DMAu32Func *commit_buf; - DMAIntFunc *rw_buf; - DMAVoidFunc *restart; - DMAVoidFunc *restart_dma; - DMAStopFunc *set_inactive; - DMAVoidFunc *cmd_done; - DMAVoidFunc *reset; -}; - -struct IDEDMA { - const struct IDEDMAOps *ops; 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Wed, 21 Feb 2024 13:19:00 -0800 (PST) Received: from m1x-phil.lan ([176.187.211.34]) by smtp.gmail.com with ESMTPSA id r2-20020a05600c35c200b004123b049f86sm19731963wmq.37.2024.02.21.13.18.59 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 21 Feb 2024 13:19:00 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-block@nongnu.org, qemu-ppc@nongnu.org, Thomas Huth , Mark Cave-Ayland , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= , John Snow Subject: [PULL 21/25] hw/ide: Move IDE device related definitions to ide-dev.h Date: Wed, 21 Feb 2024 22:16:21 +0100 Message-ID: <20240221211626.48190-22-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240221211626.48190-1-philmd@linaro.org> References: <20240221211626.48190-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=philmd@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Thomas Huth Untangle internal.h by moving public IDE device related definitions to ide-dev.h. Signed-off-by: Thomas Huth Acked-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20240220085505.30255-5-thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé --- include/hw/ide/ide-dev.h | 143 +++++++++++++++++++++++++++++++++++++- include/hw/ide/internal.h | 143 +------------------------------------- hw/ide/ide-dev.c | 1 + 3 files changed, 144 insertions(+), 143 deletions(-) diff --git a/include/hw/ide/ide-dev.h b/include/hw/ide/ide-dev.h index 7e9663cda9..1f62e58ebc 100644 --- a/include/hw/ide/ide-dev.h +++ b/include/hw/ide/ide-dev.h @@ -20,9 +20,150 @@ #ifndef IDE_DEV_H #define IDE_DEV_H +#include "sysemu/dma.h" #include "hw/qdev-properties.h" #include "hw/block/block.h" -#include "hw/ide/internal.h" + +typedef struct IDEDevice IDEDevice; +typedef struct IDEState IDEState; +typedef struct IDEBus IDEBus; + +typedef void EndTransferFunc(IDEState *); + +#define MAX_IDE_DEVS 2 + +#define TYPE_IDE_DEVICE "ide-device" +OBJECT_DECLARE_TYPE(IDEDevice, IDEDeviceClass, IDE_DEVICE) + +typedef enum { IDE_HD, IDE_CD, IDE_CFATA } IDEDriveKind; + +struct unreported_events { + bool eject_request; + bool new_media; +}; + +enum ide_dma_cmd { + IDE_DMA_READ = 0, + IDE_DMA_WRITE, + IDE_DMA_TRIM, + IDE_DMA_ATAPI, + IDE_DMA__COUNT +}; + +/* NOTE: IDEState represents in fact one drive */ +struct IDEState { + IDEBus *bus; + uint8_t unit; + /* ide config */ + IDEDriveKind drive_kind; + int drive_heads, drive_sectors; + int cylinders, heads, sectors, chs_trans; + int64_t nb_sectors; + int mult_sectors; + int identify_set; + uint8_t identify_data[512]; + int drive_serial; + char drive_serial_str[21]; + char drive_model_str[41]; + uint64_t wwn; + /* ide regs */ + uint8_t feature; + uint8_t error; + uint32_t nsector; + uint8_t sector; + uint8_t lcyl; + uint8_t hcyl; + /* other part of tf for lba48 support */ + uint8_t hob_feature; + uint8_t hob_nsector; + uint8_t hob_sector; + uint8_t hob_lcyl; + uint8_t hob_hcyl; + + uint8_t select; + uint8_t status; + + bool io8; + bool reset_reverts; + + /* set for lba48 access */ + uint8_t lba48; + BlockBackend *blk; + char version[9]; + /* ATAPI specific */ + struct unreported_events events; + uint8_t sense_key; + uint8_t asc; + bool tray_open; + bool tray_locked; + uint8_t cdrom_changed; + int packet_transfer_size; + int elementary_transfer_size; + int32_t io_buffer_index; + int lba; + int cd_sector_size; + int atapi_dma; /* true if dma is requested for the packet cmd */ + BlockAcctCookie acct; + BlockAIOCB *pio_aiocb; + QEMUIOVector qiov; + QLIST_HEAD(, IDEBufferedRequest) buffered_requests; + /* ATA DMA state */ + uint64_t io_buffer_offset; + int32_t io_buffer_size; + QEMUSGList sg; + /* PIO transfer handling */ + int req_nb_sectors; /* number of sectors per interrupt */ + EndTransferFunc *end_transfer_func; + uint8_t *data_ptr; + uint8_t *data_end; + uint8_t *io_buffer; + /* PIO save/restore */ + int32_t io_buffer_total_len; + int32_t cur_io_buffer_offset; + int32_t cur_io_buffer_len; + uint8_t end_transfer_fn_idx; + QEMUTimer *sector_write_timer; /* only used for win2k install hack */ + uint32_t irq_count; /* counts IRQs when using win2k install hack */ + /* CF-ATA extended error */ + uint8_t ext_error; + /* CF-ATA metadata storage */ + uint32_t mdata_size; + uint8_t *mdata_storage; + int media_changed; + enum ide_dma_cmd dma_cmd; + /* SMART */ + uint8_t smart_enabled; + uint8_t smart_autosave; + int smart_errors; + uint8_t smart_selftest_count; + uint8_t *smart_selftest_data; + /* AHCI */ + int ncq_queues; +}; + +struct IDEDeviceClass { + DeviceClass parent_class; + void (*realize)(IDEDevice *dev, Error **errp); +}; + +struct IDEDevice { + DeviceState qdev; + uint32_t unit; + BlockConf conf; + int chs_trans; + char *version; + char *serial; + char *model; + uint64_t wwn; + /* + * 0x0000 - rotation rate not reported + * 0x0001 - non-rotating medium (SSD) + * 0x0002-0x0400 - reserved + * 0x0401-0xffe - rotations per minute + * 0xffff - reserved + */ + uint16_t rotation_rate; +}; typedef struct IDEDrive { IDEDevice dev; diff --git a/include/hw/ide/internal.h b/include/hw/ide/internal.h index a3a6702eec..1aab89b27b 100644 --- a/include/hw/ide/internal.h +++ b/include/hw/ide/internal.h @@ -8,23 +8,17 @@ */ #include "hw/ide.h" -#include "sysemu/dma.h" -#include "hw/block/block.h" #include "exec/ioport.h" #include "hw/ide/ide-dma.h" +#include "hw/ide/ide-dev.h" /* debug IDE devices */ #define USE_DMA_CDROM #include "qom/object.h" -typedef struct IDEDevice IDEDevice; -typedef struct IDEState IDEState; - #define TYPE_IDE_BUS "IDE" OBJECT_DECLARE_SIMPLE_TYPE(IDEBus, IDE_BUS) -#define MAX_IDE_DEVS 2 - /* Device/Head ("select") Register */ #define ATA_DEV_SELECT 0x10 /* ATA1,3: Defined as '1'. @@ -327,23 +321,6 @@ OBJECT_DECLARE_SIMPLE_TYPE(IDEBus, IDE_BUS) #define SMART_DISABLE 0xd9 #define SMART_STATUS 0xda -typedef enum { IDE_HD, IDE_CD, IDE_CFATA } IDEDriveKind; - -typedef void EndTransferFunc(IDEState *); - -struct unreported_events { - bool eject_request; - bool new_media; -}; - -enum ide_dma_cmd { - IDE_DMA_READ = 0, - IDE_DMA_WRITE, - IDE_DMA_TRIM, - IDE_DMA_ATAPI, - IDE_DMA__COUNT -}; - extern const char *IDE_DMA_CMD_lookup[IDE_DMA__COUNT]; extern const MemoryRegionPortio ide_portio_list[]; @@ -361,97 +338,6 @@ typedef struct IDEBufferedRequest { bool orphaned; } IDEBufferedRequest; -/* NOTE: IDEState represents in fact one drive */ -struct IDEState { - IDEBus *bus; - uint8_t unit; - /* ide config */ - IDEDriveKind drive_kind; - int drive_heads, drive_sectors; - int cylinders, heads, sectors, chs_trans; - int64_t nb_sectors; - int mult_sectors; - int identify_set; - uint8_t identify_data[512]; - int drive_serial; - char drive_serial_str[21]; - char drive_model_str[41]; - uint64_t wwn; - /* ide regs */ - uint8_t feature; - uint8_t error; - uint32_t nsector; - uint8_t sector; - uint8_t lcyl; - uint8_t hcyl; - /* other part of tf for lba48 support */ - uint8_t hob_feature; - uint8_t hob_nsector; - uint8_t hob_sector; - uint8_t hob_lcyl; - uint8_t hob_hcyl; - - uint8_t select; - uint8_t status; - - bool io8; - bool reset_reverts; - - /* set for lba48 access */ - uint8_t lba48; - BlockBackend *blk; - char version[9]; - /* ATAPI specific */ - struct unreported_events events; - uint8_t sense_key; - uint8_t asc; - bool tray_open; - bool tray_locked; - uint8_t cdrom_changed; - int packet_transfer_size; - int elementary_transfer_size; - int32_t io_buffer_index; - int lba; - int cd_sector_size; - int atapi_dma; /* true if dma is requested for the packet cmd */ - BlockAcctCookie acct; - BlockAIOCB *pio_aiocb; - QEMUIOVector qiov; - QLIST_HEAD(, IDEBufferedRequest) buffered_requests; - /* ATA DMA state */ - uint64_t io_buffer_offset; - int32_t io_buffer_size; - QEMUSGList sg; - /* PIO transfer handling */ - int req_nb_sectors; /* number of sectors per interrupt */ - EndTransferFunc *end_transfer_func; - uint8_t *data_ptr; - uint8_t *data_end; - uint8_t *io_buffer; - /* PIO save/restore */ - int32_t io_buffer_total_len; - int32_t cur_io_buffer_offset; - int32_t cur_io_buffer_len; - uint8_t end_transfer_fn_idx; - QEMUTimer *sector_write_timer; /* only used for win2k install hack */ - uint32_t irq_count; /* counts IRQs when using win2k install hack */ - /* CF-ATA extended error */ - uint8_t ext_error; - /* CF-ATA metadata storage */ - uint32_t mdata_size; - uint8_t *mdata_storage; - int media_changed; - enum ide_dma_cmd dma_cmd; - /* SMART */ - uint8_t smart_enabled; - uint8_t smart_autosave; - int smart_errors; - uint8_t smart_selftest_count; - uint8_t *smart_selftest_data; - /* AHCI */ - int ncq_queues; -}; - struct IDEBus { BusState qbus; IDEDevice *master; @@ -475,33 +361,6 @@ struct IDEBus { VMChangeStateEntry *vmstate; }; -#define TYPE_IDE_DEVICE "ide-device" -OBJECT_DECLARE_TYPE(IDEDevice, IDEDeviceClass, IDE_DEVICE) - -struct IDEDeviceClass { - DeviceClass parent_class; - void (*realize)(IDEDevice *dev, Error **errp); -}; - -struct IDEDevice { - DeviceState qdev; - uint32_t unit; - BlockConf conf; - int chs_trans; - char *version; - char *serial; - char *model; - uint64_t wwn; - /* - * 0x0000 - rotation rate not reported - * 0x0001 - non-rotating medium (SSD) - * 0x0002-0x0400 - reserved - * 0x0401-0xffe - rotations per minute - * 0xffff - reserved - */ - uint16_t rotation_rate; -}; - /* These are used for the error_status field of IDEBus */ #define IDE_RETRY_MASK 0xf8 #define IDE_RETRY_DMA 0x08 diff --git a/hw/ide/ide-dev.c b/hw/ide/ide-dev.c index 15d088fd06..c8e2033469 100644 --- a/hw/ide/ide-dev.c +++ b/hw/ide/ide-dev.c @@ -23,6 +23,7 @@ #include "qemu/error-report.h" #include "qemu/module.h" #include "hw/ide/ide-dev.h" +#include "hw/ide/internal.h" #include "sysemu/block-backend.h" #include "sysemu/blockdev.h" #include "sysemu/sysemu.h" From patchwork Wed Feb 21 21:16:22 2024 Content-Type: text/plain; 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Wed, 21 Feb 2024 13:19:06 -0800 (PST) Received: from m1x-phil.lan ([176.187.211.34]) by smtp.gmail.com with ESMTPSA id e4-20020adfe384000000b0033cfa00e497sm17842766wrm.64.2024.02.21.13.19.05 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 21 Feb 2024 13:19:05 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-block@nongnu.org, qemu-ppc@nongnu.org, Thomas Huth , Mark Cave-Ayland , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= , John Snow Subject: [PULL 22/25] hw/ide: Move IDE bus related definitions to a new header ide-bus.h Date: Wed, 21 Feb 2024 22:16:22 +0100 Message-ID: <20240221211626.48190-23-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240221211626.48190-1-philmd@linaro.org> References: <20240221211626.48190-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=philmd@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Thomas Huth Let's consolidate the public IDE bus related functions in a separate header. Signed-off-by: Thomas Huth Acked-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20240220085505.30255-6-thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé --- include/hw/ide/ide-bus.h | 42 +++++++++++++++++++++++++++++++++++++++ include/hw/ide/internal.h | 40 +------------------------------------ 2 files changed, 43 insertions(+), 39 deletions(-) create mode 100644 include/hw/ide/ide-bus.h diff --git a/include/hw/ide/ide-bus.h b/include/hw/ide/ide-bus.h new file mode 100644 index 0000000000..4841a7dcd6 --- /dev/null +++ b/include/hw/ide/ide-bus.h @@ -0,0 +1,42 @@ +#ifndef HW_IDE_BUS_H +#define HW_IDE_BUS_H + +#include "exec/ioport.h" +#include "hw/ide/ide-dev.h" +#include "hw/ide/ide-dma.h" + +struct IDEBus { + BusState qbus; + IDEDevice *master; + IDEDevice *slave; + IDEState ifs[2]; + QEMUBH *bh; + + int bus_id; + int max_units; + IDEDMA *dma; + uint8_t unit; + uint8_t cmd; + qemu_irq irq; /* bus output */ + + int error_status; + uint8_t retry_unit; + int64_t retry_sector_num; + uint32_t retry_nsector; + PortioList portio_list; + PortioList portio2_list; + VMChangeStateEntry *vmstate; +}; + +#define TYPE_IDE_BUS "IDE" +OBJECT_DECLARE_SIMPLE_TYPE(IDEBus, IDE_BUS) + +void ide_bus_init(IDEBus *idebus, size_t idebus_size, DeviceState *dev, + int bus_id, int max_units); +IDEDevice *ide_bus_create_drive(IDEBus *bus, int unit, DriveInfo *drive); + +int ide_get_geometry(BusState *bus, int unit, + int16_t *cyls, int8_t *heads, int8_t *secs); +int ide_get_bios_chs_trans(BusState *bus, int unit); + +#endif diff --git a/include/hw/ide/internal.h b/include/hw/ide/internal.h index 1aab89b27b..d3ec16a945 100644 --- a/include/hw/ide/internal.h +++ b/include/hw/ide/internal.h @@ -8,16 +8,10 @@ */ #include "hw/ide.h" -#include "exec/ioport.h" -#include "hw/ide/ide-dma.h" -#include "hw/ide/ide-dev.h" +#include "hw/ide/ide-bus.h" /* debug IDE devices */ #define USE_DMA_CDROM -#include "qom/object.h" - -#define TYPE_IDE_BUS "IDE" -OBJECT_DECLARE_SIMPLE_TYPE(IDEBus, IDE_BUS) /* Device/Head ("select") Register */ #define ATA_DEV_SELECT 0x10 @@ -338,29 +332,6 @@ typedef struct IDEBufferedRequest { bool orphaned; } IDEBufferedRequest; -struct IDEBus { - BusState qbus; - IDEDevice *master; - IDEDevice *slave; - IDEState ifs[2]; - QEMUBH *bh; - - int bus_id; - int max_units; - IDEDMA *dma; - uint8_t unit; - uint8_t cmd; - qemu_irq irq; /* bus output */ - - int error_status; - uint8_t retry_unit; - int64_t retry_sector_num; - uint32_t retry_nsector; - PortioList portio_list; - PortioList portio2_list; - VMChangeStateEntry *vmstate; -}; - /* These are used for the error_status field of IDEBus */ #define IDE_RETRY_MASK 0xf8 #define IDE_RETRY_DMA 0x08 @@ -477,15 +448,6 @@ void ide_cancel_dma_sync(IDEState *s); void ide_atapi_cmd(IDEState *s); void ide_atapi_cmd_reply_end(IDEState *s); -/* hw/ide/qdev.c */ -void ide_bus_init(IDEBus *idebus, size_t idebus_size, DeviceState *dev, - int bus_id, int max_units); -IDEDevice *ide_bus_create_drive(IDEBus *bus, int unit, DriveInfo *drive); - -int ide_get_geometry(BusState *bus, int unit, - int16_t *cyls, int8_t *heads, int8_t *secs); -int ide_get_bios_chs_trans(BusState *bus, int unit); - int ide_handle_rw_error(IDEState *s, int error, int op); #endif /* HW_IDE_INTERNAL_H */ From patchwork Wed Feb 21 21:16:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1902440 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=Gsel+bvN; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Tg8NC5vVDz23cl for ; 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Wed, 21 Feb 2024 13:19:11 -0800 (PST) Received: from m1x-phil.lan ([176.187.211.34]) by smtp.gmail.com with ESMTPSA id bk26-20020a0560001d9a00b0033d568f8310sm10168971wrb.89.2024.02.21.13.19.10 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 21 Feb 2024 13:19:11 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-block@nongnu.org, qemu-ppc@nongnu.org, Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Mark Cave-Ayland , John Snow Subject: [PULL 23/25] hw/ide: Remove the include/hw/ide.h legacy file Date: Wed, 21 Feb 2024 22:16:23 +0100 Message-ID: <20240221211626.48190-24-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240221211626.48190-1-philmd@linaro.org> References: <20240221211626.48190-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=philmd@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Thomas Huth There was only one prototype left in this legacy file. Move it to ide-dev.h to finally get rid of it. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Thomas Huth Acked-by: Mark Cave-Ayland Message-ID: <20240220085505.30255-7-thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé --- MAINTAINERS | 1 - include/hw/ide.h | 9 --------- include/hw/ide/ide-dev.h | 2 ++ include/hw/ide/internal.h | 3 +-- 4 files changed, 3 insertions(+), 12 deletions(-) delete mode 100644 include/hw/ide.h diff --git a/MAINTAINERS b/MAINTAINERS index 5535df4487..9dd98a923f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1937,7 +1937,6 @@ IDE M: John Snow L: qemu-block@nongnu.org S: Odd Fixes -F: include/hw/ide.h F: include/hw/ide/ F: hw/ide/ F: hw/block/block.c diff --git a/include/hw/ide.h b/include/hw/ide.h deleted file mode 100644 index db963bdb77..0000000000 --- a/include/hw/ide.h +++ /dev/null @@ -1,9 +0,0 @@ -#ifndef HW_IDE_H -#define HW_IDE_H - -#include "exec/memory.h" - -/* ide/core.c */ -void ide_drive_get(DriveInfo **hd, int max_bus); - -#endif /* HW_IDE_H */ diff --git a/include/hw/ide/ide-dev.h b/include/hw/ide/ide-dev.h index 1f62e58ebc..708cc0fda3 100644 --- a/include/hw/ide/ide-dev.h +++ b/include/hw/ide/ide-dev.h @@ -179,4 +179,6 @@ typedef struct IDEDrive { void ide_dev_initfn(IDEDevice *dev, IDEDriveKind kind, Error **errp); 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Wed, 21 Feb 2024 13:19:18 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-block@nongnu.org, qemu-ppc@nongnu.org, Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Mark Cave-Ayland , Paolo Bonzini , Richard Henderson , Eduardo Habkost , "Michael S. Tsirkin" , Marcel Apfelbaum , John Snow , BALATON Zoltan Subject: [PULL 24/25] hw/ide: Stop exposing internal.h to non-IDE files Date: Wed, 21 Feb 2024 22:16:24 +0100 Message-ID: <20240221211626.48190-25-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240221211626.48190-1-philmd@linaro.org> References: <20240221211626.48190-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=philmd@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Thomas Huth include/hw/ide/internal.h is currently included by include/hw/ide/pci.h and thus exposed to a lot of files that are not part of the IDE subsystem. Stop including internal.h there and use the appropriate new headers ide-bus.h and ide-dma.h instead. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Thomas Huth Acked-by: Mark Cave-Ayland Message-ID: <20240220085505.30255-8-thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé --- include/hw/ide/pci.h | 2 +- hw/i386/pc.c | 2 +- hw/ide/cmd646.c | 1 + hw/ide/pci.c | 1 + hw/ide/piix.c | 1 + hw/ide/sii3112.c | 1 + hw/ide/via.c | 1 + 7 files changed, 7 insertions(+), 2 deletions(-) diff --git a/include/hw/ide/pci.h b/include/hw/ide/pci.h index a814a0a7c3..ef03764caa 100644 --- a/include/hw/ide/pci.h +++ b/include/hw/ide/pci.h @@ -1,7 +1,7 @@ #ifndef HW_IDE_PCI_H #define HW_IDE_PCI_H -#include "hw/ide/internal.h" +#include "hw/ide/ide-bus.h" #include "hw/pci/pci_device.h" #include "qom/object.h" diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 1ee41a5e56..f8eb684a49 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -31,7 +31,7 @@ #include "hw/i386/fw_cfg.h" #include "hw/i386/vmport.h" #include "sysemu/cpus.h" -#include "hw/ide/internal.h" +#include "hw/ide/ide-bus.h" #include "hw/timer/hpet.h" #include "hw/loader.h" #include "hw/rtc/mc146818rtc.h" diff --git a/hw/ide/cmd646.c b/hw/ide/cmd646.c index c0bcfa4414..23d213ff01 100644 --- a/hw/ide/cmd646.c +++ b/hw/ide/cmd646.c @@ -33,6 +33,7 @@ #include "sysemu/reset.h" #include "hw/ide/pci.h" +#include "hw/ide/internal.h" #include "trace.h" /* CMD646 specific */ diff --git a/hw/ide/pci.c b/hw/ide/pci.c index ca85d8474c..73efeec7f4 100644 --- a/hw/ide/pci.c +++ b/hw/ide/pci.c @@ -30,6 +30,7 @@ #include "sysemu/dma.h" #include "qemu/error-report.h" #include "qemu/module.h" +#include "hw/ide/internal.h" #include "hw/ide/pci.h" #include "trace.h" diff --git a/hw/ide/piix.c b/hw/ide/piix.c index 4e5e12935f..1773a068c3 100644 --- a/hw/ide/piix.c +++ b/hw/ide/piix.c @@ -30,6 +30,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "hw/pci/pci.h" +#include "hw/ide/internal.h" #include "hw/ide/piix.h" #include "hw/ide/pci.h" #include "trace.h" diff --git a/hw/ide/sii3112.c b/hw/ide/sii3112.c index 63dc4a0494..321b9e46a1 100644 --- a/hw/ide/sii3112.c +++ b/hw/ide/sii3112.c @@ -13,6 +13,7 @@ */ #include "qemu/osdep.h" +#include "hw/ide/internal.h" #include "hw/ide/pci.h" #include "qemu/module.h" #include "trace.h" diff --git a/hw/ide/via.c b/hw/ide/via.c index 3f3c484253..cf151e70ec 100644 --- a/hw/ide/via.c +++ b/hw/ide/via.c @@ -25,6 +25,7 @@ */ #include "qemu/osdep.h" +#include "hw/ide/internal.h" #include "hw/pci/pci.h" #include "migration/vmstate.h" #include "qemu/module.h" From patchwork Wed Feb 21 21:16:25 2024 Content-Type: text/plain; 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Wed, 21 Feb 2024 13:19:24 -0800 (PST) Received: from m1x-phil.lan ([176.187.211.34]) by smtp.gmail.com with ESMTPSA id l20-20020a05600c1d1400b0041256ab5becsm16906430wms.26.2024.02.21.13.19.23 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 21 Feb 2024 13:19:24 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-block@nongnu.org, qemu-ppc@nongnu.org, Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , =?utf-8?q?Cl?= =?utf-8?q?=C3=A9ment_Chigot?= , Frederic Konrad , Mark Cave-Ayland , Artyom Tarasenko Subject: [PULL 25/25] hw/sparc/leon3: Fix wrong usage of DO_UPCAST macro Date: Wed, 21 Feb 2024 22:16:25 +0100 Message-ID: <20240221211626.48190-26-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240221211626.48190-1-philmd@linaro.org> References: <20240221211626.48190-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=philmd@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Thomas Huth leon3.c currently fails to compile with some compilers when the -Wvla option has been enabled: ../hw/sparc/leon3.c: In function ‘leon3_cpu_reset’: ../hw/sparc/leon3.c:153:5: error: ISO C90 forbids variable length array ‘offset_must_be_zero’ [-Werror=vla] 153 | ResetData *s = (ResetData *)DO_UPCAST(ResetData, info[id], info); | ^~~~~~~~~ cc1: all warnings being treated as errors Looking at this code, the DO_UPCAST macro is indeed used in a wrong way here: DO_UPCAST is supposed to check that the second parameter is the first entry of the struct that the first parameter indicates, but since we use and index into the info[] array, this of course cannot work. The intention here was likely rather to use the container_of() macro instead, so switch the code accordingly. Fixes: d65aba8286 ("hw/sparc/leon3: implement multiprocessor") Signed-off-by: Thomas Huth Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20240221180751.190489-1-thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé --- hw/sparc/leon3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index 4873b59b6c..6aaa04cb19 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -150,7 +150,7 @@ static void leon3_cpu_reset(void *opaque) { struct CPUResetData *info = (struct CPUResetData *) opaque; int id = info->id; - ResetData *s = (ResetData *)DO_UPCAST(ResetData, info[id], info); + ResetData *s = container_of(info, ResetData, info[id]); CPUState *cpu = CPU(s->info[id].cpu); CPUSPARCState *env = cpu_env(cpu);