From patchwork Tue Apr 17 12:48:00 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michel Pollet X-Patchwork-Id: 899247 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=bp.renesas.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40QQC55m60z9s0x for ; Tue, 17 Apr 2018 22:52:49 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753224AbeDQMws (ORCPT ); Tue, 17 Apr 2018 08:52:48 -0400 Received: from relmlor2.renesas.com ([210.160.252.172]:21676 "EHLO relmlie1.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753219AbeDQMwr (ORCPT ); Tue, 17 Apr 2018 08:52:47 -0400 Received: from unknown (HELO relmlir3.idc.renesas.com) ([10.200.68.153]) by relmlie1.idc.renesas.com with ESMTP; 17 Apr 2018 21:52:46 +0900 Received: from relmlii1.idc.renesas.com (relmlii1.idc.renesas.com [10.200.68.65]) by relmlir3.idc.renesas.com (Postfix) with ESMTP id 4C517952D4; Tue, 17 Apr 2018 21:52:46 +0900 (JST) X-IronPort-AV: E=Sophos;i="5.48,463,1517842800"; d="scan'208";a="277046823" Received: from unknown (HELO be1yocto.ree.adwin.renesas.com) ([172.29.43.62]) by relmlii1.idc.renesas.com with ESMTP; 17 Apr 2018 21:52:41 +0900 From: Michel Pollet To: linux-renesas-soc@vger.kernel.org, Simon Horman Cc: phil.edworthy@renesas.com, Michel Pollet , Michel Pollet , Rob Herring , Mark Rutland , Magnus Damm , Russell King , Greg Kroah-Hartman , Frank Rowand , Kevin Hilman , Stefan Wahren , =?utf-8?q?Andreas_F=C3=A4rber?= , Carlo Caione , Chen-Yu Tsai , Juri Lelli , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 1/3] dt-bindings: cpu: Add Renesas RZ/N1D SMP enable method. Date: Tue, 17 Apr 2018 13:48:00 +0100 Message-Id: <1523969291-41756-2-git-send-email-michel.pollet@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1523969291-41756-1-git-send-email-michel.pollet@bp.renesas.com> References: <1523969291-41756-1-git-send-email-michel.pollet@bp.renesas.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add a special enable method for second CA8 of the Renesas RZ/N1D (R9A06G032). Signed-off-by: Michel Pollet Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/arm/cpus.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt index 29e1dc5..b395d107 100644 --- a/Documentation/devicetree/bindings/arm/cpus.txt +++ b/Documentation/devicetree/bindings/arm/cpus.txt @@ -219,6 +219,7 @@ described below. "qcom,kpss-acc-v1" "qcom,kpss-acc-v2" "renesas,apmu" + "renesas,r9a06g032-smp" "rockchip,rk3036-smp" "rockchip,rk3066-smp" "ste,dbx500-smp"