From patchwork Mon Apr 16 19:37:13 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Heiner Kallweit X-Patchwork-Id: 898889 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="DZUr28uJ"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40PzFs1Dl8z9s0W for ; Tue, 17 Apr 2018 05:38:41 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753450AbeDPTii (ORCPT ); Mon, 16 Apr 2018 15:38:38 -0400 Received: from mail-wr0-f194.google.com ([209.85.128.194]:41619 "EHLO mail-wr0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751210AbeDPTig (ORCPT ); Mon, 16 Apr 2018 15:38:36 -0400 Received: by mail-wr0-f194.google.com with SMTP id v24so12131881wra.8; Mon, 16 Apr 2018 12:38:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=subject:from:to:cc:references:message-id:date:user-agent :mime-version:in-reply-to:content-transfer-encoding; bh=LIbJqTZDZorCI5kxOHsQN9q0yrrPMsGhXt/3XpIAfV4=; b=DZUr28uJHuTi4aC3apm0LtBnsgKx9kjCPNHK0QNIEijd166+djakyjyx/OsRAN152p Tpeu+FybZEBZqap3HLG6wXmAQY7+S5k9Ya9lteFQ6L9x3wB2chU2hZpAfGOaEl5r4WF+ zmoErEU7o0S76y5fC14aBFetllKqOx1pqXlRpaTm17rdL8u8rL58pzjv5xIgN/1sYSGC VdkrmV7+4IoSwNYT1NuFqp1FOFr8gaHifqBwnhKUMTKicqu8y04hF5INNz66UkSHxeGQ GQwgHzWza42H757GZNFarrJiaKrew70BA+WQRzqt2KmaVGi2u4LLXC2fR+emCS6jW/CM gxbg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:from:to:cc:references:message-id:date :user-agent:mime-version:in-reply-to:content-transfer-encoding; bh=LIbJqTZDZorCI5kxOHsQN9q0yrrPMsGhXt/3XpIAfV4=; b=gSjobqMzcz7yhM2JFxBYwuAPkxL4uF0H3Wx/DCckvy33Gxp4nbP1eHhSEUJr/Zoc/w LRgSTuYgiTV8TrgLOxEY+f5xQseynDda6qGWjMqPF0FkF56BjBtEjHg9PtA/HYgf8Wak 14wiM5+/heqKhF0+zvbIxhtKKuoVVMWceJ/zloiUbkj6psfpedb3LlLoib07zMBTG5Lm Omu4LDfxxXnEaZL1hpRltuKQl7Ua54DUf6UqcX64imeLSK5RCFmzQXd6IFAEbApvgd7s jzY1fEBvQRHBIa1fYXkcNsIHyPSzUN9IcirUC7ySg0S1RPMFRuVUlP9xxUpV50IWr/9x DTPQ== X-Gm-Message-State: ALQs6tBdnpPrau5isqa2846aVBvlMLkbJfxdIt+Drr7yLxt9Dvti3Qr6 Imq8muqh3cP8jkL72LiXsS+51A== X-Google-Smtp-Source: AIpwx49ZllqWurUB6uc/oG2VFoh8xvK2ouZ1TVUMkiKJ66iExOJgkScRkcA55kR4o2QQhWQhLmpp3g== X-Received: by 10.28.184.86 with SMTP id i83mr10658664wmf.30.1523907515120; Mon, 16 Apr 2018 12:38:35 -0700 (PDT) Received: from ?IPv6:2003:ea:8bd4:3d00:5062:aa04:3b2:d5c5? (p200300EA8BD43D005062AA0403B2D5C5.dip0.t-ipconnect.de. [2003:ea:8bd4:3d00:5062:aa04:3b2:d5c5]) by smtp.googlemail.com with ESMTPSA id x70sm13352427wma.9.2018.04.16.12.38.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 16 Apr 2018 12:38:34 -0700 (PDT) Subject: [PATCH net-next 1/2] PCI: Add two more values for PCIe Max_Read_Request_Size From: Heiner Kallweit To: Bjorn Helgaas , David Miller , Bjorn Helgaas , Realtek linux nic maintainers Cc: "linux-pci@vger.kernel.org" , "netdev@vger.kernel.org" References: <00f1255f-acf0-4760-c20f-0b78bda44645@gmail.com> Message-ID: Date: Mon, 16 Apr 2018 21:37:13 +0200 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: <00f1255f-acf0-4760-c20f-0b78bda44645@gmail.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org This patch adds missing values for the max read request size. E.g. network driver r8169 uses a value of 4K. Signed-off-by: Heiner Kallweit Acked-by: Bjorn Helgaas --- include/uapi/linux/pci_regs.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h index 0c79eac5..699257fb 100644 --- a/include/uapi/linux/pci_regs.h +++ b/include/uapi/linux/pci_regs.h @@ -506,6 +506,8 @@ #define PCI_EXP_DEVCTL_READRQ_256B 0x1000 /* 256 Bytes */ #define PCI_EXP_DEVCTL_READRQ_512B 0x2000 /* 512 Bytes */ #define PCI_EXP_DEVCTL_READRQ_1024B 0x3000 /* 1024 Bytes */ +#define PCI_EXP_DEVCTL_READRQ_2048B 0x4000 /* 2048 Bytes */ +#define PCI_EXP_DEVCTL_READRQ_4096B 0x5000 /* 4096 Bytes */ #define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */ #define PCI_EXP_DEVSTA 10 /* Device Status */ #define PCI_EXP_DEVSTA_CED 0x0001 /* Correctable Error Detected */ From patchwork Mon Apr 16 19:38:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Heiner Kallweit X-Patchwork-Id: 898890 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="r6UiOobq"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40PzFw1KXSz9s0W for ; Tue, 17 Apr 2018 05:38:44 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753468AbeDPTil (ORCPT ); Mon, 16 Apr 2018 15:38:41 -0400 Received: from mail-wr0-f194.google.com ([209.85.128.194]:38282 "EHLO mail-wr0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753337AbeDPTii (ORCPT ); Mon, 16 Apr 2018 15:38:38 -0400 Received: by mail-wr0-f194.google.com with SMTP id h3so16565070wrh.5; Mon, 16 Apr 2018 12:38:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=subject:from:to:cc:references:message-id:date:user-agent :mime-version:in-reply-to:content-transfer-encoding; bh=PGGpKvSRy8LTbpPYBN+hTexR/cypo2y/4lyTQIbr9qI=; b=r6UiOobqm0H04rtuKswW+B10r3o7UbPmXKNWo9hkBX1NQ2u2m4hac485VMKDU4LRyV DXyCehHJmNnblNswcGJ0LaihlV8W2XB6qVI6yMrFDIF24h5W4kdfqjb9JLuENJKmFlW6 9asnLO8+7GN51sgOKCKDuyJ93lkZtNNdg27WwMe6o+FYeDJ8mqET+owiQa6pKbDV+Z0M P3oQdmIYfKpb+NYwaQ2fCavJ/RJBsXk81ZwMB9PQHHcnjChSQADPLUQAZVmAjNaXh1TV /D5yPUwV577Oy8ghz7ZSPWGAa+wA7AL9sDicxVbh2Pej8aHgStJa8Gqs83sX9RnISDTk zxRg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:from:to:cc:references:message-id:date :user-agent:mime-version:in-reply-to:content-transfer-encoding; bh=PGGpKvSRy8LTbpPYBN+hTexR/cypo2y/4lyTQIbr9qI=; b=sFdHt4idOIz4wpO8KqKyMUrbt/+vvof2+Mkf/HVpktq5EjZW9oMccaN9IMcj52RfsE c3NzS8+xHeRv16vRefYGwTKC7+SF9Xs+ZShtFWqBITt0Dl54TowrZOGkBNyrcv72otLu 7EWCoUDR1PPK5rwWhz8+pwcEEZC9rakR0yeQrS7yIyF2Joce9AOW2XYMAKtR5n71z6le TFlPlUXkfK89U6WUuXla4XC1fmJC/fT4wOtHiWhBIKwqktyi8SqaVYAAOdYu6W9ateOy Vw1oWHc5JWs1uWWEH78kK7PmwChWzYUaFoS0zTl4+yjhdPkmb+X8rUqJhS3fjjON5Lak vhyQ== X-Gm-Message-State: ALQs6tBBxF8RpUoU1/K7CkY4uWZDjHzC8GjpmwtPDu+l6sKbkrtD46rf eAf29/UnQ1B3ylKKHdMJbLyRmg== X-Google-Smtp-Source: AIpwx4/P92LPA06RnBZWMat4VgQlO3QNAQgFY90+9culTn2+u3oCD0SUwgDiFqPbxRaqZVLFjLAzuA== X-Received: by 10.28.12.141 with SMTP id 135mr6711100wmm.99.1523907516531; Mon, 16 Apr 2018 12:38:36 -0700 (PDT) Received: from ?IPv6:2003:ea:8bd4:3d00:5062:aa04:3b2:d5c5? (p200300EA8BD43D005062AA0403B2D5C5.dip0.t-ipconnect.de. [2003:ea:8bd4:3d00:5062:aa04:3b2:d5c5]) by smtp.googlemail.com with ESMTPSA id r200sm20948521wmb.39.2018.04.16.12.38.35 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 16 Apr 2018 12:38:36 -0700 (PDT) Subject: [PATCH net-next 2/2] r8169: replace magic numbers with PCI MRRS constant From: Heiner Kallweit To: Bjorn Helgaas , David Miller , Bjorn Helgaas , Realtek linux nic maintainers Cc: "linux-pci@vger.kernel.org" , "netdev@vger.kernel.org" References: <00f1255f-acf0-4760-c20f-0b78bda44645@gmail.com> Message-ID: <0a0229e0-7980-7661-f26b-ea3b2becb12b@gmail.com> Date: Mon, 16 Apr 2018 21:38:27 +0200 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: <00f1255f-acf0-4760-c20f-0b78bda44645@gmail.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Replace magic number "0x5 << MAX_READ_REQUEST_SHIFT" with the appropriate constant as defined in PCI core. Signed-off-by: Heiner Kallweit --- drivers/net/ethernet/realtek/r8169.c | 39 ++++++++++++++-------------- 1 file changed, 19 insertions(+), 20 deletions(-) diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c index 604ae783..7d4e6890 100644 --- a/drivers/net/ethernet/realtek/r8169.c +++ b/drivers/net/ethernet/realtek/r8169.c @@ -84,7 +84,6 @@ The RTL chips use a 64 element hash table based on the Ethernet CRC. */ static const int multicast_filter_limit = 32; -#define MAX_READ_REQUEST_SHIFT 12 #define TX_DMA_BURST 7 /* Maximum PCI burst, '7' is unlimited */ #define InterFrameGap 0x03 /* 3 means InterFrameGap = the shortest one */ @@ -5125,7 +5124,7 @@ static void r8168c_hw_jumbo_disable(struct rtl8169_private *tp) { RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0); RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~Jumbo_En1); - rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT); + rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B); } static void r8168dp_hw_jumbo_enable(struct rtl8169_private *tp) @@ -5151,7 +5150,7 @@ static void r8168e_hw_jumbo_disable(struct rtl8169_private *tp) RTL_W8(tp, MaxTxPacketSize, 0x0c); RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0); RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~0x01); - rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT); + rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B); } static void r8168b_0_hw_jumbo_enable(struct rtl8169_private *tp) @@ -5163,7 +5162,7 @@ static void r8168b_0_hw_jumbo_enable(struct rtl8169_private *tp) static void r8168b_0_hw_jumbo_disable(struct rtl8169_private *tp) { rtl_tx_performance_tweak(tp, - (0x5 << MAX_READ_REQUEST_SHIFT) | PCI_EXP_DEVCTL_NOSNOOP_EN); + PCI_EXP_DEVCTL_READRQ_4096B | PCI_EXP_DEVCTL_NOSNOOP_EN); } static void r8168b_1_hw_jumbo_enable(struct rtl8169_private *tp) @@ -5736,7 +5735,7 @@ static void rtl_hw_start_8168bb(struct rtl8169_private *tp) RTL_W16(tp, CPlusCmd, RTL_R16(tp, CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK); if (tp->dev->mtu <= ETH_DATA_LEN) { - rtl_tx_performance_tweak(tp, (0x5 << MAX_READ_REQUEST_SHIFT) | + rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B | PCI_EXP_DEVCTL_NOSNOOP_EN); } } @@ -5757,7 +5756,7 @@ static void __rtl_hw_start_8168cp(struct rtl8169_private *tp) RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en); if (tp->dev->mtu <= ETH_DATA_LEN) - rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT); + rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B); rtl_disable_clock_request(tp); @@ -5788,7 +5787,7 @@ static void rtl_hw_start_8168cp_2(struct rtl8169_private *tp) RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en); if (tp->dev->mtu <= ETH_DATA_LEN) - rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT); + rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B); RTL_W16(tp, CPlusCmd, RTL_R16(tp, CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK); } @@ -5805,7 +5804,7 @@ static void rtl_hw_start_8168cp_3(struct rtl8169_private *tp) RTL_W8(tp, MaxTxPacketSize, TxPacketMax); if (tp->dev->mtu <= ETH_DATA_LEN) - rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT); + rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B); RTL_W16(tp, CPlusCmd, RTL_R16(tp, CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK); } @@ -5862,7 +5861,7 @@ static void rtl_hw_start_8168d(struct rtl8169_private *tp) RTL_W8(tp, MaxTxPacketSize, TxPacketMax); if (tp->dev->mtu <= ETH_DATA_LEN) - rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT); + rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B); RTL_W16(tp, CPlusCmd, RTL_R16(tp, CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK); } @@ -5872,7 +5871,7 @@ static void rtl_hw_start_8168dp(struct rtl8169_private *tp) rtl_csi_access_enable_1(tp); if (tp->dev->mtu <= ETH_DATA_LEN) - rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT); + rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B); RTL_W8(tp, MaxTxPacketSize, TxPacketMax); @@ -5889,7 +5888,7 @@ static void rtl_hw_start_8168d_4(struct rtl8169_private *tp) rtl_csi_access_enable_1(tp); - rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT); + rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B); RTL_W8(tp, MaxTxPacketSize, TxPacketMax); @@ -5921,7 +5920,7 @@ static void rtl_hw_start_8168e_1(struct rtl8169_private *tp) rtl_ephy_init(tp, e_info_8168e_1, ARRAY_SIZE(e_info_8168e_1)); if (tp->dev->mtu <= ETH_DATA_LEN) - rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT); + rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B); RTL_W8(tp, MaxTxPacketSize, TxPacketMax); @@ -5946,7 +5945,7 @@ static void rtl_hw_start_8168e_2(struct rtl8169_private *tp) rtl_ephy_init(tp, e_info_8168e_2, ARRAY_SIZE(e_info_8168e_2)); if (tp->dev->mtu <= ETH_DATA_LEN) - rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT); + rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B); rtl_eri_write(tp, 0xc0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC); rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC); @@ -5976,7 +5975,7 @@ static void rtl_hw_start_8168f(struct rtl8169_private *tp) { rtl_csi_access_enable_2(tp); - rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT); + rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B); rtl_eri_write(tp, 0xc0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC); rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC); @@ -6047,7 +6046,7 @@ static void rtl_hw_start_8168g(struct rtl8169_private *tp) rtl_csi_access_enable_1(tp); - rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT); + rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B); rtl_w0w1_eri(tp, 0xdc, ERIAR_MASK_0001, 0x00, 0x01, ERIAR_EXGMAC); rtl_w0w1_eri(tp, 0xdc, ERIAR_MASK_0001, 0x01, 0x00, ERIAR_EXGMAC); @@ -6147,7 +6146,7 @@ static void rtl_hw_start_8168h_1(struct rtl8169_private *tp) rtl_csi_access_enable_1(tp); - rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT); + rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B); rtl_w0w1_eri(tp, 0xdc, ERIAR_MASK_0001, 0x00, 0x01, ERIAR_EXGMAC); rtl_w0w1_eri(tp, 0xdc, ERIAR_MASK_0001, 0x01, 0x00, ERIAR_EXGMAC); @@ -6229,7 +6228,7 @@ static void rtl_hw_start_8168ep(struct rtl8169_private *tp) rtl_csi_access_enable_1(tp); - rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT); + rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B); rtl_w0w1_eri(tp, 0xdc, ERIAR_MASK_0001, 0x00, 0x01, ERIAR_EXGMAC); rtl_w0w1_eri(tp, 0xdc, ERIAR_MASK_0001, 0x01, 0x00, ERIAR_EXGMAC); @@ -6495,7 +6494,7 @@ static void rtl_hw_start_8102e_1(struct rtl8169_private *tp) RTL_W8(tp, DBG_REG, FIX_NAK_1); - rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT); + rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B); RTL_W8(tp, Config1, LEDS1 | LEDS0 | Speed_down | MEMMAP | IOMAP | VPD | PMEnable); @@ -6512,7 +6511,7 @@ static void rtl_hw_start_8102e_2(struct rtl8169_private *tp) { rtl_csi_access_enable_2(tp); - rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT); + rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B); RTL_W8(tp, Config1, MEMMAP | IOMAP | VPD | PMEnable); RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en); @@ -6575,7 +6574,7 @@ static void rtl_hw_start_8402(struct rtl8169_private *tp) rtl_ephy_init(tp, e_info_8402, ARRAY_SIZE(e_info_8402)); - rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT); + rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B); rtl_eri_write(tp, 0xc8, ERIAR_MASK_1111, 0x00000002, ERIAR_EXGMAC); rtl_eri_write(tp, 0xe8, ERIAR_MASK_1111, 0x00000006, ERIAR_EXGMAC);