From patchwork Thu Jan 4 00:04:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Portia Stephens X-Patchwork-Id: 1882248 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ubuntu.com (client-ip=185.125.189.65; helo=lists.ubuntu.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=patchwork.ozlabs.org) Received: from lists.ubuntu.com (lists.ubuntu.com [185.125.189.65]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4T56Kg1kTTz1ydb for ; Thu, 4 Jan 2024 11:05:11 +1100 (AEDT) Received: from localhost ([127.0.0.1] helo=lists.ubuntu.com) by lists.ubuntu.com with esmtp (Exim 4.86_2) (envelope-from ) id 1rLBEH-0004tO-Dg; Thu, 04 Jan 2024 00:04:58 +0000 Received: from smtp-relay-internal-1.internal ([10.131.114.114] helo=smtp-relay-internal-1.canonical.com) by lists.ubuntu.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1rLBE4-0004qx-9N for kernel-team@lists.ubuntu.com; Thu, 04 Jan 2024 00:04:45 +0000 Received: from mail-pf1-f198.google.com (mail-pf1-f198.google.com [209.85.210.198]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id 35E273F74A for ; Thu, 4 Jan 2024 00:04:43 +0000 (UTC) Received: by mail-pf1-f198.google.com with SMTP id d2e1a72fcca58-6d9b6701404so8159662b3a.2 for ; Wed, 03 Jan 2024 16:04:43 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704326680; x=1704931480; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=etBhx6O4wM1KZ+9LhF1DXrddiGNOc+0XifngED3T9x0=; b=pDK81O2/JxM9+/i3+B5l2jJQmKJNzm2wBqHJdzYnuFHyOFU1/l6dndIrVFci3qtMpA lxWPR37wzVzM6vh3k514AswqCS6kexk8eeedfTZMOd4rzAS+LvYhASIXXUe0gPTqrjdr cNGXyhA3aeEbRegI3cG89rE3mjM0dLHXNksCEjeFzRXfrMmkFpGN49jQ/X84bbw+18U4 vEHQRxOsnjts5nt7yYDBicheuroOkqQ31AKB1gIoTsjEKW3UrqFGb4ae/XnBB/O3jwmI nLed8mvwdOC19ImDkobNEDgx3sNTGhikznoRk6PXGf9xqycznv+f5oUx2Qoub7xIJ7fZ 5IJw== X-Gm-Message-State: AOJu0YxFH3IkJy8fNiQxUMYKR5qtFLt20fbTtWip7eCfAQUHW8i3kDBE 92CK0gbhZmtI/pdJwSxp3ZGFa7EvxQTFZmD/s0e4LLnPJ1O+EVtMeY/KUiaH5LQrq8N8pffbs/C fLo8dPNZcQDPuXXPybyCIN8IFoyhUb1fLTy9WqGzvzB+N3Knvp9swrrPw X-Received: by 2002:a05:6a00:189e:b0:6d6:32b3:b794 with SMTP id x30-20020a056a00189e00b006d632b3b794mr22408305pfh.69.1704326680131; Wed, 03 Jan 2024 16:04:40 -0800 (PST) X-Google-Smtp-Source: AGHT+IF1L+LTyOEgfBp0HLlsNhvndIXRG3OW4ekiMuhNMPhjIXT8jNVYUDC+znwBE1IszFKTPEdmTw== X-Received: by 2002:a05:6a00:189e:b0:6d6:32b3:b794 with SMTP id x30-20020a056a00189e00b006d632b3b794mr22408297pfh.69.1704326679616; Wed, 03 Jan 2024 16:04:39 -0800 (PST) Received: from portia-desktop.alistair23.me ([159.196.41.205]) by smtp.gmail.com with ESMTPSA id t13-20020a62ea0d000000b006d638fd230bsm24040651pfh.93.2024.01.03.16.04.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Jan 2024 16:04:38 -0800 (PST) From: Portia Stephens To: portia.stephens@canonical.com, kernel-team@lists.ubuntu.com Subject: [jammy xilinx-zynqmp 1/2] Sync KD240 DTS from xlnx_rebase_v6.1_LTS Date: Thu, 4 Jan 2024 10:04:29 +1000 Message-Id: <20240104000430.39141-2-portia.stephens@canonical.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240104000430.39141-1-portia.stephens@canonical.com> References: <20240104000430.39141-1-portia.stephens@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" Sync all boot/dts/xilinx files used by the KD240 with the Xilinx 6.1 tree. BugLink: https://bugs.launchpad.net/bugs/2046280 [portias: arm64: dts: zynqmp: Remove clock-names from GEM in zynqmp-clk-ccf.dtsi ARM: zynq: Add/Update/Sync DTs for xilinx platforms arm64: zynqmp: Add/Update/Sync DTs for xilinx platforms arm64: versal: Add all missing dt files for Xilinx boards arm64: versal-net: Add all missing dt files for Xilinx boards arm64: zynqmp: Remove xlnx,zynqmp-aes node arm64: zynqmp: Remove xlnx,zynqmp-rsa node arm64: zynqmp: Update ADI PHY properties for KD240 arm64: zynqmp: Use MIO 77 for ADI PHY reset on KD240 arm64: zynqmp: Fill model name for SOM CCs arm64: zynqmp: Fix memory size on k24 arm64: zynqmp: Enable hs termination flag for USB dwc3 controller xilinx: dts: Remove cdns,zynq-gem and cdns,versal-gem arm64: zynqmp: remove snps,xhci-stream-quirk property for usb arm64: zynqmp: Add L2 cache nodes arm64: zynqmp: Increase reset assert time for TI SGMII PHY arm64: zynqmp: add pmu interrupt-affinity arm64: zynqmp: Sync node name address with reg (mailbox) arm64: zynqmp: Update MALI 400 interrupt and clock names arm: xilinx: Setting default i2c clock frequency to 400kHz arm64: zynqmp: Record compatible string for kv260 rev2 xilinx: dts: Fix open drain warning on Zynq, ZynqMP and Versal arm64: zynqmp: Fix User MTD partition size arm64: zynqmp: Wire missing boards for compilation arm64: zynqmp: Fix gpio comment about No of gpios arm64: zynqmp: Rename ams_ps/pl node names arm64: zynqmp: Remove interrupt/reg-names for AMS arm64: zynqmp: Assign TSU clock frequency for KR260 arm64: zynqmp: Assign TSU clock frequency for KV and KD boards arm64: xilinx: Fix indentation and trailing spaces in dts arm64: zynqmp: remove snps,enable_guctl1_resume_quirk quirk for usb arm64: zynqmp: Configure gem1 rx pins on kd240 board arm64: zynqmp: Remove clock-names from pcap node arm64: zynqmp: Fix dp apb clk source arm64: zynqmp: Wire can0 on kd240-revA arm64: versal-net: Add support for x-prc-08 card arm64: zynqmp: Cover K24/KD240 revB/1 boards arm64: zynqmp: Fix the memory node for k26/k24 kria som boards arm64: versal-net: Add support for VNX board arm64: zynqmp: Add resets property for CAN nodes arm64: xilinx: Do not use '_' in DT node names arm64: zynqmp: Update ECAM size to discover up to 256 buses ] Signed-off-by: Michal Simek Signed-off-by: Thippeswamy Havalige Signed-off-by: Srinivas Neeli Signed-off-by: Kiran Kumar Perepu Signed-off-by: Sharath Kumar Dasari Signed-off-by: Vishal Sagar Signed-off-by: Ashok Reddy Soma Signed-off-by: Piyush Mehta Signed-off-by: Harini Katakam Signed-off-by: Manikanta Guntupalli Signed-off-by: Varalaxmi Bingi Signed-off-by: Parth Gar Signed-off-by: Radhey Shyam Pandey Signed-off-by: Michael Grzeschik Signed-off-by: Sasha Levin (backported from 67bd76aec107e48211da67940496102cd25d5eb9 https://github.com/Xilinx/linux-xlnx.git) Signed-off-by: Portia Stephens --- .../arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi | 31 +-- .../boot/dts/xilinx/zynqmp-sck-kd-g-revA.dts | 7 +- .../boot/dts/xilinx/zynqmp-sck-kr-g-revA.dts | 9 +- .../boot/dts/xilinx/zynqmp-sck-kr-g-revB.dts | 14 +- .../boot/dts/xilinx/zynqmp-sck-kv-g-revA.dts | 6 +- .../boot/dts/xilinx/zynqmp-sck-kv-g-revB.dts | 9 +- .../boot/dts/xilinx/zynqmp-sm-k26-revA.dts | 186 ++++++++-------- arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 199 ++++++++---------- 8 files changed, 228 insertions(+), 233 deletions(-) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi index 5627372d1837..653e0681c919 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi @@ -67,13 +67,6 @@ aux_ref_clk: aux_ref_clk { #clock-cells = <0>; clock-frequency = <27000000>; }; - - dp_aclk: dp_aclk { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <100000000>; - clock-accuracy = <100>; - }; }; &zynqmp_firmware { @@ -133,7 +126,7 @@ &fpd_dma_chan8 { }; &gpu { - clocks = <&zynqmp_clk GPU_REF>, <&zynqmp_clk GPU_PP0_REF>, <&zynqmp_clk GPU_PP1_REF>; + clocks = <&zynqmp_clk GPU_REF>, <&zynqmp_clk GPU_PP0_REF>; }; &lpd_dma_chan1 { @@ -176,24 +169,28 @@ &gem0 { clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM0_REF>, <&zynqmp_clk GEM0_TX>, <&zynqmp_clk GEM0_RX>, <&zynqmp_clk GEM_TSU>; + assigned-clocks = <&zynqmp_clk GEM_TSU>; }; &gem1 { clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM1_REF>, <&zynqmp_clk GEM1_TX>, <&zynqmp_clk GEM1_RX>, <&zynqmp_clk GEM_TSU>; + assigned-clocks = <&zynqmp_clk GEM_TSU>; }; &gem2 { clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM2_REF>, <&zynqmp_clk GEM2_TX>, <&zynqmp_clk GEM2_RX>, <&zynqmp_clk GEM_TSU>; + assigned-clocks = <&zynqmp_clk GEM_TSU>; }; &gem3 { clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM3_REF>, <&zynqmp_clk GEM3_TX>, <&zynqmp_clk GEM3_RX>, <&zynqmp_clk GEM_TSU>; + assigned-clocks = <&zynqmp_clk GEM_TSU>; }; &gpio { @@ -283,11 +280,19 @@ &usb0 { assigned-clocks = <&zynqmp_clk USB0_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>; }; +&dwc3_0 { + clocks = <&zynqmp_clk USB3_DUAL_REF>; +}; + &usb1 { clocks = <&zynqmp_clk USB1_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>; assigned-clocks = <&zynqmp_clk USB1_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>; }; +&dwc3_1 { + clocks = <&zynqmp_clk USB3_DUAL_REF>; +}; + &watchdog0 { clocks = <&zynqmp_clk WDT>; }; @@ -306,9 +311,9 @@ &zynqmp_dpdma { }; &zynqmp_dpsub { - clocks = <&dp_aclk>, - <&zynqmp_clk DP_AUDIO_REF>, - <&zynqmp_clk DP_VIDEO_REF>; + clocks = <&zynqmp_clk TOPSW_LSBUS>, + <&zynqmp_clk DP_AUDIO_REF>, + <&zynqmp_clk DP_VIDEO_REF>; assigned-clocks = <&zynqmp_clk DP_STC_REF>, <&zynqmp_clk DP_AUDIO_REF>, <&zynqmp_clk DP_VIDEO_REF>; /* rpll, rpll, vpll */ @@ -317,7 +322,3 @@ &zynqmp_dpsub { &zynqmp_dp_snd_codec0 { clocks = <&zynqmp_clk DP_AUDIO_REF>; }; - -&zynqmp_pcap { - clocks = <&zynqmp_clk PCAP>; -}; diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kd-g-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kd-g-revA.dts index 09ab49c92fd4..56f31285285f 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kd-g-revA.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kd-g-revA.dts @@ -46,8 +46,8 @@ &i2c1 { /* I2C_SCK C26/C27 - MIO from SOM */ pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1_default>; pinctrl-1 = <&pinctrl_i2c1_gpio>; - scl-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>; - sda-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>; + scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; u3: ina260@40 { /* u3 */ compatible = "ti,ina260"; @@ -109,8 +109,9 @@ &dwc3_0 { &gem1 { /* mdio mio50/51 */ status = "okay"; - pinctrl-names = "default"; + pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gem1_default>; + assigned-clock-rates = <250000000>; phy-handle = <&phy0>; phy-mode = "rgmii-id"; diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revA.dts index 735c1e3d1a88..702cd91c1153 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revA.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revA.dts @@ -18,6 +18,7 @@ &{/} { compatible = "xlnx,zynqmp-sk-kr260-revA", "xlnx,zynqmp-sk-kr260", "xlnx,zynqmp"; + model = "ZynqMP KR260 revA"; ina260-u14 { compatible = "iio-hwmon"; @@ -67,8 +68,8 @@ &i2c1 { /* I2C_SCK C26/C27 - MIO from SOM */ pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1_default>; pinctrl-1 = <&pinctrl_i2c1_gpio>; - scl-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>; - sda-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>; + scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; u14: ina260@40 { /* u14 */ compatible = "ti,ina260"; @@ -187,6 +188,7 @@ &gem0 { /* mdio mio50/51 */ phy-handle = <&phy0>; phy-mode = "sgmii"; is-internal-pcspma; + assigned-clock-rates = <250000000>; }; &gem1 { /* mdio mio50/51, gem mio38 - mio49 */ @@ -195,6 +197,7 @@ &gem1 { /* mdio mio50/51, gem mio38 - mio49 */ pinctrl-0 = <&pinctrl_gem1_default>; phy-handle = <&phy1>; phy-mode = "rgmii-id"; + assigned-clock-rates = <250000000>; mdio: mdio { #address-cells = <1>; @@ -207,7 +210,7 @@ phy0: ethernet-phy@4 { /* u81 */ ti,tx-internal-delay = ; ti,fifo-depth = ; ti,dp83867-rxctrl-strap-quirk; - reset-assert-us = <100>; + reset-assert-us = <300>; reset-deassert-us = <280>; reset-gpios = <&slg7xl45106 5 GPIO_ACTIVE_LOW>; }; diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revB.dts b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revB.dts index 72f2914af340..4a0cabda3102 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revB.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revB.dts @@ -11,7 +11,6 @@ #include #include #include -#include /dts-v1/; /plugin/; @@ -19,6 +18,7 @@ &{/} { compatible = "xlnx,zynqmp-sk-kr260-revB", "xlnx,zynqmp-sk-kr260", "xlnx,zynqmp"; + model = "ZynqMP KR260 revB"; ina260-u14 { compatible = "iio-hwmon"; @@ -68,8 +68,8 @@ &i2c1 { /* I2C_SCK C26/C27 - MIO from SOM */ pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1_default>; pinctrl-1 = <&pinctrl_i2c1_gpio>; - scl-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>; - sda-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>; + scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; u14: ina260@40 { /* u14 */ compatible = "ti,ina260"; @@ -188,8 +188,7 @@ &gem0 { /* mdio mio50/51 */ phy-handle = <&phy0>; phy-mode = "sgmii"; is-internal-pcspma; - assigned-clocks = <&zynqmp_clk GEM_TSU>; - assigned-clock-rates = <250000000>; + assigned-clock-rates = <250000000>; }; &gem1 { /* mdio mio50/51, gem mio38 - mio49 */ @@ -198,8 +197,7 @@ &gem1 { /* mdio mio50/51, gem mio38 - mio49 */ pinctrl-0 = <&pinctrl_gem1_default>; phy-handle = <&phy1>; phy-mode = "rgmii-id"; - assigned-clocks = <&zynqmp_clk GEM_TSU>; - assigned-clock-rates = <250000000>; + assigned-clock-rates = <250000000>; mdio: mdio { #address-cells = <1>; @@ -212,7 +210,7 @@ phy0: ethernet-phy@4 { /* u81 */ ti,tx-internal-delay = ; ti,fifo-depth = ; ti,dp83867-rxctrl-strap-quirk; - reset-assert-us = <100>; + reset-assert-us = <300>; reset-deassert-us = <280>; reset-gpios = <&slg7xl45106 5 GPIO_ACTIVE_LOW>; }; diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dts index b714bd3eb1b1..f653027a5099 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dts @@ -25,6 +25,7 @@ "xlnx,zynqmp-sk-kv260-revY", "xlnx,zynqmp-sk-kv260-revZ", "xlnx,zynqmp-sk-kv260", "xlnx,zynqmp"; + model = "ZynqMP KV260 revA"; }; &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */ @@ -33,8 +34,8 @@ &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */ pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1_default>; pinctrl-1 = <&pinctrl_i2c1_gpio>; - scl-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>; - sda-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>; + scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; u14: ina260@40 { /* u14 */ compatible = "ti,ina260"; @@ -164,6 +165,7 @@ &gem3 { /* required by spec */ pinctrl-0 = <&pinctrl_gem3_default>; phy-handle = <&phy0>; phy-mode = "rgmii-id"; + assigned-clock-rates = <250000000>; mdio: mdio { #address-cells = <1>; diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dts b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dts index a1d8f9f0e51f..8d85b20c2ea3 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dts @@ -16,9 +16,11 @@ /plugin/; &{/} { - compatible = "xlnx,zynqmp-sk-kv260-rev1", + compatible = "xlnx,zynqmp-sk-kv260-rev2", + "xlnx,zynqmp-sk-kv260-rev1", "xlnx,zynqmp-sk-kv260-revB", "xlnx,zynqmp-sk-kv260", "xlnx,zynqmp"; + model = "ZynqMP KV260 revB"; }; &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */ @@ -27,8 +29,8 @@ &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */ pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1_default>; pinctrl-1 = <&pinctrl_i2c1_gpio>; - scl-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>; - sda-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>; + scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; u14: ina260@40 { /* u14 */ compatible = "ti,ina260"; @@ -151,6 +153,7 @@ &gem3 { /* required by spec */ pinctrl-0 = <&pinctrl_gem3_default>; phy-handle = <&phy0>; phy-mode = "rgmii-id"; + assigned-clock-rates = <250000000>; mdio: mdio { #address-cells = <1>; diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts index 7580653689bf..36362ac3a678 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts @@ -50,6 +50,17 @@ memory@0 { reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + pmu_region: pmu@7ff00000 { + reg = <0x0 0x7ff00000 0x0 0x100000>; + no-map; + }; + }; + gpio-keys { compatible = "gpio-keys"; autorepeat; @@ -139,87 +150,94 @@ flash@0 { /* MT25QU512A */ spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; spi-max-frequency = <40000000>; /* 40MHz */ - partition@0 { - label = "Image Selector"; - reg = <0x0 0x80000>; /* 512KB */ - read-only; - lock; - }; - partition@80000 { - label = "Image Selector Golden"; - reg = <0x80000 0x80000>; /* 512KB */ - read-only; - lock; - }; - partition@100000 { - label = "Persistent Register"; - reg = <0x100000 0x20000>; /* 128KB */ - }; - partition@120000 { - label = "Persistent Register Backup"; - reg = <0x120000 0x20000>; /* 128KB */ - }; - partition@140000 { - label = "Open_1"; - reg = <0x140000 0xC0000>; /* 768KB */ - }; - partition@200000 { - label = "Image A (FSBL, PMU, ATF, U-Boot)"; - reg = <0x200000 0xD00000>; /* 13MB */ - }; - partition@f00000 { - label = "ImgSel Image A Catch"; - reg = <0xF00000 0x80000>; /* 512KB */ - read-only; - lock; - }; - partition@f80000 { - label = "Image B (FSBL, PMU, ATF, U-Boot)"; - reg = <0xF80000 0xD00000>; /* 13MB */ - }; - partition@1c80000 { - label = "ImgSel Image B Catch"; - reg = <0x1C80000 0x80000>; /* 512KB */ - read-only; - lock; - }; - partition@1d00000 { - label = "Open_2"; - reg = <0x1D00000 0x100000>; /* 1MB */ - }; - partition@1e00000 { - label = "Recovery Image"; - reg = <0x1E00000 0x200000>; /* 2MB */ - read-only; - lock; - }; - partition@2000000 { - label = "Recovery Image Backup"; - reg = <0x2000000 0x200000>; /* 2MB */ - read-only; - lock; - }; - partition@2200000 { - label = "U-Boot storage variables"; - reg = <0x2200000 0x20000>; /* 128KB */ - }; - partition@2220000 { - label = "U-Boot storage variables backup"; - reg = <0x2220000 0x20000>; /* 128KB */ - }; - partition@2240000 { - label = "SHA256"; - reg = <0x2240000 0x40000>; /* 256B but 256KB sector */ - read-only; - lock; - }; - partition@2280000 { - label = "Secure OS Storage"; - reg = <0x2280000 0x20000>; /* 128KB */ - }; - partition@22A0000 { - label = "User"; - reg = <0x22A0000 0x1d60000>; /* 29.375 MB */ + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "Image Selector"; + reg = <0x0 0x80000>; /* 512KB */ + read-only; + lock; + }; + partition@80000 { + label = "Image Selector Golden"; + reg = <0x80000 0x80000>; /* 512KB */ + read-only; + lock; + }; + partition@100000 { + label = "Persistent Register"; + reg = <0x100000 0x20000>; /* 128KB */ + }; + partition@120000 { + label = "Persistent Register Backup"; + reg = <0x120000 0x20000>; /* 128KB */ + }; + partition@140000 { + label = "Open_1"; + reg = <0x140000 0xC0000>; /* 768KB */ + }; + partition@200000 { + label = "Image A (FSBL, PMU, ATF, U-Boot)"; + reg = <0x200000 0xD00000>; /* 13MB */ + }; + partition@f00000 { + label = "ImgSel Image A Catch"; + reg = <0xF00000 0x80000>; /* 512KB */ + read-only; + lock; + }; + partition@f80000 { + label = "Image B (FSBL, PMU, ATF, U-Boot)"; + reg = <0xF80000 0xD00000>; /* 13MB */ + }; + partition@1c80000 { + label = "ImgSel Image B Catch"; + reg = <0x1C80000 0x80000>; /* 512KB */ + read-only; + lock; + }; + partition@1d00000 { + label = "Open_2"; + reg = <0x1D00000 0x100000>; /* 1MB */ + }; + partition@1e00000 { + label = "Recovery Image"; + reg = <0x1E00000 0x200000>; /* 2MB */ + read-only; + lock; + }; + partition@2000000 { + label = "Recovery Image Backup"; + reg = <0x2000000 0x200000>; /* 2MB */ + read-only; + lock; + }; + partition@2200000 { + label = "U-Boot storage variables"; + reg = <0x2200000 0x20000>; /* 128KB */ + }; + partition@2220000 { + label = "U-Boot storage variables backup"; + reg = <0x2220000 0x20000>; /* 128KB */ + }; + partition@2240000 { + label = "SHA256"; + reg = <0x2240000 0x40000>; /* 256B but 256KB sector */ + read-only; + lock; + }; + partition@2280000 { + label = "Secure OS Storage"; + reg = <0x2280000 0x20000>; /* 128KB */ + }; + partition@22A0000 { + label = "User"; + reg = <0x22A0000 0x1d60000>; /* 29.375 MB */ + }; }; }; }; @@ -250,8 +268,8 @@ &i2c1 { status = "okay"; u-boot,dm-pre-reloc; clock-frequency = <400000>; - scl-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>; - sda-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>; + scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; eeprom: eeprom@50 { /* u46 - also at address 0x58 */ u-boot,dm-pre-reloc; @@ -346,7 +364,7 @@ &gpio { "", "", "", "", "", /* 155 - 159 */ "", "", "", "", "", /* 160 - 164 */ "", "", "", "", "", /* 165 - 169 */ - "", "", "", ""; /* 170 - 174 */ + "", "", "", ""; /* 170 - 173 */ }; &xilinx_ams { diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 184cc1b720b0..badbd260fa29 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -33,6 +33,7 @@ cpu0: cpu@0 { operating-points-v2 = <&cpu_opp_table>; reg = <0x0>; cpu-idle-states = <&CPU_SLEEP_0>; + next-level-cache = <&L2>; }; cpu1: cpu@1 { @@ -42,6 +43,7 @@ cpu1: cpu@1 { reg = <0x1>; operating-points-v2 = <&cpu_opp_table>; cpu-idle-states = <&CPU_SLEEP_0>; + next-level-cache = <&L2>; }; cpu2: cpu@2 { @@ -51,6 +53,7 @@ cpu2: cpu@2 { reg = <0x2>; operating-points-v2 = <&cpu_opp_table>; cpu-idle-states = <&CPU_SLEEP_0>; + next-level-cache = <&L2>; }; cpu3: cpu@3 { @@ -60,6 +63,12 @@ cpu3: cpu@3 { reg = <0x3>; operating-points-v2 = <&cpu_opp_table>; cpu-idle-states = <&CPU_SLEEP_0>; + next-level-cache = <&L2>; + }; + + L2: l2-cache { + compatible = "cache"; + cache-level = <2>; }; idle-states { @@ -76,7 +85,7 @@ CPU_SLEEP_0: cpu-sleep-0 { }; }; - cpu_opp_table: cpu-opp-table { + cpu_opp_table: opp-table-cpu { compatible = "operating-points-v2"; opp-shared; opp00 { @@ -101,7 +110,7 @@ opp03 { }; }; - zynqmp_ipi: zynqmp_ipi { + zynqmp_ipi: zynqmp-ipi { u-boot,dm-pre-reloc; compatible = "xlnx,zynqmp-ipi-mailbox"; interrupt-parent = <&gic>; @@ -111,7 +120,7 @@ zynqmp_ipi: zynqmp_ipi { #size-cells = <2>; ranges; - ipi_mailbox_pmu1: mailbox@ff990400 { + ipi_mailbox_pmu1: mailbox@ff9905c0 { u-boot,dm-pre-reloc; reg = <0x0 0xff9905c0 0x0 0x20>, <0x0 0xff9905e0 0x0 0x20>, @@ -139,6 +148,10 @@ pmu { <0 144 4>, <0 145 4>, <0 146 4>; + interrupt-affinity = <&cpu0>, + <&cpu1>, + <&cpu2>, + <&cpu3>; }; psci { @@ -162,72 +175,67 @@ zynqmp_power: zynqmp-power { mbox-names = "tx", "rx"; }; - nvmem_firmware { + nvmem-firmware { compatible = "xlnx,zynqmp-nvmem-fw"; #address-cells = <1>; #size-cells = <1>; - soc_revision: soc_revision@0 { + soc_revision: soc-revision@0 { reg = <0x0 0x4>; }; /* efuse access */ - efuse_dna: efuse_dna@c { + efuse_dna: efuse-dna@c { reg = <0xc 0xc>; }; - efuse_usr0: efuse_usr0@20 { + efuse_usr0: efuse-usr0@20 { reg = <0x20 0x4>; }; - efuse_usr1: efuse_usr1@24 { + efuse_usr1: efuse-usr1@24 { reg = <0x24 0x4>; }; - efuse_usr2: efuse_usr2@28 { + efuse_usr2: efuse-usr2@28 { reg = <0x28 0x4>; }; - efuse_usr3: efuse_usr3@2c { + efuse_usr3: efuse-usr3@2c { reg = <0x2c 0x4>; }; - efuse_usr4: efuse_usr4@30 { + efuse_usr4: efuse-usr4@30 { reg = <0x30 0x4>; }; - efuse_usr5: efuse_usr5@34 { + efuse_usr5: efuse-usr5@34 { reg = <0x34 0x4>; }; - efuse_usr6: efuse_usr6@38 { + efuse_usr6: efuse-usr6@38 { reg = <0x38 0x4>; }; - efuse_usr7: efuse_usr7@3c { + efuse_usr7: efuse-usr7@3c { reg = <0x3c 0x4>; }; - efuse_miscusr: efuse_miscusr@40 { + efuse_miscusr: efuse-miscusr@40 { reg = <0x40 0x4>; }; - efuse_chash: efuse_chash@50 { + efuse_chash: efuse-chash@50 { reg = <0x50 0x4>; }; - efuse_pufmisc: efuse_pufmisc@54 { + efuse_pufmisc: efuse-pufmisc@54 { reg = <0x54 0x4>; }; - efuse_sec: efuse_sec@58 { + efuse_sec: efuse-sec@58 { reg = <0x58 0x4>; }; - efuse_spkid: efuse_spkid@5c { + efuse_spkid: efuse-spkid@5c { reg = <0x5c 0x4>; }; - efuse_ppk0hash: efuse_ppk0hash@a0 { + efuse_ppk0hash: efuse-ppk0hash@a0 { reg = <0xa0 0x30>; }; - efuse_ppk1hash: efuse_ppk1hash@d0 { + efuse_ppk1hash: efuse-ppk1hash@d0 { reg = <0xd0 0x30>; }; }; zynqmp_pcap: pcap { compatible = "xlnx,zynqmp-pcap-fpga"; - clock-names = "ref_clk"; - }; - - xlnx_aes: zynqmp-aes { - compatible = "xlnx,zynqmp-aes"; }; zynqmp_reset: reset-controller { @@ -240,14 +248,6 @@ pinctrl0: pinctrl { status = "disabled"; }; - xlnx_keccak_384: sha384 { - compatible = "xlnx,zynqmp-keccak-384"; - }; - - xlnx_rsa: zynqmp-rsa { - compatible = "xlnx,zynqmp-rsa"; - }; - modepin_gpio: gpio { compatible = "xlnx,zynqmp-gpio-modepin"; gpio-controller; @@ -275,7 +275,6 @@ fpga_full: fpga-full { #address-cells = <2>; #size-cells = <2>; ranges; - power-domains = <&zynqmp_firmware PD_PL>; }; amba: axi { @@ -294,6 +293,7 @@ can0: can@ff060000 { interrupt-parent = <&gic>; tx-fifo-depth = <0x40>; rx-fifo-depth = <0x40>; + resets = <&zynqmp_reset ZYNQMP_RESET_CAN0>; power-domains = <&zynqmp_firmware PD_CAN_0>; }; @@ -306,6 +306,7 @@ can1: can@ff070000 { interrupt-parent = <&gic>; tx-fifo-depth = <0x40>; rx-fifo-depth = <0x40>; + resets = <&zynqmp_reset ZYNQMP_RESET_CAN1>; power-domains = <&zynqmp_firmware PD_CAN_1>; }; @@ -337,11 +338,10 @@ fpd_dma_chan1: dma-controller@fd500000 { interrupt-parent = <&gic>; interrupts = <0 124 4>; clock-names = "clk_main", "clk_apb"; + #dma-cells = <1>; xlnx,bus-width = <128>; - #stream-id-cells = <1>; iommus = <&smmu 0x14e8>; power-domains = <&zynqmp_firmware PD_GDMA>; - #dma-cells = <1>; }; fpd_dma_chan2: dma-controller@fd510000 { @@ -351,11 +351,10 @@ fpd_dma_chan2: dma-controller@fd510000 { interrupt-parent = <&gic>; interrupts = <0 125 4>; clock-names = "clk_main", "clk_apb"; + #dma-cells = <1>; xlnx,bus-width = <128>; - #stream-id-cells = <1>; iommus = <&smmu 0x14e9>; power-domains = <&zynqmp_firmware PD_GDMA>; - #dma-cells = <1>; }; fpd_dma_chan3: dma-controller@fd520000 { @@ -365,11 +364,10 @@ fpd_dma_chan3: dma-controller@fd520000 { interrupt-parent = <&gic>; interrupts = <0 126 4>; clock-names = "clk_main", "clk_apb"; + #dma-cells = <1>; xlnx,bus-width = <128>; - #stream-id-cells = <1>; iommus = <&smmu 0x14ea>; power-domains = <&zynqmp_firmware PD_GDMA>; - #dma-cells = <1>; }; fpd_dma_chan4: dma-controller@fd530000 { @@ -379,11 +377,10 @@ fpd_dma_chan4: dma-controller@fd530000 { interrupt-parent = <&gic>; interrupts = <0 127 4>; clock-names = "clk_main", "clk_apb"; + #dma-cells = <1>; xlnx,bus-width = <128>; - #stream-id-cells = <1>; iommus = <&smmu 0x14eb>; power-domains = <&zynqmp_firmware PD_GDMA>; - #dma-cells = <1>; }; fpd_dma_chan5: dma-controller@fd540000 { @@ -393,11 +390,10 @@ fpd_dma_chan5: dma-controller@fd540000 { interrupt-parent = <&gic>; interrupts = <0 128 4>; clock-names = "clk_main", "clk_apb"; + #dma-cells = <1>; xlnx,bus-width = <128>; - #stream-id-cells = <1>; iommus = <&smmu 0x14ec>; power-domains = <&zynqmp_firmware PD_GDMA>; - #dma-cells = <1>; }; fpd_dma_chan6: dma-controller@fd550000 { @@ -407,11 +403,10 @@ fpd_dma_chan6: dma-controller@fd550000 { interrupt-parent = <&gic>; interrupts = <0 129 4>; clock-names = "clk_main", "clk_apb"; + #dma-cells = <1>; xlnx,bus-width = <128>; - #stream-id-cells = <1>; iommus = <&smmu 0x14ed>; power-domains = <&zynqmp_firmware PD_GDMA>; - #dma-cells = <1>; }; fpd_dma_chan7: dma-controller@fd560000 { @@ -421,11 +416,10 @@ fpd_dma_chan7: dma-controller@fd560000 { interrupt-parent = <&gic>; interrupts = <0 130 4>; clock-names = "clk_main", "clk_apb"; + #dma-cells = <1>; xlnx,bus-width = <128>; - #stream-id-cells = <1>; iommus = <&smmu 0x14ee>; power-domains = <&zynqmp_firmware PD_GDMA>; - #dma-cells = <1>; }; fpd_dma_chan8: dma-controller@fd570000 { @@ -435,11 +429,10 @@ fpd_dma_chan8: dma-controller@fd570000 { interrupt-parent = <&gic>; interrupts = <0 131 4>; clock-names = "clk_main", "clk_apb"; + #dma-cells = <1>; xlnx,bus-width = <128>; - #stream-id-cells = <1>; iommus = <&smmu 0x14ef>; power-domains = <&zynqmp_firmware PD_GDMA>; - #dma-cells = <1>; }; gic: interrupt-controller@f9010000 { @@ -456,12 +449,12 @@ gic: interrupt-controller@f9010000 { gpu: gpu@fd4b0000 { status = "disabled"; - compatible = "arm,mali-400", "arm,mali-utgard"; + compatible = "xlnx,zynqmp-mali", "arm,mali-400"; reg = <0x0 0xfd4b0000 0x0 0x10000>; interrupt-parent = <&gic>; interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>; - interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1"; - clock-names = "gpu", "gpu_pp0", "gpu_pp1"; + interrupt-names = "gp", "gpmmu", "pp0", "ppmmu0", "pp1", "ppmmu1"; + clock-names = "bus", "core"; power-domains = <&zynqmp_firmware PD_GPU>; }; @@ -476,11 +469,10 @@ lpd_dma_chan1: dma-controller@ffa80000 { interrupt-parent = <&gic>; interrupts = <0 77 4>; clock-names = "clk_main", "clk_apb"; + #dma-cells = <1>; xlnx,bus-width = <64>; - #stream-id-cells = <1>; /* iommus = <&smmu 0x868>; */ power-domains = <&zynqmp_firmware PD_ADMA>; - #dma-cells = <1>; }; lpd_dma_chan2: dma-controller@ffa90000 { @@ -490,11 +482,10 @@ lpd_dma_chan2: dma-controller@ffa90000 { interrupt-parent = <&gic>; interrupts = <0 78 4>; clock-names = "clk_main", "clk_apb"; + #dma-cells = <1>; xlnx,bus-width = <64>; - #stream-id-cells = <1>; /* iommus = <&smmu 0x869>; */ power-domains = <&zynqmp_firmware PD_ADMA>; - #dma-cells = <1>; }; lpd_dma_chan3: dma-controller@ffaa0000 { @@ -504,11 +495,10 @@ lpd_dma_chan3: dma-controller@ffaa0000 { interrupt-parent = <&gic>; interrupts = <0 79 4>; clock-names = "clk_main", "clk_apb"; + #dma-cells = <1>; xlnx,bus-width = <64>; - #stream-id-cells = <1>; /* iommus = <&smmu 0x86a>; */ power-domains = <&zynqmp_firmware PD_ADMA>; - #dma-cells = <1>; }; lpd_dma_chan4: dma-controller@ffab0000 { @@ -518,11 +508,10 @@ lpd_dma_chan4: dma-controller@ffab0000 { interrupt-parent = <&gic>; interrupts = <0 80 4>; clock-names = "clk_main", "clk_apb"; + #dma-cells = <1>; xlnx,bus-width = <64>; - #stream-id-cells = <1>; /* iommus = <&smmu 0x86b>; */ power-domains = <&zynqmp_firmware PD_ADMA>; - #dma-cells = <1>; }; lpd_dma_chan5: dma-controller@ffac0000 { @@ -532,11 +521,10 @@ lpd_dma_chan5: dma-controller@ffac0000 { interrupt-parent = <&gic>; interrupts = <0 81 4>; clock-names = "clk_main", "clk_apb"; + #dma-cells = <1>; xlnx,bus-width = <64>; - #stream-id-cells = <1>; /* iommus = <&smmu 0x86c>; */ power-domains = <&zynqmp_firmware PD_ADMA>; - #dma-cells = <1>; }; lpd_dma_chan6: dma-controller@ffad0000 { @@ -546,11 +534,10 @@ lpd_dma_chan6: dma-controller@ffad0000 { interrupt-parent = <&gic>; interrupts = <0 82 4>; clock-names = "clk_main", "clk_apb"; + #dma-cells = <1>; xlnx,bus-width = <64>; - #stream-id-cells = <1>; /* iommus = <&smmu 0x86d>; */ power-domains = <&zynqmp_firmware PD_ADMA>; - #dma-cells = <1>; }; lpd_dma_chan7: dma-controller@ffae0000 { @@ -560,11 +547,10 @@ lpd_dma_chan7: dma-controller@ffae0000 { interrupt-parent = <&gic>; interrupts = <0 83 4>; clock-names = "clk_main", "clk_apb"; + #dma-cells = <1>; xlnx,bus-width = <64>; - #stream-id-cells = <1>; /* iommus = <&smmu 0x86e>; */ power-domains = <&zynqmp_firmware PD_ADMA>; - #dma-cells = <1>; }; lpd_dma_chan8: dma-controller@ffaf0000 { @@ -574,11 +560,10 @@ lpd_dma_chan8: dma-controller@ffaf0000 { interrupt-parent = <&gic>; interrupts = <0 84 4>; clock-names = "clk_main", "clk_apb"; + #dma-cells = <1>; xlnx,bus-width = <64>; - #stream-id-cells = <1>; /* iommus = <&smmu 0x86f>; */ power-domains = <&zynqmp_firmware PD_ADMA>; - #dma-cells = <1>; }; mc: memory-controller@fd070000 { @@ -597,13 +582,12 @@ nand0: nand-controller@ff100000 { interrupts = <0 14 4>; #address-cells = <1>; #size-cells = <0>; - #stream-id-cells = <1>; iommus = <&smmu 0x872>; power-domains = <&zynqmp_firmware PD_NAND>; }; gem0: ethernet@ff0b0000 { - compatible = "cdns,zynqmp-gem", "cdns,gem"; + compatible = "xlnx,zynqmp-gem", "cdns,gem"; status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 57 4>, <0 57 4>; @@ -611,14 +595,14 @@ gem0: ethernet@ff0b0000 { clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; #address-cells = <1>; #size-cells = <0>; - #stream-id-cells = <1>; iommus = <&smmu 0x874>; power-domains = <&zynqmp_firmware PD_ETH_0>; resets = <&zynqmp_reset ZYNQMP_RESET_GEM0>; + reset-names = "gem0_rst"; }; gem1: ethernet@ff0c0000 { - compatible = "cdns,zynqmp-gem", "cdns,gem"; + compatible = "xlnx,zynqmp-gem", "cdns,gem"; status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 59 4>, <0 59 4>; @@ -626,14 +610,14 @@ gem1: ethernet@ff0c0000 { clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; #address-cells = <1>; #size-cells = <0>; - #stream-id-cells = <1>; iommus = <&smmu 0x875>; power-domains = <&zynqmp_firmware PD_ETH_1>; resets = <&zynqmp_reset ZYNQMP_RESET_GEM1>; + reset-names = "gem1_rst"; }; gem2: ethernet@ff0d0000 { - compatible = "cdns,zynqmp-gem", "cdns,gem"; + compatible = "xlnx,zynqmp-gem", "cdns,gem"; status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 61 4>, <0 61 4>; @@ -641,14 +625,14 @@ gem2: ethernet@ff0d0000 { clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; #address-cells = <1>; #size-cells = <0>; - #stream-id-cells = <1>; iommus = <&smmu 0x876>; power-domains = <&zynqmp_firmware PD_ETH_2>; resets = <&zynqmp_reset ZYNQMP_RESET_GEM2>; + reset-names = "gem2_rst"; }; gem3: ethernet@ff0e0000 { - compatible = "cdns,zynqmp-gem", "cdns,gem"; + compatible = "xlnx,zynqmp-gem", "cdns,gem"; status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 63 4>, <0 63 4>; @@ -656,10 +640,10 @@ gem3: ethernet@ff0e0000 { clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; #address-cells = <1>; #size-cells = <0>; - #stream-id-cells = <1>; iommus = <&smmu 0x877>; power-domains = <&zynqmp_firmware PD_ETH_3>; resets = <&zynqmp_reset ZYNQMP_RESET_GEM3>; + reset-names = "gem3_rst"; }; gpio: gpio@ff0a0000 { @@ -680,6 +664,7 @@ i2c0: i2c@ff020000 { status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 17 4>; + clock-frequency = <400000>; reg = <0x0 0xff020000 0x0 0x1000>; #address-cells = <1>; #size-cells = <0>; @@ -691,6 +676,7 @@ i2c1: i2c@ff030000 { status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 18 4>; + clock-frequency = <400000>; reg = <0x0 0xff030000 0x0 0x1000>; #address-cells = <1>; #size-cells = <0>; @@ -795,7 +781,7 @@ pcie: pcie@fd0e0000 { msi-parent = <&pcie>; reg = <0x0 0xfd0e0000 0x0 0x1000>, <0x0 0xfd480000 0x0 0x1000>, - <0x80 0x00000000 0x0 0x1000000>; + <0x80 0x00000000 0x0 0x10000000>; reg-names = "breg", "pcireg", "cfg"; ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000>,/* non-prefetchable memory */ <0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */ @@ -805,7 +791,6 @@ pcie: pcie@fd0e0000 { <0x0 0x0 0x0 0x2 &pcie_intc 0x2>, <0x0 0x0 0x0 0x3 &pcie_intc 0x3>, <0x0 0x0 0x0 0x4 &pcie_intc 0x4>; - #stream-id-cells = <1>; iommus = <&smmu 0x4d0>; power-domains = <&zynqmp_firmware PD_PCIE>; pcie_intc: legacy-interrupt-controller { @@ -827,7 +812,6 @@ qspi: spi@ff0f0000 { <0x0 0xc0000000 0x0 0x8000000>; #address-cells = <1>; #size-cells = <0>; - #stream-id-cells = <1>; iommus = <&smmu 0x873>; power-domains = <&zynqmp_firmware PD_QSPI>; }; @@ -859,7 +843,6 @@ sata: ahci@fd0c0000 { interrupts = <0 133 4>; power-domains = <&zynqmp_firmware PD_SATA>; resets = <&zynqmp_reset ZYNQMP_RESET_SATA>; - #stream-id-cells = <4>; /* iommus = <&smmu 0x4c0>, <&smmu 0x4c1>, */ /* <&smmu 0x4c2>, <&smmu 0x4c3>; */ /* dma-coherent; */ @@ -873,8 +856,6 @@ sdhci0: mmc@ff160000 { interrupts = <0 48 4>; reg = <0x0 0xff160000 0x0 0x1000>; clock-names = "clk_xin", "clk_ahb"; - xlnx,device_id = <0>; - #stream-id-cells = <1>; iommus = <&smmu 0x870>; #clock-cells = <1>; clock-output-names = "clk_out_sd0", "clk_in_sd0"; @@ -890,8 +871,6 @@ sdhci1: mmc@ff170000 { interrupts = <0 49 4>; reg = <0x0 0xff170000 0x0 0x1000>; clock-names = "clk_xin", "clk_ahb"; - xlnx,device_id = <1>; - #stream-id-cells = <1>; iommus = <&smmu 0x871>; #clock-cells = <1>; clock-output-names = "clk_out_sd1", "clk_in_sd1"; @@ -999,7 +978,7 @@ uart1: serial@ff010000 { power-domains = <&zynqmp_firmware PD_UART_1>; }; - usb0: usb0@ff9d0000 { + usb0: usb@ff9d0000 { #address-cells = <2>; #size-cells = <2>; status = "disabled"; @@ -1021,19 +1000,16 @@ dwc3_0: usb@fe200000 { interrupt-parent = <&gic>; interrupt-names = "dwc_usb3", "otg", "hiber"; interrupts = <0 65 4>, <0 69 4>, <0 75 4>; - #stream-id-cells = <1>; iommus = <&smmu 0x860>; snps,quirk-frame-length-adjustment = <0x20>; - snps,refclk_fladj; - snps,enable_guctl1_resume_quirk; + clock-names = "ref"; snps,enable_guctl1_ipd_quirk; - snps,xhci-reset-on-resume; - snps,xhci-stream-quirk; + snps,resume-hs-terminations; /* dma-coherent; */ }; }; - usb1: usb1@ff9e0000 { + usb1: usb@ff9e0000 { #address-cells = <2>; #size-cells = <2>; status = "disabled"; @@ -1054,14 +1030,11 @@ dwc3_1: usb@fe300000 { interrupt-parent = <&gic>; interrupt-names = "dwc_usb3", "otg", "hiber"; interrupts = <0 70 4>, <0 74 4>, <0 76 4>; - #stream-id-cells = <1>; iommus = <&smmu 0x861>; snps,quirk-frame-length-adjustment = <0x20>; - snps,refclk_fladj; - snps,enable_guctl1_resume_quirk; + clock-names = "ref"; snps,enable_guctl1_ipd_quirk; - snps,xhci-reset-on-resume; - snps,xhci-stream-quirk; + snps,resume-hs-terminations; /* dma-coherent; */ }; }; @@ -1090,24 +1063,22 @@ xilinx_ams: ams@ffa50000 { status = "disabled"; interrupt-parent = <&gic>; interrupts = <0 56 4>; - interrupt-names = "ams-irq"; reg = <0x0 0xffa50000 0x0 0x800>; - reg-names = "ams-base"; - #address-cells = <2>; - #size-cells = <2>; + #address-cells = <1>; + #size-cells = <1>; #io-channel-cells = <1>; - ranges; + ranges = <0 0 0xffa50800 0x800>; - ams_ps: ams_ps@ffa50800 { + ams_ps: ams-ps@0 { compatible = "xlnx,zynqmp-ams-ps"; status = "disabled"; - reg = <0x0 0xffa50800 0x0 0x400>; + reg = <0x0 0x400>; }; - ams_pl: ams_pl@ffa50c00 { + ams_pl: ams-pl@400 { compatible = "xlnx,zynqmp-ams-pl"; status = "disabled"; - reg = <0x0 0xffa50c00 0x0 0x400>; + reg = <0x400 0x400>; }; }; @@ -1120,12 +1091,11 @@ zynqmp_dpdma: dma-controller@fd4c0000 { clock-names = "axi_clk"; power-domains = <&zynqmp_firmware PD_DP>; dma-channels = <6>; - #stream-id-cells = <1>; iommus = <&smmu 0xce4>; #dma-cells = <1>; }; - zynqmp_dpaud_setting: dp_aud@fd4ac000 { + zynqmp_dpaud_setting: dp-aud@fd4ac000 { compatible = "xlnx,zynqmp-dpaud-setting", "syscon"; reg = <0x0 0xfd4ac000 0x0 0x1000>; }; @@ -1141,7 +1111,6 @@ zynqmp_dpsub: display@fd4a0000 { xlnx,dpaud-reg = <&zynqmp_dpaud_setting>; interrupts = <0 119 4>; interrupt-parent = <&gic>; - #stream-id-cells = <1>; iommus = <&smmu 0xce3>; clock-names = "dp_apb_clk", "dp_aud_clk", @@ -1159,24 +1128,24 @@ zynqmp_dpsub: display@fd4a0000 { i2c-bus { }; - zynqmp_dp_snd_codec0: zynqmp_dp_snd_codec0 { + zynqmp_dp_snd_codec0: zynqmp-dp-snd-codec0 { compatible = "xlnx,dp-snd-codec"; clock-names = "aud_clk"; }; - zynqmp_dp_snd_pcm0: zynqmp_dp_snd_pcm0 { + zynqmp_dp_snd_pcm0: zynqmp-dp-snd-pcm0 { compatible = "xlnx,dp-snd-pcm0"; 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Wed, 03 Jan 2024 16:04:43 -0800 (PST) Received: from portia-desktop.alistair23.me ([159.196.41.205]) by smtp.gmail.com with ESMTPSA id t13-20020a62ea0d000000b006d638fd230bsm24040651pfh.93.2024.01.03.16.04.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Jan 2024 16:04:41 -0800 (PST) From: Portia Stephens To: portia.stephens@canonical.com, kernel-team@lists.ubuntu.com Subject: [jammy xilinx-zynqmp 2/2] can: xilinx_can: Add support for controller reset Date: Thu, 4 Jan 2024 10:04:30 +1000 Message-Id: <20240104000430.39141-3-portia.stephens@canonical.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240104000430.39141-1-portia.stephens@canonical.com> References: <20240104000430.39141-1-portia.stephens@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Srinivas Neeli Add support for an optional reset for the CAN controller using the reset driver. If the CAN node contains the "resets" property, then this logic will perform CAN controller reset. BugLink: https://bugs.launchpad.net/bugs/2046280 Signed-off-by: Srinivas Neeli State: pending (cherry-picked from commit 433d2843762819d2601f44bfef02e72c9f710063 https://github.com/Xilinx/linux-xlnx.git) Signed-off-by: Portia Stephens --- drivers/net/can/xilinx_can.c | 22 +++++++++++++++++++--- 1 file changed, 19 insertions(+), 3 deletions(-) diff --git a/drivers/net/can/xilinx_can.c b/drivers/net/can/xilinx_can.c index 622d71058fc9..5ce99fb7ef22 100644 --- a/drivers/net/can/xilinx_can.c +++ b/drivers/net/can/xilinx_can.c @@ -28,6 +28,7 @@ #include #include #include +#include #define DRIVER_NAME "xilinx_can" @@ -225,6 +226,7 @@ struct xcan_priv { struct clk *bus_clk; struct clk *can_clk; struct xcan_devtype_data devtype; + struct reset_control *rstc; }; /* CAN Bittiming constants as per Xilinx CAN specs */ @@ -1762,6 +1764,17 @@ static int xcan_probe(struct platform_device *pdev) priv->can.do_get_berr_counter = xcan_get_berr_counter; priv->can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK | CAN_CTRLMODE_BERR_REPORTING; + priv->rstc = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL); + if (IS_ERR(priv->rstc)) { + dev_err(&pdev->dev, "Cannot get CAN reset.\n"); + ret = PTR_ERR(priv->rstc); + goto err_free; + } + + ret = reset_control_reset(priv->rstc); + if (ret) + goto err_free; + if (devtype->cantype == XAXI_CANFD) priv->can.data_bittiming_const = @@ -1783,7 +1796,7 @@ static int xcan_probe(struct platform_device *pdev) /* Get IRQ for the device */ ret = platform_get_irq(pdev, 0); if (ret < 0) - goto err_free; + goto err_reset; ndev->irq = ret; @@ -1798,14 +1811,14 @@ static int xcan_probe(struct platform_device *pdev) if (IS_ERR(priv->can_clk)) { ret = dev_err_probe(&pdev->dev, PTR_ERR(priv->can_clk), "device clock not found\n"); - goto err_free; + goto err_reset; } priv->bus_clk = devm_clk_get(&pdev->dev, devtype->bus_clk_name); if (IS_ERR(priv->bus_clk)) { ret = dev_err_probe(&pdev->dev, PTR_ERR(priv->bus_clk), "bus clock not found\n"); - goto err_free; + goto err_reset; } priv->write_reg = xcan_write_reg_le; @@ -1854,6 +1867,8 @@ static int xcan_probe(struct platform_device *pdev) err_disableclks: pm_runtime_put(priv->dev); pm_runtime_disable(&pdev->dev); +err_reset: + reset_control_assert(priv->rstc); err_free: free_candev(ndev); err: @@ -1876,6 +1891,7 @@ static int xcan_remove(struct platform_device *pdev) pm_runtime_disable(&pdev->dev); netif_napi_del(&priv->napi); free_candev(ndev); + reset_control_assert(priv->rstc); return 0; }