From patchwork Fri Dec 8 07:12:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: liuhongt X-Patchwork-Id: 1873659 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=ORPZjHZN; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Smj513S1kz23nK for ; Fri, 8 Dec 2023 18:12:19 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 65192385841E for ; Fri, 8 Dec 2023 07:12:17 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) by sourceware.org (Postfix) with ESMTPS id 5469C3858CD1 for ; Fri, 8 Dec 2023 07:12:04 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 5469C3858CD1 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 5469C3858CD1 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=198.175.65.11 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702019526; cv=none; b=Fz7ieBVLpbb4kZRkchhZPVHfc/o37cVIlkmJgUsnw/janeMCoOr52SERbzBRCqLbmO2B9SqqUbUKDlPodC7di95zriKheT/MrR+5MgtncLMPOlF3OdnlBHoqeWNpOBBNIN+EQe6Ys2kYDjEIa1SwTPp6rz7ZvmqrabGLDzbMEEg= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702019526; c=relaxed/simple; bh=IAiq2aX1glU+YlDv8jytDeHnCqldTus+lo0OmVbXsig=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=FTdcjFUZlu8f7eV+5l/912mlvapDQAbVRevTS21HiCdVPS4cktjrlOmuhZ04uQTEzCBnfXhKEJwsJLmUCAVhhheRBNP33IvvYHfuGSdrKj48+CivGr/ti9gYqr4fNxIRJwhfUdd55D0KSOF0fN0hB2Nqyvvte8nkzJJ9iFVn6ag= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1702019525; x=1733555525; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=IAiq2aX1glU+YlDv8jytDeHnCqldTus+lo0OmVbXsig=; b=ORPZjHZN9EqjdRczfxN2VuS64fNyLNzfVncZpamI3SIKostf6Q0XuUud LyBKpKv08w4+OTn7ryx94/dnrijy1uMkCJ5hsaCKngLdG6kW3CETA28Wv PiXw59IPnDVgbHef3+D4ZdRuF5k9KYyu1p7srAqch6IlxM2BEEAtlse8Q uxdbXpysxI1Nm/2Mni13FARG1xFetsHmz9MHx7BgQEb0D9qfdlgXpisG/ qevuAiC8fgrg5Zzmrm5Uq0U9eRprAZVNps0VhQmEp9GPR2/MyG+3s67+7 EVumnP2ndRZzpbYQCzmFRv9ahmZyblmLuYVoWXODIVlqV1IOAhDL0Lj3Y w==; X-IronPort-AV: E=McAfee;i="6600,9927,10917"; a="1226563" X-IronPort-AV: E=Sophos;i="6.04,260,1695711600"; d="scan'208";a="1226563" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Dec 2023 23:12:04 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10917"; a="801013491" X-IronPort-AV: E=Sophos;i="6.04,260,1695711600"; d="scan'208";a="801013491" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by orsmga008.jf.intel.com with ESMTP; 07 Dec 2023 23:12:01 -0800 Received: from shliclel4217.sh.intel.com (shliclel4217.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id 9ADE71007829; Fri, 8 Dec 2023 15:12:00 +0800 (CST) From: liuhongt To: gcc-patches@gcc.gnu.org Cc: crazylht@gmail.com, hjl.tools@gmail.com Subject: [PATCH] [ICE] Support vpcmov for V4HF/V4BF/V2HF/V2BF under TARGET_XOP. Date: Fri, 8 Dec 2023 15:12:00 +0800 Message-Id: <20231208071200.3238127-1-hongtao.liu@intel.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 X-Spam-Status: No, score=-12.6 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}. Ready push to trunk. gcc/ChangeLog: PR target/112904 * config/i386/mmx.md (*xop_pcmov_): New define_insn. gcc/testsuite/ChangeLog: * g++.target/i386/pr112904.C: New test. --- gcc/config/i386/mmx.md | 22 +++++++++++++++++++ gcc/testsuite/g++.target/i386/pr112904.C | 27 ++++++++++++++++++++++++ 2 files changed, 49 insertions(+) create mode 100644 gcc/testsuite/g++.target/i386/pr112904.C diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md index a07a921b739..06d6c57876b 100644 --- a/gcc/config/i386/mmx.md +++ b/gcc/config/i386/mmx.md @@ -4136,6 +4136,17 @@ (define_insn "*xop_pcmov_" [(set_attr "type" "sse4arg") (set_attr "mode" "TI")]) +(define_insn "*xop_pcmov_" + [(set (match_operand:V4F_64 0 "register_operand" "=x") + (if_then_else:V4F_64 + (match_operand:V4F_64 3 "register_operand" "x") + (match_operand:V4F_64 1 "register_operand" "x") + (match_operand:V4F_64 2 "register_operand" "x")))] + "TARGET_XOP && TARGET_MMX_WITH_SSE" + "vpcmov\t{%3, %2, %1, %0|%0, %1, %2, %3}" + [(set_attr "type" "sse4arg") + (set_attr "mode" "TI")]) + (define_insn "*xop_pcmov_" [(set (match_operand:VI_16_32 0 "register_operand" "=x") (if_then_else:VI_16_32 @@ -4147,6 +4158,17 @@ (define_insn "*xop_pcmov_" [(set_attr "type" "sse4arg") (set_attr "mode" "TI")]) +(define_insn "*xop_pcmov_" + [(set (match_operand:V2F_32 0 "register_operand" "=x") + (if_then_else:V2F_32 + (match_operand:V2F_32 3 "register_operand" "x") + (match_operand:V2F_32 1 "register_operand" "x") + (match_operand:V2F_32 2 "register_operand" "x")))] + "TARGET_XOP" + "vpcmov\t{%3, %2, %1, %0|%0, %1, %2, %3}" + [(set_attr "type" "sse4arg") + (set_attr "mode" "TI")]) + ;; XOP permute instructions (define_insn "mmx_ppermv64" [(set (match_operand:V8QI 0 "register_operand" "=x") diff --git a/gcc/testsuite/g++.target/i386/pr112904.C b/gcc/testsuite/g++.target/i386/pr112904.C new file mode 100644 index 00000000000..556be921197 --- /dev/null +++ b/gcc/testsuite/g++.target/i386/pr112904.C @@ -0,0 +1,27 @@ +typedef _Float16 v4hf __attribute__((vector_size(8))); +typedef short v4hi __attribute__((vector_size(8))); +typedef _Float16 v2hf __attribute__((vector_size(4))); +typedef short v2hi __attribute__((vector_size(4))); + +typedef __bf16 v4bf __attribute__((vector_size(8))); +typedef __bf16 v2bf __attribute__((vector_size(4))); + +v4hf foo(v4hf a, v4hf b, v4hi c) +{ + return c ? a : b; +} + +v2hf foo1(v2hf a, v2hf b, v2hi c) +{ + return c ? a : b; +} + +v4bf foo(v4bf a, v4bf b, v4hi c) +{ + return c ? a : b; +} + +v2bf foo1(v2bf a, v2bf b, v2hi c) +{ + return c ? a : b; +}