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Mon, 06 Nov 2023 02:33:20 -0800 (PST) From: Jerome Brunet To: Thierry Reding , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Jerome Brunet , Kevin Hilman , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-pwm@vger.kernel.org, JunYi Zhao Subject: [PATCH 1/6] dt-bindings: pwm: amlogic: fix s4 bindings Date: Mon, 6 Nov 2023 11:32:48 +0100 Message-ID: <20231106103259.703417-2-jbrunet@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231106103259.703417-1-jbrunet@baylibre.com> References: <20231106103259.703417-1-jbrunet@baylibre.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Bot: notify s4 has been added to the compatible list while converting the Amlogic PWM binding documentation from txt to yaml. However, on the s4, the clock bindings have different meaning compared to previous SoCs. On previous SoCs the clock bindings used to describe which input the PWM channel multiplexer should pick among its possible parents. This is very much tied to the driver implementation, instead of describing the HW for what it is. When support for the Amlogic PWM was first added, how to deal with clocks through DT was not as clear as it nowadays. The Linux driver now ignores this DT setting, but still relies on the hard-coded list of clock sources. On the s4, the input multiplexer is gone. The clock bindings actually describe the clock as it exists, not a setting. The property has a different meaning, even if it is still 2 clocks and it would pass the check when support is actually added. Also the s4 cannot work if the clocks are not provided, so the property no longer optional. Finally, for once it makes sense to see the input as being numbered somehow. No need to bother with clock-names on the s4 type of PWM. Fixes: 43a1c4ff3977 ("dt-bindings: pwm: Convert Amlogic Meson PWM binding") Signed-off-by: Jerome Brunet --- .../devicetree/bindings/pwm/pwm-amlogic.yaml | 68 ++++++++++++++++--- 1 file changed, 59 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml index 527864a4d855..754b70fc2db0 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml +++ b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml @@ -9,9 +9,6 @@ title: Amlogic PWM maintainers: - Heiner Kallweit -allOf: - - $ref: pwm.yaml# - properties: compatible: oneOf: @@ -43,12 +40,8 @@ properties: maxItems: 2 clock-names: - oneOf: - - items: - - enum: [clkin0, clkin1] - - items: - - const: clkin0 - - const: clkin1 + minItems: 1 + maxItems: 2 "#pwm-cells": const: 3 @@ -57,6 +50,56 @@ required: - compatible - reg +allOf: + - $ref: pwm.yaml# + + - if: + properties: + compatible: + contains: + enum: + - amlogic,meson8-pwm + - amlogic,meson8b-pwm + - amlogic,meson-gxbb-pwm + - amlogic,meson-gxbb-ao-pwm + - amlogic,meson-axg-ee-pwm + - amlogic,meson-axg-ao-pwm + - amlogic,meson-g12a-ee-pwm + - amlogic,meson-g12a-ao-pwm-ab + - amlogic,meson-g12a-ao-pwm-cd + - amlogic,meson-gx-pwm + - amlogic,meson-gx-ao-pwm + then: + # Historic bindings tied to the driver implementation + # The clocks provided here are meant to be matched with the input + # known (hard-coded) in the driver and used to select pwm clock + # source. Currently, the linux driver ignores this. + properties: + clock-names: + oneOf: + - items: + - enum: [clkin0, clkin1] + - items: + - const: clkin0 + - const: clkin1 + + # Newer IP block take a single input per channel, instead of 4 inputs + # for both channels + - if: + properties: + compatible: + contains: + enum: + - amlogic,meson-s4-pwm + then: + properties: + clocks: + items: + - description: input clock of PWM channel A + - description: input clock of PWM channel B + required: + - clocks + additionalProperties: false examples: @@ -68,3 +111,10 @@ examples: clock-names = "clkin0", "clkin1"; #pwm-cells = <3>; }; + - | + pwm@1000 { + compatible = "amlogic,meson-s4-pwm"; + reg = <0x1000 0x10>; + clocks = <&pwm_src_a>, <&pwm_src_b>; + #pwm-cells = <3>; + }; From patchwork Mon Nov 6 10:32:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 1859947 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Mon, 06 Nov 2023 02:33:21 -0800 (PST) From: Jerome Brunet To: Thierry Reding , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Jerome Brunet , Kevin Hilman , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-pwm@vger.kernel.org, JunYi Zhao Subject: [PATCH 2/6] dt-bindings: pwm: amlogic: add new compatible for meson8 pwm type Date: Mon, 6 Nov 2023 11:32:49 +0100 Message-ID: <20231106103259.703417-3-jbrunet@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231106103259.703417-1-jbrunet@baylibre.com> References: <20231106103259.703417-1-jbrunet@baylibre.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Bot: notify Add a new compatible for the pwm found in the meson8 to sm1 Amlogic SoCs. The previous clock bindings for these SoCs described the driver and not the HW itself. The clock provided was used to set the parent of the input clock mux among the possible parents hard-coded in the driver. The new bindings allows to describe the actual clock inputs of the PWM in DT, like most bindings do, instead of relying of hard-coded data. The new bindings make the old one deprecated. There is enough experience on this HW to know that the PWM is exactly the same all the supported SoCs. There is no need for a per-SoC compatible. Signed-off-by: Jerome Brunet --- .../devicetree/bindings/pwm/pwm-amlogic.yaml | 35 +++++++++++++++++-- 1 file changed, 33 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml index 754b70fc2db0..3aa522c4cae4 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml +++ b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml @@ -22,6 +22,7 @@ properties: - amlogic,meson-g12a-ao-pwm-ab - amlogic,meson-g12a-ao-pwm-cd - amlogic,meson-s4-pwm + - amlogic,meson8-pwm-v2 - items: - const: amlogic,meson-gx-pwm - const: amlogic,meson-gxbb-pwm @@ -37,7 +38,7 @@ properties: clocks: minItems: 1 - maxItems: 2 + maxItems: 4 clock-names: minItems: 1 @@ -70,11 +71,14 @@ allOf: - amlogic,meson-gx-pwm - amlogic,meson-gx-ao-pwm then: - # Historic bindings tied to the driver implementation + # Obsolete historic bindings tied to the driver implementation # The clocks provided here are meant to be matched with the input # known (hard-coded) in the driver and used to select pwm clock # source. Currently, the linux driver ignores this. + deprecated: true properties: + clocks: + maxItems: 2 clock-names: oneOf: - items: @@ -83,6 +87,26 @@ allOf: - const: clkin0 - const: clkin1 + # Newer binding where clock describe the actual clock inputs of the pwm + # block. These are necessary but some inputs may be grounded. + - if: + properties: + compatible: + contains: + enum: + - amlogic,meson8b-pwm-v2 + then: + properties: + clocks: + minItems: 1 + items: + - description: input clock 0 of the pwm block + - description: input clock 1 of the pwm block + - description: input clock 2 of the pwm block + - description: input clock 3 of the pwm block + required: + - clocks + # Newer IP block take a single input per channel, instead of 4 inputs # for both channels - if: @@ -111,6 +135,13 @@ examples: clock-names = "clkin0", "clkin1"; #pwm-cells = <3>; }; + - | + pwm@2000 { + compatible = "amlogic,meson8-pwm-v2"; + reg = <0x1000 0x10>; + clocks = <&xtal>, <0>, <&fdiv4>, <&fdiv5>; + #pwm-cells = <3>; + }; - | pwm@1000 { compatible = "amlogic,meson-s4-pwm";