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Wed, 25 Oct 2023 09:27:59 +0000 (GMT) Received: from a8345010.lnxne.boe (unknown [9.152.108.100]) by smtpav05.fra02v.mail.ibm.com (Postfix) with ESMTPS; Wed, 25 Oct 2023 09:27:59 +0000 (GMT) From: Stefan Schulze Frielinghaus To: krebbel@linux.ibm.com, gcc-patches@gcc.gnu.org Cc: Stefan Schulze Frielinghaus Subject: [PATCH] s390: Fix constraint for insn *cmphi_ccu Date: Wed, 25 Oct 2023 11:27:33 +0200 Message-ID: <20231025092732.1636701-2-stefansf@linux.ibm.com> X-Mailer: git-send-email 2.41.0 MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: 61gVoXSXgfaMuW2BowMFN5VvmGrcdgnP X-Proofpoint-GUID: 61gVoXSXgfaMuW2BowMFN5VvmGrcdgnP X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-25_01,2023-10-24_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=557 priorityscore=1501 lowpriorityscore=0 impostorscore=0 mlxscore=0 bulkscore=0 malwarescore=0 suspectscore=0 phishscore=0 adultscore=0 spamscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2310170001 definitions=main-2310250080 X-Spam-Status: No, score=-8.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Currently for an unsigned 16-bit comparison between memory and an immediate where the high bit is set, a clc is emitted. This is because the constant is created for mode HI and therefore sign extended. This means constraint D does not hold anymore. Since the mode already restricts the immediate to 16 bit, it is enough to make use of constraint n and chop of the high bits in the output template. Bootstrapped and regtested on s390. Ok for mainline? gcc/ChangeLog: * config/s390/s390.md (*cmphi_ccu): For immediate operand 1 make use of constraint n instead of D and chop of high bits in the output template. --- gcc/config/s390/s390.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index 3f29ba21442..777a20f8e77 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -1355,13 +1355,13 @@ (define_insn "*cmphi_ccu" [(set (reg CC_REGNUM) (compare (match_operand:HI 0 "nonimmediate_operand" "d,d,Q,Q,BQ") - (match_operand:HI 1 "general_operand" "Q,S,D,BQ,Q")))] + (match_operand:HI 1 "general_operand" "Q,S,n,BQ,Q")))] "s390_match_ccmode (insn, CCUmode) && !register_operand (operands[1], HImode)" "@ clm\t%0,3,%S1 clmy\t%0,3,%S1 - clhhsi\t%0,%1 + clhhsi\t%0,%x1 # #" [(set_attr "op_type" "RS,RSY,SIL,SS,SS")