From patchwork Mon Oct 16 16:06:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Devarsh Thakkar X-Patchwork-Id: 1849454 X-Patchwork-Delegate: agust@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256 header.s=ti-com-17Q1 header.b=pbXqE8Yr; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4S8MS12kHCz1ypX for ; Tue, 17 Oct 2023 03:06:41 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id BD9D786CF2; Mon, 16 Oct 2023 18:06:28 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="pbXqE8Yr"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 6C1C186940; Mon, 16 Oct 2023 18:06:27 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.2 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 6767286DCA for ; Mon, 16 Oct 2023 18:06:23 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=devarsht@ti.com Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 39GG6E3j079838; Mon, 16 Oct 2023 11:06:14 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1697472374; bh=n6vPCKMHV5VyyP53QcjynSHWnGolBQiyGXU2Pb9WmT4=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=pbXqE8YrVUn5w9D52uXaDWZ7yWolr1yStzQ9IrVE3x3UYlR/rEB33X3DPYpX4NRok PH3SLNHzrIIqJyOy6xwVTNTOROsLEm0Hwx+9ZbtT8KJ9Yd2Q9cmGWFMIruEDYF3y6P Uo6BqhFJPYdrThw0o8cbPuJcaIxa/HX0/7BUwqH8= Received: from DLEE112.ent.ti.com (dlee112.ent.ti.com [157.170.170.23]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 39GG6E71122343 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 16 Oct 2023 11:06:14 -0500 Received: from DLEE105.ent.ti.com (157.170.170.35) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 16 Oct 2023 11:06:13 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 16 Oct 2023 11:06:13 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 39GG6CNO112818; Mon, 16 Oct 2023 11:06:13 -0500 From: Devarsh Thakkar To: , , , , , , , CC: , , , , , , , Subject: [RFC PATCH 1/5] arm: mach-k3: common: Reserve video memory from end of the RAM Date: Mon, 16 Oct 2023 21:36:07 +0530 Message-ID: <20231016160611.1353458-2-devarsht@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231016160611.1353458-1-devarsht@ti.com> References: <20231016160611.1353458-1-devarsht@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Move the function to setup video memory before page table reservation so that framebuffer memory gets reserved from the end of RAM. This is as per the new policy being discussed for passing blobs where each of the reserved areas for bloblists to be passed need to be reserved at the end of RAM. This is to enable the next stage to directly skip the pre-reserved area from previous stage without having to making any gaps/holes to accomodate those regions which was the case if previous stage reserved region say somewhere in the middle and not at the end of RAM. Suggested-by: Simon Glass Signed-off-by: Devarsh Thakkar --- arch/arm/mach-k3/common.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c index cc755dd1bf..3978b9ccca 100644 --- a/arch/arm/mach-k3/common.c +++ b/arch/arm/mach-k3/common.c @@ -27,6 +27,7 @@ #include #include #include +#include #if IS_ENABLED(CONFIG_SYS_K3_SPL_ATF) enum { @@ -522,6 +523,24 @@ void remove_fwl_configs(struct fwl_data *fwl_data, size_t fwl_data_size) } } +static int video_setup(void) +{ + if (CONFIG_IS_ENABLED(VIDEO)) { + ulong addr; + int ret; + + addr = gd->relocaddr; + ret = video_reserve(&addr); + if (ret) + return ret; + debug("Reserving %luk for video at: %08lx\n", + ((unsigned long)gd->relocaddr - addr) >> 10, addr); + gd->relocaddr = addr; + } + + return 0; +} + void spl_enable_dcache(void) { #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) @@ -537,6 +556,8 @@ void spl_enable_dcache(void) if (ram_top >= 0x100000000) ram_top = (phys_addr_t) 0x100000000; + gd->relocaddr = ram_top; + video_setup(); gd->arch.tlb_addr = ram_top - gd->arch.tlb_size; gd->arch.tlb_addr &= ~(0x10000 - 1); debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, From patchwork Mon Oct 16 16:06:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Devarsh Thakkar X-Patchwork-Id: 1849455 X-Patchwork-Delegate: agust@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256 header.s=ti-com-17Q1 header.b=c4/DQXKR; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4S8MSF2trkz1ypX for ; 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Mon, 16 Oct 2023 11:06:15 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 16 Oct 2023 11:06:15 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 39GG6EYZ014897; Mon, 16 Oct 2023 11:06:15 -0500 From: Devarsh Thakkar To: , , , , , , , CC: , , , , , , , Subject: [RFC PATCH 2/5] board: ti: am62x: evm: Remove video_setup from spl_board_init Date: Mon, 16 Oct 2023 21:36:08 +0530 Message-ID: <20231016160611.1353458-3-devarsht@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231016160611.1353458-1-devarsht@ti.com> References: <20231016160611.1353458-1-devarsht@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Remove video_setup from evm_init sequence since it is now getting called at an earlier place now to make sure video memory is reserved at the end of RAM. Suggested-by: Simon Glass Signed-off-by: Devarsh Thakkar --- board/ti/am62x/evm.c | 18 ------------------ 1 file changed, 18 deletions(-) diff --git a/board/ti/am62x/evm.c b/board/ti/am62x/evm.c index ad93908840..88e02155ee 100644 --- a/board/ti/am62x/evm.c +++ b/board/ti/am62x/evm.c @@ -60,27 +60,9 @@ int dram_init_banksize(void) } #if defined(CONFIG_SPL_BUILD) -static int video_setup(void) -{ - if (CONFIG_IS_ENABLED(VIDEO)) { - ulong addr; - int ret; - - addr = gd->relocaddr; - ret = video_reserve(&addr); - if (ret) - return ret; - debug("Reserving %luk for video at: %08lx\n", - ((unsigned long)gd->relocaddr - addr) >> 10, addr); - gd->relocaddr = addr; - } - - return 0; -} void spl_board_init(void) { - video_setup(); enable_caches(); if (IS_ENABLED(CONFIG_SPL_SPLASH_SCREEN) && IS_ENABLED(CONFIG_SPL_BMP)) splash_display(); From patchwork Mon Oct 16 16:06:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Devarsh Thakkar X-Patchwork-Id: 1849456 X-Patchwork-Delegate: agust@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Mon, 16 Oct 2023 11:06:16 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 39GG6Ggb014922; Mon, 16 Oct 2023 11:06:16 -0500 From: Devarsh Thakkar To: , , , , , , , CC: , , , , , , , Subject: [RFC PATCH 3/5] common/board_f: Catch bloblist before starting resevatinos Date: Mon, 16 Oct 2023 21:36:09 +0530 Message-ID: <20231016160611.1353458-4-devarsht@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231016160611.1353458-1-devarsht@ti.com> References: <20231016160611.1353458-1-devarsht@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Start reservations needed for init sequence only after catching bloblists from previous stage. This is to avoid catching bloblists in the middle causing gaps while u-boot is reserving. Adjust the relocaddr as per video hand-off information received from previous stage so that further reservations start only after regions reserved for previous stages Skip reservation for video memory if it was already filled by a bloblist. Signed-off-by: Devarsh Thakkar --- common/board_f.c | 36 +++++++++++++++++++++++++++++++++--- 1 file changed, 33 insertions(+), 3 deletions(-) diff --git a/common/board_f.c b/common/board_f.c index aef395b135..ef53aa9bee 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -403,7 +403,8 @@ __weak int arch_reserve_mmu(void) return 0; } -static int reserve_video(void) + +static int reserve_video_from_videoblob(void) { if (IS_ENABLED(CONFIG_SPL_VIDEO_HANDOFF) && spl_phase() > PHASE_SPL) { struct video_handoff *ho; @@ -412,8 +413,36 @@ static int reserve_video(void) if (!ho) return log_msg_ret("blf", -ENOENT); video_reserve_from_bloblist(ho); - gd->relocaddr = ho->fb; - } else if (CONFIG_IS_ENABLED(VIDEO)) { + + /* Sanity check fb from blob is before current relocaddr */ + if (likely(gd->relocaddr > (unsigned long) ho->fb)) { + gd->relocaddr = ho->fb; + } + } + + return 0; +} + +/* + * Check if any bloblist received specifying reserved areas from previous stage and adjust + * gd->relocaddr accordingly, so that we start reserving after pre-reserved areas + * from previous stage. + * + * NOTE: + * IT is recommended that all bloblists from previous stage are reserved from ram_top + * as next stage will simply start reserving further regions after them. + */ +static int setup_relocaddr_from_bloblist(void) +{ + reserve_video_from_videoblob(); + + return 0; +} + + +static int reserve_video(void) +{ + if (CONFIG_IS_ENABLED(VIDEO)) { ulong addr; int ret; @@ -925,6 +954,7 @@ static const init_fnc_t init_sequence_f[] = { reserve_pram, #endif reserve_round_4k, + setup_relocaddr_from_bloblist, arch_reserve_mmu, reserve_video, reserve_trace, From patchwork Mon Oct 16 16:06:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Devarsh Thakkar X-Patchwork-Id: 1849457 X-Patchwork-Delegate: agust@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256 header.s=ti-com-17Q1 header.b=HCxnEULd; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; 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Signed-off-by: Devarsh Thakkar Reviewed-by: Simon Glass --- drivers/video/video-uclass.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c index f743ed74c8..bac30187e7 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c @@ -123,6 +123,14 @@ int video_reserve(ulong *addrp) struct udevice *dev; ulong size; + + if (IS_ENABLED(CONFIG_SPL_VIDEO_HANDOFF) && spl_phase() > PHASE_SPL) { + /* Skip allocation if already received a bloblist which + * filled below fields */ + if (gd->fb_base && gd->video_top && gd->video_bottom) + return 0; + } + gd->video_top = *addrp; for (uclass_find_first_device(UCLASS_VIDEO, &dev); dev; From patchwork Mon Oct 16 16:06:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Devarsh Thakkar X-Patchwork-Id: 1849458 X-Patchwork-Delegate: agust@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Mon, 16 Oct 2023 11:06:19 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 39GG6Jwp099034; Mon, 16 Oct 2023 11:06:19 -0500 From: Devarsh Thakkar To: , , , , , , , CC: , , , , , , , Subject: [RFC PATCH 5/5] video: Fill video handoff in video post probe Date: Mon, 16 Oct 2023 21:36:11 +0530 Message-ID: <20231016160611.1353458-6-devarsht@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231016160611.1353458-1-devarsht@ti.com> References: <20231016160611.1353458-1-devarsht@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Fill video handoff fields in video_post_probe as at this point we have full framebuffer related information. Also fill all the fields available in video hand-off struct as those were missing earlier and u-boot framework expects them to be filled for some of the functionalities. Reported-by: Simon Glass Signed-off-by: Devarsh Thakkar --- drivers/video/video-uclass.c | 25 +++++++++++++++---------- 1 file changed, 15 insertions(+), 10 deletions(-) diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c index bac30187e7..2a605f8339 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c @@ -149,16 +149,6 @@ int video_reserve(ulong *addrp) debug("Video frame buffers from %lx to %lx\n", gd->video_bottom, gd->video_top); - if (spl_phase() == PHASE_SPL && CONFIG_IS_ENABLED(VIDEO_HANDOFF)) { - struct video_handoff *ho; - - ho = bloblist_add(BLOBLISTT_U_BOOT_VIDEO, sizeof(*ho), 0); - if (!ho) - return log_msg_ret("blf", -ENOENT); - ho->fb = *addrp; - ho->size = size; - } - return 0; } @@ -554,6 +544,21 @@ static int video_post_probe(struct udevice *dev) priv->fb_size = priv->line_length * priv->ysize; + /* Set up video handoff fields for passing video blob to next stage */ + if (spl_phase() == PHASE_SPL && CONFIG_IS_ENABLED(BLOBLIST)) { + struct video_handoff *ho; + + ho = bloblist_add(BLOBLISTT_U_BOOT_VIDEO, sizeof(*ho), 0); + if (!ho) + return log_msg_ret("blf", -ENOENT); + ho->fb = gd->video_bottom; + ho->size = gd->video_top - gd->video_bottom; + ho->xsize = priv->xsize; + ho->ysize = priv->ysize; + ho->line_length = priv->line_length; + ho->bpix = priv->bpix; + } + if (IS_ENABLED(CONFIG_VIDEO_COPY) && plat->copy_base) priv->copy_fb = map_sysmem(plat->copy_base, plat->size);