From patchwork Thu Sep 28 10:58:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jian Yang X-Patchwork-Id: 1840699 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=mediatek.com header.i=@mediatek.com header.a=rsa-sha256 header.s=dk header.b=AnnvLvJf; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=permerror (SPF Permanent Error: More than 10 MX records returned) smtp.mailfrom=vger.kernel.org (client-ip=147.75.48.161; helo=sy.mirrors.kernel.org; envelope-from=devicetree+bounces-4201-incoming-dt=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org [147.75.48.161]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Rx9TP1WYqz1yp0 for ; Thu, 28 Sep 2023 20:59:05 +1000 (AEST) Received: from smtp.subspace.kernel.org (conduit.subspace.kernel.org [100.90.174.1]) by sy.mirrors.kernel.org (Postfix) with ESMTP id 145B4B20AF1 for ; Thu, 28 Sep 2023 10:59:04 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id AFCAC358A8; Thu, 28 Sep 2023 10:59:02 +0000 (UTC) X-Original-To: devicetree@vger.kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E0687358A0 for ; Thu, 28 Sep 2023 10:59:00 +0000 (UTC) Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4EC9D19D; Thu, 28 Sep 2023 03:58:56 -0700 (PDT) X-UUID: 00258e2e5dee11eea33bb35ae8d461a2-20230928 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=sO47xg2q7reNI5Lyzxj+nlpv8stcl2GfJcb4pFVksnk=; b=AnnvLvJfLAdnrcr9XPfanLW6iHtijgXAmecAxIheqDjK2427oyG072fPIxOmMtCanT8JN0E5aN6i0cuwIBzFOUBIGQHMhdhVwJq+pA6TNgfaDCgxA5Pqa4TpSiUlEiSICS48e1yyJZ1wPtVRHziKjfGN++1y0ar8DB8fBmZAit8=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.32,REQID:0af88961-5050-4f52-8b55-7181c258ce26,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:5f78ec9,CLOUDID:2c5792c3-1e57-4345-9d31-31ad9818b39f,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR:NO, DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: 00258e2e5dee11eea33bb35ae8d461a2-20230928 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1933177760; Thu, 28 Sep 2023 18:58:48 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Thu, 28 Sep 2023 18:58:46 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Thu, 28 Sep 2023 18:58:46 +0800 From: Jian Yang To: Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Matthias Brugger , Jianjun Wang , Rob Herring CC: , , , , , , , , , , jian.yang Subject: [PATCH v3 1/2] dt-bindings: PCI: mediatek-gen3: Add support for controlling power and reset Date: Thu, 28 Sep 2023 18:58:20 +0800 Message-ID: <20230928105819.5161-2-jian.yang@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230928105819.5161-1-jian.yang@mediatek.com> References: <20230928105819.5161-1-jian.yang@mediatek.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS, UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net From: "jian.yang" Add new properties to support control power supplies and reset pin of a downstream component. Signed-off-by: jian.yang --- .../bindings/pci/mediatek-pcie-gen3.yaml | 25 +++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml index 7e8c7a2a5f9b..32031362db58 100644 --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml @@ -84,6 +84,26 @@ properties: items: enum: [ phy, mac ] + pcie1v8-supply: + description: + The regulator phandle that provides 1.8V power from root port to a + downstream component. + + pcie3v3-supply: + description: + The regulator phandle that provides 3.3V power from root port to a + downstream component. + + pcie12v-supply: + description: + The regulator phandle that provides 12V power from root port to a + downstream component. + + dsc-reset-gpios: + description: + The extra reset pin other than PERST# required by a downstream component. + maxItems: 1 + clocks: minItems: 4 maxItems: 6 @@ -238,5 +258,10 @@ examples: #interrupt-cells = <1>; interrupt-controller; }; + + pcie@0 { + device_type = "pci"; + pcie-3v3-supply = <&pcie3v3_regulator>; + }; }; };