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Tue, 19 Sep 2023 14:21:04 -0700 (PDT) Received: from [10.0.17.156] ([50.221.140.188]) by smtp.gmail.com with ESMTPSA id 26-20020a17090a01da00b00268b9862343sm45658pjd.24.2023.09.19.14.21.03 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 19 Sep 2023 14:21:04 -0700 (PDT) Message-ID: Date: Tue, 19 Sep 2023 14:21:03 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 Subject: [Committed] RISC-V: Fix --enable-checking=rtl ICE on rv32gc bootstrap Content-Language: en-US To: =?utf-8?b?6ZKf5bGF5ZOy?= , gcc-patches Cc: "pan2.li" , "kito.cheng" , "yanzhang.wang" , gnu-toolchain References: <20230919180423.452938-1-patrick@rivosinc.com> <65FB3D10FADF7CBA+202309200508291658902@rivai.ai> From: Patrick O'Neill In-Reply-To: <65FB3D10FADF7CBA+202309200508291658902@rivai.ai> X-Spam-Status: No, score=-10.1 required=5.0 tests=BAYES_00, BODY_8BITS, DKIM_SIGNED, DKIM_VALID, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, WEIRD_PORT autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Committed, thanks! The pre-commit hook didn't like the Authored-by format so I changed it into: 2023-09-19 Juzhe Zhong Patrick From 0b9c51dc2fb58911b91889895d00437673d9f4cf Mon Sep 17 00:00:00 2001 From: Patrick O'Neill Date: Tue, 19 Sep 2023 10:03:35 -0700 Subject: [PATCH] RISC-V: Fix --enable-checking=rtl ICE on rv32gc bootstrap Resolves PR 111461. during RTL pass: expand offtime.c: In function '__offtime': offtime.c:79:6: internal compiler error: RTL check: expected elt 0 type 'e' or 'u', have 'w' (rtx const_int) in riscv_legitimize_const_move, at config/riscv/riscv.cc:2176    79 |   ip = __mon_yday[__isleap(y)]; Tested on rv32gc glibc with --enable-checking=rtl. 2023-09-19 Juzhe Zhong gcc/ChangeLog:     * config/riscv/riscv.cc (riscv_legitimize_const_move): Eliminate     src_op_0 var to avoid rtl check error. Tested-by: Patrick O'Neill ---  gcc/config/riscv/riscv.cc | 10 ++++------  1 file changed, 4 insertions(+), 6 deletions(-)        emit_insn (gen_rtx_SET (dest, gen_rtx_PLUS (mode, dest, dest_tmp)));        return; diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index 8c766e2e2be..9a1e643a6a8 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -2173,16 +2173,14 @@ riscv_legitimize_const_move (machine_mode mode, rtx dest, rtx src)       (const_poly_int:DI [16, 16]) // <- op_1       ))     */ -  rtx src_op_0 = XEXP (src, 0); - -  if (GET_CODE (src) == CONST && GET_CODE (src_op_0) == PLUS -    && CONST_POLY_INT_P (XEXP (src_op_0, 1))) +  if (GET_CODE (src) == CONST && GET_CODE (XEXP (src, 0)) == PLUS +      && CONST_POLY_INT_P (XEXP (XEXP (src, 0), 1)))      {        rtx dest_tmp = gen_reg_rtx (mode);        rtx tmp = gen_reg_rtx (mode); -      riscv_emit_move (dest, XEXP (src_op_0, 0)); -      riscv_legitimize_poly_move (mode, dest_tmp, tmp, XEXP (src_op_0, 1)); +      riscv_emit_move (dest, XEXP (XEXP (src, 0), 0)); +      riscv_legitimize_poly_move (mode, dest_tmp, tmp, XEXP (XEXP (src, 0), 1));