From patchwork Fri Sep 8 06:53:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Chaitanya Chundru X-Patchwork-Id: 1831347 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=quicinc.com header.i=@quicinc.com header.a=rsa-sha256 header.s=qcppdkim1 header.b=awLv6CKb; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=linux-pci-owner@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4Rhn0739rGz1yhh for ; Fri, 8 Sep 2023 16:54:15 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242274AbjIHGyQ (ORCPT ); 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Fri, 08 Sep 2023 06:54:01 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3886s00N025755 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 8 Sep 2023 06:54:00 GMT Received: from hu-krichai-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.36; Thu, 7 Sep 2023 23:53:56 -0700 From: Krishna chaitanya chundru Date: Fri, 8 Sep 2023 12:23:35 +0530 Subject: [PATCH v6 1/4] PCI: endpoint: Add D-state change notifier support MIME-Version: 1.0 Message-ID: <20230908-dstate_change-v6-1-b414a6edd765@quicinc.com> References: <20230908-dstate_change-v6-0-b414a6edd765@quicinc.com> In-Reply-To: <20230908-dstate_change-v6-0-b414a6edd765@quicinc.com> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Manivannan Sadhasivam , Kishon Vijay Abraham I , Bjorn Helgaas , Jonathan Corbet , Rob Herring CC: , , , , , Krishna chaitanya chundru X-Mailer: b4 0.13-dev-83828 X-Developer-Signature: v=1; a=ed25519-sha256; t=1694156032; l=3437; i=quic_krichai@quicinc.com; s=20230907; h=from:subject:message-id; bh=jbgDRmZQrRxWP8VxR+Ppt4oqP/vV7+WYZt1SMSTQ3/o=; b=/Qn7oG4alWE3ShI9UBDarOrMB4EsvgRBxFakJpi/nhn9gGwVHkUFHsH6mmruHgPv6m4EtBhFY KX7Y6T/OtrSAPP+nFxAv4liF6exDTmqLLRv0OsCGyNjbnFZuSBTqmDU X-Developer-Key: i=quic_krichai@quicinc.com; a=ed25519; pk=10CL2pdAKFyzyOHbfSWHCD0X0my7CXxj8gJScmn1FAg= X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: zMAcOPpOuFOxXjxwDOEJYehbWSsl6WyF X-Proofpoint-GUID: zMAcOPpOuFOxXjxwDOEJYehbWSsl6WyF X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.601,FMLib:17.11.176.26 definitions=2023-09-08_03,2023-09-05_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 malwarescore=0 bulkscore=0 impostorscore=0 phishscore=0 clxscore=1015 suspectscore=0 mlxlogscore=797 mlxscore=0 priorityscore=1501 adultscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2308100000 definitions=main-2309080062 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add support to notify the EPF device about the D-state change event from the EPC device. Signed-off-by: Krishna chaitanya chundru --- Documentation/PCI/endpoint/pci-endpoint.rst | 4 ++++ drivers/pci/endpoint/pci-epc-core.c | 24 ++++++++++++++++++++++++ include/linux/pci-epc.h | 1 + include/linux/pci-epf.h | 2 ++ 4 files changed, 31 insertions(+) diff --git a/Documentation/PCI/endpoint/pci-endpoint.rst b/Documentation/PCI/endpoint/pci-endpoint.rst index 4f5622a65555..a1d610f612b4 100644 --- a/Documentation/PCI/endpoint/pci-endpoint.rst +++ b/Documentation/PCI/endpoint/pci-endpoint.rst @@ -78,6 +78,10 @@ by the PCI controller driver. Cleanup the pci_epc_mem structure allocated during pci_epc_mem_init(). +* pci_epc_dstate_notify() + + Notify all the function drivers that the EPC device has changed its D-state. + EPC APIs for the PCI Endpoint Function Driver ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c index 5a4a8b0be626..4d589a5c96f0 100644 --- a/drivers/pci/endpoint/pci-epc-core.c +++ b/drivers/pci/endpoint/pci-epc-core.c @@ -783,6 +783,30 @@ void pci_epc_bme_notify(struct pci_epc *epc) } EXPORT_SYMBOL_GPL(pci_epc_bme_notify); +/** + * pci_epc_dstate_notify() - Notify the EPF driver that EPC device D-state + * has changed + * @epc: the EPC device which has change in D-state + * @state: the changed D-state + * + * Invoke to Notify the EPF device that the EPC device D-state has + * changed. + */ +void pci_epc_dstate_notify(struct pci_epc *epc, pci_power_t state) +{ + struct pci_epf *epf; + + mutex_lock(&epc->list_lock); + list_for_each_entry(epf, &epc->pci_epf, list) { + mutex_lock(&epf->lock); + if (epf->event_ops && epf->event_ops->dstate_notify) + epf->event_ops->dstate_notify(epf, state); + mutex_unlock(&epf->lock); + } + mutex_unlock(&epc->list_lock); +} +EXPORT_SYMBOL_GPL(pci_epc_dstate_notify); + /** * pci_epc_destroy() - destroy the EPC device * @epc: the EPC device that has to be destroyed diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h index 5cb694031072..225a5a88627f 100644 --- a/include/linux/pci-epc.h +++ b/include/linux/pci-epc.h @@ -251,4 +251,5 @@ void __iomem *pci_epc_mem_alloc_addr(struct pci_epc *epc, phys_addr_t *phys_addr, size_t size); void pci_epc_mem_free_addr(struct pci_epc *epc, phys_addr_t phys_addr, void __iomem *virt_addr, size_t size); +void pci_epc_dstate_notify(struct pci_epc *epc, pci_power_t state); #endif /* __LINUX_PCI_EPC_H */ diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h index 3f44b6aec477..b2178bb0e976 100644 --- a/include/linux/pci-epf.h +++ b/include/linux/pci-epf.h @@ -73,12 +73,14 @@ struct pci_epf_ops { * @link_up: Callback for the EPC link up event * @link_down: Callback for the EPC link down event * @bme: Callback for the EPC BME (Bus Master Enable) event + * @dstate_notify: Callback for the EPC D-state change event */ struct pci_epc_event_ops { int (*core_init)(struct pci_epf *epf); int (*link_up)(struct pci_epf *epf); int (*link_down)(struct pci_epf *epf); int (*bme)(struct pci_epf *epf); + int (*dstate_notify)(struct pci_epf *epf, pci_power_t state); }; /** From patchwork Fri Sep 8 06:53:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Chaitanya Chundru X-Patchwork-Id: 1831348 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=quicinc.com header.i=@quicinc.com header.a=rsa-sha256 header.s=qcppdkim1 header.b=TYEJHwyp; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=linux-pci-owner@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4Rhn0B0lvPz1yhG for ; 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Thu, 7 Sep 2023 23:54:00 -0700 From: Krishna chaitanya chundru Date: Fri, 8 Sep 2023 12:23:36 +0530 Subject: [PATCH v6 2/4] PCI: qcom-ep: Add support for D-state change notification MIME-Version: 1.0 Message-ID: <20230908-dstate_change-v6-2-b414a6edd765@quicinc.com> References: <20230908-dstate_change-v6-0-b414a6edd765@quicinc.com> In-Reply-To: <20230908-dstate_change-v6-0-b414a6edd765@quicinc.com> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Manivannan Sadhasivam , Kishon Vijay Abraham I , Bjorn Helgaas , Jonathan Corbet , Rob Herring CC: , , , , , Krishna chaitanya chundru X-Mailer: b4 0.13-dev-83828 X-Developer-Signature: v=1; a=ed25519-sha256; t=1694156032; l=1690; i=quic_krichai@quicinc.com; s=20230907; h=from:subject:message-id; bh=7+fZlP+EjfzIGzfl9thzeVMRXwgPe/8fqtyjrkfcWYM=; b=uNHFDsG3il+U8v679Cu7FfTy6QaK2MIzhlbGC9xYVhOos7Mf6J3JQe4vsgS1gf7P0yAEtSmFh nLwZ/4zXrnlBEuYyJVwM26rDEKVLHZq6vGGMnDawUhjqJYsjqSWf6Zx X-Developer-Key: i=quic_krichai@quicinc.com; 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Signed-off-by: Krishna chaitanya chundru Reviewed-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c index 8bd8107690a6..402ace57309d 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -633,6 +633,7 @@ static irqreturn_t qcom_pcie_ep_global_irq_thread(int irq, void *data) struct device *dev = pci->dev; u32 status = readl_relaxed(pcie_ep->parf + PARF_INT_ALL_STATUS); u32 mask = readl_relaxed(pcie_ep->parf + PARF_INT_ALL_MASK); + pci_power_t state; u32 dstate, val; writel_relaxed(status, pcie_ep->parf + PARF_INT_ALL_CLEAR); @@ -656,11 +657,16 @@ static irqreturn_t qcom_pcie_ep_global_irq_thread(int irq, void *data) dstate = dw_pcie_readl_dbi(pci, DBI_CON_STATUS) & DBI_CON_STATUS_POWER_STATE_MASK; dev_dbg(dev, "Received D%d state event\n", dstate); - if (dstate == 3) { + state = dstate; + if (dstate == PCI_D3hot) { val = readl_relaxed(pcie_ep->parf + PARF_PM_CTRL); val |= PARF_PM_CTRL_REQ_EXIT_L1; writel_relaxed(val, pcie_ep->parf + PARF_PM_CTRL); + + if (gpiod_get_value(pcie_ep->reset)) + state = PCI_D3cold; } + pci_epc_dstate_notify(pci->ep.epc, state); } else if (FIELD_GET(PARF_INT_ALL_LINK_UP, status)) { dev_dbg(dev, "Received Linkup event. Enumeration complete!\n"); dw_pcie_ep_linkup(&pci->ep); From patchwork Fri Sep 8 06:53:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Chaitanya Chundru X-Patchwork-Id: 1831350 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=quicinc.com header.i=@quicinc.com header.a=rsa-sha256 header.s=qcppdkim1 header.b=GnXwV6nJ; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=linux-pci-owner@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4Rhn0S0Jnkz1yhG for ; Fri, 8 Sep 2023 16:54:32 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242357AbjIHGyd (ORCPT ); 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Fri, 08 Sep 2023 06:54:09 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3886s8wR015171 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 8 Sep 2023 06:54:08 GMT Received: from hu-krichai-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.36; Thu, 7 Sep 2023 23:54:04 -0700 From: Krishna chaitanya chundru Date: Fri, 8 Sep 2023 12:23:37 +0530 Subject: [PATCH v6 3/4] PCI: qcom-ep: Print D-state name to distinguish D3hot/D3cold MIME-Version: 1.0 Message-ID: <20230908-dstate_change-v6-3-b414a6edd765@quicinc.com> References: <20230908-dstate_change-v6-0-b414a6edd765@quicinc.com> In-Reply-To: <20230908-dstate_change-v6-0-b414a6edd765@quicinc.com> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Manivannan Sadhasivam , Kishon Vijay Abraham I , Bjorn Helgaas , Jonathan Corbet , Rob Herring CC: , , , , , Krishna chaitanya chundru X-Mailer: b4 0.13-dev-83828 X-Developer-Signature: v=1; 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Signed-off-by: Krishna chaitanya chundru --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c index 402ace57309d..2337602ebc7f 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -656,7 +656,6 @@ static irqreturn_t qcom_pcie_ep_global_irq_thread(int irq, void *data) } else if (FIELD_GET(PARF_INT_ALL_DSTATE_CHANGE, status)) { dstate = dw_pcie_readl_dbi(pci, DBI_CON_STATUS) & DBI_CON_STATUS_POWER_STATE_MASK; - dev_dbg(dev, "Received D%d state event\n", dstate); state = dstate; if (dstate == PCI_D3hot) { val = readl_relaxed(pcie_ep->parf + PARF_PM_CTRL); @@ -666,6 +665,7 @@ static irqreturn_t qcom_pcie_ep_global_irq_thread(int irq, void *data) if (gpiod_get_value(pcie_ep->reset)) state = PCI_D3cold; } + dev_dbg(dev, "Received %s event\n", pci_power_name(state)); pci_epc_dstate_notify(pci->ep.epc, state); } else if (FIELD_GET(PARF_INT_ALL_LINK_UP, status)) { dev_dbg(dev, "Received Linkup event. Enumeration complete!\n"); From patchwork Fri Sep 8 06:53:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Chaitanya Chundru X-Patchwork-Id: 1831351 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=quicinc.com header.i=@quicinc.com header.a=rsa-sha256 header.s=qcppdkim1 header.b=nObuKNjC; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=linux-pci-owner@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4Rhn0X3XbSz1yhG for ; Fri, 8 Sep 2023 16:54:36 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242431AbjIHGyg (ORCPT ); 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Fri, 08 Sep 2023 06:54:13 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3886sCcQ015257 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 8 Sep 2023 06:54:12 GMT Received: from hu-krichai-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.36; Thu, 7 Sep 2023 23:54:08 -0700 From: Krishna chaitanya chundru Date: Fri, 8 Sep 2023 12:23:38 +0530 Subject: [PATCH v6 4/4] PCI: epf-mhi: Add support for handling D-state notify from EPC MIME-Version: 1.0 Message-ID: <20230908-dstate_change-v6-4-b414a6edd765@quicinc.com> References: <20230908-dstate_change-v6-0-b414a6edd765@quicinc.com> In-Reply-To: <20230908-dstate_change-v6-0-b414a6edd765@quicinc.com> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Manivannan Sadhasivam , Kishon Vijay Abraham I , Bjorn Helgaas , Jonathan Corbet , Rob Herring CC: , , , , , Krishna chaitanya chundru X-Mailer: b4 0.13-dev-83828 X-Developer-Signature: v=1; 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Signed-off-by: Krishna chaitanya chundru --- drivers/pci/endpoint/functions/pci-epf-mhi.c | 11 +++++++++++ include/linux/mhi_ep.h | 3 +++ 2 files changed, 14 insertions(+) diff --git a/drivers/pci/endpoint/functions/pci-epf-mhi.c b/drivers/pci/endpoint/functions/pci-epf-mhi.c index b7b9d3e21f97..7bd15cca686c 100644 --- a/drivers/pci/endpoint/functions/pci-epf-mhi.c +++ b/drivers/pci/endpoint/functions/pci-epf-mhi.c @@ -592,6 +592,16 @@ static int pci_epf_mhi_bme(struct pci_epf *epf) return 0; } +static int pci_epf_mhi_dstate_notify(struct pci_epf *epf, pci_power_t state) +{ + struct pci_epf_mhi *epf_mhi = epf_get_drvdata(epf); + struct mhi_ep_cntrl *mhi_cntrl = &epf_mhi->mhi_cntrl; + + mhi_cntrl->dstate = state; + + return 0; +} + static int pci_epf_mhi_bind(struct pci_epf *epf) { struct pci_epf_mhi *epf_mhi = epf_get_drvdata(epf); @@ -649,6 +659,7 @@ static struct pci_epc_event_ops pci_epf_mhi_event_ops = { .link_up = pci_epf_mhi_link_up, .link_down = pci_epf_mhi_link_down, .bme = pci_epf_mhi_bme, + .dstate_notify = pci_epf_mhi_dstate_notify, }; static int pci_epf_mhi_probe(struct pci_epf *epf, diff --git a/include/linux/mhi_ep.h b/include/linux/mhi_ep.h index f198a8ac7ee7..c3a068592d21 100644 --- a/include/linux/mhi_ep.h +++ b/include/linux/mhi_ep.h @@ -8,6 +8,7 @@ #include #include +#include #define MHI_EP_DEFAULT_MTU 0x8000 @@ -139,6 +140,8 @@ struct mhi_ep_cntrl { enum mhi_state mhi_state; + pci_power_t dstate; + u32 max_chan; u32 mru; u32 event_rings;