From patchwork Tue Aug 8 05:34:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 1818782 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4RL0Ql5gYCz1yVt for ; Wed, 9 Aug 2023 03:23:43 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234500AbjHHRXm (ORCPT ); Tue, 8 Aug 2023 13:23:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42262 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234483AbjHHRXQ (ORCPT ); Tue, 8 Aug 2023 13:23:16 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4890B1E5A4; Tue, 8 Aug 2023 09:09:42 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 28FE62011CA; Tue, 8 Aug 2023 08:08:55 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id E27E62011BA; Tue, 8 Aug 2023 08:08:54 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 45A48181D0E2; Tue, 8 Aug 2023 14:08:53 +0800 (+08) From: Richard Zhu To: frank.li@nxp.com, l.stach@pengutronix.de, shawnguo@kernel.org, lpieralisi@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [PATCH v3 1/9] dt-bindings: PCI: fsl,imx6q: Add i.MX6Q and i.MX6QP PCIe EP compatibles Date: Tue, 8 Aug 2023 13:34:10 +0800 Message-Id: <1691472858-9383-2-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1691472858-9383-1-git-send-email-hongxing.zhu@nxp.com> References: <1691472858-9383-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add i.MX6Q and i.MX6QP PCIe EP compatibles. - Make the interrupts property optional, since i.MX6Q/i.MX6QP PCIe don't have DMA capability. - To pass the schema check, specify the clocks property refer to the different platforms. Signed-off-by: Richard Zhu Reviewed-by: Krzysztof Kozlowski --- .../bindings/pci/fsl,imx6q-pcie-ep.yaml | 31 ++++++++++++++++--- 1 file changed, 27 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml index ee155ed5f181..9b881777c801 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml @@ -19,6 +19,8 @@ description: |+ properties: compatible: enum: + - fsl,imx6q-pcie-ep + - fsl,imx6qp-pcie-ep - fsl,imx8mm-pcie-ep - fsl,imx8mq-pcie-ep - fsl,imx8mp-pcie-ep @@ -46,7 +48,7 @@ properties: interrupts: items: - - description: builtin eDMA interrupter. + - description: builtin eDMA interrupter (optional). interrupt-names: items: @@ -56,8 +58,6 @@ required: - compatible - reg - reg-names - - interrupts - - interrupt-names allOf: - $ref: /schemas/pci/snps,dw-pcie-ep.yaml# @@ -77,7 +77,30 @@ allOf: - const: pcie_bus - const: pcie_phy - const: pcie_aux - else: + + - if: + properties: + compatible: + enum: + - fsl,imx6q-pcie-ep + - fsl,imx6qp-pcie-ep + then: + properties: + clocks: + maxItems: 3 + clock-names: + items: + - const: pcie + - const: pcie_bus + - const: pcie_phy + + - if: + properties: + compatible: + enum: + - fsl,imx8mm-pcie-ep + - fsl,imx8mp-pcie-ep + then: properties: clocks: maxItems: 3 From patchwork Tue Aug 8 05:34:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 1818839 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4RL1sz2GQBz1yVt for ; Wed, 9 Aug 2023 04:28:55 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235942AbjHHS2x (ORCPT ); Tue, 8 Aug 2023 14:28:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39398 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235673AbjHHS2c (ORCPT ); Tue, 8 Aug 2023 14:28:32 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1B81783F3; Tue, 8 Aug 2023 10:44:03 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 4D7222011B9; Tue, 8 Aug 2023 08:08:56 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 13FC32011BB; Tue, 8 Aug 2023 08:08:56 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 6483B1800318; Tue, 8 Aug 2023 14:08:54 +0800 (+08) From: Richard Zhu To: frank.li@nxp.com, l.stach@pengutronix.de, shawnguo@kernel.org, lpieralisi@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [PATCH v3 2/9] dt-bindings: PCI: fsl,imx6q: Add i.MX6SX PCIe EP compatibles Date: Tue, 8 Aug 2023 13:34:11 +0800 Message-Id: <1691472858-9383-3-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1691472858-9383-1-git-send-email-hongxing.zhu@nxp.com> References: <1691472858-9383-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add i.MX6SX PCIe EP compatibles. Signed-off-by: Richard Zhu Reviewed-by: Krzysztof Kozlowski --- .../bindings/pci/fsl,imx6q-pcie-ep.yaml | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml index 9b881777c801..26448084340a 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml @@ -21,6 +21,7 @@ properties: enum: - fsl,imx6q-pcie-ep - fsl,imx6qp-pcie-ep + - fsl,imx6sx-pcie-ep - fsl,imx8mm-pcie-ep - fsl,imx8mq-pcie-ep - fsl,imx8mp-pcie-ep @@ -62,6 +63,22 @@ required: allOf: - $ref: /schemas/pci/snps,dw-pcie-ep.yaml# - $ref: /schemas/pci/fsl,imx6q-pcie-common.yaml# + - if: + properties: + compatible: + enum: + - fsl,imx6sx-pcie-ep + then: + properties: + clocks: + minItems: 4 + clock-names: + items: + - const: pcie + - const: pcie_bus + - const: pcie_phy + - const: pcie_inbound_axi + - if: properties: compatible: From patchwork Tue Aug 8 05:34:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 1818785 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4RL0R32Zbwz1yfh for ; Wed, 9 Aug 2023 03:23:59 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234208AbjHHRX6 (ORCPT ); Tue, 8 Aug 2023 13:23:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46174 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233789AbjHHRX0 (ORCPT ); Tue, 8 Aug 2023 13:23:26 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4EA2635B7; Tue, 8 Aug 2023 09:09:48 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 76C352011BB; Tue, 8 Aug 2023 08:08:57 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 3C6DC2011BA; Tue, 8 Aug 2023 08:08:57 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 8D68D1800319; Tue, 8 Aug 2023 14:08:55 +0800 (+08) From: Richard Zhu To: frank.li@nxp.com, l.stach@pengutronix.de, shawnguo@kernel.org, lpieralisi@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [PATCH v3 3/9] dt-bindings: PCI: fsl,imx6q: Add i.MX7D PCIe EP compatibles Date: Tue, 8 Aug 2023 13:34:12 +0800 Message-Id: <1691472858-9383-4-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1691472858-9383-1-git-send-email-hongxing.zhu@nxp.com> References: <1691472858-9383-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add i.MX7D PCIe EP compatibles. Signed-off-by: Richard Zhu Reviewed-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml index 26448084340a..e8518642ba9b 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml @@ -22,6 +22,7 @@ properties: - fsl,imx6q-pcie-ep - fsl,imx6qp-pcie-ep - fsl,imx6sx-pcie-ep + - fsl,imx7d-pcie-ep - fsl,imx8mm-pcie-ep - fsl,imx8mq-pcie-ep - fsl,imx8mp-pcie-ep @@ -101,6 +102,7 @@ allOf: enum: - fsl,imx6q-pcie-ep - fsl,imx6qp-pcie-ep + - fsl,imx7d-pcie-ep then: properties: clocks: From patchwork Tue Aug 8 05:34:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 1818910 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4RL2lW5KZFz1yfM for ; Wed, 9 Aug 2023 05:08:23 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232426AbjHHTIW (ORCPT ); Tue, 8 Aug 2023 15:08:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52582 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232380AbjHHTH7 (ORCPT ); Tue, 8 Aug 2023 15:07:59 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 51D0646BA; Tue, 8 Aug 2023 09:30:04 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 953072011C7; Tue, 8 Aug 2023 08:08:58 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 5A2D32011BF; Tue, 8 Aug 2023 08:08:58 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id B4DDC1800318; Tue, 8 Aug 2023 14:08:56 +0800 (+08) From: Richard Zhu To: frank.li@nxp.com, l.stach@pengutronix.de, shawnguo@kernel.org, lpieralisi@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [PATCH v3 4/9] arm: dts: nxp: Add i.MX6QDL and i.MX6QP PCIe EP supports Date: Tue, 8 Aug 2023 13:34:13 +0800 Message-Id: <1691472858-9383-5-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1691472858-9383-1-git-send-email-hongxing.zhu@nxp.com> References: <1691472858-9383-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add i.MX6QDL and i.MX6QP PCIe EP supports. Signed-off-by: Richard Zhu --- arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi | 14 ++++++++++++++ arch/arm/boot/dts/nxp/imx/imx6qp.dtsi | 4 ++++ 2 files changed, 18 insertions(+) diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi index bda182edc589..be02f7882c68 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi @@ -289,6 +289,20 @@ pcie: pcie@1ffc000 { status = "disabled"; }; + pcie_ep: pcie-ep@1ffc000 { + compatible = "fsl,imx6q-pcie-ep"; + reg = <0x01ffc000 0x04000>, <0x01000000 0xf00000>; + reg-names = "dbi", "addr_space"; + num-lanes = <1>; + clocks = <&clks IMX6QDL_CLK_PCIE_AXI>, + <&clks IMX6QDL_CLK_LVDS1_GATE>, + <&clks IMX6QDL_CLK_PCIE_REF_125M>; + clock-names = "pcie", "pcie_bus", "pcie_phy"; + num-ib-windows = <4>; + num-ob-windows = <4>; + status = "disabled"; + }; + aips1: bus@2000000 { /* AIPS1 */ compatible = "fsl,aips-bus", "simple-bus"; #address-cells = <1>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qp.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qp.dtsi index fc164991d2ae..4ca53a4c254c 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qp.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qp.dtsi @@ -118,3 +118,7 @@ &mmdc0 { &pcie { compatible = "fsl,imx6qp-pcie"; }; + +&pcie_ep { + compatible = "fsl,imx6qp-pcie-ep"; +}; From patchwork Tue Aug 8 05:34:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 1818946 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4RL3f90FT6z1yYl for ; Wed, 9 Aug 2023 05:48:49 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234234AbjHHTsq (ORCPT ); Tue, 8 Aug 2023 15:48:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40822 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234803AbjHHTsf (ORCPT ); Tue, 8 Aug 2023 15:48:35 -0400 Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8E8724DEB7; Tue, 8 Aug 2023 09:53:06 -0700 (PDT) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id BC76D1A11CE; Tue, 8 Aug 2023 08:08:59 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 825CA1A11C8; Tue, 8 Aug 2023 08:08:59 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id D35B51800319; Tue, 8 Aug 2023 14:08:57 +0800 (+08) From: Richard Zhu To: frank.li@nxp.com, l.stach@pengutronix.de, shawnguo@kernel.org, lpieralisi@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [PATCH v3 5/9] arm: dts: nxp: Add i.MX6SX PCIe EP support Date: Tue, 8 Aug 2023 13:34:14 +0800 Message-Id: <1691472858-9383-6-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1691472858-9383-1-git-send-email-hongxing.zhu@nxp.com> References: <1691472858-9383-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add i.MX6SX PCIe EP support. Signed-off-by: Richard Zhu --- arch/arm/boot/dts/nxp/imx/imx6sx.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi index f6b35923ad83..13411a843e07 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi @@ -1471,5 +1471,22 @@ pcie: pcie@8ffc000 { power-domain-names = "pcie", "pcie_phy"; status = "disabled"; }; + + pcie_ep: pcie-ep@8ffc000 { + compatible = "fsl,imx6sx-pcie-ep"; + reg = <0x08ffc000 0x04000>, <0x08000000 0xf00000>; + reg-names = "dbi", "addr_space"; + num-lanes = <1>; + clocks = <&clks IMX6SX_CLK_PCIE_AXI>, + <&clks IMX6SX_CLK_LVDS1_OUT>, + <&clks IMX6SX_CLK_PCIE_REF_125M>, + <&clks IMX6SX_CLK_DISPLAY_AXI>; + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_inbound_axi"; + power-domains = <&pd_disp>, <&pd_pci>; + power-domain-names = "pcie", "pcie_phy"; + num-ib-windows = <4>; + num-ob-windows = <4>; + status = "disabled"; + }; }; }; From patchwork Tue Aug 8 05:34:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 1818677 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4RKyXv5pJsz1yVt for ; Wed, 9 Aug 2023 01:58:55 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231389AbjHHP6x (ORCPT ); Tue, 8 Aug 2023 11:58:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54566 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229774AbjHHP5b (ORCPT ); Tue, 8 Aug 2023 11:57:31 -0400 Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 70F075FC4; Tue, 8 Aug 2023 08:44:02 -0700 (PDT) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id DA7D11A11C0; Tue, 8 Aug 2023 08:09:00 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id A0C781A1B45; Tue, 8 Aug 2023 08:09:00 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 074B41800318; Tue, 8 Aug 2023 14:08:58 +0800 (+08) From: Richard Zhu To: frank.li@nxp.com, l.stach@pengutronix.de, shawnguo@kernel.org, lpieralisi@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [PATCH v3 6/9] arm: dts: nxp: Add i.MX7D PCIe EP support Date: Tue, 8 Aug 2023 13:34:15 +0800 Message-Id: <1691472858-9383-7-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1691472858-9383-1-git-send-email-hongxing.zhu@nxp.com> References: <1691472858-9383-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add i.MX7D PCIe EP support. Signed-off-by: Richard Zhu --- arch/arm/boot/dts/nxp/imx/imx7d.dtsi | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm/boot/dts/nxp/imx/imx7d.dtsi b/arch/arm/boot/dts/nxp/imx/imx7d.dtsi index 4b94b8afb55d..135684f17a20 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7d.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx7d.dtsi @@ -156,6 +156,33 @@ pcie: pcie@33800000 { fsl,imx7d-pcie-phy = <&pcie_phy>; status = "disabled"; }; + + pcie_ep: pcie-ep@33800000 { + compatible = "fsl,imx7d-pcie-ep"; + reg = <0x33800000 0x4000>, + <0x40000000 0x10000000>; + reg-names = "dbi", "addr_space"; + num-lanes = <1>; + clocks = <&clks IMX7D_PCIE_CTRL_ROOT_CLK>, + <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>, + <&clks IMX7D_PCIE_PHY_ROOT_CLK>; + clock-names = "pcie", "pcie_bus", "pcie_phy"; + assigned-clocks = <&clks IMX7D_PCIE_CTRL_ROOT_SRC>, + <&clks IMX7D_PCIE_PHY_ROOT_SRC>; + assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_250M_CLK>, + <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; + + fsl,max-link-speed = <2>; + power-domains = <&pgc_pcie_phy>; + resets = <&src IMX7_RESET_PCIEPHY>, + <&src IMX7_RESET_PCIE_CTRL_APPS_EN>, + <&src IMX7_RESET_PCIE_CTRL_APPS_TURNOFF>; + reset-names = "pciephy", "apps", "turnoff"; + fsl,imx7d-pcie-phy = <&pcie_phy>; + num-ib-windows = <4>; + num-ob-windows = <4>; + status = "disabled"; + }; }; }; From patchwork Tue Aug 8 05:34:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 1818682 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4RKybL6hpdz1yYl for ; Wed, 9 Aug 2023 02:01:02 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231564AbjHHQBB (ORCPT ); Tue, 8 Aug 2023 12:01:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43610 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229470AbjHHP72 (ORCPT ); Tue, 8 Aug 2023 11:59:28 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 940A061A4; Tue, 8 Aug 2023 08:44:30 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 3617D2011BC; Tue, 8 Aug 2023 08:09:02 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id C35452011BA; Tue, 8 Aug 2023 08:09:01 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 279571800319; Tue, 8 Aug 2023 14:09:00 +0800 (+08) From: Richard Zhu To: frank.li@nxp.com, l.stach@pengutronix.de, shawnguo@kernel.org, lpieralisi@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [PATCH v3 7/9] PCI: imx6: Add i.MX6Q and i.MX6QP PCIe EP supports Date: Tue, 8 Aug 2023 13:34:16 +0800 Message-Id: <1691472858-9383-8-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1691472858-9383-1-git-send-email-hongxing.zhu@nxp.com> References: <1691472858-9383-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add i.MX6Q and i.MX6QP PCIe EP supports. Signed-off-by: Richard Zhu --- drivers/pci/controller/dwc/pci-imx6.c | 59 +++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 27aaa2a6bf39..9a6531ddfef2 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -46,8 +46,10 @@ enum imx6_pcie_variants { IMX6Q, + IMX6Q_EP, IMX6SX, IMX6QP, + IMX6QP_EP, IMX7D, IMX8MQ, IMX8MM, @@ -67,6 +69,7 @@ struct imx6_pcie_drvdata { u32 flags; int dbi_length; const char *gpr; + const struct pci_epc_features *epc_features; }; struct imx6_pcie { @@ -567,7 +570,9 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie) IMX6SX_GPR12_PCIE_TEST_POWERDOWN, 0); break; case IMX6QP: + case IMX6QP_EP: case IMX6Q: + case IMX6Q_EP: /* power up core phy and enable ref clock */ regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_TEST_PD, 0 << 18); @@ -619,7 +624,9 @@ static void imx6_pcie_disable_ref_clk(struct imx6_pcie *imx6_pcie) clk_disable_unprepare(imx6_pcie->pcie_inbound_axi); break; case IMX6QP: + case IMX6QP_EP: case IMX6Q: + case IMX6Q_EP: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_REF_CLK_EN, 0); regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, @@ -720,11 +727,13 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie) IMX6SX_GPR5_PCIE_BTNRST_RESET); break; case IMX6QP: + case IMX6QP_EP: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_SW_RST, IMX6Q_GPR1_PCIE_SW_RST); break; case IMX6Q: + case IMX6Q_EP: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_TEST_PD, 1 << 18); regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, @@ -777,12 +786,14 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) IMX6SX_GPR5_PCIE_BTNRST_RESET, 0); break; case IMX6QP: + case IMX6QP_EP: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_SW_RST, 0); usleep_range(200, 500); break; case IMX6Q: /* Nothing to do */ + case IMX6Q_EP: case IMX8MM: case IMX8MM_EP: case IMX8MP: @@ -827,8 +838,10 @@ static void imx6_pcie_ltssm_enable(struct device *dev) switch (imx6_pcie->drvdata->variant) { case IMX6Q: + case IMX6Q_EP: case IMX6SX: case IMX6QP: + case IMX6QP_EP: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6Q_GPR12_PCIE_CTL_2, IMX6Q_GPR12_PCIE_CTL_2); @@ -851,8 +864,10 @@ static void imx6_pcie_ltssm_disable(struct device *dev) switch (imx6_pcie->drvdata->variant) { case IMX6Q: + case IMX6Q_EP: case IMX6SX: case IMX6QP: + case IMX6QP_EP: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6Q_GPR12_PCIE_CTL_2, 0); break; @@ -1077,6 +1092,27 @@ static int imx6_pcie_ep_raise_irq(struct dw_pcie_ep *ep, u8 func_no, return 0; } +/* + * i.MX6Q and i.MX6QP PCIe EP BAR definitions. + * +-----------------------------------------------------------------+ + * | BAR0 | BAR1 | BAR2 | BAR3 | BAR4 | BAR5 | + * +----------|----------|----------|----------|----------|----------+ + * | 64-bit | Disabled | 32-bit | 32-bit | Disabled | Disabled | + * | | | | Fixed | | | + * | | | | 256Bytes | | | + * | Prefetch | | Prefetch | None- | | | + * | Memory | | Memory | Prefetch | | | + * | | | | IO | | | + * +-----------------------------------------------------------------+ + */ +static const struct pci_epc_features imx6q_pcie_epc_features = { + .linkup_notifier = false, + .msi_capable = true, + .msix_capable = false, + .reserved_bar = 1 << BAR_4 | 1 << BAR_5, + .align = SZ_64K, +}; + static const struct pci_epc_features imx8m_pcie_epc_features = { .linkup_notifier = false, .msi_capable = true, @@ -1088,6 +1124,12 @@ static const struct pci_epc_features imx8m_pcie_epc_features = { static const struct pci_epc_features* imx6_pcie_ep_get_features(struct dw_pcie_ep *ep) { + struct dw_pcie *pci = to_dw_pcie_from_ep(ep); + struct imx6_pcie *imx6_pcie = to_imx6_pcie(pci); + + if (imx6_pcie->drvdata->epc_features) + return imx6_pcie->drvdata->epc_features; + return &imx8m_pcie_epc_features; } @@ -1157,6 +1199,7 @@ static void imx6_pcie_pm_turnoff(struct imx6_pcie *imx6_pcie) switch (imx6_pcie->drvdata->variant) { case IMX6SX: case IMX6QP: + case IMX6QP_EP: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6SX_GPR12_PCIE_PM_TURN_OFF, IMX6SX_GPR12_PCIE_PM_TURN_OFF); @@ -1478,6 +1521,13 @@ static const struct imx6_pcie_drvdata drvdata[] = { .dbi_length = 0x200, .gpr = "fsl,imx6q-iomuxc-gpr", }, + [IMX6Q_EP] = { + .variant = IMX6Q_EP, + .mode = DW_PCIE_EP_TYPE, + .flags = IMX6_PCIE_FLAG_IMX6_PHY, + .gpr = "fsl,imx6q-iomuxc-gpr", + .epc_features = &imx6q_pcie_epc_features, + }, [IMX6SX] = { .variant = IMX6SX, .flags = IMX6_PCIE_FLAG_IMX6_PHY | @@ -1493,6 +1543,13 @@ static const struct imx6_pcie_drvdata drvdata[] = { .dbi_length = 0x200, .gpr = "fsl,imx6q-iomuxc-gpr", }, + [IMX6QP_EP] = { + .variant = IMX6QP_EP, + .mode = DW_PCIE_EP_TYPE, + .flags = IMX6_PCIE_FLAG_IMX6_PHY, + .gpr = "fsl,imx6q-iomuxc-gpr", + .epc_features = &imx6q_pcie_epc_features, + }, [IMX7D] = { .variant = IMX7D, .flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND, @@ -1531,8 +1588,10 @@ static const struct imx6_pcie_drvdata drvdata[] = { static const struct of_device_id imx6_pcie_of_match[] = { { .compatible = "fsl,imx6q-pcie", .data = &drvdata[IMX6Q], }, + { .compatible = "fsl,imx6q-pcie-ep", .data = &drvdata[IMX6Q_EP], }, { .compatible = "fsl,imx6sx-pcie", .data = &drvdata[IMX6SX], }, { .compatible = "fsl,imx6qp-pcie", .data = &drvdata[IMX6QP], }, + { .compatible = "fsl,imx6qp-pcie-ep", .data = &drvdata[IMX6QP_EP], }, { .compatible = "fsl,imx7d-pcie", .data = &drvdata[IMX7D], }, { .compatible = "fsl,imx8mq-pcie", .data = &drvdata[IMX8MQ], }, { .compatible = "fsl,imx8mm-pcie", .data = &drvdata[IMX8MM], }, From patchwork Tue Aug 8 05:34:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 1818668 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4RKyMn1fzNz1yfM for ; Wed, 9 Aug 2023 01:51:01 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230139AbjHHPu6 (ORCPT ); Tue, 8 Aug 2023 11:50:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53936 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229470AbjHHPtA (ORCPT ); Tue, 8 Aug 2023 11:49:00 -0400 Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C896C10CF; Tue, 8 Aug 2023 08:42:02 -0700 (PDT) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 6D2E41A11D5; Tue, 8 Aug 2023 08:09:03 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 007941A11C8; Tue, 8 Aug 2023 08:09:03 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 481F91800318; Tue, 8 Aug 2023 14:09:01 +0800 (+08) From: Richard Zhu To: frank.li@nxp.com, l.stach@pengutronix.de, shawnguo@kernel.org, lpieralisi@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [PATCH v3 8/9] PCI: imx6: Add i.MX6SX PCIe EP support Date: Tue, 8 Aug 2023 13:34:17 +0800 Message-Id: <1691472858-9383-9-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1691472858-9383-1-git-send-email-hongxing.zhu@nxp.com> References: <1691472858-9383-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add the i.MX6SX PCIe EP support. Signed-off-by: Richard Zhu Acked-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pci-imx6.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 9a6531ddfef2..43c5251f5160 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -48,6 +48,7 @@ enum imx6_pcie_variants { IMX6Q, IMX6Q_EP, IMX6SX, + IMX6SX_EP, IMX6QP, IMX6QP_EP, IMX7D, @@ -362,6 +363,7 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie) IMX7D_GPR12_PCIE_PHY_REFCLK_SEL, 0); break; case IMX6SX: + case IMX6SX_EP: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6SX_GPR12_PCIE_RX_EQ_MASK, IMX6SX_GPR12_PCIE_RX_EQ_2); @@ -560,6 +562,7 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie) switch (imx6_pcie->drvdata->variant) { case IMX6SX: + case IMX6SX_EP: ret = clk_prepare_enable(imx6_pcie->pcie_inbound_axi); if (ret) { dev_err(dev, "unable to enable pcie_axi clock\n"); @@ -621,6 +624,7 @@ static void imx6_pcie_disable_ref_clk(struct imx6_pcie *imx6_pcie) { switch (imx6_pcie->drvdata->variant) { case IMX6SX: + case IMX6SX_EP: clk_disable_unprepare(imx6_pcie->pcie_inbound_axi); break; case IMX6QP: @@ -718,6 +722,7 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie) reset_control_assert(imx6_pcie->apps_reset); break; case IMX6SX: + case IMX6SX_EP: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6SX_GPR12_PCIE_TEST_POWERDOWN, IMX6SX_GPR12_PCIE_TEST_POWERDOWN); @@ -782,6 +787,7 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) imx7d_pcie_wait_for_phy_pll_lock(imx6_pcie); break; case IMX6SX: + case IMX6SX_EP: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR5, IMX6SX_GPR5_PCIE_BTNRST_RESET, 0); break; @@ -840,6 +846,7 @@ static void imx6_pcie_ltssm_enable(struct device *dev) case IMX6Q: case IMX6Q_EP: case IMX6SX: + case IMX6SX_EP: case IMX6QP: case IMX6QP_EP: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, @@ -866,6 +873,7 @@ static void imx6_pcie_ltssm_disable(struct device *dev) case IMX6Q: case IMX6Q_EP: case IMX6SX: + case IMX6SX_EP: case IMX6QP: case IMX6QP_EP: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, @@ -1198,6 +1206,7 @@ static void imx6_pcie_pm_turnoff(struct imx6_pcie *imx6_pcie) /* Others poke directly at IOMUXC registers */ switch (imx6_pcie->drvdata->variant) { case IMX6SX: + case IMX6SX_EP: case IMX6QP: case IMX6QP_EP: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, @@ -1361,6 +1370,7 @@ static int imx6_pcie_probe(struct platform_device *pdev) switch (imx6_pcie->drvdata->variant) { case IMX6SX: + case IMX6SX_EP: imx6_pcie->pcie_inbound_axi = devm_clk_get(dev, "pcie_inbound_axi"); if (IS_ERR(imx6_pcie->pcie_inbound_axi)) @@ -1535,6 +1545,13 @@ static const struct imx6_pcie_drvdata drvdata[] = { IMX6_PCIE_FLAG_SUPPORTS_SUSPEND, .gpr = "fsl,imx6q-iomuxc-gpr", }, + [IMX6SX_EP] = { + .variant = IMX6SX_EP, + .mode = DW_PCIE_EP_TYPE, + .flags = IMX6_PCIE_FLAG_IMX6_PHY, + .gpr = "fsl,imx6q-iomuxc-gpr", + .epc_features = &imx6q_pcie_epc_features, + }, [IMX6QP] = { .variant = IMX6QP, .flags = IMX6_PCIE_FLAG_IMX6_PHY | @@ -1590,6 +1607,7 @@ static const struct of_device_id imx6_pcie_of_match[] = { { .compatible = "fsl,imx6q-pcie", .data = &drvdata[IMX6Q], }, { .compatible = "fsl,imx6q-pcie-ep", .data = &drvdata[IMX6Q_EP], }, { .compatible = "fsl,imx6sx-pcie", .data = &drvdata[IMX6SX], }, + { .compatible = "fsl,imx6sx-pcie-ep", .data = &drvdata[IMX6SX_EP], }, { .compatible = "fsl,imx6qp-pcie", .data = &drvdata[IMX6QP], }, { .compatible = "fsl,imx6qp-pcie-ep", .data = &drvdata[IMX6QP_EP], }, { .compatible = "fsl,imx7d-pcie", .data = &drvdata[IMX7D], }, From patchwork Tue Aug 8 05:34:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 1818941 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4RL3Zp4Rlkz1yYl for ; Wed, 9 Aug 2023 05:45:54 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235585AbjHHTpv (ORCPT ); Tue, 8 Aug 2023 15:45:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53010 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230127AbjHHTpc (ORCPT ); Tue, 8 Aug 2023 15:45:32 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ADBDD16AD4; Tue, 8 Aug 2023 09:49:03 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 705692011BA; Tue, 8 Aug 2023 08:09:04 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 0A7172011C4; Tue, 8 Aug 2023 08:09:04 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 66E3E1800319; Tue, 8 Aug 2023 14:09:02 +0800 (+08) From: Richard Zhu To: frank.li@nxp.com, l.stach@pengutronix.de, shawnguo@kernel.org, lpieralisi@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [PATCH v3 9/9] PCI: imx6: Add i.MX7D PCIe EP support Date: Tue, 8 Aug 2023 13:34:18 +0800 Message-Id: <1691472858-9383-10-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1691472858-9383-1-git-send-email-hongxing.zhu@nxp.com> References: <1691472858-9383-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add the i.MX7D PCIe EP mode support. Signed-off-by: Richard Zhu Acked-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pci-imx6.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 43c5251f5160..af7659712537 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -52,6 +52,7 @@ enum imx6_pcie_variants { IMX6QP, IMX6QP_EP, IMX7D, + IMX7D_EP, IMX8MQ, IMX8MM, IMX8MP, @@ -359,6 +360,7 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie) 0); break; case IMX7D: + case IMX7D_EP: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX7D_GPR12_PCIE_PHY_REFCLK_SEL, 0); break; @@ -590,6 +592,7 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie) IMX6Q_GPR1_PCIE_REF_CLK_EN, 1 << 16); break; case IMX7D: + case IMX7D_EP: break; case IMX8MM: case IMX8MM_EP: @@ -638,6 +641,7 @@ static void imx6_pcie_disable_ref_clk(struct imx6_pcie *imx6_pcie) IMX6Q_GPR1_PCIE_TEST_PD); break; case IMX7D: + case IMX7D_EP: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX7D_GPR12_PCIE_PHY_REFCLK_SEL, IMX7D_GPR12_PCIE_PHY_REFCLK_SEL); @@ -711,6 +715,7 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie) { switch (imx6_pcie->drvdata->variant) { case IMX7D: + case IMX7D_EP: case IMX8MQ: case IMX8MQ_EP: reset_control_assert(imx6_pcie->pciephy_reset); @@ -763,6 +768,7 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) reset_control_deassert(imx6_pcie->pciephy_reset); break; case IMX7D: + case IMX7D_EP: reset_control_deassert(imx6_pcie->pciephy_reset); /* Workaround for ERR010728, failure of PCI-e PLL VCO to @@ -854,6 +860,7 @@ static void imx6_pcie_ltssm_enable(struct device *dev) IMX6Q_GPR12_PCIE_CTL_2); break; case IMX7D: + case IMX7D_EP: case IMX8MQ: case IMX8MQ_EP: case IMX8MM: @@ -880,6 +887,7 @@ static void imx6_pcie_ltssm_disable(struct device *dev) IMX6Q_GPR12_PCIE_CTL_2, 0); break; case IMX7D: + case IMX7D_EP: case IMX8MQ: case IMX8MQ_EP: case IMX8MM: @@ -1385,6 +1393,7 @@ static int imx6_pcie_probe(struct platform_device *pdev) "pcie_aux clock source missing or invalid\n"); fallthrough; case IMX7D: + case IMX7D_EP: if (dbi_base->start == IMX8MQ_PCIE2_BASE_ADDR) imx6_pcie->controller_id = 1; @@ -1572,6 +1581,12 @@ static const struct imx6_pcie_drvdata drvdata[] = { .flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND, .gpr = "fsl,imx7d-iomuxc-gpr", }, + [IMX7D_EP] = { + .variant = IMX7D_EP, + .mode = DW_PCIE_EP_TYPE, + .gpr = "fsl,imx7d-iomuxc-gpr", + .epc_features = &imx6q_pcie_epc_features, + }, [IMX8MQ] = { .variant = IMX8MQ, .gpr = "fsl,imx8mq-iomuxc-gpr", @@ -1611,6 +1626,7 @@ static const struct of_device_id imx6_pcie_of_match[] = { { .compatible = "fsl,imx6qp-pcie", .data = &drvdata[IMX6QP], }, { .compatible = "fsl,imx6qp-pcie-ep", .data = &drvdata[IMX6QP_EP], }, { .compatible = "fsl,imx7d-pcie", .data = &drvdata[IMX7D], }, + { .compatible = "fsl,imx7d-pcie-ep", .data = &drvdata[IMX7D_EP], }, { .compatible = "fsl,imx8mq-pcie", .data = &drvdata[IMX8MQ], }, { .compatible = "fsl,imx8mm-pcie", .data = &drvdata[IMX8MM], }, { .compatible = "fsl,imx8mp-pcie", .data = &drvdata[IMX8MP], },