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Tue, 27 Jun 2023 07:32:45 -0700 (PDT) Received: from m1x-phil.lan ([176.187.199.204]) by smtp.gmail.com with ESMTPSA id r24-20020a1709067fd800b009890f2c4cf9sm4627699ejs.79.2023.06.27.07.32.43 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 27 Jun 2023 07:32:45 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Alistair Francis , Paolo Bonzini , Weiwei Li , Palmer Dabbelt , =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Bin Meng , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Daniel Henrique Barboza , Liu Zhiwei , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org Subject: [PATCH 1/2] target/riscv: Only unify 'riscv32/64' -> 'riscv' for host cpu in meson Date: Tue, 27 Jun 2023 16:32:34 +0200 Message-Id: <20230627143235.29947-2-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230627143235.29947-1-philmd@linaro.org> References: <20230627143235.29947-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62f; envelope-from=philmd@linaro.org; helo=mail-ej1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org We want to keep the ability to distinct between 32/64-bit host. Signed-off-by: Philippe Mathieu-Daudé --- meson.build | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/meson.build b/meson.build index fc3c14a810..649de244c6 100644 --- a/meson.build +++ b/meson.build @@ -55,16 +55,11 @@ qapi_trace_events = [] bsd_oses = ['gnu/kfreebsd', 'freebsd', 'netbsd', 'openbsd', 'dragonfly', 'darwin'] supported_oses = ['windows', 'freebsd', 'netbsd', 'openbsd', 'darwin', 'sunos', 'linux'] -supported_cpus = ['ppc', 'ppc64', 's390x', 'riscv', 'x86', 'x86_64', +supported_cpus = ['ppc', 'ppc64', 's390x', 'riscv32', 'riscv64', 'x86', 'x86_64', 'arm', 'aarch64', 'loongarch64', 'mips', 'mips64', 'sparc64'] cpu = host_machine.cpu_family() -# Unify riscv* to a single family. -if cpu in ['riscv32', 'riscv64'] - cpu = 'riscv' -endif - target_dirs = config_host['TARGET_DIRS'].split() have_linux_user = false have_bsd_user = false @@ -99,6 +94,8 @@ elif cpu == 'x86' host_arch = 'i386' elif cpu == 'mips64' host_arch = 'mips' +elif cpu in ['riscv32', 'riscv64'] + host_arch = 'riscv' else host_arch = cpu endif @@ -113,7 +110,7 @@ elif cpu in ['ppc', 'ppc64'] kvm_targets = ['ppc-softmmu', 'ppc64-softmmu'] elif cpu in ['mips', 'mips64'] kvm_targets = ['mips-softmmu', 'mipsel-softmmu', 'mips64-softmmu', 'mips64el-softmmu'] -elif cpu in ['riscv'] +elif cpu in ['riscv32', 'riscv64'] kvm_targets = ['riscv32-softmmu', 'riscv64-softmmu'] else kvm_targets = [] From patchwork Tue Jun 27 14:32:35 2023 Content-Type: text/plain; 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Tue, 27 Jun 2023 07:32:52 -0700 (PDT) Received: from m1x-phil.lan ([176.187.199.204]) by smtp.gmail.com with ESMTPSA id n1-20020a1709061d0100b0098e1116737csm3915190ejh.24.2023.06.27.07.32.50 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 27 Jun 2023 07:32:51 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Alistair Francis , Paolo Bonzini , Weiwei Li , Palmer Dabbelt , =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Bin Meng , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Daniel Henrique Barboza , Liu Zhiwei , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org Subject: [PATCH 2/2] target/riscv: Only build KVM guest with same wordsize as host Date: Tue, 27 Jun 2023 16:32:35 +0200 Message-Id: <20230627143235.29947-3-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230627143235.29947-1-philmd@linaro.org> References: <20230627143235.29947-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::635; envelope-from=philmd@linaro.org; helo=mail-ej1-x635.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Per Anup Patel in [*]: > Currently, we only support running rv64 guest on rv64 host > and rv32 guest on rv32 host. > > In the future, we might support running rv32 guest on rv64 > host but as of now we don't see a strong push for it. Therefore, when only using the KVM accelerator it is pointless to build qemu-system-riscv32 on a rv64 host (or qemu-system-riscv64 on a rv32 host). Restrict meson to only build the correct binary, avoiding to waste ressources building unusable code. [*] https://lore.kernel.org/qemu-devel/CAAhSdy2JeRHeeoEc1XKQhPO3aDz4YKeyQsPT4S8yKJcYTA+AiQ@mail.gmail.com/ Signed-off-by: Philippe Mathieu-Daudé --- meson.build | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/meson.build b/meson.build index 649de244c6..a3ab614235 100644 --- a/meson.build +++ b/meson.build @@ -110,8 +110,10 @@ elif cpu in ['ppc', 'ppc64'] kvm_targets = ['ppc-softmmu', 'ppc64-softmmu'] elif cpu in ['mips', 'mips64'] kvm_targets = ['mips-softmmu', 'mipsel-softmmu', 'mips64-softmmu', 'mips64el-softmmu'] -elif cpu in ['riscv32', 'riscv64'] - kvm_targets = ['riscv32-softmmu', 'riscv64-softmmu'] +elif cpu in ['riscv32'] + kvm_targets = ['riscv32-softmmu'] +elif cpu in ['riscv64'] + kvm_targets = ['riscv64-softmmu'] else kvm_targets = [] endif